93
93
if ((s->conf & PL080_CONF_E) == 0)
96
cpu_abort(cpu_single_env, "DMA active\n");
96
hw_error("DMA active\n");
97
97
/* If we are already in the middle of a DMA operation then indicate that
98
98
there may be new DMA requests and return immediately. */
112
112
flow = (ch->conf >> 11) & 7;
114
cpu_abort(cpu_single_env,
115
115
"pl080_run: Peripheral flow control not implemented\n");
117
117
src_id = (ch->conf >> 1) & 0x1f;
288
288
case 10: /* SoftLBReq */
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289
case 11: /* SoftLSReq */
290
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/* ??? Implement these. */
291
cpu_abort(cpu_single_env, "pl080_write: Soft DMA not implemented\n");
291
hw_error("pl080_write: Soft DMA not implemented\n");
293
293
case 12: /* Configuration */
295
295
if (s->conf & (PL080_CONF_M1 | PL080_CONF_M1)) {
296
cpu_abort(cpu_single_env,
297
"pl080_write: Big-endian DMA not implemented\n");
296
hw_error("pl080_write: Big-endian DMA not implemented\n");
323
/* The PL080 and PL081 are the same except for the number of channels
324
they implement (8 and 2 respectively). */
325
void *pl080_init(uint32_t base, qemu_irq irq, int nchannels)
322
static void pl08x_init(SysBusDevice *dev, int nchannels)
325
pl080_state *s = FROM_SYSBUS(pl080_state, dev);
330
s = (pl080_state *)qemu_mallocz(sizeof(pl080_state));
331
327
iomemtype = cpu_register_io_memory(0, pl080_readfn,
332
328
pl080_writefn, s);
333
cpu_register_physical_memory(base, 0x00001000, iomemtype);
329
sysbus_init_mmio(dev, 0x1000, iomemtype);
330
sysbus_init_irq(dev, &s->irq);
335
331
s->nchannels = nchannels;
336
332
/* ??? Save/restore. */
335
static void pl080_init(SysBusDevice *dev)
340
static void pl081_init(SysBusDevice *dev)
345
/* The PL080 and PL081 are the same except for the number of channels
346
they implement (8 and 2 respectively). */
347
static void pl080_register_devices(void)
349
sysbus_register_dev("pl080", sizeof(pl080_state), pl080_init);
350
sysbus_register_dev("pl081", sizeof(pl080_state), pl081_init);
353
device_init(pl080_register_devices)