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Viewing changes to hal/HalPwrSeqCmd.c

  • Committer: Vitaliy Kulikov
  • Date: 2017-09-24 10:25:11 UTC
  • Revision ID: slonua@gmail.com-20170924102511-9q45rcjnowest8ee
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hal/HalPwrSeqCmd.c
 
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/******************************************************************************
 
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 *
 
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 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
 
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 *
 
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 * This program is free software; you can redistribute it and/or modify it
 
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 * under the terms of version 2 of the GNU General Public License as
 
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 * published by the Free Software Foundation.
 
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 *
 
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 * This program is distributed in the hope that it will be useful, but WITHOUT
 
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 
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 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
 
12
 * more details.
 
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 *
 
14
 * You should have received a copy of the GNU General Public License along with
 
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 * this program; if not, write to the Free Software Foundation, Inc.,
 
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 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
 
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 *
 
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 *
 
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 ******************************************************************************/
 
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/*++
 
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Copyright (c) Realtek Semiconductor Corp. All rights reserved.
 
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Module Name:
 
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        HalPwrSeqCmd.c
 
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Abstract:
 
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        Implement HW Power sequence configuration CMD handling routine for Realtek devices.
 
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Major Change History:
 
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        When       Who               What
 
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        ---------- ---------------   -------------------------------
 
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        2011-10-26 Lucas            Modify to be compatible with SD4-CE driver.
 
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        2011-07-07 Roger            Create.
 
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--*/
 
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#include <HalPwrSeqCmd.h>
 
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/*
 
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 *      Description:
 
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 *              This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC.
 
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 *
 
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 *      Assumption:
 
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 *              We should follow specific format which was released from HW SD.
 
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 *
 
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 *      2011.07.07, added by Roger.
 
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 *   */
 
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u8 HalPwrSeqCmdParsing(
 
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        PADAPTER                padapter,
 
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        u8                              CutVersion,
 
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        u8                              FabVersion,
 
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        u8                              InterfaceType,
 
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        WLAN_PWR_CFG    PwrSeqCmd[])
 
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{
 
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        WLAN_PWR_CFG    PwrCfgCmd = {0};
 
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        u8                              bPollingBit = _FALSE;
 
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        u32                             AryIdx = 0;
 
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        u8                              value = 0;
 
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        u32                             offset = 0;
 
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        u32                             pollingCount = 0; /* polling autoload done. */
 
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        u32                             maxPollingCnt = 5000;
 
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        do {
 
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                PwrCfgCmd = PwrSeqCmd[AryIdx];
 
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                /* 2 Only Handle the command whose FAB, CUT, and Interface are matched */
 
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                if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) &&
 
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                    (GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) &&
 
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                    (GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)) {
 
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                        switch (GET_PWR_CFG_CMD(PwrCfgCmd)) {
 
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                        case PWR_CMD_READ:
 
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                                break;
 
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                        case PWR_CMD_WRITE:
 
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                                offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
 
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#ifdef CONFIG_SDIO_HCI
 
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                                /*  */
 
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                                /* <Roger_Notes> We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface */
 
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                                /* 2011.07.07. */
 
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                                /*  */
 
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                                if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) {
 
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                                        /* Read Back SDIO Local value */
 
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                                        value = SdioLocalCmd52Read1Byte(padapter, offset);
 
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                                        value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
 
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                                        value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
 
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                                        /* Write Back SDIO Local value */
 
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                                        SdioLocalCmd52Write1Byte(padapter, offset, value);
 
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                                } else
 
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#endif
 
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                                {
 
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#ifdef CONFIG_GSPI_HCI
 
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                                        if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
 
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                                                offset = SPI_LOCAL_OFFSET | offset;
 
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#endif
 
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                                        /* Read the value from system register */
 
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                                        value = rtw_read8(padapter, offset);
 
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                                        value = value & (~(GET_PWR_CFG_MASK(PwrCfgCmd)));
 
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                                        value = value | (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
 
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                                        /* Write the value back to sytem register */
 
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                                        rtw_write8(padapter, offset, value);
 
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                                }
 
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                                break;
 
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                        case PWR_CMD_POLLING:
 
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                                bPollingBit = _FALSE;
 
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                                offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
 
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#ifdef CONFIG_GSPI_HCI
 
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                                if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
 
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                                        offset = SPI_LOCAL_OFFSET | offset;
 
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#endif
 
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                                do {
 
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#ifdef CONFIG_SDIO_HCI
 
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                                        if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
 
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                                                value = SdioLocalCmd52Read1Byte(padapter, offset);
 
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                                        else
 
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#endif
 
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                                                value = rtw_read8(padapter, offset);
 
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                                        value = value & GET_PWR_CFG_MASK(PwrCfgCmd);
 
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                                        if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)))
 
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                                                bPollingBit = _TRUE;
 
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                                        else
 
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                                                rtw_udelay_os(10);
 
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                                        if (pollingCount++ > maxPollingCnt) {
 
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                                                RTW_ERR("HalPwrSeqCmdParsing: Fail to polling Offset[%#x]=%02x\n", offset, value);
 
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                                                return _FALSE;
 
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                                        }
 
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                                } while (!bPollingBit);
 
137
 
 
138
                                break;
 
139
 
 
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                        case PWR_CMD_DELAY:
 
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                                if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US)
 
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                                        rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd));
 
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                                else
 
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                                        rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd) * 1000);
 
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                                break;
 
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                        case PWR_CMD_END:
 
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                                /* When this command is parsed, end the process */
 
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                                return _TRUE;
 
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                                break;
 
151
 
 
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                        default:
 
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                                break;
 
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                        }
 
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                }
 
156
 
 
157
                AryIdx++;/* Add Array Index */
 
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        } while (1);
 
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        return _TRUE;
 
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}