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#define ARM_EXT_V6M 0x00800000 /* ARM V6M. */
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#define ARM_EXT_BARRIER 0x01000000 /* DSB/DMB/ISB. */
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#define ARM_EXT_THUMB_MSR 0x02000000 /* Thumb MSR/MRS. */
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#define ARM_EXT_V6_DSP 0x04000000 /* ARM v6 (DSP-related),
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/* Co-processor space extensions. */
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#define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
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#define FPU_VFP_EXT_V1xD 0x08000000 /* Base VFP instruction set. */
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#define FPU_VFP_EXT_V1 0x04000000 /* Double-precision insns. */
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#define FPU_VFP_EXT_V2 0x02000000 /* ARM10E VFPr1. */
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#define FPU_VFP_EXT_V3 0x01000000 /* VFPv3 insns. */
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#define FPU_NEON_EXT_V1 0x00800000 /* Neon (SIMD) insns. */
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#define FPU_VFP_EXT_D32 0x00400000 /* Registers D16-D31. */
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#define FPU_NEON_FP16 0x00200000 /* Half-precision extensions. */
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#define FPU_VFP_EXT_V3xD 0x01000000 /* VFPv3 single-precision. */
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#define FPU_VFP_EXT_V3 0x00800000 /* VFPv3 double-precision. */
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#define FPU_NEON_EXT_V1 0x00400000 /* Neon (SIMD) insns. */
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#define FPU_VFP_EXT_D32 0x00200000 /* Registers D16-D31. */
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#define FPU_VFP_EXT_FP16 0x00100000 /* Half-precision extensions. */
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#define FPU_NEON_EXT_FMA 0x00080000 /* Neon fused multiply-add */
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#define FPU_VFP_EXT_FMA 0x00040000 /* VFP fused multiply-add */
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/* Architectures are the sum of the base and extensions. The ARM ARM (rev E)
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defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
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#define ARM_AEXT_V6Z (ARM_AEXT_V6 | ARM_EXT_V6Z)
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#define ARM_AEXT_V6ZK (ARM_AEXT_V6 | ARM_EXT_V6K | ARM_EXT_V6Z)
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#define ARM_AEXT_V6T2 (ARM_AEXT_V6 \
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| ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR)
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| ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR \
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#define ARM_AEXT_V6KT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K)
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#define ARM_AEXT_V6ZT2 (ARM_AEXT_V6T2 | ARM_EXT_V6Z)
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#define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z)
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#define ARM_AEXT_V7A (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
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#define ARM_AEXT_V7R (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
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#define ARM_AEXT_NOTM \
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(ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM)
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(ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM \
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#define ARM_AEXT_V6M \
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((ARM_AEXT_V6K | ARM_EXT_BARRIER | ARM_EXT_V6M | ARM_EXT_THUMB_MSR) \
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& ~(ARM_AEXT_NOTM))
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((ARM_AEXT_V7_ARM | ARM_EXT_V6M | ARM_EXT_V7M | ARM_EXT_DIV) \
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& ~(ARM_AEXT_NOTM))
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#define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
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#define ARM_AEXT_V7EM \
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(ARM_AEXT_V7M | ARM_EXT_V5ExP | ARM_EXT_V6_DSP)
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/* Processors with specific extensions in the co-processor space. */
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#define ARM_ARCH_XSCALE ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
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#define FPU_VFP_V1xD (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE)
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#define FPU_VFP_V1 (FPU_VFP_V1xD | FPU_VFP_EXT_V1)
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#define FPU_VFP_V2 (FPU_VFP_V1 | FPU_VFP_EXT_V2)
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#define FPU_VFP_V3D16 (FPU_VFP_V2 | FPU_VFP_EXT_V3)
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#define FPU_VFP_V3D16 (FPU_VFP_V2 | FPU_VFP_EXT_V3xD | FPU_VFP_EXT_V3)
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#define FPU_VFP_V3 (FPU_VFP_V3D16 | FPU_VFP_EXT_D32)
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#define FPU_VFP_V3xD (FPU_VFP_V1xD | FPU_VFP_EXT_V2 | FPU_VFP_EXT_V3xD)
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#define FPU_VFP_V4D16 (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
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#define FPU_VFP_V4 (FPU_VFP_V3 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
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#define FPU_VFP_V4_SP_D16 (FPU_VFP_V3xD | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
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#define FPU_VFP_HARD (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \
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| FPU_VFP_EXT_V3xD | FPU_VFP_EXT_FMA | FPU_NEON_EXT_FMA \
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| FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_D32)
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#define FPU_FPA (FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2)
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#define FPU_ARCH_VFP_V1 ARM_FEATURE (0, FPU_VFP_V1)
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#define FPU_ARCH_VFP_V2 ARM_FEATURE (0, FPU_VFP_V2)
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#define FPU_ARCH_VFP_V3D16 ARM_FEATURE (0, FPU_VFP_V3D16)
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#define FPU_ARCH_VFP_V3D16_FP16 \
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ARM_FEATURE (0, FPU_VFP_V3D16 | FPU_VFP_EXT_FP16)
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#define FPU_ARCH_VFP_V3 ARM_FEATURE (0, FPU_VFP_V3)
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#define FPU_ARCH_VFP_V3_FP16 ARM_FEATURE (0, FPU_VFP_V3 | FPU_VFP_EXT_FP16)
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#define FPU_ARCH_VFP_V3xD ARM_FEATURE (0, FPU_VFP_V3xD)
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#define FPU_ARCH_VFP_V3xD_FP16 ARM_FEATURE (0, FPU_VFP_V3xD | FPU_VFP_EXT_FP16)
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#define FPU_ARCH_NEON_V1 ARM_FEATURE (0, FPU_NEON_EXT_V1)
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#define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \
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ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1)
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#define FPU_ARCH_NEON_FP16 \
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ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1 | FPU_NEON_FP16)
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ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_FP16)
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#define FPU_ARCH_VFP_HARD ARM_FEATURE (0, FPU_VFP_HARD)
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#define FPU_ARCH_VFP_V4 ARM_FEATURE(0, FPU_VFP_V4)
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#define FPU_ARCH_VFP_V4D16 ARM_FEATURE(0, FPU_VFP_V4D16)
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#define FPU_ARCH_VFP_V4_SP_D16 ARM_FEATURE(0, FPU_VFP_V4_SP_D16)
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#define FPU_ARCH_NEON_VFP_V4 \
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ARM_FEATURE(0, FPU_VFP_V4 | FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA)
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#define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE)
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#define ARM_ARCH_V7A ARM_FEATURE (ARM_AEXT_V7A, 0)
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#define ARM_ARCH_V7R ARM_FEATURE (ARM_AEXT_V7R, 0)
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#define ARM_ARCH_V7M ARM_FEATURE (ARM_AEXT_V7M, 0)
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#define ARM_ARCH_V7EM ARM_FEATURE (ARM_AEXT_V7EM, 0)
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/* Some useful combinations: */
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#define ARM_ARCH_NONE ARM_FEATURE (0, 0)