3
3
THIS FILE IS MACHINE GENERATED WITH CGEN.
5
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5
Copyright 1996-2010 Free Software Foundation, Inc.
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7
This file is part of the GNU simulators.
9
This program is free software; you can redistribute it and/or modify
10
it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
12
(at your option) any later version.
14
This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
16
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17
GNU General Public License for more details.
19
You should have received a copy of the GNU General Public License
20
along with this program. If not, see <http://www.gnu.org/licenses/>.
9
This file is free software; you can redistribute it and/or modify
10
it under the terms of the GNU General Public License as published by
11
the Free Software Foundation; either version 3, or (at your option)
14
It is distributed in the hope that it will be useful, but WITHOUT
15
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17
License for more details.
19
You should have received a copy of the GNU General Public License along
20
with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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178
{ M32R_INSN_BTST, M32RXF_INSN_BTST, M32RXF_SFMT_BTST, M32RXF_INSN_PAR_BTST, M32RXF_INSN_WRITE_BTST },
180
static const struct insn_sem m32rxf_insn_sem_invalid = {
181
static const struct insn_sem m32rxf_insn_sem_invalid =
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183
VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR
253
255
m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
254
CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn,
256
CGEN_INSN_WORD base_insn, CGEN_INSN_WORD entire_insn,
257
259
/* Result of decoder. */
258
260
M32RXF_INSN_TYPE itype;
261
CGEN_INSN_INT insn = base_insn;
263
CGEN_INSN_WORD insn = base_insn;
264
266
unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0)));
276
278
unsigned int val = (((insn >> 8) & (3 << 0)));
279
case 0 : itype = M32RXF_INSN_CMPZ; goto extract_sfmt_cmpz;
280
case 3 : itype = M32RXF_INSN_PCMPBZ; goto extract_sfmt_cmpz;
282
if ((entire_insn & 0xfff0) == 0x70)
283
{ itype = M32RXF_INSN_CMPZ; goto extract_sfmt_cmpz; }
284
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
286
if ((entire_insn & 0xfff0) == 0x370)
287
{ itype = M32RXF_INSN_PCMPBZ; goto extract_sfmt_cmpz; }
288
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
281
289
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
288
296
case 12 : itype = M32RXF_INSN_AND; goto extract_sfmt_add;
289
297
case 13 : itype = M32RXF_INSN_XOR; goto extract_sfmt_add;
290
298
case 14 : itype = M32RXF_INSN_OR; goto extract_sfmt_add;
291
case 15 : itype = M32RXF_INSN_BTST; goto extract_sfmt_btst;
300
if ((entire_insn & 0xf8f0) == 0xf0)
301
{ itype = M32RXF_INSN_BTST; goto extract_sfmt_btst; }
302
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
292
303
case 16 : itype = M32RXF_INSN_SRL; goto extract_sfmt_add;
293
304
case 18 : itype = M32RXF_INSN_SRA; goto extract_sfmt_add;
294
305
case 20 : itype = M32RXF_INSN_SLL; goto extract_sfmt_add;
301
312
unsigned int val = (((insn >> 8) & (3 << 0)));
304
case 0 : itype = M32RXF_INSN_JC; goto extract_sfmt_jc;
305
case 1 : itype = M32RXF_INSN_JNC; goto extract_sfmt_jc;
306
case 2 : itype = M32RXF_INSN_JL; goto extract_sfmt_jl;
307
case 3 : itype = M32RXF_INSN_JMP; goto extract_sfmt_jmp;
316
if ((entire_insn & 0xfff0) == 0x1cc0)
317
{ itype = M32RXF_INSN_JC; goto extract_sfmt_jc; }
318
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
320
if ((entire_insn & 0xfff0) == 0x1dc0)
321
{ itype = M32RXF_INSN_JNC; goto extract_sfmt_jc; }
322
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
324
if ((entire_insn & 0xfff0) == 0x1ec0)
325
{ itype = M32RXF_INSN_JL; goto extract_sfmt_jl; }
326
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
328
if ((entire_insn & 0xfff0) == 0x1fc0)
329
{ itype = M32RXF_INSN_JMP; goto extract_sfmt_jmp; }
330
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
308
331
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
311
case 29 : itype = M32RXF_INSN_RTE; goto extract_sfmt_rte;
312
case 31 : itype = M32RXF_INSN_TRAP; goto extract_sfmt_trap;
335
if ((entire_insn & 0xffff) == 0x10d6)
336
{ itype = M32RXF_INSN_RTE; goto extract_sfmt_rte; }
337
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
339
if ((entire_insn & 0xfff0) == 0x10f0)
340
{ itype = M32RXF_INSN_TRAP; goto extract_sfmt_trap; }
341
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
313
342
case 32 : itype = M32RXF_INSN_STB; goto extract_sfmt_stb;
314
343
case 33 : itype = M32RXF_INSN_STB_PLUS; goto extract_sfmt_stb_plus;
315
344
case 34 : itype = M32RXF_INSN_STH; goto extract_sfmt_sth;
368
397
unsigned int val = (((insn >> 0) & (1 << 0)));
371
case 0 : itype = M32RXF_INSN_MVTACHI_A; goto extract_sfmt_mvtachi_a;
372
case 1 : itype = M32RXF_INSN_MVTACLO_A; goto extract_sfmt_mvtachi_a;
401
if ((entire_insn & 0xf0f3) == 0x5070)
402
{ itype = M32RXF_INSN_MVTACHI_A; goto extract_sfmt_mvtachi_a; }
403
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
405
if ((entire_insn & 0xf0f3) == 0x5071)
406
{ itype = M32RXF_INSN_MVTACLO_A; goto extract_sfmt_mvtachi_a; }
407
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
373
408
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
376
case 88 : itype = M32RXF_INSN_RACH_DSI; goto extract_sfmt_rac_dsi;
377
case 89 : itype = M32RXF_INSN_RAC_DSI; goto extract_sfmt_rac_dsi;
412
if ((entire_insn & 0xf3f2) == 0x5080)
413
{ itype = M32RXF_INSN_RACH_DSI; goto extract_sfmt_rac_dsi; }
414
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
416
if ((entire_insn & 0xf3f2) == 0x5090)
417
{ itype = M32RXF_INSN_RAC_DSI; goto extract_sfmt_rac_dsi; }
418
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
378
419
case 90 : itype = M32RXF_INSN_MULWU1; goto extract_sfmt_mulwu1;
379
420
case 91 : itype = M32RXF_INSN_MACWU1; goto extract_sfmt_macwu1;
380
421
case 92 : itype = M32RXF_INSN_MACLH1; goto extract_sfmt_macwu1;
381
422
case 93 : itype = M32RXF_INSN_MSBLO; goto extract_sfmt_msblo;
382
case 94 : itype = M32RXF_INSN_SADD; goto extract_sfmt_sadd;
424
if ((entire_insn & 0xffff) == 0x50e4)
425
{ itype = M32RXF_INSN_SADD; goto extract_sfmt_sadd; }
426
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
385
429
unsigned int val = (((insn >> 0) & (3 << 0)));
412
456
unsigned int val = (((insn >> 7) & (15 << 1)) | ((insn >> 0) & (1 << 0)));
415
case 0 : itype = M32RXF_INSN_NOP; goto extract_sfmt_nop;
460
if ((entire_insn & 0xffff) == 0x7000)
461
{ itype = M32RXF_INSN_NOP; goto extract_sfmt_nop; }
462
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
416
463
case 2 : /* fall through */
417
464
case 3 : itype = M32RXF_INSN_SETPSW; goto extract_sfmt_setpsw;
418
465
case 4 : /* fall through */
419
466
case 5 : itype = M32RXF_INSN_CLRPSW; goto extract_sfmt_clrpsw;
420
case 9 : itype = M32RXF_INSN_SC; goto extract_sfmt_sc;
421
case 11 : itype = M32RXF_INSN_SNC; goto extract_sfmt_sc;
468
if ((entire_insn & 0xffff) == 0x7401)
469
{ itype = M32RXF_INSN_SC; goto extract_sfmt_sc; }
470
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
472
if ((entire_insn & 0xffff) == 0x7501)
473
{ itype = M32RXF_INSN_SNC; goto extract_sfmt_sc; }
474
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
422
475
case 16 : /* fall through */
423
476
case 17 : itype = M32RXF_INSN_BCL8; goto extract_sfmt_bcl8;
424
477
case 18 : /* fall through */
464
517
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
467
case 132 : itype = M32RXF_INSN_CMPI; goto extract_sfmt_cmpi;
468
case 133 : itype = M32RXF_INSN_CMPUI; goto extract_sfmt_cmpi;
521
if ((entire_insn & 0xfff00000) == 0x80400000)
522
{ itype = M32RXF_INSN_CMPI; goto extract_sfmt_cmpi; }
523
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
525
if ((entire_insn & 0xfff00000) == 0x80500000)
526
{ itype = M32RXF_INSN_CMPUI; goto extract_sfmt_cmpi; }
527
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
471
unsigned int val = (((insn >> -8) & (3 << 0)));
530
unsigned int val = (((entire_insn >> 8) & (3 << 0)));
474
case 0 : itype = M32RXF_INSN_SAT; goto extract_sfmt_sat;
475
case 2 : itype = M32RXF_INSN_SATH; goto extract_sfmt_satb;
476
case 3 : itype = M32RXF_INSN_SATB; goto extract_sfmt_satb;
534
if ((entire_insn & 0xf0f0ffff) == 0x80600000)
535
{ itype = M32RXF_INSN_SAT; goto extract_sfmt_sat; }
536
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
538
if ((entire_insn & 0xf0f0ffff) == 0x80600200)
539
{ itype = M32RXF_INSN_SATH; goto extract_sfmt_satb; }
540
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
542
if ((entire_insn & 0xf0f0ffff) == 0x80600300)
543
{ itype = M32RXF_INSN_SATB; goto extract_sfmt_satb; }
544
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
477
545
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
484
552
case 142 : itype = M32RXF_INSN_OR3; goto extract_sfmt_or3;
487
unsigned int val = (((insn >> -12) & (1 << 0)));
555
unsigned int val = (((entire_insn >> 4) & (1 << 0)));
490
case 0 : itype = M32RXF_INSN_DIV; goto extract_sfmt_div;
491
case 1 : itype = M32RXF_INSN_DIVH; goto extract_sfmt_div;
559
if ((entire_insn & 0xf0f0ffff) == 0x90000000)
560
{ itype = M32RXF_INSN_DIV; goto extract_sfmt_div; }
561
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
563
if ((entire_insn & 0xf0f0ffff) == 0x90000010)
564
{ itype = M32RXF_INSN_DIVH; goto extract_sfmt_div; }
565
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
492
566
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
495
case 145 : itype = M32RXF_INSN_DIVU; goto extract_sfmt_div;
496
case 146 : itype = M32RXF_INSN_REM; goto extract_sfmt_div;
497
case 147 : itype = M32RXF_INSN_REMU; goto extract_sfmt_div;
570
if ((entire_insn & 0xf0f0ffff) == 0x90100000)
571
{ itype = M32RXF_INSN_DIVU; goto extract_sfmt_div; }
572
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
574
if ((entire_insn & 0xf0f0ffff) == 0x90200000)
575
{ itype = M32RXF_INSN_REM; goto extract_sfmt_div; }
576
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
578
if ((entire_insn & 0xf0f0ffff) == 0x90300000)
579
{ itype = M32RXF_INSN_REMU; goto extract_sfmt_div; }
580
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
498
581
case 152 : itype = M32RXF_INSN_SRL3; goto extract_sfmt_sll3;
499
582
case 154 : itype = M32RXF_INSN_SRA3; goto extract_sfmt_sll3;
500
583
case 156 : itype = M32RXF_INSN_SLL3; goto extract_sfmt_sll3;
501
case 159 : itype = M32RXF_INSN_LDI16; goto extract_sfmt_ldi16;
585
if ((entire_insn & 0xf0ff0000) == 0x90f00000)
586
{ itype = M32RXF_INSN_LDI16; goto extract_sfmt_ldi16; }
587
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
502
588
case 160 : itype = M32RXF_INSN_STB_D; goto extract_sfmt_stb_d;
503
589
case 162 : itype = M32RXF_INSN_STH_D; goto extract_sfmt_sth_d;
504
590
case 164 : itype = M32RXF_INSN_ST_D; goto extract_sfmt_st_d;
505
case 166 : itype = M32RXF_INSN_BSET; goto extract_sfmt_bset;
506
case 167 : itype = M32RXF_INSN_BCLR; goto extract_sfmt_bset;
592
if ((entire_insn & 0xf8f00000) == 0xa0600000)
593
{ itype = M32RXF_INSN_BSET; goto extract_sfmt_bset; }
594
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
596
if ((entire_insn & 0xf8f00000) == 0xa0700000)
597
{ itype = M32RXF_INSN_BCLR; goto extract_sfmt_bset; }
598
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
507
599
case 168 : itype = M32RXF_INSN_LDB_D; goto extract_sfmt_ldb_d;
508
600
case 169 : itype = M32RXF_INSN_LDUB_D; goto extract_sfmt_ldb_d;
509
601
case 170 : itype = M32RXF_INSN_LDH_D; goto extract_sfmt_ldh_d;
511
603
case 172 : itype = M32RXF_INSN_LD_D; goto extract_sfmt_ld_d;
512
604
case 176 : itype = M32RXF_INSN_BEQ; goto extract_sfmt_beq;
513
605
case 177 : itype = M32RXF_INSN_BNE; goto extract_sfmt_beq;
514
case 184 : itype = M32RXF_INSN_BEQZ; goto extract_sfmt_beqz;
515
case 185 : itype = M32RXF_INSN_BNEZ; goto extract_sfmt_beqz;
516
case 186 : itype = M32RXF_INSN_BLTZ; goto extract_sfmt_beqz;
517
case 187 : itype = M32RXF_INSN_BGEZ; goto extract_sfmt_beqz;
518
case 188 : itype = M32RXF_INSN_BLEZ; goto extract_sfmt_beqz;
519
case 189 : itype = M32RXF_INSN_BGTZ; goto extract_sfmt_beqz;
520
case 220 : itype = M32RXF_INSN_SETH; goto extract_sfmt_seth;
607
if ((entire_insn & 0xfff00000) == 0xb0800000)
608
{ itype = M32RXF_INSN_BEQZ; goto extract_sfmt_beqz; }
609
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
611
if ((entire_insn & 0xfff00000) == 0xb0900000)
612
{ itype = M32RXF_INSN_BNEZ; goto extract_sfmt_beqz; }
613
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
615
if ((entire_insn & 0xfff00000) == 0xb0a00000)
616
{ itype = M32RXF_INSN_BLTZ; goto extract_sfmt_beqz; }
617
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
619
if ((entire_insn & 0xfff00000) == 0xb0b00000)
620
{ itype = M32RXF_INSN_BGEZ; goto extract_sfmt_beqz; }
621
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
623
if ((entire_insn & 0xfff00000) == 0xb0c00000)
624
{ itype = M32RXF_INSN_BLEZ; goto extract_sfmt_beqz; }
625
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
627
if ((entire_insn & 0xfff00000) == 0xb0d00000)
628
{ itype = M32RXF_INSN_BGTZ; goto extract_sfmt_beqz; }
629
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
631
if ((entire_insn & 0xf0ff0000) == 0xd0c00000)
632
{ itype = M32RXF_INSN_SETH; goto extract_sfmt_seth; }
633
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
521
634
case 224 : /* fall through */
522
635
case 225 : /* fall through */
523
636
case 226 : /* fall through */
554
667
unsigned int val = (((insn >> 8) & (7 << 0)));
557
case 0 : itype = M32RXF_INSN_BCL24; goto extract_sfmt_bcl24;
558
case 1 : itype = M32RXF_INSN_BNCL24; goto extract_sfmt_bcl24;
559
case 4 : itype = M32RXF_INSN_BC24; goto extract_sfmt_bc24;
560
case 5 : itype = M32RXF_INSN_BNC24; goto extract_sfmt_bc24;
561
case 6 : itype = M32RXF_INSN_BL24; goto extract_sfmt_bl24;
562
case 7 : itype = M32RXF_INSN_BRA24; goto extract_sfmt_bra24;
671
if ((entire_insn & 0xff000000) == 0xf8000000)
672
{ itype = M32RXF_INSN_BCL24; goto extract_sfmt_bcl24; }
673
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
675
if ((entire_insn & 0xff000000) == 0xf9000000)
676
{ itype = M32RXF_INSN_BNCL24; goto extract_sfmt_bcl24; }
677
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
679
if ((entire_insn & 0xff000000) == 0xfc000000)
680
{ itype = M32RXF_INSN_BC24; goto extract_sfmt_bc24; }
681
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
683
if ((entire_insn & 0xff000000) == 0xfd000000)
684
{ itype = M32RXF_INSN_BNC24; goto extract_sfmt_bc24; }
685
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
687
if ((entire_insn & 0xff000000) == 0xfe000000)
688
{ itype = M32RXF_INSN_BL24; goto extract_sfmt_bl24; }
689
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
691
if ((entire_insn & 0xff000000) == 0xff000000)
692
{ itype = M32RXF_INSN_BRA24; goto extract_sfmt_bra24; }
693
itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
563
694
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
626
757
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
627
758
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
628
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
759
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
630
761
/* Record the fields for the semantic handler. */
631
762
FLD (f_simm16) = f_simm16;
716
847
extract_sfmt_addi:
718
849
const IDESC *idesc = &m32rxf_insn_data[itype];
719
CGEN_INSN_INT insn = entire_insn;
850
CGEN_INSN_WORD insn = entire_insn;
720
851
#define FLD(f) abuf->fields.sfmt_addi.f
724
855
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
725
f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
856
f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8);
727
858
/* Record the fields for the semantic handler. */
728
859
FLD (f_r1) = f_r1;
785
916
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
786
917
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
787
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
918
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
789
920
/* Record the fields for the semantic handler. */
790
921
FLD (f_simm16) = f_simm16;
840
971
extract_sfmt_bc8:
842
973
const IDESC *idesc = &m32rxf_insn_data[itype];
843
CGEN_INSN_INT insn = entire_insn;
974
CGEN_INSN_WORD insn = entire_insn;
844
975
#define FLD(f) abuf->fields.sfmt_bl8.f
847
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
978
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
849
980
/* Record the fields for the semantic handler. */
850
981
FLD (i_disp8) = f_disp8;
863
994
extract_sfmt_bc24:
865
996
const IDESC *idesc = &m32rxf_insn_data[itype];
866
CGEN_INSN_INT insn = entire_insn;
997
CGEN_INSN_WORD insn = entire_insn;
867
998
#define FLD(f) abuf->fields.sfmt_bl24.f
870
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
1001
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
872
1003
/* Record the fields for the semantic handler. */
873
1004
FLD (i_disp24) = f_disp24;
895
1026
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
896
1027
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
897
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
1028
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc));
899
1030
/* Record the fields for the semantic handler. */
900
1031
FLD (f_r1) = f_r1;
919
1050
extract_sfmt_beqz:
921
1052
const IDESC *idesc = &m32rxf_insn_data[itype];
922
CGEN_INSN_INT insn = entire_insn;
1053
CGEN_INSN_WORD insn = entire_insn;
923
1054
#define FLD(f) abuf->fields.sfmt_beq.f
927
1058
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
928
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
1059
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc));
930
1061
/* Record the fields for the semantic handler. */
931
1062
FLD (f_r2) = f_r2;
947
1078
extract_sfmt_bl8:
949
1080
const IDESC *idesc = &m32rxf_insn_data[itype];
950
CGEN_INSN_INT insn = entire_insn;
1081
CGEN_INSN_WORD insn = entire_insn;
951
1082
#define FLD(f) abuf->fields.sfmt_bl8.f
954
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
1085
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
956
1087
/* Record the fields for the semantic handler. */
957
1088
FLD (i_disp8) = f_disp8;
971
1102
extract_sfmt_bl24:
973
1104
const IDESC *idesc = &m32rxf_insn_data[itype];
974
CGEN_INSN_INT insn = entire_insn;
1105
CGEN_INSN_WORD insn = entire_insn;
975
1106
#define FLD(f) abuf->fields.sfmt_bl24.f
978
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
1109
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
980
1111
/* Record the fields for the semantic handler. */
981
1112
FLD (i_disp24) = f_disp24;
995
1126
extract_sfmt_bcl8:
997
1128
const IDESC *idesc = &m32rxf_insn_data[itype];
998
CGEN_INSN_INT insn = entire_insn;
1129
CGEN_INSN_WORD insn = entire_insn;
999
1130
#define FLD(f) abuf->fields.sfmt_bl8.f
1002
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
1133
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
1004
1135
/* Record the fields for the semantic handler. */
1005
1136
FLD (i_disp8) = f_disp8;
1019
1150
extract_sfmt_bcl24:
1021
1152
const IDESC *idesc = &m32rxf_insn_data[itype];
1022
CGEN_INSN_INT insn = entire_insn;
1153
CGEN_INSN_WORD insn = entire_insn;
1023
1154
#define FLD(f) abuf->fields.sfmt_bl24.f
1026
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
1157
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
1028
1159
/* Record the fields for the semantic handler. */
1029
1160
FLD (i_disp24) = f_disp24;
1043
1174
extract_sfmt_bra8:
1045
1176
const IDESC *idesc = &m32rxf_insn_data[itype];
1046
CGEN_INSN_INT insn = entire_insn;
1177
CGEN_INSN_WORD insn = entire_insn;
1047
1178
#define FLD(f) abuf->fields.sfmt_bl8.f
1050
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
1181
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
1052
1183
/* Record the fields for the semantic handler. */
1053
1184
FLD (i_disp8) = f_disp8;
1066
1197
extract_sfmt_bra24:
1068
1199
const IDESC *idesc = &m32rxf_insn_data[itype];
1069
CGEN_INSN_INT insn = entire_insn;
1200
CGEN_INSN_WORD insn = entire_insn;
1070
1201
#define FLD(f) abuf->fields.sfmt_bl24.f
1073
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
1204
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
1075
1206
/* Record the fields for the semantic handler. */
1076
1207
FLD (i_disp24) = f_disp24;
1119
1250
extract_sfmt_cmpi:
1121
1252
const IDESC *idesc = &m32rxf_insn_data[itype];
1122
CGEN_INSN_INT insn = entire_insn;
1253
CGEN_INSN_WORD insn = entire_insn;
1123
1254
#define FLD(f) abuf->fields.sfmt_st_d.f
1127
1258
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1128
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
1259
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1130
1261
/* Record the fields for the semantic handler. */
1131
1262
FLD (f_simm16) = f_simm16;
1318
1449
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1319
1450
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1320
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
1451
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1322
1453
/* Record the fields for the semantic handler. */
1323
1454
FLD (f_simm16) = f_simm16;
1381
1512
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1382
1513
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1383
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
1514
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1385
1516
/* Record the fields for the semantic handler. */
1386
1517
FLD (f_simm16) = f_simm16;
1444
1575
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1445
1576
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1446
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
1577
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1448
1579
/* Record the fields for the semantic handler. */
1449
1580
FLD (f_simm16) = f_simm16;
1527
1658
extract_sfmt_ldi8:
1529
1660
const IDESC *idesc = &m32rxf_insn_data[itype];
1530
CGEN_INSN_INT insn = entire_insn;
1661
CGEN_INSN_WORD insn = entire_insn;
1531
1662
#define FLD(f) abuf->fields.sfmt_addi.f
1535
1666
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1536
f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
1667
f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8);
1538
1669
/* Record the fields for the semantic handler. */
1539
1670
FLD (f_simm8) = f_simm8;
1555
1686
extract_sfmt_ldi16:
1557
1688
const IDESC *idesc = &m32rxf_insn_data[itype];
1558
CGEN_INSN_INT insn = entire_insn;
1689
CGEN_INSN_WORD insn = entire_insn;
1559
1690
#define FLD(f) abuf->fields.sfmt_add3.f
1563
1694
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1564
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
1695
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1566
1697
/* Record the fields for the semantic handler. */
1567
1698
FLD (f_simm16) = f_simm16;
1913
2044
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1914
2045
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1915
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
2046
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1917
2048
/* Record the fields for the semantic handler. */
1918
2049
FLD (f_simm16) = f_simm16;
2005
2136
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
2006
2137
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
2007
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
2138
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
2009
2140
/* Record the fields for the semantic handler. */
2010
2141
FLD (f_simm16) = f_simm16;
2068
2199
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
2069
2200
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
2070
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
2201
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
2072
2203
/* Record the fields for the semantic handler. */
2073
2204
FLD (f_simm16) = f_simm16;
2131
2262
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
2132
2263
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
2133
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
2264
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
2135
2266
/* Record the fields for the semantic handler. */
2136
2267
FLD (f_simm16) = f_simm16;
2520
2651
f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3);
2521
2652
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
2522
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
2653
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
2524
2655
/* Record the fields for the semantic handler. */
2525
2656
FLD (f_simm16) = f_simm16;