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Viewing changes to src/mame/drivers/mpu4drvr.c

  • Committer: Bazaar Package Importer
  • Author(s): Jordi Mallach, Emmanuel Kasper, Félix Arreola Rodríguez, Jordi Mallach
  • Date: 2011-05-11 21:06:50 UTC
  • mfrom: (1.1.1 upstream)
  • Revision ID: james.westby@ubuntu.com-20110511210650-jizvh8a6x117y9hr
Tags: 0.142-1
[ Emmanuel Kasper ]
* New upstream release
* Set NOWERROR=1 to allow compiling with gcc-4.6
* Remove fix_powerpc_build.patch, as upstream has taken it in this release
* Add gnome-video-arcade front end as a suggested package

[ Félix Arreola Rodríguez ]
* Add kfreebsd-build.patch to quilt series, to fix build on kfreebsd

[ Jordi Mallach ]
* Remove unneeded and bogus addition of --with-quilt to the dh invocation.
* Add Cesare Falco (long time Ubuntu maintainer) to Uploaders, and wrap
  them into multiple lines.

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src/mame/drivers/mpu4drvr.c
1
1
/***********************************************************************************************************
2
 
Barcrest MPU4 highly preliminary driver by J.Wallace, and Anonymous.
3
 
 
4
 
Any MAME-approved games should go here.
5
 
 
 
2
Barcrest MPU4 Extension driver by J.Wallace, and Anonymous.
6
3
 
7
4
--- Board Setup ---
8
5
For the Barcrest MPU4 Video system, the GAME CARD (cartridge) contains the MPU4 video bios in the usual ROM
163
160
-----------+---+-----------------+--------------------------------------------------------------------------
164
161
 C000-FFFF | R | D D D D D D D D | ROM
165
162
-----------+---+-----------------+--------------------------------------------------------------------------
 
163
Everything here is preliminary...  the boards are quite fussy with regards their self tests
 
164
and the timing may have to be perfect for them to function correctly.  (as the comms are
 
165
timer driven, the video is capable of various raster effects etc.)
 
166
 
166
167
TODO:
167
168
      - Correctly implement characteriser protection for each game.
168
169
      - Hook up trackball control for The Crystal Maze and The Mating Game - done, but game response is v. slow
171
172
      - Hook up OKIM6376 sound in The Mating Game
172
173
      - Get the BwB games running
173
174
        * They have a slightly different 68k memory map. The 6850 is at e00000 and the 6840 is at e01000
 
175
        They appear to hang on the handshake with the MPU4 board
174
176
      - Find out what causes the games to reset in service mode (see jump taken at CPU1:c8e8)
175
177
      - Deal 'Em lockouts vary on certain cabinets (normally connected to AUX2, but not there?)
176
178
      - Deal 'Em has bad tiles (apostrophe, logo, bottom corner), black should actually be transparent
195
197
 
196
198
#define VIDEO_MASTER_CLOCK                      XTAL_10MHz
197
199
 
198
 
/* IRQ states for 68k */
199
 
static UINT8 m6840_irq_state;
200
 
static UINT8 m6850_irq_state;
201
 
static UINT8 scn2674_irq_state;
202
 
 
203
 
/* UART source/sinks */
204
 
static UINT8 m68k_m6809_line;
205
 
static UINT8 m6809_m68k_line;
206
 
static UINT8 m68k_acia_cts;
207
 
static UINT8 m6809_acia_cts;
208
 
static UINT8 m6809_acia_rts;
209
 
static UINT8 m6809_acia_dcd;
210
 
 
211
 
/* SCN2674 AVDC stuff */
212
 
static int mpu4_gfx_index;
213
 
static UINT16 * mpu4_vid_vidram;
214
 
static UINT16 * mpu4_vid_mainram;
215
 
 
216
 
static UINT8 scn2674_IR[16];
217
 
static UINT8 scn2675_IR_pointer;
218
 
static UINT8 scn2674_screen1_l;
219
 
static UINT8 scn2674_screen1_h;
220
 
static UINT8 scn2674_cursor_l;
221
 
static UINT8 scn2674_cursor_h;
222
 
static UINT8 scn2674_screen2_l;
223
 
static UINT8 scn2674_screen2_h;
224
 
 
225
 
static UINT8 scn2674_irq_register = 0;
226
 
static UINT8 scn2674_status_register = 0;
227
 
static UINT8 scn2674_irq_mask = 0;
228
 
static UINT8 scn2674_gfx_enabled;
229
 
static UINT8 scn2674_display_enabled;
230
 
static UINT8 scn2674_cursor_enabled;
231
200
 
232
201
static READ16_HANDLER( characteriser16_r );
233
202
static WRITE16_HANDLER( characteriser16_w );
234
203
 
 
204
static READ16_HANDLER( bwb_characteriser16_r );
 
205
static WRITE16_HANDLER( bwb_characteriser16_w );
235
206
 
236
207
/*************************************
237
208
 *
254
225
*/
255
226
 
256
227
 
257
 
static void update_mpu68_interrupts(running_machine *machine)
 
228
static void update_mpu68_interrupts(running_machine &machine)
258
229
{
259
 
        cputag_set_input_line(machine, "video", 1, m6840_irq_state ? ASSERT_LINE : CLEAR_LINE);
260
 
        cputag_set_input_line(machine, "video", 2, m6850_irq_state ? CLEAR_LINE : ASSERT_LINE);
261
 
        cputag_set_input_line(machine, "video", 3, scn2674_irq_state ? ASSERT_LINE : CLEAR_LINE);
 
230
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
231
        cputag_set_input_line(machine, "video", 1, state->m_m6840_irq_state ? ASSERT_LINE : CLEAR_LINE);
 
232
        cputag_set_input_line(machine, "video", 2, state->m_m6850_irq_state ? CLEAR_LINE : ASSERT_LINE);
 
233
        cputag_set_input_line(machine, "video", 3, state->m_scn2674_irq_state ? ASSERT_LINE : CLEAR_LINE);
262
234
}
263
235
 
264
236
/* Communications with 6809 board */
265
 
/* Clock values are currently unknown, and are derived from the 68k board.*/
266
237
 
267
238
static READ_LINE_DEVICE_HANDLER( m6809_acia_rx_r )
268
239
{
269
 
        return m68k_m6809_line;
 
240
        mpu4_state *state = device->machine().driver_data<mpu4_state>();
 
241
        return state->m_m68k_m6809_line;
270
242
}
271
243
 
272
244
static WRITE_LINE_DEVICE_HANDLER( m6809_acia_tx_w )
273
245
{
274
 
        m6809_m68k_line = state;
 
246
        mpu4_state *drvstate = device->machine().driver_data<mpu4_state>();
 
247
        drvstate->m_m6809_m68k_line = state;
275
248
}
276
249
 
277
250
static READ_LINE_DEVICE_HANDLER( m6809_acia_cts_r )
278
251
{
279
 
        return m6809_acia_cts;
 
252
        mpu4_state *state = device->machine().driver_data<mpu4_state>();
 
253
        return state->m_m6809_acia_cts;
280
254
}
281
255
 
282
256
static WRITE_LINE_DEVICE_HANDLER( m6809_acia_rts_w )
283
257
{
284
 
        m6809_acia_rts = state;
 
258
        mpu4_state *drvstate = device->machine().driver_data<mpu4_state>();
 
259
        drvstate->m_m6809_acia_rts = state;
285
260
}
286
261
 
287
262
static READ_LINE_DEVICE_HANDLER( m6809_acia_dcd_r )
288
263
{
289
 
        return m6809_acia_dcd;
 
264
        mpu4_state *state = device->machine().driver_data<mpu4_state>();
 
265
        return state->m_m6809_acia_dcd;
290
266
}
291
267
 
292
268
static WRITE_LINE_DEVICE_HANDLER( m6809_acia_irq )
293
269
{
294
 
        m68k_acia_cts = !state;
295
 
        cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE, state ? CLEAR_LINE : ASSERT_LINE);
 
270
        mpu4_state *drvstate = device->machine().driver_data<mpu4_state>();
 
271
        drvstate->m_m68k_acia_cts = !state;
 
272
        cputag_set_input_line(device->machine(), "maincpu", M6809_IRQ_LINE, state ? CLEAR_LINE : ASSERT_LINE);
296
273
}
297
274
 
298
275
static ACIA6850_INTERFACE( m6809_acia_if )
309
286
 
310
287
static READ_LINE_DEVICE_HANDLER( m68k_acia_rx_r )
311
288
{
312
 
        return m6809_m68k_line;
 
289
        mpu4_state *state = device->machine().driver_data<mpu4_state>();
 
290
        return state->m_m6809_m68k_line;
313
291
}
314
292
 
315
293
static WRITE_LINE_DEVICE_HANDLER( m68k_acia_tx_w )
316
294
{
317
 
        m68k_m6809_line = state;
 
295
        mpu4_state *drvstate = device->machine().driver_data<mpu4_state>();
 
296
        drvstate->m_m68k_m6809_line = state;
318
297
}
319
298
 
320
299
static READ_LINE_DEVICE_HANDLER( m68k_acia_cts_r )
321
300
{
322
 
        return m68k_acia_cts;
 
301
        mpu4_state *state = device->machine().driver_data<mpu4_state>();
 
302
        return state->m_m68k_acia_cts;
323
303
}
324
304
 
325
305
static WRITE_LINE_DEVICE_HANDLER( m68k_acia_rts_w )
326
306
{
327
 
        m6809_acia_dcd = state;
 
307
        mpu4_state *drvstate = device->machine().driver_data<mpu4_state>();
 
308
        drvstate->m_m6809_acia_dcd = state;
328
309
}
329
310
 
330
311
static READ_LINE_DEVICE_HANDLER( m68k_acia_dcd_r )
331
312
{
332
 
        return m6809_acia_rts;
 
313
        mpu4_state *state = device->machine().driver_data<mpu4_state>();
 
314
        return state->m_m6809_acia_rts;
333
315
}
334
316
 
335
317
static WRITE_LINE_DEVICE_HANDLER( m68k_acia_irq )
336
318
{
337
 
        m6809_acia_cts = !state;
338
 
        m6850_irq_state = state;
339
 
        update_mpu68_interrupts(device->machine);
 
319
        mpu4_state *drvstate = device->machine().driver_data<mpu4_state>();
 
320
        drvstate->m_m6809_acia_cts = !state;
 
321
        drvstate->m_m6850_irq_state = state;
 
322
        update_mpu68_interrupts(device->machine());
340
323
}
341
324
 
342
325
static ACIA6850_INTERFACE( m68k_acia_if )
354
337
 
355
338
static WRITE_LINE_DEVICE_HANDLER( cpu1_ptm_irq )
356
339
{
357
 
        m6840_irq_state = state;
358
 
        update_mpu68_interrupts(device->machine);
 
340
        mpu4_state *drvstate = device->machine().driver_data<mpu4_state>();
 
341
        drvstate->m_m6840_irq_state = state;
 
342
        update_mpu68_interrupts(device->machine());
359
343
}
360
344
 
361
345
 
365
349
 
366
350
        if (data)
367
351
        {
368
 
                device_t *acia_0 = device->machine->device("acia6850_0");
369
 
                device_t *acia_1 = device->machine->device("acia6850_1");
 
352
                device_t *acia_0 = device->machine().device("acia6850_0");
 
353
                device_t *acia_1 = device->machine().device("acia6850_1");
370
354
                acia6850_tx_clock_in(acia_0);
371
355
                acia6850_rx_clock_in(acia_0);
372
356
                acia6850_tx_clock_in(acia_1);
458
442
};
459
443
 
460
444
 
461
 
static UINT8 IR0_scn2674_double_ht_wd;
462
 
static UINT8 IR0_scn2674_scanline_per_char_row;
463
 
static UINT8 IR0_scn2674_sync_select;
464
 
static UINT8 IR0_scn2674_buffer_mode_select;
465
 
static UINT8 IR1_scn2674_interlace_enable;
466
 
static UINT8 IR1_scn2674_equalizing_constant;
467
 
static UINT8 IR2_scn2674_row_table;
468
 
static UINT8 IR2_scn2674_horz_sync_width;
469
 
static UINT8 IR2_scn2674_horz_back_porch;
470
 
static UINT8 IR3_scn2674_vert_front_porch;
471
 
static UINT8 IR3_scn2674_vert_back_porch;
472
 
static UINT8 IR4_scn2674_rows_per_screen;
473
 
static UINT8 IR4_scn2674_character_blink_rate;
474
 
static UINT8 IR5_scn2674_character_per_row;
475
 
static UINT8 IR8_scn2674_display_buffer_first_address_LSB;
476
 
static UINT8 IR9_scn2674_display_buffer_first_address_MSB;
477
 
static UINT8 IR9_scn2674_display_buffer_last_address;
478
 
static UINT8 IR10_scn2674_display_pointer_address_lower;
479
 
static UINT8 IR11_scn2674_display_pointer_address_upper;
480
 
static UINT8 IR12_scn2674_scroll_start;
481
 
static UINT8 IR12_scn2674_split_register_1;
482
 
static UINT8 IR13_scn2674_scroll_end;
483
 
static UINT8 IR13_scn2674_split_register_2;
484
 
 
485
 
 
486
 
static VIDEO_UPDATE( mpu4_vid )
 
445
 
 
446
 
 
447
static SCREEN_UPDATE( mpu4_vid )
487
448
{
 
449
        mpu4_state *state = screen->machine().driver_data<mpu4_state>();
488
450
        int x, y/*, count = 0*/;
489
451
 
490
452
        bitmap_fill(bitmap,cliprect,0);
493
455
        /* count = 0x0018b6/2; - crmaze count = 0x004950/2; - turnover */
494
456
 
495
457
        /* we're in row table mode...thats why */
496
 
        for(y = 0; y <= IR4_scn2674_rows_per_screen; y++)
 
458
        for(y = 0; y <= state->m_IR4_scn2674_rows_per_screen; y++)
497
459
        {
498
 
                int screen2_base = (scn2674_screen2_h << 8) | scn2674_screen2_l;
 
460
                int screen2_base = (state->m_scn2674_screen2_h << 8) | state->m_scn2674_screen2_l;
499
461
 
500
 
                UINT16 rowbase = (mpu4_vid_mainram[1+screen2_base+(y*2)]<<8)|mpu4_vid_mainram[screen2_base+(y*2)];
 
462
                UINT16 rowbase = (state->m_vid_mainram[1+screen2_base+(y*2)]<<8)|state->m_vid_mainram[screen2_base+(y*2)];
501
463
                int dbl_size;
502
464
                int gfxregion = 0;
503
465
 
505
467
 
506
468
                if (dbl_size&2) gfxregion = 1;
507
469
 
508
 
                for(x = 0; x <= IR5_scn2674_character_per_row; x++)
 
470
                for(x = 0; x <= state->m_IR5_scn2674_character_per_row; x++)
509
471
                {
510
472
                        UINT16 tiledat;
511
473
                        UINT16 attr;
512
474
 
513
 
                        tiledat = mpu4_vid_mainram[(rowbase+x)&0x7fff];
 
475
                        tiledat = state->m_vid_mainram[(rowbase+x)&0x7fff];
514
476
                        attr = tiledat >>12;
515
477
 
516
478
                        if (attr)
517
 
                                drawgfx_opaque(bitmap,cliprect,screen->machine->gfx[gfxregion],tiledat,0,0,0,x*8,y*8);
 
479
                                drawgfx_opaque(bitmap,cliprect,screen->machine().gfx[gfxregion],tiledat,0,0,0,x*8,y*8);
518
480
 
519
481
                        //count++;
520
482
                }
529
491
 
530
492
static READ16_HANDLER( mpu4_vid_vidram_r )
531
493
{
532
 
        return mpu4_vid_vidram[offset];
 
494
        mpu4_state *state = space->machine().driver_data<mpu4_state>();
 
495
        return state->m_vid_vidram[offset];
533
496
}
534
497
 
535
498
 
536
499
static WRITE16_HANDLER( mpu4_vid_vidram_w )
537
500
{
538
 
        COMBINE_DATA(&mpu4_vid_vidram[offset]);
 
501
        mpu4_state *state = space->machine().driver_data<mpu4_state>();
 
502
        COMBINE_DATA(&state->m_vid_vidram[offset]);
539
503
        offset <<= 1;
540
 
        gfx_element_mark_dirty(space->machine->gfx[mpu4_gfx_index+0], offset/0x20);
541
 
        gfx_element_mark_dirty(space->machine->gfx[mpu4_gfx_index+1], offset/0x20);
542
 
        gfx_element_mark_dirty(space->machine->gfx[mpu4_gfx_index+2], offset/0x20);
543
 
        gfx_element_mark_dirty(space->machine->gfx[mpu4_gfx_index+3], offset/0x20);
 
504
        gfx_element_mark_dirty(space->machine().gfx[state->m_gfx_index+0], offset/0x20);
 
505
        gfx_element_mark_dirty(space->machine().gfx[state->m_gfx_index+1], offset/0x20);
 
506
        gfx_element_mark_dirty(space->machine().gfx[state->m_gfx_index+2], offset/0x20);
 
507
        gfx_element_mark_dirty(space->machine().gfx[state->m_gfx_index+3], offset/0x20);
544
508
}
545
509
 
546
510
 
569
533
*/
570
534
 
571
535
 
572
 
static void scn2674_write_init_regs(UINT8 data)
 
536
static void scn2674_write_init_regs(mpu4_state *state, UINT8 data)
573
537
{
574
 
        LOGSTUFF(("scn2674_write_init_regs %02x %02x\n",scn2675_IR_pointer,data));
575
 
 
576
 
        scn2674_IR[scn2675_IR_pointer]=data;
577
 
 
578
 
 
579
 
        switch ( scn2675_IR_pointer) /* display some debug info, set mame specific variables */
 
538
        LOGSTUFF(("scn2674_write_init_regs %02x %02x\n",state->m_scn2675_IR_pointer,data));
 
539
 
 
540
        state->m_scn2674_IR[state->m_scn2675_IR_pointer]=data;
 
541
 
 
542
 
 
543
        switch ( state->m_scn2675_IR_pointer) /* display some debug info, set mame specific variables */
580
544
        {
581
545
                case 0:
582
 
                        IR0_scn2674_double_ht_wd = (data & 0x80)>>7;
583
 
                        IR0_scn2674_scanline_per_char_row = (data & 0x78)>>3;
584
 
                        IR0_scn2674_sync_select = (data&0x04)>>2;
585
 
                        IR0_scn2674_buffer_mode_select = (data&0x03);
 
546
                        state->m_IR0_scn2674_double_ht_wd = (data & 0x80)>>7;
 
547
                        state->m_IR0_scn2674_scanline_per_char_row = (data & 0x78)>>3;
 
548
                        state->m_IR0_scn2674_sync_select = (data&0x04)>>2;
 
549
                        state->m_IR0_scn2674_buffer_mode_select = (data&0x03);
586
550
 
587
 
                        LOGSTUFF(("IR0 - Double Ht Wd %02x\n",IR0_scn2674_double_ht_wd));
588
 
                        LOGSTUFF(("IR0 - Scanlines per Character Row %02x\n",IR0_scn2674_scanline_per_char_row));
589
 
                        LOGSTUFF(("IR0 - Sync Select %02x\n",IR0_scn2674_sync_select));
590
 
                        LOGSTUFF(("IR0 - Buffer Mode Select %02x\n",IR0_scn2674_buffer_mode_select));
 
551
                        LOGSTUFF(("IR0 - Double Ht Wd %02x\n",state->m_IR0_scn2674_double_ht_wd));
 
552
                        LOGSTUFF(("IR0 - Scanlines per Character Row %02x\n",state->m_IR0_scn2674_scanline_per_char_row));
 
553
                        LOGSTUFF(("IR0 - Sync Select %02x\n",state->m_IR0_scn2674_sync_select));
 
554
                        LOGSTUFF(("IR0 - Buffer Mode Select %02x\n",state->m_IR0_scn2674_buffer_mode_select));
591
555
                        break;
592
556
 
593
557
                case 1:
594
 
                        IR1_scn2674_interlace_enable = (data&0x80)>>7;
595
 
                        IR1_scn2674_equalizing_constant = (data&0x7f);
 
558
                        state->m_IR1_scn2674_interlace_enable = (data&0x80)>>7;
 
559
                        state->m_IR1_scn2674_equalizing_constant = (data&0x7f);
596
560
 
597
 
                        LOGSTUFF(("IR1 - Interlace Enable %02x\n",IR1_scn2674_interlace_enable));
598
 
                        LOGSTUFF(("IR1 - Equalizing Constant %02x\n",IR1_scn2674_equalizing_constant));
 
561
                        LOGSTUFF(("IR1 - Interlace Enable %02x\n",state->m_IR1_scn2674_interlace_enable));
 
562
                        LOGSTUFF(("IR1 - Equalizing Constant %02x\n",state->m_IR1_scn2674_equalizing_constant));
599
563
                        break;
600
564
 
601
565
                case 2:
602
 
                        IR2_scn2674_row_table = (data&0x80)>>7;
603
 
                        IR2_scn2674_horz_sync_width = (data&0x78)>>3;
604
 
                        IR2_scn2674_horz_back_porch = (data&0x07);
 
566
                        state->m_IR2_scn2674_row_table = (data&0x80)>>7;
 
567
                        state->m_IR2_scn2674_horz_sync_width = (data&0x78)>>3;
 
568
                        state->m_IR2_scn2674_horz_back_porch = (data&0x07);
605
569
 
606
 
                        LOGSTUFF(("IR2 - Row Table %02x\n",IR2_scn2674_row_table));
607
 
                        LOGSTUFF(("IR2 - Horizontal Sync Width %02x\n",IR2_scn2674_horz_sync_width));
608
 
                        LOGSTUFF(("IR2 - Horizontal Back Porch %02x\n",IR2_scn2674_horz_back_porch));
 
570
                        LOGSTUFF(("IR2 - Row Table %02x\n",state->m_IR2_scn2674_row_table));
 
571
                        LOGSTUFF(("IR2 - Horizontal Sync Width %02x\n",state->m_IR2_scn2674_horz_sync_width));
 
572
                        LOGSTUFF(("IR2 - Horizontal Back Porch %02x\n",state->m_IR2_scn2674_horz_back_porch));
609
573
                        break;
610
574
 
611
575
                case 3:
612
 
                        IR3_scn2674_vert_front_porch = (data&0xe0)>>5;
613
 
                        IR3_scn2674_vert_back_porch = (data&0x1f)>>0;
 
576
                        state->m_IR3_scn2674_vert_front_porch = (data&0xe0)>>5;
 
577
                        state->m_IR3_scn2674_vert_back_porch = (data&0x1f)>>0;
614
578
 
615
 
                        LOGSTUFF(("IR3 - Vertical Front Porch %02x\n",IR3_scn2674_vert_front_porch));
616
 
                        LOGSTUFF(("IR3 - Vertical Back Porch %02x\n",IR3_scn2674_vert_back_porch));
 
579
                        LOGSTUFF(("IR3 - Vertical Front Porch %02x\n",state->m_IR3_scn2674_vert_front_porch));
 
580
                        LOGSTUFF(("IR3 - Vertical Back Porch %02x\n",state->m_IR3_scn2674_vert_back_porch));
617
581
                        break;
618
582
 
619
583
                case 4:
620
 
                        IR4_scn2674_rows_per_screen = data&0x7f;
621
 
                        IR4_scn2674_character_blink_rate = (data & 0x80)>>7;
 
584
                        state->m_IR4_scn2674_rows_per_screen = data&0x7f;
 
585
                        state->m_IR4_scn2674_character_blink_rate = (data & 0x80)>>7;
622
586
 
623
 
                        LOGSTUFF(("IR4 - Rows Per Screen %02x\n",IR4_scn2674_rows_per_screen));
624
 
                        LOGSTUFF(("IR4 - Character Blink Rate %02x\n",IR4_scn2674_character_blink_rate));
 
587
                        LOGSTUFF(("IR4 - Rows Per Screen %02x\n",state->m_IR4_scn2674_rows_per_screen));
 
588
                        LOGSTUFF(("IR4 - Character Blink Rate %02x\n",state->m_IR4_scn2674_character_blink_rate));
625
589
                        break;
626
590
 
627
591
                case 5:
628
592
                   /* IR5 - Active Characters Per Row
629
593
             cccc cccc
630
594
             c = Characters Per Row */
631
 
                        IR5_scn2674_character_per_row = data;
632
 
                        LOGSTUFF(("IR5 - Active Characters Per Row %02x\n",IR5_scn2674_character_per_row));
 
595
                        state->m_IR5_scn2674_character_per_row = data;
 
596
                        LOGSTUFF(("IR5 - Active Characters Per Row %02x\n",state->m_IR5_scn2674_character_per_row));
633
597
                        break;
634
598
 
635
599
                case 6:
639
603
                        break;
640
604
 
641
605
                case 8:
642
 
                        IR8_scn2674_display_buffer_first_address_LSB = data;
643
 
                        LOGSTUFF(("IR8 - Display Buffer First Address LSB %02x\n",IR8_scn2674_display_buffer_first_address_LSB));
 
606
                        state->m_IR8_scn2674_display_buffer_first_address_LSB = data;
 
607
                        LOGSTUFF(("IR8 - Display Buffer First Address LSB %02x\n",state->m_IR8_scn2674_display_buffer_first_address_LSB));
644
608
                        break;
645
609
 
646
610
                case 9:
647
 
                        IR9_scn2674_display_buffer_first_address_MSB = data & 0x0f;
648
 
                        IR9_scn2674_display_buffer_last_address = (data & 0xf0)>>4;
649
 
                        LOGSTUFF(("IR9 - Display Buffer First Address MSB %02x\n",IR9_scn2674_display_buffer_first_address_MSB));
650
 
                        LOGSTUFF(("IR9 - Display Buffer Last Address %02x\n",IR9_scn2674_display_buffer_last_address));
 
611
                        state->m_IR9_scn2674_display_buffer_first_address_MSB = data & 0x0f;
 
612
                        state->m_IR9_scn2674_display_buffer_last_address = (data & 0xf0)>>4;
 
613
                        LOGSTUFF(("IR9 - Display Buffer First Address MSB %02x\n",state->m_IR9_scn2674_display_buffer_first_address_MSB));
 
614
                        LOGSTUFF(("IR9 - Display Buffer Last Address %02x\n",state->m_IR9_scn2674_display_buffer_last_address));
651
615
                        break;
652
616
 
653
617
                case 10:
654
 
                        IR10_scn2674_display_pointer_address_lower = data;
655
 
                        LOGSTUFF(("IR10 - Display Pointer Address Lower %02x\n",IR10_scn2674_display_pointer_address_lower));
 
618
                        state->m_IR10_scn2674_display_pointer_address_lower = data;
 
619
                        LOGSTUFF(("IR10 - Display Pointer Address Lower %02x\n",state->m_IR10_scn2674_display_pointer_address_lower));
656
620
                        break;
657
621
 
658
622
                case 11:
659
 
                        IR11_scn2674_display_pointer_address_upper= data&0x3f;
660
 
                        LOGSTUFF(("IR11 - Display Pointer Address Lower %02x\n",IR11_scn2674_display_pointer_address_upper));
 
623
                        state->m_IR11_scn2674_display_pointer_address_upper= data&0x3f;
 
624
                        LOGSTUFF(("IR11 - Display Pointer Address Lower %02x\n",state->m_IR11_scn2674_display_pointer_address_upper));
661
625
                        break;
662
626
 
663
627
                case 12:
664
 
                        IR12_scn2674_scroll_start = (data & 0x80)>>7;
665
 
                        IR12_scn2674_split_register_1 = (data & 0x7f);
666
 
                        LOGSTUFF(("IR12 - Scroll Start %02x\n",IR12_scn2674_scroll_start));
667
 
                        LOGSTUFF(("IR12 - Split Register 1 %02x\n",IR12_scn2674_split_register_1));
 
628
                        state->m_IR12_scn2674_scroll_start = (data & 0x80)>>7;
 
629
                        state->m_IR12_scn2674_split_register_1 = (data & 0x7f);
 
630
                        LOGSTUFF(("IR12 - Scroll Start %02x\n",state->m_IR12_scn2674_scroll_start));
 
631
                        LOGSTUFF(("IR12 - Split Register 1 %02x\n",state->m_IR12_scn2674_split_register_1));
668
632
                        break;
669
633
 
670
634
                case 13:
671
 
                        IR13_scn2674_scroll_end = (data & 0x80)>>7;
672
 
                        IR13_scn2674_split_register_2 = (data & 0x7f);
673
 
                        LOGSTUFF(("IR13 - Scroll End %02x\n",IR13_scn2674_scroll_end));
674
 
                        LOGSTUFF(("IR13 - Split Register 2 %02x\n",IR13_scn2674_split_register_2));
 
635
                        state->m_IR13_scn2674_scroll_end = (data & 0x80)>>7;
 
636
                        state->m_IR13_scn2674_split_register_2 = (data & 0x7f);
 
637
                        LOGSTUFF(("IR13 - Scroll End %02x\n",state->m_IR13_scn2674_scroll_end));
 
638
                        LOGSTUFF(("IR13 - Split Register 2 %02x\n",state->m_IR13_scn2674_split_register_2));
675
639
                        break;
676
640
 
677
641
                case 14:
682
646
 
683
647
        }
684
648
 
685
 
        scn2675_IR_pointer++;
686
 
        if (scn2675_IR_pointer>14)scn2675_IR_pointer=14;
 
649
        state->m_scn2675_IR_pointer++;
 
650
        if (state->m_scn2675_IR_pointer>14)state->m_scn2675_IR_pointer=14;
687
651
}
688
652
 
689
 
static void scn2674_write_command(running_machine *machine, UINT8 data)
 
653
static void scn2674_write_command(running_machine &machine, UINT8 data)
690
654
{
 
655
        mpu4_state *state = machine.driver_data<mpu4_state>();
691
656
        UINT8 oprand;
692
657
        int i;
693
658
 
697
662
        {
698
663
                /* master reset, configures registers */
699
664
                LOGSTUFF(("master reset\n"));
700
 
                scn2675_IR_pointer=0;
701
 
                scn2674_irq_register = 0x20;
702
 
                scn2674_status_register = 0x20;
703
 
                scn2674_irq_mask = 0x20;
704
 
                scn2674_gfx_enabled = 0;
705
 
                scn2674_display_enabled = 0;
706
 
                scn2674_cursor_enabled = 0;
707
 
                IR2_scn2674_row_table = 0;
 
665
                state->m_scn2675_IR_pointer=0;
 
666
                state->m_scn2674_irq_register = 0x20;
 
667
                state->m_scn2674_status_register = 0x20;
 
668
                state->m_scn2674_irq_mask = 0x20;
 
669
                state->m_scn2674_gfx_enabled = 0;
 
670
                state->m_scn2674_display_enabled = 0;
 
671
                state->m_scn2674_cursor_enabled = 0;
 
672
                state->m_IR2_scn2674_row_table = 0;
708
673
        }
709
674
 
710
675
        if ((data&0xf0)==0x10)
713
678
                LOGSTUFF(("set IR pointer %02x\n",data));
714
679
 
715
680
                oprand = data & 0x0f;
716
 
                scn2675_IR_pointer=oprand;
 
681
                state->m_scn2675_IR_pointer=oprand;
717
682
 
718
683
        }
719
684
 
723
688
        {
724
689
                /* Disable GFX */
725
690
                LOGSTUFF(("disable GFX %02x\n",data));
726
 
                scn2674_gfx_enabled = 0;
 
691
                state->m_scn2674_gfx_enabled = 0;
727
692
        }
728
693
 
729
694
        if ((data&0xe3)==0x23)
730
695
        {
731
696
                /* Enable GFX */
732
697
                LOGSTUFF(("enable GFX %02x\n",data));
733
 
                scn2674_gfx_enabled = 1;
 
698
                state->m_scn2674_gfx_enabled = 1;
734
699
        }
735
700
 
736
701
        if ((data&0xe9)==0x28)
738
703
                /* Display off */
739
704
                oprand = data & 0x04;
740
705
 
741
 
                scn2674_display_enabled = 0;
 
706
                state->m_scn2674_display_enabled = 0;
742
707
 
743
708
                if (oprand)
744
709
                        LOGSTUFF(("display OFF - float DADD bus %02x\n",data));
751
716
                /* Display on */
752
717
                oprand = data & 0x04;
753
718
 
754
 
                scn2674_display_enabled = 1;
 
719
                state->m_scn2674_display_enabled = 1;
755
720
 
756
721
                if (oprand)
757
722
                        LOGSTUFF(("display ON - next field %02x\n",data));
763
728
        {
764
729
                /* Cursor Off */
765
730
                LOGSTUFF(("cursor off %02x\n",data));
766
 
                scn2674_cursor_enabled = 0;
 
731
                state->m_scn2674_cursor_enabled = 0;
767
732
        }
768
733
 
769
734
        if ((data&0xf1)==0x31)
770
735
        {
771
736
                /* Cursor On */
772
737
                LOGSTUFF(("cursor on %02x\n",data));
773
 
                scn2674_cursor_enabled = 1;
 
738
                state->m_scn2674_cursor_enabled = 1;
774
739
        }
775
740
 
776
741
        /* END */
787
752
                LOGSTUFF(("Line Zero IRQ: %d Reset\n",(data>>3)&1));
788
753
                LOGSTUFF(("V-Blank   IRQ: %d Reset\n",(data>>4)&1));
789
754
 
790
 
                scn2674_irq_register &= ((data & 0x1f)^0x1f);
791
 
                scn2674_status_register &= ((data & 0x1f)^0x1f);
 
755
                state->m_scn2674_irq_register &= ((data & 0x1f)^0x1f);
 
756
                state->m_scn2674_status_register &= ((data & 0x1f)^0x1f);
792
757
 
793
 
                scn2674_irq_state = 0;
794
 
                if (scn2674_irq_register)
 
758
                state->m_scn2674_irq_state = 0;
 
759
                if (state->m_scn2674_irq_register)
795
760
                {
796
 
                        scn2674_irq_state = 1;
 
761
                        state->m_scn2674_irq_state = 1;
797
762
                }
798
763
                update_mpu68_interrupts(machine);
799
764
        }
808
773
                LOGSTUFF(("Line Zero IRQ: %d Disabled\n",(data>>3)&1));
809
774
                LOGSTUFF(("V-Blank   IRQ: %d Disabled\n",(data>>4)&1));
810
775
 
811
 
/*      scn2674_irq_mask &= ((data & 0x1f)^0x1f); disables.. doesn't enable? */
812
 
 
813
 
                scn2674_irq_mask &= ~(data & 0x1f);
814
 
 
815
 
                scn2674_irq_state = 0;
 
776
/*      state->m_scn2674_irq_mask &= ((data & 0x1f)^0x1f); disables.. doesn't enable? */
 
777
 
 
778
                state->m_scn2674_irq_mask &= ~(data & 0x1f);
 
779
 
 
780
                state->m_scn2674_irq_state = 0;
816
781
 
817
782
                for (i = 0; i < 5; i++)
818
783
                {
819
 
                        if ((scn2674_irq_register>>i&1)&(scn2674_irq_mask>>i&1))
 
784
                        if ((state->m_scn2674_irq_register>>i&1)&(state->m_scn2674_irq_mask>>i&1))
820
785
                        {
821
 
                                scn2674_irq_state = 1;
 
786
                                state->m_scn2674_irq_state = 1;
822
787
                        }
823
788
                }
824
789
                update_mpu68_interrupts(machine);
835
800
                LOGSTUFF(("Line Zero IRQ: %d Enabled\n",(data>>3)&1));
836
801
                LOGSTUFF(("V-Blank   IRQ: %d Enabled\n",(data>>4)&1));
837
802
 
838
 
                scn2674_irq_mask |= (data & 0x1f);  /* enables .. doesn't disable? */
 
803
                state->m_scn2674_irq_mask |= (data & 0x1f);  /* enables .. doesn't disable? */
839
804
 
840
 
                scn2674_irq_state = 0;
 
805
                state->m_scn2674_irq_state = 0;
841
806
 
842
807
                for (i = 0; i < 5; i++)
843
808
                {
844
 
                        if ((scn2674_irq_register>>i&1)&(scn2674_irq_mask>>i&1))
 
809
                        if ((state->m_scn2674_irq_register>>i&1)&(state->m_scn2674_irq_mask>>i&1))
845
810
                        {
846
 
                                scn2674_irq_state = 1;
 
811
                                state->m_scn2674_irq_state = 1;
847
812
                        }
848
813
                }
849
814
                update_mpu68_interrupts(machine);
909
874
 
910
875
static READ16_HANDLER( mpu4_vid_scn2674_r )
911
876
{
 
877
        mpu4_state *state = space->machine().driver_data<mpu4_state>();
912
878
        /*
913
879
    Offset:  Purpose
914
880
     0       Interrupt Register
938
904
        */
939
905
 
940
906
                case 0:
941
 
                        LOGSTUFF(("Read Irq Register %06x\n",cpu_get_pc(space->cpu)));
942
 
                        return scn2674_irq_register;
 
907
                        LOGSTUFF(("Read Irq Register %06x\n",cpu_get_pc(&space->device())));
 
908
                        return state->m_scn2674_irq_register;
943
909
 
944
910
                case 1:
945
 
                        LOGSTUFF(("Read Status Register %06x\n",cpu_get_pc(space->cpu)));
946
 
                        return scn2674_status_register;
 
911
                        LOGSTUFF(("Read Status Register %06x\n",cpu_get_pc(&space->device())));
 
912
                        return state->m_scn2674_status_register;
947
913
 
948
 
                case 2: LOGSTUFF(("Read Screen1_l Register %06x\n",cpu_get_pc(space->cpu)));return scn2674_screen1_l;
949
 
                case 3: LOGSTUFF(("Read Screen1_h Register %06x\n",cpu_get_pc(space->cpu)));return scn2674_screen1_h;
950
 
                case 4: LOGSTUFF(("Read Cursor_l Register %06x\n",cpu_get_pc(space->cpu)));return scn2674_cursor_l;
951
 
                case 5: LOGSTUFF(("Read Cursor_h Register %06x\n",cpu_get_pc(space->cpu)));return scn2674_cursor_h;
952
 
                case 6: LOGSTUFF(("Read Screen2_l Register %06x\n",cpu_get_pc(space->cpu)));return scn2674_screen2_l;
953
 
                case 7: LOGSTUFF(("Read Screen2_h Register %06x\n",cpu_get_pc(space->cpu)));return scn2674_screen2_h;
 
914
                case 2: LOGSTUFF(("Read Screen1_l Register %06x\n",cpu_get_pc(&space->device())));return state->m_scn2674_screen1_l;
 
915
                case 3: LOGSTUFF(("Read Screen1_h Register %06x\n",cpu_get_pc(&space->device())));return state->m_scn2674_screen1_h;
 
916
                case 4: LOGSTUFF(("Read Cursor_l Register %06x\n",cpu_get_pc(&space->device())));return state->m_scn2674_cursor_l;
 
917
                case 5: LOGSTUFF(("Read Cursor_h Register %06x\n",cpu_get_pc(&space->device())));return state->m_scn2674_cursor_h;
 
918
                case 6: LOGSTUFF(("Read Screen2_l Register %06x\n",cpu_get_pc(&space->device())));return state->m_scn2674_screen2_l;
 
919
                case 7: LOGSTUFF(("Read Screen2_h Register %06x\n",cpu_get_pc(&space->device())));return state->m_scn2674_screen2_h;
954
920
        }
955
921
 
956
922
        return 0xffff;
959
925
 
960
926
static WRITE16_HANDLER( mpu4_vid_scn2674_w )
961
927
{
 
928
        mpu4_state *state = space->machine().driver_data<mpu4_state>();
962
929
        /*
963
930
    Offset:  Purpose
964
931
     0       Initialization Registers
976
943
        switch (offset)
977
944
        {
978
945
                case 0:
979
 
                        scn2674_write_init_regs(data);
 
946
                        scn2674_write_init_regs(state, data);
980
947
                        break;
981
948
 
982
949
                case 1:
983
 
                        scn2674_write_command(space->machine, data);
 
950
                        scn2674_write_command(space->machine(), data);
984
951
                        break;
985
952
 
986
 
                case 2: scn2674_screen1_l = data; break;
987
 
                case 3: scn2674_screen1_h = data; break;
988
 
                case 4: scn2674_cursor_l  = data; break;
989
 
                case 5: scn2674_cursor_h  = data; break;
990
 
                case 6: scn2674_screen2_l = data; break;
991
 
                case 7: scn2674_screen2_h = data; break;
 
953
                case 2: state->m_scn2674_screen1_l = data; break;
 
954
                case 3: state->m_scn2674_screen1_h = data; break;
 
955
                case 4: state->m_scn2674_cursor_l  = data; break;
 
956
                case 5: state->m_scn2674_cursor_h  = data; break;
 
957
                case 6: state->m_scn2674_screen2_l = data; break;
 
958
                case 7: state->m_scn2674_screen2_h = data; break;
992
959
        }
993
960
}
994
961
 
995
962
 
996
963
static VIDEO_START( mpu4_vid )
997
964
{
 
965
        mpu4_state *state = machine.driver_data<mpu4_state>();
998
966
        /* if anything uses tile sizes other than 8x8 we can't really do it this way.. we'll have to draw tiles by hand.
999
967
      maybe we will anyway, but for now we don't need to */
1000
968
 
1001
 
        mpu4_vid_vidram = auto_alloc_array(machine, UINT16, 0x20000/2);
 
969
        state->m_vid_vidram = auto_alloc_array(machine, UINT16, 0x20000/2);
1002
970
 
1003
 
        memset(mpu4_vid_vidram,0,0x20000);
 
971
        memset(state->m_vid_vidram,0,0x20000);
1004
972
 
1005
973
        /* find first empty slot to decode gfx */
1006
 
        for (mpu4_gfx_index = 0; mpu4_gfx_index < MAX_GFX_ELEMENTS; mpu4_gfx_index++)
1007
 
                if (machine->gfx[mpu4_gfx_index] == 0)
 
974
        for (state->m_gfx_index = 0; state->m_gfx_index < MAX_GFX_ELEMENTS; state->m_gfx_index++)
 
975
                if (machine.gfx[state->m_gfx_index] == 0)
1008
976
                        break;
1009
977
 
1010
 
        assert(mpu4_gfx_index != MAX_GFX_ELEMENTS);
 
978
        assert(state->m_gfx_index != MAX_GFX_ELEMENTS);
1011
979
 
1012
980
        /* create the char set (gfx will then be updated dynamically from RAM) */
1013
 
        machine->gfx[mpu4_gfx_index+0] = gfx_element_alloc(machine, &mpu4_vid_char_8x8_layout, (UINT8 *)mpu4_vid_vidram, machine->total_colors() / 16, 0);
1014
 
        machine->gfx[mpu4_gfx_index+1] = gfx_element_alloc(machine, &mpu4_vid_char_8x16_layout, (UINT8 *)mpu4_vid_vidram, machine->total_colors() / 16, 0);
1015
 
        machine->gfx[mpu4_gfx_index+2] = gfx_element_alloc(machine, &mpu4_vid_char_16x8_layout, (UINT8 *)mpu4_vid_vidram, machine->total_colors() / 16, 0);
1016
 
        machine->gfx[mpu4_gfx_index+3] = gfx_element_alloc(machine, &mpu4_vid_char_16x16_layout, (UINT8 *)mpu4_vid_vidram, machine->total_colors() / 16, 0);
 
981
        machine.gfx[state->m_gfx_index+0] = gfx_element_alloc(machine, &mpu4_vid_char_8x8_layout, (UINT8 *)state->m_vid_vidram, machine.total_colors() / 16, 0);
 
982
        machine.gfx[state->m_gfx_index+1] = gfx_element_alloc(machine, &mpu4_vid_char_8x16_layout, (UINT8 *)state->m_vid_vidram, machine.total_colors() / 16, 0);
 
983
        machine.gfx[state->m_gfx_index+2] = gfx_element_alloc(machine, &mpu4_vid_char_16x8_layout, (UINT8 *)state->m_vid_vidram, machine.total_colors() / 16, 0);
 
984
        machine.gfx[state->m_gfx_index+3] = gfx_element_alloc(machine, &mpu4_vid_char_16x16_layout, (UINT8 *)state->m_vid_vidram, machine.total_colors() / 16, 0);
1017
985
 
1018
 
        scn2675_IR_pointer = 0;
 
986
        state->m_scn2675_IR_pointer = 0;
1019
987
}
1020
988
 
1021
989
 
1026
994
 *  (16 colors from 4096)
1027
995
 ****************************/
1028
996
 
1029
 
static struct ef9369
1030
 
{
1031
 
        UINT32 addr;
1032
 
        UINT16 clut[16];        /* 13-bits - a marking bit and a 444 color */
1033
 
} pal;
1034
 
 
1035
 
 
1036
997
/* Non-multiplexed mode */
1037
998
 
1038
999
static WRITE16_HANDLER( ef9369_w )
1039
1000
{
 
1001
        mpu4_state *state = space->machine().driver_data<mpu4_state>();
 
1002
        struct ef9369_t &pal = state->m_pal;
1040
1003
        data &= 0x00ff;
1041
1004
 
1042
1005
        /* Address register */
1065
1028
                        col = pal.clut[entry] & 0xfff;
1066
1029
 
1067
1030
                        /* Update the MAME palette */
1068
 
                        palette_set_color_rgb(space->machine, entry, pal4bit(col >> 8), pal4bit(col >> 4), pal4bit(col >> 0));
 
1031
                        palette_set_color_rgb(space->machine(), entry, pal4bit(col >> 8), pal4bit(col >> 4), pal4bit(col >> 0));
1069
1032
                }
1070
1033
 
1071
1034
                        /* Address register auto-increment */
1077
1040
 
1078
1041
static READ16_HANDLER( ef9369_r )
1079
1042
{
 
1043
        mpu4_state *state = space->machine().driver_data<mpu4_state>();
 
1044
        struct ef9369_t &pal = state->m_pal;
1080
1045
        if ((offset & 1) == 0)
1081
1046
        {
1082
1047
                UINT16 col = pal.clut[pal.addr >> 1];
1093
1058
        }
1094
1059
}
1095
1060
 
 
1061
/******************************************
 
1062
 *
 
1063
 *  Brooktree Bt471 RAMDAC
 
1064
 *  Implementation stolen from JPM
 
1065
 *  Impact, may not be 100% (that has a 477)
 
1066
 ******************************************/
 
1067
 
 
1068
/*
 
1069
 *  0 0 0    Address register (RAM write mode)
 
1070
 *  0 0 1    Color palette RAMs
 
1071
 *  0 1 0    Pixel read mask register
 
1072
 *  0 1 1    Address register (RAM read mode)
 
1073
 *  1 0 0    Address register (overlay write mode)
 
1074
 *  1 1 1    Address register (overlay read mode)
 
1075
 *  1 0 1    Overlay register
 
1076
 */
 
1077
 
 
1078
WRITE16_HANDLER( bt471_w )
 
1079
{
 
1080
        mpu4_state *state = space->machine().driver_data<mpu4_state>();
 
1081
        struct bt471_t &bt471 = state->m_bt471;
 
1082
        UINT8 val = data & 0xff;
 
1083
                {
 
1084
                        popmessage("Bt477: Unhandled write access (offset:%x, data:%x)", offset, val);
 
1085
                }
 
1086
 
 
1087
        switch (offset)
 
1088
        {
 
1089
                case 0x0:
 
1090
                {
 
1091
                        bt471.address = val;
 
1092
                        bt471.addr_cnt = 0;
 
1093
                        break;
 
1094
                }
 
1095
                case 0x1:
 
1096
                {
 
1097
                        UINT8 *addr_cnt = &bt471.addr_cnt;
 
1098
                        rgb_t *color = &bt471.color;
 
1099
 
 
1100
                        color[*addr_cnt] = val;
 
1101
 
 
1102
                        if (++*addr_cnt == 3)
 
1103
                        {
 
1104
                                palette_set_color(space->machine(), bt471.address, MAKE_RGB(color[0], color[1], color[2]));
 
1105
                                *addr_cnt = 0;
 
1106
 
 
1107
                                /* Address register increments */
 
1108
                                bt471.address++;
 
1109
                        }
 
1110
                        break;
 
1111
                }
 
1112
                case 0x2:
 
1113
                {
 
1114
                        bt471.pixmask = val;
 
1115
                        break;
 
1116
                }
 
1117
 
 
1118
//      default:
 
1119
                {
 
1120
                        popmessage("Bt477: Unhandled write access (offset:%x, data:%x)", offset, val);
 
1121
                }
 
1122
        }
 
1123
}
 
1124
 
 
1125
READ16_HANDLER( bt471_r )
 
1126
{
 
1127
        popmessage("Bt477: Unhandled read access (offset:%x)", offset);
 
1128
        return 0;
 
1129
}
 
1130
 
1096
1131
 
1097
1132
/*************************************
1098
1133
 *
1102
1137
 
1103
1138
static READ8_DEVICE_HANDLER( pia_ic5_porta_track_r )
1104
1139
{
 
1140
        mpu4_state *state = device->machine().driver_data<mpu4_state>();
1105
1141
        /* The SWP trackball interface connects a standard trackball to the AUX1 port on the MPU4
1106
1142
    mainboard. As per usual, they've taken the cheap route here, reading and processing the
1107
1143
    raw quadrature signal from the encoder wheels for a 4 bit interface, rather than use any
1111
1147
    We invert the X and Y data at source due to the use of Schmitt triggers in the interface, which
1112
1148
    clean up the pulses and flip the active phase.*/
1113
1149
 
1114
 
        LOG(("%s: IC5 PIA Read of Port A (AUX1)\n",cpuexec_describe_context(device->machine)));
1115
 
 
1116
 
        static INT8 cur[2];
1117
 
 
1118
 
        UINT8 data = input_port_read(device->machine, "AUX1");
1119
 
 
1120
 
        INT8 dx = input_port_read(device->machine, "TRACKX");
1121
 
        INT8 dy = input_port_read(device->machine, "TRACKY");
1122
 
 
1123
 
        cur[0] = dy + dx;
1124
 
        cur[1] = dy - dx;
 
1150
        LOG(("%s: IC5 PIA Read of Port A (AUX1)\n",device->machine().describe_context()));
 
1151
 
 
1152
 
 
1153
        UINT8 data = input_port_read(device->machine(), "AUX1");
 
1154
 
 
1155
        INT8 dx = input_port_read(device->machine(), "TRACKX");
 
1156
        INT8 dy = input_port_read(device->machine(), "TRACKY");
 
1157
 
 
1158
        state->m_cur[0] = dy + dx;
 
1159
        state->m_cur[1] = dy - dx;
1125
1160
 
1126
1161
        UINT8 xa, xb, ya, yb;
1127
1162
 
1128
1163
        /* generate pulses for the input port (A and B are 1 unit out of phase for direction sensing)*/
1129
 
        xa = ((cur[0] + 1) & 3) <= 1;
1130
 
        xb = (cur[0] & 3) <= 1;
1131
 
        ya = ((cur[1] + 1) & 3) <= 1;
1132
 
        yb = (cur[1] & 3) <= 1;
 
1164
        xa = ((state->m_cur[0] + 1) & 3) <= 1;
 
1165
        xb = (state->m_cur[0] & 3) <= 1;
 
1166
        ya = ((state->m_cur[1] + 1) & 3) <= 1;
 
1167
        yb = (state->m_cur[1] & 3) <= 1;
1133
1168
 
1134
1169
        data |= (xa << 4); // XA
1135
1170
        data |= (ya << 5); // YA
1867
1902
/* OKI M6376 (for Mating Game) FIXME */
1868
1903
static READ16_DEVICE_HANDLER( oki_r )
1869
1904
{
1870
 
        return device->machine->rand();
 
1905
        return device->machine().rand();
1871
1906
}
1872
1907
 
1873
1908
static WRITE16_DEVICE_HANDLER( oki_w )
1878
1913
 
1879
1914
static void video_reset(device_t *device)
1880
1915
{
1881
 
        device->machine->device("6840ptm_68k")->reset();
1882
 
        device->machine->device("acia6850_1")->reset();
 
1916
        device->machine().device("6840ptm_68k")->reset();
 
1917
        device->machine().device("acia6850_1")->reset();
1883
1918
}
1884
1919
 
1885
1920
/* machine start (called only once) */
1886
1921
static MACHINE_START( mpu4_vid )
1887
1922
{
 
1923
        mpu4_state *state = machine.driver_data<mpu4_state>();
1888
1924
        mpu4_config_common(machine);
1889
1925
 
 
1926
        state->m_mod_number=4; //No AY chip
1890
1927
        /* setup communications */
1891
 
        serial_card_connected = 1;
 
1928
        state->m_link7a_connected = 1;
1892
1929
 
1893
1930
        /* setup 8 mechanical meters */
1894
 
        Mechmtr_init(8);
1895
 
 
1896
 
        /* setup 4 reels (for hybrid machines) */
1897
 
        stepper_config(machine, 0, &barcrest_reel_interface);
1898
 
        stepper_config(machine, 1, &barcrest_reel_interface);
1899
 
        stepper_config(machine, 2, &barcrest_reel_interface);
1900
 
        stepper_config(machine, 3, &barcrest_reel_interface);
 
1931
        MechMtr_config(machine,8);
1901
1932
 
1902
1933
        /* setup the standard oki MSC1937 display */
1903
1934
        ROC10937_init(0, MSC1937, 0);
1904
1935
 
1905
1936
        /* Hook the reset line */
1906
 
        m68k_set_reset_callback(machine->device("video"), video_reset);
 
1937
        m68k_set_reset_callback(machine.device("video"), video_reset);
1907
1938
}
1908
1939
 
1909
1940
static MACHINE_RESET( mpu4_vid )
1910
1941
{
 
1942
        mpu4_state *state = machine.driver_data<mpu4_state>();
1911
1943
        ROC10937_reset(0);
1912
1944
 
1913
 
        mpu4_stepper_reset();
1914
 
 
1915
 
        lamp_strobe    = 0;
1916
 
        lamp_strobe2   = 0;
1917
 
        lamp_data      = 0;
1918
 
 
1919
 
        IC23GC    = 0;
1920
 
        IC23GB    = 0;
1921
 
        IC23GA    = 0;
1922
 
        IC23G1    = 1;
1923
 
        IC23G2A   = 0;
1924
 
        IC23G2B   = 0;
1925
 
 
1926
 
        prot_col  = 0;
 
1945
        mpu4_stepper_reset(state);
 
1946
 
 
1947
        state->m_lamp_strobe    = 0;
 
1948
        state->m_lamp_strobe2   = 0;
 
1949
        state->m_led_strobe     = 0;
 
1950
 
 
1951
        state->m_IC23GC    = 0;
 
1952
        state->m_IC23GB    = 0;
 
1953
        state->m_IC23GA    = 0;
 
1954
        state->m_IC23G1    = 1;
 
1955
        state->m_IC23G2A   = 0;
 
1956
        state->m_IC23G2B   = 0;
 
1957
 
 
1958
        state->m_prot_col  = 0;
1927
1959
}
1928
1960
 
1929
 
static ADDRESS_MAP_START( mpu4_68k_map, ADDRESS_SPACE_PROGRAM, 16 )
 
1961
static ADDRESS_MAP_START( mpu4_68k_map, AS_PROGRAM, 16 )
1930
1962
        AM_RANGE(0x000000, 0x7fffff) AM_ROM
1931
 
        AM_RANGE(0x800000, 0x80ffff) AM_RAM AM_BASE(&mpu4_vid_mainram)
 
1963
        AM_RANGE(0x800000, 0x80ffff) AM_RAM AM_BASE_MEMBER(mpu4_state, m_vid_mainram)
1932
1964
        AM_RANGE(0x900000, 0x900001) AM_DEVWRITE8("saa", saa1099_data_w, 0x00ff)
1933
1965
        AM_RANGE(0x900002, 0x900003) AM_DEVWRITE8("saa", saa1099_control_w, 0x00ff)
1934
1966
        AM_RANGE(0xa00000, 0xa00003) AM_READWRITE(ef9369_r, ef9369_w)
1942
1974
ADDRESS_MAP_END
1943
1975
 
1944
1976
/* TODO: Fix up MPU4 map*/
1945
 
static ADDRESS_MAP_START( mpu4_6809_map, ADDRESS_SPACE_PROGRAM, 8 )
 
1977
static ADDRESS_MAP_START( mpu4_6809_map, AS_PROGRAM, 8 )
1946
1978
        AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("nvram")
1947
1979
        AM_RANGE(0x0800, 0x0800) AM_DEVREADWRITE("acia6850_0", acia6850_stat_r, acia6850_ctrl_w)
1948
1980
        AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("acia6850_0", acia6850_data_r, acia6850_data_w)
1949
 
        AM_RANGE(0x0880, 0x0881) AM_NOP /* Could be a UART datalogger is here. */
1950
 
        AM_RANGE(0x0900, 0x0907) AM_DEVREADWRITE("6840ptm", ptm6840_read, ptm6840_write)
 
1981
        AM_RANGE(0x0880, 0x0881) AM_NOP //Read/write here
 
1982
        AM_RANGE(0x0900, 0x0907) AM_DEVREADWRITE("ptm_ic2", ptm6840_read, ptm6840_write)
1951
1983
        AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w)
1952
1984
        AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w)
1953
1985
        AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w)
1959
1991
        AM_RANGE(0xc000, 0xffff) AM_ROM AM_REGION("maincpu",0)  /* 64k EPROM on board, only this region read */
1960
1992
ADDRESS_MAP_END
1961
1993
 
1962
 
static ADDRESS_MAP_START( vp_68k_map, ADDRESS_SPACE_PROGRAM, 16 )
 
1994
static ADDRESS_MAP_START( vp_68k_map, AS_PROGRAM, 16 )
1963
1995
        AM_RANGE(0x000000, 0x7fffff) AM_ROM
1964
 
        AM_RANGE(0x800000, 0x80ffff) AM_RAM AM_BASE(&mpu4_vid_mainram)
 
1996
        AM_RANGE(0x800000, 0x80ffff) AM_RAM AM_BASE_MEMBER(mpu4_state, m_vid_mainram)
1965
1997
        AM_RANGE(0x810000, 0x81ffff) AM_RAM /* ? */
1966
1998
        AM_RANGE(0x900000, 0x900001) AM_DEVWRITE8("saa", saa1099_data_w, 0x00ff)
1967
1999
        AM_RANGE(0x900002, 0x900003) AM_DEVWRITE8("saa", saa1099_control_w, 0x00ff)
1976
2008
/*  AM_RANGE(0xffd000, 0xffd00f) AM_READWRITE(characteriser16_r, characteriser16_w) Word-based version of old CHR??? */
1977
2009
ADDRESS_MAP_END
1978
2010
 
 
2011
static ADDRESS_MAP_START( bwbvid_6809_map, AS_PROGRAM, 8 )
 
2012
        AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("nvram")
 
2013
        AM_RANGE(0x0800, 0x0800) AM_DEVREADWRITE("acia6850_0", acia6850_stat_r, acia6850_ctrl_w)
 
2014
        AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("acia6850_0", acia6850_data_r, acia6850_data_w)
 
2015
        AM_RANGE(0x0880, 0x0881) //AM_NOP //Read/write here
 
2016
        AM_RANGE(0x0900, 0x0907) AM_DEVREADWRITE("ptm_ic2", ptm6840_read, ptm6840_write)
 
2017
        AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w)
 
2018
        AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w)
 
2019
        AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w)
 
2020
        AM_RANGE(0x0d00, 0x0d03) AM_DEVREADWRITE("pia_ic6", pia6821_r, pia6821_w)
 
2021
        AM_RANGE(0x0e00, 0x0e03) AM_DEVREADWRITE("pia_ic7", pia6821_r, pia6821_w)
 
2022
        AM_RANGE(0x0f00, 0x0f03) AM_DEVREADWRITE("pia_ic8", pia6821_r, pia6821_w)
 
2023
        AM_RANGE(0x4000, 0x7fff) AM_RAM
 
2024
        AM_RANGE(0xbe00, 0xbfff) AM_RAM
 
2025
        AM_RANGE(0xc000, 0xffff) AM_ROM AM_REGION("maincpu",0)  /* 64k EPROM on board, only this region read */
 
2026
ADDRESS_MAP_END
 
2027
 
 
2028
static ADDRESS_MAP_START( bwbvid_68k_map, AS_PROGRAM, 16 )
 
2029
        AM_RANGE(0x000000, 0x7fffff) AM_ROM
 
2030
        AM_RANGE(0x800000, 0x80ffff) AM_RAM AM_BASE_MEMBER(mpu4_state, m_vid_mainram)
 
2031
        AM_RANGE(0x810000, 0x81ffff) AM_RAM /* ? */
 
2032
        AM_RANGE(0x900000, 0x900001) AM_DEVWRITE8("saa", saa1099_data_w, 0x00ff)
 
2033
        AM_RANGE(0x900002, 0x900003) AM_DEVWRITE8("saa", saa1099_control_w, 0x00ff)
 
2034
        AM_RANGE(0xa00000, 0xa00003) AM_READWRITE(ef9369_r, ef9369_w)
 
2035
//  AM_RANGE(0xa00000, 0xa0000f) AM_READWRITE(bt471_r,bt471_w) //Some games use this
 
2036
/*  AM_RANGE(0xa00004, 0xa0000f) AM_READWRITE(mpu4_vid_unmap_r, mpu4_vid_unmap_w) */
 
2037
        AM_RANGE(0xb00000, 0xb0000f) AM_READWRITE(mpu4_vid_scn2674_r, mpu4_vid_scn2674_w)
 
2038
        AM_RANGE(0xc00000, 0xc1ffff) AM_READWRITE(mpu4_vid_vidram_r, mpu4_vid_vidram_w)
 
2039
        AM_RANGE(0xe00000, 0xe00001) AM_DEVREADWRITE8("acia6850_1", acia6850_stat_r, acia6850_ctrl_w, 0xff)
 
2040
        AM_RANGE(0xe00002, 0xe00003) AM_DEVREADWRITE8("acia6850_1", acia6850_data_r, acia6850_data_w, 0xff)
 
2041
        AM_RANGE(0xe01000, 0xe0100f) AM_DEVREADWRITE8("6840ptm_68k", ptm6840_read, ptm6840_write, 0xff)
 
2042
        //AM_RANGE(0xa00004, 0xa0000f) AM_READWRITE(bwb_characteriser16_r, bwb_characteriser16_w)//AM_READWRITE(adpcm_r, adpcm_w)  CHR ?
 
2043
ADDRESS_MAP_END
 
2044
 
 
2045
static ADDRESS_MAP_START( bwbvid5_68k_map, AS_PROGRAM, 16 )
 
2046
        AM_RANGE(0x000000, 0x7fffff) AM_ROM
 
2047
        AM_RANGE(0x800000, 0x80ffff) AM_RAM AM_BASE_MEMBER(mpu4_state, m_vid_mainram)
 
2048
        AM_RANGE(0x810000, 0x81ffff) AM_RAM /* ? */
 
2049
        AM_RANGE(0x900000, 0x900001) AM_DEVWRITE8("saa", saa1099_data_w, 0x00ff)
 
2050
        AM_RANGE(0x900002, 0x900003) AM_DEVWRITE8("saa", saa1099_control_w, 0x00ff)
 
2051
        AM_RANGE(0xa00000, 0xa00003) AM_READWRITE(ef9369_r, ef9369_w)
 
2052
        //AM_RANGE(0xa00000, 0xa00003) AM_READWRITE(bt471_r,bt471_w) Some games use this
 
2053
/*  AM_RANGE(0xa00004, 0xa0000f) AM_READWRITE(mpu4_vid_unmap_r, mpu4_vid_unmap_w) */
 
2054
        AM_RANGE(0xb00000, 0xb0000f) AM_READWRITE(mpu4_vid_scn2674_r, mpu4_vid_scn2674_w)
 
2055
        AM_RANGE(0xc00000, 0xc1ffff) AM_READWRITE(mpu4_vid_vidram_r, mpu4_vid_vidram_w)
 
2056
        AM_RANGE(0xe00000, 0xe00001) AM_DEVREADWRITE8("acia6850_1", acia6850_stat_r, acia6850_ctrl_w, 0xff)
 
2057
        AM_RANGE(0xe00002, 0xe00003) AM_DEVREADWRITE8("acia6850_1", acia6850_data_r, acia6850_data_w, 0xff)
 
2058
        AM_RANGE(0xe01000, 0xe0100f) AM_DEVREADWRITE8("6840ptm_68k", ptm6840_read, ptm6840_write, 0xff)
 
2059
        AM_RANGE(0xe02000, 0xe02007) AM_DEVREADWRITE8("pia_ic4ss", pia6821_r, pia6821_w, 0xff)
 
2060
        AM_RANGE(0xe03000, 0xe0300f) AM_DEVREADWRITE8("6840ptm_ic3ss", ptm6840_read, ptm6840_write, 0xff)
 
2061
        AM_RANGE(0xa00004, 0xa0000f) AM_READWRITE(bwb_characteriser16_r, bwb_characteriser16_w)//AM_READWRITE(adpcm_r, adpcm_w)  CHR ?
 
2062
ADDRESS_MAP_END
1979
2063
 
1980
2064
/* Deal 'Em */
1981
2065
/* Deal 'Em was designed as an enhanced gamecard, to fit into an existing MPU4 cabinet
1982
2066
It's an unoffical addon, and does all its work through the existing 6809 CPU.
1983
2067
Although given unofficial status, Barcrest's patent on the MPU4 Video hardware (GB1596363) describes
1984
 
the Deal 'Em board design, rather than the one they ultimately used, suggesting some sort of licensing deal. */
 
2068
the Deal 'Em board design, rather than the one they ultimately used, suggesting some sort of licensing deal.
 
2069
Perhaps this was the (seemingly very rare) MPU3 Video card design? */
1985
2070
 
1986
2071
static const gfx_layout dealemcharlayout =
1987
2072
{
2000
2085
GFXDECODE_END
2001
2086
 
2002
2087
 
2003
 
static UINT8 *dealem_videoram;
2004
2088
 
2005
2089
/***************************************************************************
2006
2090
 
2035
2119
                        3,      resistances_rg, weights_g,      1000,   0,
2036
2120
                        2,      resistances_b,  weights_b,      1000,   0);
2037
2121
 
2038
 
        len = machine->region("proms")->bytes();
 
2122
        len = machine.region("proms")->bytes();
2039
2123
        for (i = 0; i < len; i++)
2040
2124
        {
2041
2125
                int bit0,bit1,bit2,r,g,b;
2061
2145
}
2062
2146
 
2063
2147
 
2064
 
static VIDEO_UPDATE(dealem)
 
2148
static SCREEN_UPDATE(dealem)
2065
2149
{
 
2150
        mpu4_state *state = screen->machine().driver_data<mpu4_state>();
2066
2151
        int x,y;
2067
2152
        int count = 0;
2068
2153
 
2070
2155
        {
2071
2156
                for (x = 0; x < 40; x++)
2072
2157
                {
2073
 
                        int tile = dealem_videoram[count + 0x1000] | (dealem_videoram[count] << 8);
 
2158
                        int tile = state->m_dealem_videoram[count + 0x1000] | (state->m_dealem_videoram[count] << 8);
2074
2159
                        count++;
2075
 
                        drawgfx_opaque(bitmap,cliprect,screen->machine->gfx[0],tile,0,0,0,x * 8,y * 8);
 
2160
                        drawgfx_opaque(bitmap,cliprect,screen->machine().gfx[0],tile,0,0,0,x * 8,y * 8);
2076
2161
                }
2077
2162
        }
2078
2163
 
2082
2167
 
2083
2168
static WRITE_LINE_DEVICE_HANDLER( dealem_vsync_changed )
2084
2169
{
2085
 
        cputag_set_input_line(device->machine, "maincpu", INPUT_LINE_NMI, state);
 
2170
        cputag_set_input_line(device->machine(), "maincpu", INPUT_LINE_NMI, state);
2086
2171
}
2087
2172
 
2088
2173
 
2107
2192
};
2108
2193
 
2109
2194
 
2110
 
static ADDRESS_MAP_START( dealem_memmap, ADDRESS_SPACE_PROGRAM, 8 )
 
2195
static ADDRESS_MAP_START( dealem_memmap, AS_PROGRAM, 8 )
2111
2196
        AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("nvram")
2112
2197
 
2113
2198
        AM_RANGE(0x0800, 0x0800) AM_DEVWRITE("crtc", mc6845_address_w)
2114
2199
        AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
2115
2200
 
2116
 
/*  AM_RANGE(0x08e0, 0x08e7) AM_READWRITE(68681_duart_r,68681_duart_w) */
 
2201
/*  AM_RANGE(0x08e0, 0x08e7) AM_READWRITE(68681_duart_r,68681_duart_w) */ //Runs hoppers
2117
2202
 
2118
 
        AM_RANGE(0x0900, 0x0907) AM_DEVREADWRITE("6840ptm", ptm6840_read, ptm6840_write) /* 6840PTM */
 
2203
        AM_RANGE(0x0900, 0x0907) AM_DEVREADWRITE("ptm_ic2", ptm6840_read, ptm6840_write)/* PTM6840 IC2 */
2119
2204
 
2120
2205
        AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w)               /* PIA6821 IC3 */
2121
2206
        AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w)               /* PIA6821 IC4 */
2124
2209
        AM_RANGE(0x0e00, 0x0e03) AM_DEVREADWRITE("pia_ic7", pia6821_r, pia6821_w)               /* PIA6821 IC7 */
2125
2210
        AM_RANGE(0x0f00, 0x0f03) AM_DEVREADWRITE("pia_ic8", pia6821_r, pia6821_w)               /* PIA6821 IC8 */
2126
2211
 
2127
 
        AM_RANGE(0x1000, 0x2fff) AM_RAM AM_BASE(&dealem_videoram)
 
2212
        AM_RANGE(0x1000, 0x2fff) AM_RAM AM_BASE_MEMBER(mpu4_state, m_dealem_videoram)
2128
2213
        AM_RANGE(0x8000, 0xffff) AM_ROM AM_WRITENOP/* 64k  paged ROM (4 pages) */
2129
2214
ADDRESS_MAP_END
2130
2215
 
2131
 
static int rowcounter = 0;
2132
 
static int linecounter = 0;
2133
2216
 
2134
2217
 
2135
2218
static TIMER_DEVICE_CALLBACK( scanline_timer_callback )
2136
2219
{
 
2220
        mpu4_state *state = timer.machine().driver_data<mpu4_state>();
2137
2221
        int current_scanline=param;
2138
 
        timer_call_after_resynch(timer.machine, NULL, 0, 0);
 
2222
        timer.machine().scheduler().synchronize();
2139
2223
 
2140
2224
 
2141
2225
        if (current_scanline==0)
2142
2226
        {
2143
2227
                // these will be used to track which row / line we're on eventually
2144
2228
                // and used by the renderer to render the correct data
2145
 
                rowcounter = 0; linecounter = 0;
2146
 
 
2147
 
        //  scn2674_status_register &= ~0x10; // clear vblank
2148
 
 
2149
 
                scn2674_status_register |= 0x02;
 
2229
                state->m_rowcounter = 0; state->m_linecounter = 0;
 
2230
 
 
2231
        //  state->m_scn2674_status_register &= ~0x10; // clear vblank
 
2232
 
 
2233
                state->m_scn2674_status_register |= 0x02;
2150
2234
                /* Ready - this triggers for the first scanline of the screen */
2151
 
                if (scn2674_irq_mask&0x02)
 
2235
                if (state->m_scn2674_irq_mask&0x02)
2152
2236
                {
2153
2237
                        LOGSTUFF(("SCN2674 Ready\n"));
2154
 
                        scn2674_irq_state = 1;
2155
 
                        scn2674_irq_register |= 0x02;
2156
 
                        update_mpu68_interrupts(timer.machine);
 
2238
                        state->m_scn2674_irq_state = 1;
 
2239
                        state->m_scn2674_irq_register |= 0x02;
 
2240
                        update_mpu68_interrupts(timer.machine());
2157
2241
                }
2158
2242
        }
2159
2243
 
2160
2244
        // should be triggered at the start of each ROW (line zero for that row)
2161
2245
        if ((current_scanline%8 == 7) && (current_scanline<296))
2162
2246
        {
2163
 
                scn2674_status_register |= 0x08;
2164
 
                if (scn2674_irq_mask&0x08)
 
2247
                state->m_scn2674_status_register |= 0x08;
 
2248
                if (state->m_scn2674_irq_mask&0x08)
2165
2249
                {
2166
2250
                        LOGSTUFF(("SCN2674 Line Zero\n"));
2167
 
                        scn2674_irq_state = 1;
2168
 
                        scn2674_irq_register |= 0x08;
2169
 
                        update_mpu68_interrupts(timer.machine);
 
2251
                        state->m_scn2674_irq_state = 1;
 
2252
                        state->m_scn2674_irq_register |= 0x08;
 
2253
                        update_mpu68_interrupts(timer.machine());
2170
2254
                }
2171
2255
        }
2172
2256
 
2173
2257
        // this is ROWS not scanlines!!
2174
 
        if (current_scanline == IR12_scn2674_split_register_1*8)
 
2258
        if (current_scanline == state->m_IR12_scn2674_split_register_1*8)
2175
2259
        /* Split Screen 1 */
2176
2260
        {
2177
 
                if (scn2674_screen2_h & 0x40)
 
2261
                if (state->m_scn2674_screen2_h & 0x40)
2178
2262
                {
2179
2263
                        popmessage("Split screen 1 address shift required, contact MAMEDEV");
2180
2264
                }
2181
 
                scn2674_status_register |= 0x04;
2182
 
                if (scn2674_irq_mask&0x04)
 
2265
                state->m_scn2674_status_register |= 0x04;
 
2266
                if (state->m_scn2674_irq_mask&0x04)
2183
2267
                {
2184
2268
                        LOGSTUFF(("SCN2674 Split Screen 1\n"));
2185
 
                        scn2674_irq_state = 1;
2186
 
                        update_mpu68_interrupts(timer.machine);
2187
 
                        timer.machine->primary_screen->update_partial(timer.machine->primary_screen->vpos());
 
2269
                        state->m_scn2674_irq_state = 1;
 
2270
                        update_mpu68_interrupts(timer.machine());
 
2271
                        timer.machine().primary_screen->update_partial(timer.machine().primary_screen->vpos());
2188
2272
 
2189
 
                        scn2674_irq_register |= 0x04;
 
2273
                        state->m_scn2674_irq_register |= 0x04;
2190
2274
                }
2191
2275
        }
2192
2276
 
2193
2277
        // this is in ROWS not scanlines!!!
2194
 
        if (current_scanline == IR13_scn2674_split_register_2*8)
 
2278
        if (current_scanline == state->m_IR13_scn2674_split_register_2*8)
2195
2279
        /* Split Screen 2 */
2196
2280
        {
2197
 
                if (scn2674_screen2_h & 0x80)
 
2281
                if (state->m_scn2674_screen2_h & 0x80)
2198
2282
                {
2199
2283
                        popmessage("Split screen 2 address shift required, contact MAMEDEV");
2200
2284
                }
2201
 
                scn2674_status_register |= 0x01;
2202
 
                if (scn2674_irq_mask&0x01)
 
2285
                state->m_scn2674_status_register |= 0x01;
 
2286
                if (state->m_scn2674_irq_mask&0x01)
2203
2287
                {
2204
2288
                        LOGSTUFF(("SCN2674 Split Screen 2 irq\n"));
2205
 
                        scn2674_irq_state = 1;
2206
 
                        scn2674_irq_register |= 0x01;
2207
 
                        update_mpu68_interrupts(timer.machine);
2208
 
                        timer.machine->primary_screen->update_partial(timer.machine->primary_screen->vpos());
 
2289
                        state->m_scn2674_irq_state = 1;
 
2290
                        state->m_scn2674_irq_register |= 0x01;
 
2291
                        update_mpu68_interrupts(timer.machine());
 
2292
                        timer.machine().primary_screen->update_partial(timer.machine().primary_screen->vpos());
2209
2293
 
2210
2294
                }
2211
2295
        }
2213
2297
        // vblank?
2214
2298
        if (current_scanline == 300)
2215
2299
        {
2216
 
        /*  if (scn2674_display_enabled) ? */
 
2300
        /*  if (state->m_scn2674_display_enabled) ? */
2217
2301
                {
2218
 
                        if (scn2674_irq_mask&0x10)
 
2302
                        state->m_scn2674_status_register |= 0x10;
 
2303
                        if (state->m_scn2674_irq_mask&0x10)
2219
2304
                        {
2220
2305
                                LOGSTUFF(("vblank irq\n"));
2221
 
                                scn2674_irq_state = 1;
2222
 
                                update_mpu68_interrupts(timer.machine);
2223
 
 
2224
 
                                scn2674_irq_register |= 0x10;
 
2306
                                state->m_scn2674_irq_state = 1;
 
2307
                                state->m_scn2674_irq_register |= 0x10;
 
2308
                                update_mpu68_interrupts(timer.machine());
2225
2309
                        }
2226
2310
                }
2227
 
                scn2674_status_register |= 0x10;
2228
2311
        }
2229
2312
 
2230
2313
//  printf("scanline %d\n",current_scanline);
2231
2314
}
2232
2315
 
2233
2316
 
2234
 
static MACHINE_CONFIG_START( mpu4_vid, driver_device )
 
2317
static MACHINE_CONFIG_START( mpu4_vid, mpu4_state )
2235
2318
        MCFG_CPU_ADD("maincpu", M6809, MPU4_MASTER_CLOCK/4 )
2236
2319
        MCFG_CPU_PROGRAM_MAP(mpu4_6809_map)
2237
 
        MCFG_TIMER_ADD_PERIODIC("50hz",gen_50hz, HZ(100))
 
2320
        MCFG_TIMER_ADD_PERIODIC("50hz",gen_50hz, attotime::from_hz(100))
2238
2321
 
2239
2322
        MCFG_NVRAM_ADD_0FILL("nvram")                           /* confirm */
2240
2323
 
2241
2324
        /* 6840 PTM */
2242
 
        MCFG_PTM6840_ADD("6840ptm", ptm_ic2_intf)
 
2325
        MCFG_PTM6840_ADD("ptm_ic2", ptm_ic2_intf)
2243
2326
 
2244
2327
        MCFG_PIA6821_ADD("pia_ic3", pia_ic3_intf)
2245
2328
        MCFG_PIA6821_ADD("pia_ic4", pia_ic4_intf)
2254
2337
        MCFG_SCREEN_SIZE(64*8, 40*8) // note this directly affects the scanline counters used below, and thus the timing of everything
2255
2338
        MCFG_SCREEN_VISIBLE_AREA(0*8, 63*8-1, 0*8, 37*8-1)
2256
2339
        MCFG_SCREEN_REFRESH_RATE(50)
 
2340
        MCFG_SCREEN_UPDATE(mpu4_vid)
2257
2341
 
2258
2342
        MCFG_CPU_ADD("video", M68000, VIDEO_MASTER_CLOCK )
2259
2343
        MCFG_CPU_PROGRAM_MAP(mpu4_68k_map)
2260
2344
 
2261
 
        MCFG_QUANTUM_TIME(HZ(960))
 
2345
        MCFG_QUANTUM_TIME(attotime::from_hz(960))
2262
2346
 
2263
2347
        MCFG_MACHINE_START(mpu4_vid)
2264
2348
        MCFG_MACHINE_RESET(mpu4_vid)
2265
2349
        MCFG_VIDEO_START (mpu4_vid)
2266
 
        MCFG_VIDEO_UPDATE(mpu4_vid)
2267
2350
 
2268
2351
        MCFG_PALETTE_LENGTH(16)
2269
2352
 
2270
2353
        MCFG_PTM6840_ADD("6840ptm_68k", ptm_vid_intf)
2271
 
 
2272
 
        MCFG_SPEAKER_STANDARD_MONO("mono")
2273
 
        MCFG_SOUND_ADD("ay8913",AY8913, MPU4_MASTER_CLOCK/4)
2274
 
        MCFG_SOUND_CONFIG(ay8910_config)
2275
 
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
2276
 
 
2277
2354
        /* Present on all video cards */
2278
2355
        MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
2279
2356
        MCFG_SOUND_ADD("saa", SAA1099, 8000000)
2292
2369
MACHINE_CONFIG_END
2293
2370
 
2294
2371
static MACHINE_CONFIG_DERIVED( mating, crmaze )
2295
 
 
2296
2372
        MCFG_SOUND_ADD("oki", OKIM6376, 64000) //?
2297
 
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
 
2373
        MCFG_SOUND_ROUTE(0, "lspeaker", 0.5)
 
2374
        MCFG_SOUND_ROUTE(1, "rspeaker", 0.5)
2298
2375
MACHINE_CONFIG_END
2299
2376
 
2300
2377
static MACHINE_CONFIG_DERIVED( vgpoker, mpu4_vid )
2302
2379
        MCFG_CPU_PROGRAM_MAP(vp_68k_map)
2303
2380
MACHINE_CONFIG_END
2304
2381
 
2305
 
 
 
2382
static MACHINE_CONFIG_START( bwbvid, mpu4_state )
 
2383
        MCFG_CPU_ADD("maincpu", M6809, MPU4_MASTER_CLOCK/4 )
 
2384
        MCFG_CPU_PROGRAM_MAP(bwbvid_6809_map)
 
2385
        MCFG_TIMER_ADD_PERIODIC("50hz",gen_50hz, attotime::from_hz(100))
 
2386
 
 
2387
        MCFG_NVRAM_ADD_0FILL("nvram")                           /* confirm */
 
2388
 
 
2389
        /* 6840 PTM */
 
2390
        MCFG_PTM6840_ADD("ptm_ic2", ptm_ic2_intf)
 
2391
 
 
2392
        MCFG_PIA6821_ADD("pia_ic3", pia_ic3_intf)
 
2393
        MCFG_PIA6821_ADD("pia_ic4", pia_ic4_intf)
 
2394
        MCFG_PIA6821_ADD("pia_ic5", pia_ic5_intf)
 
2395
        MCFG_PIA6821_ADD("pia_ic6", pia_ic6_intf)
 
2396
        MCFG_PIA6821_ADD("pia_ic7", pia_ic7_intf)
 
2397
        MCFG_PIA6821_ADD("pia_ic8", pia_ic8_intf)
 
2398
 
 
2399
        /* video hardware */
 
2400
        MCFG_SCREEN_ADD("screen", RASTER)
 
2401
        MCFG_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
 
2402
        MCFG_SCREEN_SIZE(64*8, 40*8) // note this directly affects the scanline counters used below, and thus the timing of everything
 
2403
        MCFG_SCREEN_VISIBLE_AREA(0*8, 63*8-1, 0*8, 37*8-1)
 
2404
        MCFG_SCREEN_REFRESH_RATE(50)
 
2405
        MCFG_SCREEN_UPDATE(mpu4_vid)
 
2406
 
 
2407
        MCFG_CPU_ADD("video", M68000, VIDEO_MASTER_CLOCK )
 
2408
        MCFG_CPU_PROGRAM_MAP(bwbvid_68k_map)
 
2409
 
 
2410
        MCFG_QUANTUM_TIME(attotime::from_hz(960))
 
2411
 
 
2412
        MCFG_MACHINE_START(mpu4_vid)
 
2413
        MCFG_MACHINE_RESET(mpu4_vid)
 
2414
        MCFG_VIDEO_START (mpu4_vid)
 
2415
 
 
2416
        MCFG_PALETTE_LENGTH(16)
 
2417
 
 
2418
        MCFG_PTM6840_ADD("6840ptm_68k", ptm_vid_intf)
 
2419
 
 
2420
        /* Present on all video cards */
 
2421
        MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
 
2422
        MCFG_SOUND_ADD("saa", SAA1099, 8000000)
 
2423
        MCFG_SOUND_ROUTE(0, "lspeaker", 0.5)
 
2424
        MCFG_SOUND_ROUTE(1, "rspeaker", 0.5)
 
2425
 
 
2426
        MCFG_ACIA6850_ADD("acia6850_0", m6809_acia_if)
 
2427
        MCFG_ACIA6850_ADD("acia6850_1", m68k_acia_if)
 
2428
 
 
2429
        // for the video timing
 
2430
        MCFG_TIMER_ADD_SCANLINE("scan_timer", scanline_timer_callback, "screen", 0, 1)
 
2431
MACHINE_CONFIG_END
 
2432
 
 
2433
static MACHINE_CONFIG_DERIVED( bwbvid5, bwbvid )
 
2434
        MCFG_CPU_MODIFY("video")
 
2435
        MCFG_CPU_PROGRAM_MAP(bwbvid5_68k_map)
 
2436
 
 
2437
        MCFG_PTM6840_ADD("6840ptm_ic3ss", ptm_ic3ss_intf)
 
2438
        MCFG_PIA6821_ADD("pia_ic4ss", pia_ic4ss_intf)
 
2439
 
 
2440
        MCFG_SOUND_ADD("msm6376", OKIM6376, 64000) //?
 
2441
        MCFG_SOUND_ROUTE(0, "lspeaker", 0.5)
 
2442
        MCFG_SOUND_ROUTE(1, "rspeaker", 0.5)
 
2443
 
 
2444
MACHINE_CONFIG_END
2306
2445
 
2307
2446
/* machine driver for Zenitone Deal 'Em board */
2308
 
static MACHINE_CONFIG_START( dealem, driver_device )
 
2447
static MACHINE_CONFIG_START( dealem, mpu4_state )
2309
2448
        MCFG_MACHINE_START(mpu4mod2)                                                    /* main mpu4 board initialisation */
2310
2449
        MCFG_MACHINE_RESET(mpu4_vid)
2311
2450
        MCFG_CPU_ADD("maincpu", M6809, MPU4_MASTER_CLOCK/4)
2312
2451
        MCFG_CPU_PROGRAM_MAP(dealem_memmap)
2313
2452
 
2314
 
        MCFG_TIMER_ADD_PERIODIC("50hz",gen_50hz, HZ(100))
 
2453
        MCFG_TIMER_ADD_PERIODIC("50hz",gen_50hz, attotime::from_hz(100))
2315
2454
 
2316
 
        MCFG_PTM6840_ADD("6840ptm", ptm_ic2_intf)
 
2455
        MCFG_PTM6840_ADD("ptm_ic2", ptm_ic2_intf)
2317
2456
 
2318
2457
        MCFG_PIA6821_ADD("pia_ic3", pia_ic3_intf)
2319
2458
        MCFG_PIA6821_ADD("pia_ic4", pia_ic4_intf)
2335
2474
        MCFG_SCREEN_SIZE((54+1)*8, (32+1)*8)                                    /* Taken from 6845 init, registers 00 & 04. Normally programmed with (value-1) */
2336
2475
        MCFG_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 31*8-1)              /* Taken from 6845 init, registers 01 & 06 */
2337
2476
        MCFG_SCREEN_REFRESH_RATE(56)                                                    /* Measured accurately from the flip-flop, but 6845 handles this */
 
2477
        MCFG_SCREEN_UPDATE(dealem)
2338
2478
 
2339
2479
        MCFG_GFXDECODE(dealem)
2340
 
        MCFG_VIDEO_UPDATE(dealem)
2341
2480
 
2342
2481
        MCFG_PALETTE_LENGTH(32)
2343
2482
        MCFG_PALETTE_INIT(dealem)
2365
2504
 
2366
2505
static WRITE16_HANDLER( characteriser16_w )
2367
2506
{
 
2507
        mpu4_state *state = space->machine().driver_data<mpu4_state>();
2368
2508
        int x;
2369
2509
        int call=data;
2370
 
        LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X", cpu_get_previouspc(space->cpu),offset,data));
2371
 
 
2372
 
        if (!mpu4_current_chr_table)
2373
 
                fatalerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(space->cpu));
2374
 
 
2375
 
        for (x = prot_col; x < 64; x++)
 
2510
        LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X", cpu_get_previouspc(&space->device()),offset,data));
 
2511
 
 
2512
        if (!state->m_current_chr_table)
 
2513
                fatalerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(&space->device()));
 
2514
 
 
2515
        for (x = state->m_prot_col; x < 64; x++)
2376
2516
        {
2377
2517
                if (call == 0)
2378
2518
                {
2379
 
                        prot_col = 0;
 
2519
                        state->m_prot_col = 0;
2380
2520
                }
2381
2521
                else
2382
2522
                {
2383
 
                        if      (mpu4_current_chr_table[(x)].call == call)
 
2523
                        if      (state->m_current_chr_table[(x)].call == call)
2384
2524
                        {
2385
 
                                prot_col = x;
2386
 
                                LOG_CHR(("Characteriser find column %02X\n",prot_col));
 
2525
                                state->m_prot_col = x;
 
2526
                                LOG_CHR(("Characteriser find column %02X\n",state->m_prot_col));
2387
2527
                                break;
2388
2528
                        }
2389
2529
                }
2393
2533
 
2394
2534
static READ16_HANDLER( characteriser16_r )
2395
2535
{
2396
 
        LOG_CHR_FULL(("%04x Characteriser read offset %02X,data %02X", cpu_get_previouspc(space->cpu),offset,mpu4_current_chr_table[prot_col].response));
 
2536
        mpu4_state *state = space->machine().driver_data<mpu4_state>();
 
2537
        LOG_CHR_FULL(("%04x Characteriser read offset %02X,data %02X", cpu_get_previouspc(&space->device()),offset,state->m_current_chr_table[state->m_prot_col].response));
2397
2538
        LOG_CHR(("Characteriser read offset %02X \n",offset));
2398
 
        LOG_CHR(("Characteriser read data %02X \n",mpu4_current_chr_table[prot_col].response));
 
2539
        LOG_CHR(("Characteriser read data %02X \n",state->m_current_chr_table[state->m_prot_col].response));
2399
2540
 
2400
 
        if (!mpu4_current_chr_table)
2401
 
                fatalerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(space->cpu));
 
2541
        if (!state->m_current_chr_table)
 
2542
                fatalerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(&space->device()));
2402
2543
 
2403
2544
 
2404
2545
        /* hack for 'invalid questions' error on time machine.. I guess it wants them to decode properly for startup check? */
2405
 
        if (cpu_get_previouspc(space->cpu)==0x283a)
 
2546
        if (cpu_get_previouspc(&space->device())==0x283a)
2406
2547
        {
2407
2548
                return 0x00;
2408
2549
        }
2409
2550
 
2410
 
        return mpu4_current_chr_table[prot_col].response;
2411
 
}
2412
 
 
 
2551
        return state->m_current_chr_table[state->m_prot_col].response;
 
2552
}
 
2553
 
 
2554
 
 
2555
/*
 
2556
BwB Characteriser (CHR)
 
2557
 
 
2558
The BwB method of protection is considerably different to the Barcrest one, with any
 
2559
incorrect behaviour manifesting in ridiculously large payouts.
 
2560
 
 
2561
In fact, the software seems deliberately designed to mislead, but is (fortunately for
 
2562
us) prone to similar weaknesses that allow a per game solution.
 
2563
 
 
2564
*/
 
2565
 
 
2566
 
 
2567
static WRITE16_HANDLER( bwb_characteriser16_w )
 
2568
{
 
2569
        mpu4_state *state = space->machine().driver_data<mpu4_state>();
 
2570
        int x;
 
2571
        int call=data &0xff;
 
2572
        LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X \n", cpu_get_previouspc(&space->device()),offset,data));
 
2573
        if (!state->m_current_chr_table)
 
2574
                fatalerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(&space->device()));
 
2575
 
 
2576
        if (offset == 0)//initialisation is always at 0x800
 
2577
        {
 
2578
                {
 
2579
                        if (call == 0)
 
2580
                        {
 
2581
                                state->m_init_col =0;
 
2582
                        }
 
2583
                        else
 
2584
                        {
 
2585
                                for (x = state->m_init_col; x < 64; x++)
 
2586
                                {
 
2587
                                        if      (state->m_current_chr_table[(x)].call == call)
 
2588
                                        {
 
2589
                                                state->m_init_col = x;
 
2590
                                                LOG_CHR_FULL(("BwB Characteriser init column %02X\n",state->m_init_col));
 
2591
                                                break;
 
2592
                                        }
 
2593
                                }
 
2594
                        }
 
2595
                }
 
2596
        }
 
2597
        else
 
2598
        {
 
2599
                for (x = state->m_prot_col; x < 64;)
 
2600
                {
 
2601
                        x++;
 
2602
                        if      (state->m_current_chr_table[(x)].call == call)
 
2603
                        {
 
2604
                                state->m_prot_col = x;
 
2605
                                LOG_CHR(("BwB Characteriser init column %02X\n",state->m_prot_col));
 
2606
                                break;
 
2607
                        }
 
2608
                }
 
2609
        }
 
2610
}
 
2611
 
 
2612
static READ16_HANDLER( bwb_characteriser16_r )
 
2613
{
 
2614
        mpu4_state *state = space->machine().driver_data<mpu4_state>();
 
2615
        if (!state->m_current_chr_table)
 
2616
                fatalerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(&space->device()));
 
2617
 
 
2618
        LOG_CHR(("Characteriser read offset %02X \n",offset));
 
2619
 
 
2620
 
 
2621
        if (offset ==0)
 
2622
        {
 
2623
                LOG_CHR(("Characteriser read data %02X \n",state->m_current_chr_table[state->m_init_col].response));
 
2624
                return state->m_current_chr_table[state->m_init_col].response;
 
2625
        }
 
2626
        else
 
2627
        {
 
2628
                LOG_CHR(("Characteriser read BwB data %02X \n",state->m_current_chr_table[state->m_prot_col].response));
 
2629
                return state->m_current_chr_table[state->m_prot_col].response;
 
2630
        }
 
2631
}
2413
2632
 
2414
2633
static const mpu4_chr_table adders_data[64] = {
2415
2634
        {0x00, 0x00}, {0x1A, 0x8C}, {0x04, 0x64}, {0x10, 0x84}, {0x18, 0x84}, {0x0F, 0xC4}, {0x13, 0x84}, {0x1B, 0x84},
2554
2773
        {0x0D, 0x04}, {0x1F, 0x64}, {0x16, 0x24}, {0x05, 0x64}, {0x13, 0x24}, {0x1C, 0x64}, {0x02, 0x74}, {0x00, 0x00}
2555
2774
};
2556
2775
 
 
2776
static const mpu4_chr_table prizeinv_data[72] = {
 
2777
{0x00, 0x00},{0x00, 0x00},{0x00, 0x00},{0x00, 0x00},{0x00, 0x00},{0x00, 0x00},{0x2e, 0x36},{0x20, 0x42},
 
2778
{0x0f, 0x27},{0x24, 0x42},{0x3c, 0x09},{0x2c, 0x01},{0x01, 0x1d},{0x1d, 0x40},{0x40, 0xd2},{0xd2, 0x01},
 
2779
{0x01, 0xf9},{0xb1, 0x41},{0x41, 0x1c},{0x1c, 0x01},{0x01, 0xf9},{0x04, 0x54},{0x54, 0x02},{0x02, 0x00},
 
2780
{0x00, 0x00},{0x00, 0x2e},{0x2e, 0x20},{0x20, 0x0f},{0x0f, 0x24},{0x24, 0x3c},{0x3c, 0x39},{0x3c, 0xc9},
 
2781
{0xc9, 0x05},{0x05, 0x04},{0x04, 0x54},{0x54, 0x02},{0x02, 0x00},{0x00, 0x00},{0x00, 0x2e},{0x2e, 0x20},
 
2782
{0x20, 0x0f},{0x0f, 0x24},{0x24, 0x3c},{0x3c, 0x39},{0x3c, 0x36},{0x36, 0x00},{0x42, 0x04},{0x27, 0x04},
 
2783
{0x42, 0x0c},{0x09, 0x0c},{0x42, 0x1c},{0x27, 0x14},{0x42, 0x2c},{0x42, 0x5c},{0x09, 0x2c},
 
2784
//All this may be garbage - the ROM table seems endless
 
2785
{0x0A, 0x00},
 
2786
{0x31, 0x20},{0x34, 0x90}, {0x1e, 0x40},{0x04, 0x90},{0x01, 0xe4},{0x0c, 0xf4},{0x18, 0x64},{0x19, 0x10},
 
2787
{0x00, 0x00},{0x01, 0x00},{0x04, 0x00},{0x09, 0x00},{0x10, 0x00},{0x19, 0x10},{0x24, 0x00},{0x31, 0x00}
 
2788
};
 
2789
 
2557
2790
static DRIVER_INIT (adders)
2558
2791
{
2559
 
        mpu4_current_chr_table = adders_data;
 
2792
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2793
        state->m_current_chr_table = adders_data;
2560
2794
}
2561
2795
 
2562
2796
static DRIVER_INIT (crmaze)
2563
2797
{
2564
 
        mpu4_current_chr_table = crmaze_data;
 
2798
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2799
        state->m_current_chr_table = crmaze_data;
2565
2800
}
2566
2801
 
2567
2802
static DRIVER_INIT (crmazea)
2568
2803
{
2569
 
        mpu4_current_chr_table = crmazea_data;
 
2804
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2805
        state->m_current_chr_table = crmazea_data;
2570
2806
}
2571
2807
 
2572
2808
static DRIVER_INIT (crmaze2)
2573
2809
{
2574
 
        mpu4_current_chr_table = crmaze2_data;
 
2810
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2811
        state->m_current_chr_table = crmaze2_data;
2575
2812
}
2576
2813
 
2577
2814
static DRIVER_INIT (crmaze3)
2578
2815
{
2579
 
        mpu4_current_chr_table = crmaze3_data;
 
2816
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2817
        state->m_reel_mux = FLUTTERBOX;
 
2818
        state->m_current_chr_table = crmaze3_data;
2580
2819
}
2581
2820
 
2582
2821
static DRIVER_INIT (crmaze3a)
2583
2822
{
2584
 
        mpu4_current_chr_table = crmaze3a_data;
 
2823
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2824
        state->m_reel_mux = FLUTTERBOX;
 
2825
        state->m_current_chr_table = crmaze3a_data;
2585
2826
}
2586
2827
 
2587
2828
static DRIVER_INIT (mating)
2588
2829
{
2589
 
        address_space *space = cputag_get_address_space(machine, "video", ADDRESS_SPACE_PROGRAM);
2590
 
        device_t *device = machine->device("oki");
 
2830
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2831
        address_space *space = machine.device("video")->memory().space(AS_PROGRAM);
 
2832
        device_t *device = machine.device("oki");
2591
2833
 
2592
2834
        /* The Mating Game has an extra 256kB RAM on the program card */
2593
 
        memory_install_ram(space, 0x600000, 0x63ffff, 0, 0, NULL);
 
2835
        space->install_ram(0x600000, 0x63ffff);
2594
2836
 
2595
2837
        /* There is also an OKIM6376 present on the program card */
2596
 
        memory_install_readwrite16_device_handler(space, device, 0xffa040, 0xffa0ff, 0, 0, oki_r, oki_w );
 
2838
        space->install_legacy_readwrite_handler(*device, 0xffa040, 0xffa0ff, FUNC(oki_r), FUNC(oki_w) );
2597
2839
 
2598
 
        mpu4_current_chr_table = mating_data;
 
2840
        state->m_current_chr_table = mating_data;
2599
2841
}
2600
2842
 
2601
 
 
2602
2843
static DRIVER_INIT (skiltrek)
2603
2844
{
2604
 
        mpu4_current_chr_table = skiltrek_data;
 
2845
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2846
        state->m_current_chr_table = skiltrek_data;
2605
2847
}
2606
2848
 
2607
2849
static DRIVER_INIT (timemchn)
2608
2850
{
2609
 
        mpu4_current_chr_table = timemchn_data;
 
2851
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2852
        state->m_current_chr_table = timemchn_data;
2610
2853
}
2611
2854
 
2612
2855
static DRIVER_INIT (strikeit)
2613
2856
{
2614
 
        mpu4_current_chr_table = strikeit_data;
 
2857
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2858
        state->m_current_chr_table = strikeit_data;
2615
2859
}
2616
2860
 
2617
2861
static DRIVER_INIT (turnover)
2618
2862
{
2619
 
        mpu4_current_chr_table = turnover_data;
 
2863
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2864
        state->m_current_chr_table = turnover_data;
2620
2865
}
2621
2866
 
2622
2867
static DRIVER_INIT (eyesdown)
2623
2868
{
2624
 
        mpu4_current_chr_table = eyesdown_data;
 
2869
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2870
        state->m_current_chr_table = eyesdown_data;
2625
2871
}
2626
2872
 
2627
2873
static DRIVER_INIT (quidgrid)
2628
2874
{
2629
 
        mpu4_current_chr_table = quidgrid_data;
2630
 
}
2631
 
 
2632
 
 
 
2875
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2876
        state->m_current_chr_table = quidgrid_data;
 
2877
}
 
2878
 
 
2879
static DRIVER_INIT (prizeinv)
 
2880
{
 
2881
        mpu4_state *state = machine.driver_data<mpu4_state>();
 
2882
        state->m_current_chr_table = prizeinv_data;
 
2883
}
2633
2884
 
2634
2885
ROM_START( dealem )
2635
2886
        ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00  )
2696
2947
        ROM_LOAD16_BYTE( "blxv___2.0_6",  0x040001, 0x10000, CRC(a3d92b5b) SHA1(1e7042d5eae4a19a01a3ef7d806c434886dc9f4d) )
2697
2948
ROM_END
2698
2949
 
 
2950
ROM_START( bwbtetrs )
 
2951
        ROM_REGION( 0x10000, "maincpu", 0 )
 
2952
        ROM_LOAD("tetris22.p0",  0x00000, 0x04000, CRC(b711c7ae) SHA1(767b17ddf9021fdf79ff6c52f04a5d8ea60cf30e) )
 
2953
 
 
2954
        ROM_REGION( 0x800000, "video", 0 )
 
2955
        ROM_LOAD16_BYTE( "tetris22.p1",  0x000000, 0x10000, CRC(e81dd182) SHA1(28b460224abf6fe24b637542ccd1c84040674555) )
 
2956
        ROM_LOAD16_BYTE( "tetris22.p2",  0x000001, 0x10000, CRC(68aa4f15) SHA1(4e4511a64391fc64e5f5b7ccb46a78fd2e1d94d6) )
 
2957
        ROM_LOAD16_BYTE( "tetris22.p3",  0x020000, 0x10000, CRC(b38b4763) SHA1(d28e77fdd6869cb5b5ec40ed1f300a2a947e0482) )
 
2958
        ROM_LOAD16_BYTE( "tetris22.p4",  0x020001, 0x10000, CRC(1649f604) SHA1(ca4ac303391a0969d41c8f988b8e81cfcee1a21c) )
 
2959
        ROM_LOAD16_BYTE( "tetris22.p5",  0x040001, 0x10000, CRC(02859676) SHA1(5293c767021a6b5253eecab0b0568aa082ea7084) )
 
2960
        ROM_LOAD16_BYTE( "tetris22.p6",  0x040001, 0x10000, CRC(40d24c82) SHA1(7ac3cf148af84ad93eaf11ce3420abbe45d986e2) )
 
2961
ROM_END
 
2962
 
 
2963
/* Vegas Poker Prototype dumped by HIGHWAYMAN */
 
2964
ROM_START( vgpoker )
 
2965
        ROM_REGION( 0x10000, "maincpu", 0 )
 
2966
        ROM_LOAD("comms-v2.0.bin",  0x00000, 0x10000,  CRC(1717581f) SHA1(40f8cae39a2ab0c89d2bbfd8a37725aaae229c96))
 
2967
 
 
2968
        ROM_REGION( 0x800000, "video", 0 )
 
2969
        ROM_LOAD16_BYTE("video-1.bin",  0x000000, 0x010000,  CRC(7ba2396c) SHA1(eb24b802b984315fc2eba4f15c208e2c1925c1c8))
 
2970
        ROM_LOAD16_BYTE("video-2.bin",  0x000001, 0x010000,  CRC(4f9e830b) SHA1(f17bebb289c3620bf4c88b2b358a9dab87ac214f))
 
2971
        ROM_LOAD16_BYTE("video-3.bin",  0x020000, 0x010000,  CRC(607e0baa) SHA1(9f64a46ef3b9a854e939b5e7f0d1e6e925735922))
 
2972
        ROM_LOAD16_BYTE("video-4.bin",  0x020001, 0x010000,  CRC(2019f5d3) SHA1(d183b3b92d03be9f9d57b5df1a621cbfe955ed93))
 
2973
        ROM_LOAD16_BYTE("video-5.bin",  0x040000, 0x010000,  CRC(c029202e) SHA1(b08bb2678c2ff62a58ef67d5440c326d0fadc34e))
 
2974
        ROM_LOAD16_BYTE("video-6.bin",  0x040001, 0x010000,  CRC(3287ae4e) SHA1(3b05a036de3ca7ec644bfbf04934e44e631d1e28))
 
2975
        ROM_LOAD16_BYTE("video-7.bin",  0x060000, 0x010000,  CRC(231cf163) SHA1(02b28ef0e1661a82d0fba2ecc5474c79651fa9e7))
 
2976
        ROM_LOAD16_BYTE("video-8.bin",  0x060001, 0x010000,  CRC(076efdc8) SHA1(bef0a1d8f0e7486ee5dc7407ce5c96854cefa5cf))
 
2977
ROM_END
 
2978
 
 
2979
 
 
2980
ROM_START( renoreel )
 
2981
        ROM_REGION( 0x10000, "maincpu", 0 )
 
2982
        ROM_LOAD("rr_27s__.a60",  0x00000, 0x10000,  CRC(44c9ff47) SHA1(93a3155144b233c113aa3b49bd4eb5969e400a68))
 
2983
 
 
2984
        ROM_REGION( 0x800000, "video", 0 )
 
2985
        ROM_LOAD16_BYTE( "rr______.a_1",  0x000000, 0x80000,  CRC(ff27d0ba) SHA1(85cce36495f00a05c1806ecde37274212680e466) )
 
2986
        ROM_LOAD16_BYTE( "rr______.a_2",  0x000001, 0x80000,  CRC(519b9ae1) SHA1(8ccfe8de0f2c85923df81af8cba6f20af43d2fe2) )
 
2987
 
 
2988
        ROM_REGION( 0x200000, "msm6376", 0 )
 
2989
        ROM_LOAD( "renosnda.bin",  0x000000, 0x080000,  CRC(a72a5e1b) SHA1(a0d5338a400345a55484848a7612119405f617b1) )
 
2990
        ROM_LOAD( "renosndb.bin",  0x080000, 0x080000,  CRC(46e9a32f) SHA1(d45835a82368992597e44b3c5b9d00d8b901e733) )
 
2991
 
 
2992
ROM_END
 
2993
 
 
2994
ROM_START( redhtpkr )
 
2995
        ROM_REGION( 0x10000, "maincpu", 0 )
 
2996
        ROM_LOAD("rp_20s__.3_0",  0x00000, 0x10000,  CRC(b7d02d22) SHA1(f9da1c6dde064bc39d0c48a165dac7acde933397))
 
2997
 
 
2998
        ROM_REGION( 0x800000, "video", 0 )
 
2999
        ROM_LOAD16_BYTE("rp______.3_1",  0x000000, 0x010000,  CRC(b987406d) SHA1(8c4d386570c0c6298b1cabf50295021b3b0cf625))
 
3000
        ROM_LOAD16_BYTE("rp______.3_2",  0x000001, 0x010000,  CRC(73e3c12e) SHA1(19e3ed7255fa0c3bfa14b6a4b705c0c3e1a237b6))
 
3001
        ROM_LOAD16_BYTE("rp______.3_3",  0x020000, 0x010000,  CRC(05a30183) SHA1(302f4926073bf7335da7f0b1e6399b64ea9bbae4))
 
3002
        ROM_LOAD16_BYTE("rp______.3_4",  0x020001, 0x010000,  CRC(6b122765) SHA1(72cd0fda322790bed8cdc7697306ec01efc43789))
 
3003
        ROM_LOAD16_BYTE("rp______.3_5",  0x040000, 0x010000,  CRC(d9fd05d0) SHA1(330ef58c012b5d5fd018bea54b3ae315b3e45cfd))
 
3004
        ROM_LOAD16_BYTE("rp______.3_6",  0x040001, 0x010000,  CRC(eeea91ff) SHA1(cc7870a68f62d4dd70c13713a432a61a091821ef))
 
3005
 
 
3006
ROM_END
 
3007
 
2699
3008
ROM_START( crmaze )
2700
3009
        ROM_REGION( 0x10000, "maincpu", 0 )
2701
3010
        VID_BIOS
3121
3430
ROM_END
3122
3431
 
3123
3432
 
3124
 
/* Vegas Poker Prototype dumped by HIGHWAYMAN */
3125
 
ROM_START( vgpoker )
3126
 
        ROM_REGION( 0x10000, "maincpu", 0 )
3127
 
        ROM_LOAD("comms-v2.0.bin",  0x00000, 0x10000,  CRC(1717581f) SHA1(40f8cae39a2ab0c89d2bbfd8a37725aaae229c96))
3128
 
 
3129
 
        ROM_REGION( 0x800000, "video", 0 )
3130
 
        ROM_LOAD16_BYTE("video-1.bin",  0x000000, 0x010000,  CRC(7ba2396c) SHA1(eb24b802b984315fc2eba4f15c208e2c1925c1c8))
3131
 
        ROM_LOAD16_BYTE("video-2.bin",  0x000001, 0x010000,  CRC(4f9e830b) SHA1(f17bebb289c3620bf4c88b2b358a9dab87ac214f))
3132
 
        ROM_LOAD16_BYTE("video-3.bin",  0x020000, 0x010000,  CRC(607e0baa) SHA1(9f64a46ef3b9a854e939b5e7f0d1e6e925735922))
3133
 
        ROM_LOAD16_BYTE("video-4.bin",  0x020001, 0x010000,  CRC(2019f5d3) SHA1(d183b3b92d03be9f9d57b5df1a621cbfe955ed93))
3134
 
        ROM_LOAD16_BYTE("video-5.bin",  0x040000, 0x010000,  CRC(c029202e) SHA1(b08bb2678c2ff62a58ef67d5440c326d0fadc34e))
3135
 
        ROM_LOAD16_BYTE("video-6.bin",  0x040001, 0x010000,  CRC(3287ae4e) SHA1(3b05a036de3ca7ec644bfbf04934e44e631d1e28))
3136
 
        ROM_LOAD16_BYTE("video-7.bin",  0x060000, 0x010000,  CRC(231cf163) SHA1(02b28ef0e1661a82d0fba2ecc5474c79651fa9e7))
3137
 
        ROM_LOAD16_BYTE("video-8.bin",  0x060001, 0x010000,  CRC(076efdc8) SHA1(bef0a1d8f0e7486ee5dc7407ce5c96854cefa5cf))
3138
 
ROM_END
3139
3433
/*Deal 'Em was a conversion kit designed to make early MPU4 machines into video games by replacing the top glass
3140
3434
and reel assembly with this kit and a supplied monitor.
3141
3435
The real Deal 'Em ran on Summit Coin hardware, and was made by someone else.
3155
3449
GAME( 1993,  crmazea,   crmaze,   crmaze,   crmaze,   crmazea,  ROT0, "Barcrest",               "The Crystal Maze (v0.1, AMLD)",                                                                        GAME_NOT_WORKING )//SWP 0.9
3156
3450
 
3157
3451
GAME( 1993,  crmaze2,   bctvidbs, crmaze,   crmaze,   crmaze2,  ROT0, "Barcrest",               "The New Crystal Maze Featuring Ocean Zone (v2.2)",                                     GAME_NOT_WORKING )//SWP 1.0
3158
 
GAME( 1993,  crmaze2d,  crmaze2,  crmaze,   crmaze,   crmaze2,  ROT0, "Barcrest",               "The New Crystal Maze Featuring Ocean Zone (v2.2d)",                            GAME_NOT_WORKING )//SWP 1.0D
 
3452
GAME( 1993,  crmaze2d,  crmaze2,  crmaze,   crmaze,   crmaze2,  ROT0, "Barcrest",               "The New Crystal Maze Featuring Ocean Zone (v2.2, Datapak)",                            GAME_NOT_WORKING )//SWP 1.0D
3159
3453
GAME( 1993,  crmaze2a,  crmaze2,  crmaze,   crmaze,   0,        ROT0, "Barcrest",               "The New Crystal Maze Featuring Ocean Zone (v0.1, AMLD)",                       GAME_NOT_WORKING )//SWP 1.0 /* unprotected? bootleg? */
3160
3454
 
3161
3455
GAME( 1994,  crmaze3,   bctvidbs, crmaze,   crmaze,   crmaze3,  ROT0, "Barcrest",               "The Crystal Maze Team Challenge (v0.9)",                                                       GAME_NOT_WORKING )//SWP 0.7
3191
3485
GAME( 199?,  quidgrid2, quidgrid, mpu4_vid, mpu4,     quidgrid, ROT0, "Barcrest",               "Ten Quid Grid (v2.4)",                                                                                         GAME_NOT_WORKING )
3192
3486
GAME( 199?,  quidgrid2d,quidgrid, mpu4_vid, mpu4,     quidgrid, ROT0, "Barcrest",               "Ten Quid Grid (v2.4, Datapak)",                                                                        GAME_NOT_WORKING )
3193
3487
 
3194
 
/* Games below are newer BwB games and use their own BIOS ROMs */
 
3488
/* Games below are newer BwB games and use their own BIOS ROMs and hardware setups*/
3195
3489
GAME( 199?,  vgpoker,   0,        vgpoker,  mpu4,     0,        ROT0, "BwB",                    "Vegas Poker (prototype, release 2)",                                                           GAME_NOT_WORKING )
3196
 
GAME( 199?,  prizeinv,  0,        mpu4_vid, mpu4,     0,        ROT0, "BwB",                    "Prize Space Invaders (20\" v1.1)",                                                                     GAME_NOT_WORKING )
3197
 
GAME( 199?,  blox,      0,        mpu4_vid, mpu4,     0,        ROT0, "BwB",                    "Blox (v2.0)",                                                                                                          GAME_NOT_WORKING )
3198
 
GAME( 199?,  bloxd,     blox,     mpu4_vid, mpu4,     0,        ROT0, "BwB",                    "Blox (v2.0, Datapak)",                                                                                         GAME_NOT_WORKING )
 
3490
GAME( 199?,  prizeinv,  0,        bwbvid,       mpu4,     prizeinv, ROT0, "BwB",                        "Prize Space Invaders (20\" v1.1)",                                                                     GAME_NOT_WORKING )
 
3491
GAME( 199?,  blox,      0,        bwbvid,       mpu4,     0,        ROT0, "BwB",                        "Blox (v2.0)",                                                                                                          GAME_NOT_WORKING )
 
3492
GAME( 199?,  bloxd,     blox,     bwbvid,       mpu4,     0,        ROT0, "BwB",                        "Blox (v2.0, Datapak)",                                                                                         GAME_NOT_WORKING )
 
3493
GAME( 1996,  renoreel,  0,        bwbvid5,  mpu4,     0,                ROT0, "BwB",                    "Reno Reels (20p/10GBP Cash, release A)",                                                       GAME_NOT_WORKING )
 
3494
GAME( 199?,  redhtpkr,  0,        bwbvid,   mpu4,     0,            ROT0, "BwB",                        "Red Hot Poker (20p/10GBP Cash, release 3)",                                            GAME_NOT_WORKING )
 
3495
GAME( 199?,  bwbtetrs,  0,        bwbvid,   mpu4,     0,            ROT0, "BwB",                        "BwB Tetris v 2.2",                                                                                                     GAME_NOT_WORKING )