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Viewing changes to src/mame/video/hexion.c

  • Committer: Bazaar Package Importer
  • Author(s): Jordi Mallach, Emmanuel Kasper, Félix Arreola Rodríguez, Jordi Mallach
  • Date: 2011-05-11 21:06:50 UTC
  • mfrom: (1.1.1 upstream)
  • Revision ID: james.westby@ubuntu.com-20110511210650-jizvh8a6x117y9hr
Tags: 0.142-1
[ Emmanuel Kasper ]
* New upstream release
* Set NOWERROR=1 to allow compiling with gcc-4.6
* Remove fix_powerpc_build.patch, as upstream has taken it in this release
* Add gnome-video-arcade front end as a suggested package

[ Félix Arreola Rodríguez ]
* Add kfreebsd-build.patch to quilt series, to fix build on kfreebsd

[ Jordi Mallach ]
* Remove unneeded and bogus addition of --with-quilt to the dh invocation.
* Add Cesare Falco (long time Ubuntu maintainer) to Uploaders, and wrap
  them into multiple lines.

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src/mame/video/hexion.c
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#include "emu.h"
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#include "includes/hexion.h"
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static UINT8 *vram[2],*unkram;
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static int bankctrl,rambank,pmcbank,gfxrom_select;
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static tilemap_t *bg_tilemap[2];
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***************************************************************************/
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INLINE void get_tile_info(running_machine *machine,tile_data *tileinfo,int tile_index,UINT8 *ram)
 
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INLINE void get_tile_info(running_machine &machine,tile_data *tileinfo,int tile_index,UINT8 *ram)
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{
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        tile_index *= 4;
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        SET_TILE_INFO(
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static TILE_GET_INFO( get_tile_info0 )
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{
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        get_tile_info(machine,tileinfo,tile_index,vram[0]);
 
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        hexion_state *state = machine.driver_data<hexion_state>();
 
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        get_tile_info(machine,tileinfo,tile_index,state->m_vram[0]);
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}
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static TILE_GET_INFO( get_tile_info1 )
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{
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        get_tile_info(machine,tileinfo,tile_index,vram[1]);
 
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        hexion_state *state = machine.driver_data<hexion_state>();
 
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        get_tile_info(machine,tileinfo,tile_index,state->m_vram[1]);
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}
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VIDEO_START( hexion )
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{
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        bg_tilemap[0] = tilemap_create(machine, get_tile_info0,tilemap_scan_rows,8,8,64,32);
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        bg_tilemap[1] = tilemap_create(machine, get_tile_info1,tilemap_scan_rows,     8,8,64,32);
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        tilemap_set_transparent_pen(bg_tilemap[0],0);
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        tilemap_set_scrollx(bg_tilemap[1],0,-4);
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        tilemap_set_scrolly(bg_tilemap[1],0,4);
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        vram[0] = machine->region("maincpu")->base() + 0x30000;
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        vram[1] = vram[0] + 0x2000;
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        unkram = vram[1] + 0x2000;
 
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        hexion_state *state = machine.driver_data<hexion_state>();
 
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        state->m_bg_tilemap[0] = tilemap_create(machine, get_tile_info0,tilemap_scan_rows,8,8,64,32);
 
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        state->m_bg_tilemap[1] = tilemap_create(machine, get_tile_info1,tilemap_scan_rows,     8,8,64,32);
 
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        tilemap_set_transparent_pen(state->m_bg_tilemap[0],0);
 
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        tilemap_set_scrollx(state->m_bg_tilemap[1],0,-4);
 
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        tilemap_set_scrolly(state->m_bg_tilemap[1],0,4);
 
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        state->m_vram[0] = machine.region("maincpu")->base() + 0x30000;
 
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        state->m_vram[1] = state->m_vram[0] + 0x2000;
 
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        state->m_unkram = state->m_vram[1] + 0x2000;
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}
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WRITE8_HANDLER( hexion_bankswitch_w )
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{
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        UINT8 *rom = space->machine->region("maincpu")->base() + 0x10000;
 
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        hexion_state *state = space->machine().driver_data<hexion_state>();
 
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        UINT8 *rom = space->machine().region("maincpu")->base() + 0x10000;
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        /* bits 0-3 select ROM bank */
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        memory_set_bankptr(space->machine, "bank1",rom + 0x2000 * (data & 0x0f));
 
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        memory_set_bankptr(space->machine(), "bank1",rom + 0x2000 * (data & 0x0f));
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        /* does bit 6 trigger the 052591? */
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        if (data & 0x40)
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        {
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                int bank = unkram[0]&1;
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                memset(vram[bank],unkram[1],0x2000);
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                tilemap_mark_all_tiles_dirty(bg_tilemap[bank]);
 
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                int bank = state->m_unkram[0]&1;
 
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                memset(state->m_vram[bank],state->m_unkram[1],0x2000);
 
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                tilemap_mark_all_tiles_dirty(state->m_bg_tilemap[bank]);
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        }
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        /* bit 7 = PMC-BK */
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        pmcbank = (data & 0x80) >> 7;
 
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        state->m_pmcbank = (data & 0x80) >> 7;
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        /* other bits unknown */
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if (data & 0x30)
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        popmessage("bankswitch %02x",data&0xf0);
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//logerror("%04x: bankswitch_w %02x\n",cpu_get_pc(space->cpu),data);
 
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//logerror("%04x: bankswitch_w %02x\n",cpu_get_pc(&space->device()),data);
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}
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READ8_HANDLER( hexion_bankedram_r )
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{
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        if (gfxrom_select && offset < 0x1000)
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        {
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                return space->machine->region("gfx1")->base()[((gfxrom_select & 0x7f) << 12) + offset];
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        }
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        else if (bankctrl == 0)
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        {
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                return vram[rambank][offset];
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        }
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        else if (bankctrl == 2 && offset < 0x800)
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        {
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                return unkram[offset];
 
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        hexion_state *state = space->machine().driver_data<hexion_state>();
 
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        if (state->m_gfxrom_select && offset < 0x1000)
 
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        {
 
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                return space->machine().region("gfx1")->base()[((state->m_gfxrom_select & 0x7f) << 12) + offset];
 
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        }
 
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        else if (state->m_bankctrl == 0)
 
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        {
 
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                return state->m_vram[state->m_rambank][offset];
 
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        }
 
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        else if (state->m_bankctrl == 2 && offset < 0x800)
 
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        {
 
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                return state->m_unkram[offset];
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        }
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        else
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        {
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//logerror("%04x: bankedram_r offset %04x, bankctrl = %02x\n",cpu_get_pc(space->cpu),offset,bankctrl);
 
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//logerror("%04x: bankedram_r offset %04x, bankctrl = %02x\n",cpu_get_pc(&space->device()),offset,state->m_bankctrl);
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                return 0;
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        }
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}
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WRITE8_HANDLER( hexion_bankedram_w )
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{
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        if (bankctrl == 3 && offset == 0 && (data & 0xfe) == 0)
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        {
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//logerror("%04x: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",cpu_get_pc(space->cpu),offset,data,bankctrl);
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                rambank = data & 1;
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        }
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        else if (bankctrl == 0)
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        {
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                if (pmcbank)
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                {
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//logerror("%04x: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",cpu_get_pc(space->cpu),offset,data,bankctrl);
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                        vram[rambank][offset] = data;
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                        tilemap_mark_tile_dirty(bg_tilemap[rambank],offset/4);
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                }
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                else
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                        logerror("%04x pmc internal ram %04x = %02x\n",cpu_get_pc(space->cpu),offset,data);
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        }
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        else if (bankctrl == 2 && offset < 0x800)
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        {
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                if (pmcbank)
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                {
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//logerror("%04x: unkram_w offset %04x, data %02x, bankctrl = %02x\n",cpu_get_pc(space->cpu),offset,data,bankctrl);
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                        unkram[offset] = data;
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                }
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                else
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                        logerror("%04x pmc internal ram %04x = %02x\n",cpu_get_pc(space->cpu),offset,data);
 
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        hexion_state *state = space->machine().driver_data<hexion_state>();
 
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        if (state->m_bankctrl == 3 && offset == 0 && (data & 0xfe) == 0)
 
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        {
 
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//logerror("%04x: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",cpu_get_pc(&space->device()),offset,data,state->m_bankctrl);
 
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                state->m_rambank = data & 1;
 
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        }
 
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        else if (state->m_bankctrl == 0)
 
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        {
 
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                if (state->m_pmcbank)
 
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                {
 
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//logerror("%04x: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",cpu_get_pc(&space->device()),offset,data,state->m_bankctrl);
 
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                        state->m_vram[state->m_rambank][offset] = data;
 
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                        tilemap_mark_tile_dirty(state->m_bg_tilemap[state->m_rambank],offset/4);
 
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                }
 
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                else
 
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                        logerror("%04x pmc internal ram %04x = %02x\n",cpu_get_pc(&space->device()),offset,data);
 
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        }
 
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        else if (state->m_bankctrl == 2 && offset < 0x800)
 
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        {
 
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                if (state->m_pmcbank)
 
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                {
 
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//logerror("%04x: unkram_w offset %04x, data %02x, bankctrl = %02x\n",cpu_get_pc(&space->device()),offset,data,state->m_bankctrl);
 
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                        state->m_unkram[offset] = data;
 
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                }
 
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                else
 
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                        logerror("%04x pmc internal ram %04x = %02x\n",cpu_get_pc(&space->device()),offset,data);
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        }
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        else
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logerror("%04x: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",cpu_get_pc(space->cpu),offset,data,bankctrl);
 
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logerror("%04x: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",cpu_get_pc(&space->device()),offset,data,state->m_bankctrl);
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}
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WRITE8_HANDLER( hexion_bankctrl_w )
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{
145
 
//logerror("%04x: bankctrl_w %02x\n",cpu_get_pc(space->cpu),data);
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        bankctrl = data;
 
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        hexion_state *state = space->machine().driver_data<hexion_state>();
 
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//logerror("%04x: bankctrl_w %02x\n",cpu_get_pc(&space->device()),data);
 
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        state->m_bankctrl = data;
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}
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WRITE8_HANDLER( hexion_gfxrom_select_w )
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{
151
 
//logerror("%04x: gfxrom_select_w %02x\n",cpu_get_pc(space->cpu),data);
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        gfxrom_select = data;
 
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        hexion_state *state = space->machine().driver_data<hexion_state>();
 
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//logerror("%04x: gfxrom_select_w %02x\n",cpu_get_pc(&space->device()),data);
 
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        state->m_gfxrom_select = data;
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}
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***************************************************************************/
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VIDEO_UPDATE( hexion )
 
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SCREEN_UPDATE( hexion )
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{
165
 
        tilemap_draw(bitmap,cliprect,bg_tilemap[1],0,0);
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        tilemap_draw(bitmap,cliprect,bg_tilemap[0],0,0);
 
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        hexion_state *state = screen->machine().driver_data<hexion_state>();
 
171
        tilemap_draw(bitmap,cliprect,state->m_bg_tilemap[1],0,0);
 
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        tilemap_draw(bitmap,cliprect,state->m_bg_tilemap[0],0,0);
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        return 0;
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}