61
61
static INTERRUPT_GEN( timeplt_interrupt )
63
timeplt_state *state = device->machine->driver_data<timeplt_state>();
63
timeplt_state *state = device->machine().driver_data<timeplt_state>();
65
if (state->nmi_enable)
66
cpu_set_input_line(device, INPUT_LINE_NMI, ASSERT_LINE);
65
if (state->m_nmi_enable)
66
device_set_input_line(device, INPUT_LINE_NMI, ASSERT_LINE);
70
70
static WRITE8_HANDLER( timeplt_nmi_enable_w )
72
timeplt_state *state = space->machine->driver_data<timeplt_state>();
72
timeplt_state *state = space->machine().driver_data<timeplt_state>();
74
state->nmi_enable = data & 1;
75
if (!state->nmi_enable)
76
cpu_set_input_line(state->maincpu, INPUT_LINE_NMI, CLEAR_LINE);
74
state->m_nmi_enable = data & 1;
75
if (!state->m_nmi_enable)
76
device_set_input_line(state->m_maincpu, INPUT_LINE_NMI, CLEAR_LINE);
87
87
static WRITE8_HANDLER( timeplt_coin_counter_w )
89
coin_counter_w(space->machine, offset >> 1, data);
89
coin_counter_w(space->machine(), offset >> 1, data);
114
114
*************************************/
116
static ADDRESS_MAP_START( timeplt_main_map, ADDRESS_SPACE_PROGRAM, 8 )
116
static ADDRESS_MAP_START( timeplt_main_map, AS_PROGRAM, 8 )
117
117
ADDRESS_MAP_UNMAP_HIGH
118
118
AM_RANGE(0x0000, 0x5fff) AM_ROM
119
AM_RANGE(0xa000, 0xa3ff) AM_RAM_WRITE(timeplt_colorram_w) AM_BASE_MEMBER(timeplt_state, colorram)
120
AM_RANGE(0xa400, 0xa7ff) AM_RAM_WRITE(timeplt_videoram_w) AM_BASE_MEMBER(timeplt_state, videoram)
119
AM_RANGE(0xa000, 0xa3ff) AM_RAM_WRITE(timeplt_colorram_w) AM_BASE_MEMBER(timeplt_state, m_colorram)
120
AM_RANGE(0xa400, 0xa7ff) AM_RAM_WRITE(timeplt_videoram_w) AM_BASE_MEMBER(timeplt_state, m_videoram)
121
121
AM_RANGE(0xa800, 0xafff) AM_RAM
122
AM_RANGE(0xb000, 0xb0ff) AM_MIRROR(0x0b00) AM_RAM AM_BASE_MEMBER(timeplt_state, spriteram)
123
AM_RANGE(0xb400, 0xb4ff) AM_MIRROR(0x0b00) AM_RAM AM_BASE_MEMBER(timeplt_state, spriteram2)
122
AM_RANGE(0xb000, 0xb0ff) AM_MIRROR(0x0b00) AM_RAM AM_BASE_MEMBER(timeplt_state, m_spriteram)
123
AM_RANGE(0xb400, 0xb4ff) AM_MIRROR(0x0b00) AM_RAM AM_BASE_MEMBER(timeplt_state, m_spriteram2)
124
124
AM_RANGE(0xc000, 0xc000) AM_MIRROR(0x0cff) AM_WRITE(soundlatch_w)
125
125
AM_RANGE(0xc200, 0xc200) AM_MIRROR(0x0cff) AM_WRITE(watchdog_reset_w)
126
126
AM_RANGE(0xc300, 0xc300) AM_MIRROR(0x0cf1) AM_WRITE(timeplt_nmi_enable_w)
139
static ADDRESS_MAP_START( psurge_main_map, ADDRESS_SPACE_PROGRAM, 8 )
139
static ADDRESS_MAP_START( psurge_main_map, AS_PROGRAM, 8 )
140
140
ADDRESS_MAP_UNMAP_HIGH
141
141
AM_RANGE(0x0000, 0x5fff) AM_ROM
142
142
AM_RANGE(0x6004, 0x6004) AM_READ(psurge_protection_r)
143
AM_RANGE(0xa000, 0xa3ff) AM_RAM_WRITE(timeplt_colorram_w) AM_BASE_MEMBER(timeplt_state, colorram)
144
AM_RANGE(0xa400, 0xa7ff) AM_RAM_WRITE(timeplt_videoram_w) AM_BASE_MEMBER(timeplt_state, videoram)
143
AM_RANGE(0xa000, 0xa3ff) AM_RAM_WRITE(timeplt_colorram_w) AM_BASE_MEMBER(timeplt_state, m_colorram)
144
AM_RANGE(0xa400, 0xa7ff) AM_RAM_WRITE(timeplt_videoram_w) AM_BASE_MEMBER(timeplt_state, m_videoram)
145
145
AM_RANGE(0xa800, 0xafff) AM_RAM
146
AM_RANGE(0xb000, 0xb0ff) AM_MIRROR(0x0b00) AM_RAM AM_BASE_MEMBER(timeplt_state, spriteram)
147
AM_RANGE(0xb400, 0xb4ff) AM_MIRROR(0x0b00) AM_RAM AM_BASE_MEMBER(timeplt_state, spriteram2)
146
AM_RANGE(0xb000, 0xb0ff) AM_MIRROR(0x0b00) AM_RAM AM_BASE_MEMBER(timeplt_state, m_spriteram)
147
AM_RANGE(0xb400, 0xb4ff) AM_MIRROR(0x0b00) AM_RAM AM_BASE_MEMBER(timeplt_state, m_spriteram2)
148
148
AM_RANGE(0xc000, 0xc000) AM_MIRROR(0x0cff) AM_WRITE(soundlatch_w)
149
149
AM_RANGE(0xc200, 0xc200) AM_MIRROR(0x0cff) AM_WRITE(watchdog_reset_w)
150
150
AM_RANGE(0xc302, 0xc302) AM_MIRROR(0x0cf1) AM_WRITE(timeplt_flipscreen_w)
158
158
AM_RANGE(0xc360, 0xc360) AM_MIRROR(0x0c9f) AM_READ_PORT("DSW0")
161
static ADDRESS_MAP_START( chkun_main_map, ADDRESS_SPACE_PROGRAM, 8 )
161
static ADDRESS_MAP_START( chkun_main_map, AS_PROGRAM, 8 )
162
162
ADDRESS_MAP_UNMAP_HIGH
163
163
AM_RANGE(0x0000, 0x5fff) AM_ROM
164
164
AM_RANGE(0x6000, 0x67ff) AM_RAM
165
AM_RANGE(0xa000, 0xa3ff) AM_RAM_WRITE(timeplt_colorram_w) AM_BASE_MEMBER(timeplt_state, colorram)
166
AM_RANGE(0xa400, 0xa7ff) AM_RAM_WRITE(timeplt_videoram_w) AM_BASE_MEMBER(timeplt_state, videoram)
165
AM_RANGE(0xa000, 0xa3ff) AM_RAM_WRITE(timeplt_colorram_w) AM_BASE_MEMBER(timeplt_state, m_colorram)
166
AM_RANGE(0xa400, 0xa7ff) AM_RAM_WRITE(timeplt_videoram_w) AM_BASE_MEMBER(timeplt_state, m_videoram)
167
167
AM_RANGE(0xa800, 0xafff) AM_RAM
168
AM_RANGE(0xb000, 0xb0ff) AM_MIRROR(0x0b00) AM_RAM AM_BASE_MEMBER(timeplt_state, spriteram)
169
AM_RANGE(0xb400, 0xb4ff) AM_MIRROR(0x0b00) AM_RAM AM_BASE_MEMBER(timeplt_state, spriteram2)
168
AM_RANGE(0xb000, 0xb0ff) AM_MIRROR(0x0b00) AM_RAM AM_BASE_MEMBER(timeplt_state, m_spriteram)
169
AM_RANGE(0xb400, 0xb4ff) AM_MIRROR(0x0b00) AM_RAM AM_BASE_MEMBER(timeplt_state, m_spriteram2)
170
170
AM_RANGE(0xc000, 0xc000) AM_MIRROR(0x0cff) AM_WRITE(soundlatch_w)
171
171
AM_RANGE(0xc200, 0xc200) AM_MIRROR(0x0cff) AM_WRITE(watchdog_reset_w)
172
172
AM_RANGE(0xc300, 0xc300) AM_MIRROR(0x0cf1) AM_WRITE(timeplt_nmi_enable_w)
357
357
static MACHINE_START( common )
359
timeplt_state *state = machine->driver_data<timeplt_state>();
359
timeplt_state *state = machine.driver_data<timeplt_state>();
361
state->maincpu = machine->device<cpu_device>("maincpu");
361
state->m_maincpu = machine.device<cpu_device>("maincpu");
364
364
static MACHINE_START( timeplt )
366
timeplt_state *state = machine->driver_data<timeplt_state>();
366
timeplt_state *state = machine.driver_data<timeplt_state>();
368
368
MACHINE_START_CALL(common);
370
state_save_register_global(machine, state->nmi_enable);
370
state->save_item(NAME(state->m_nmi_enable));
373
373
static MACHINE_RESET( timeplt )
375
timeplt_state *state = machine->driver_data<timeplt_state>();
375
timeplt_state *state = machine.driver_data<timeplt_state>();
377
state->nmi_enable = 0;
377
state->m_nmi_enable = 0;
380
380
static MACHINE_CONFIG_START( timeplt, timeplt_state )
395
395
MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
396
396
MCFG_SCREEN_SIZE(32*8, 32*8)
397
397
MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
398
MCFG_SCREEN_UPDATE(timeplt)
399
400
MCFG_GFXDECODE(timeplt)
400
401
MCFG_PALETTE_LENGTH(32*4+64*4)
402
403
MCFG_PALETTE_INIT(timeplt)
403
404
MCFG_VIDEO_START(timeplt)
404
MCFG_VIDEO_UPDATE(timeplt)
406
406
/* sound hardware */
407
407
MCFG_FRAGMENT_ADD(timeplt_sound)