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- Committer: Bazaar Package Importer
- Author(s): , Ben Collins
- Date: 2008-04-02 06:59:04 UTC
- Revision ID: james.westby@ubuntu.com-20080402065904-e5knh2gn2hms3xbb
Tags: 2.6.24-14.11
[Ben Collins]
* iwlwifi: Update to iwlwifi-1.2.25 and mac80211-10.0.4
- LP: #200950
* ubuntu: Slight cleanups to module hiearchy and Makefiles
* mac80211: Enable LED triggers
* iwlwifi: Add LED trigger support (rx and tx only)
- LP: #176090
* iwlwifi: Update to iwlwifi-1.2.25 and mac80211-10.0.4
- LP: #200950
* ubuntu: Slight cleanups to module hiearchy and Makefiles
* mac80211: Enable LED triggers
* iwlwifi: Add LED trigger support (rx and tx only)
- LP: #176090
- files added:
- debian/control.d/vars.openvz
- updates/wireless
- updates/wireless/iwlwifi
- updates/wireless/iwlwifi/firmware
- updates/wireless/iwlwifi/firmware/iwlwifi-4965-ucode-4.44.1.20
- updates/wireless/iwlwifi/iwlwifi
- updates/wireless/iwlwifi/iwlwifi/compatible
- updates/wireless/iwlwifi/iwlwifi/origin
- updates/wireless/iwlwifi/iwlwifi/patches
- updates/wireless/iwlwifi/iwlwifi/scripts
- updates/wireless/iwlwifi/mac80211
- updates/wireless/iwlwifi/mac80211/compatible
- updates/wireless/iwlwifi/mac80211/compatible/include
- updates/wireless/iwlwifi/mac80211/compatible/include/linux
- updates/wireless/iwlwifi/mac80211/compatible/include/net
- updates/wireless/iwlwifi/mac80211/compatible/net
- updates/wireless/iwlwifi/mac80211/compatible/net/mac80211
- updates/wireless/iwlwifi/mac80211/compatible/net/wireless
- updates/wireless/iwlwifi/mac80211/modified
- updates/wireless/iwlwifi/mac80211/modified/include
- updates/wireless/iwlwifi/mac80211/modified/include/linux
- updates/wireless/iwlwifi/mac80211/modified/include/net
- updates/wireless/iwlwifi/mac80211/modified/net
- updates/wireless/iwlwifi/mac80211/modified/net/mac80211
- updates/wireless/iwlwifi/mac80211/modified/net/wireless
- updates/wireless/iwlwifi/mac80211/origin
- updates/wireless/iwlwifi/mac80211/origin/include
- updates/wireless/iwlwifi/mac80211/origin/include/linux
- updates/wireless/iwlwifi/mac80211/origin/include/net
- updates/wireless/iwlwifi/mac80211/origin/net
- updates/wireless/iwlwifi/mac80211/origin/net/mac80211
- updates/wireless/iwlwifi/mac80211/origin/net/wireless
- updates/wireless/iwlwifi/mac80211/patches
- updates/wireless/iwlwifi/mac80211/pending
- updates/wireless/iwlwifi/mac80211/scripts
- updates/wireless/iwlwifi/mac80211/stubs
- files modified:
- debian/changelog
added
removed
updates/wireless/iwlwifi/iwlwifi/compatible/iwl3945-base.c
1
/******************************************************************************
2
*
3
* Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4
*
5
* Portions of this file are derived from the ipw3945 project, as well
6
* as portions of the ieee80211 subsystem header files.
7
*
8
* This program is free software; you can redistribute it and/or modify it
9
* under the terms of version 2 of the GNU General Public License as
10
* published by the Free Software Foundation.
11
*
12
* This program is distributed in the hope that it will be useful, but WITHOUT
13
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15
* more details.
16
*
17
* You should have received a copy of the GNU General Public License along with
18
* this program; if not, write to the Free Software Foundation, Inc.,
19
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20
*
21
* The full GNU General Public License is included in this distribution in the
22
* file called LICENSE.
23
*
24
* Contact Information:
25
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
26
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27
*
28
*****************************************************************************/
29
30
#include <linux/kernel.h>
31
#include <linux/module.h>
32
#include <linux/version.h>
33
#include <linux/init.h>
34
#include <linux/pci.h>
35
#include <linux/dma-mapping.h>
36
#include <linux/delay.h>
37
#include <linux/skbuff.h>
38
#include <linux/netdevice.h>
39
#include <linux/wireless.h>
40
#include <linux/firmware.h>
41
#include <linux/skbuff.h>
42
#include <linux/netdevice.h>
43
#include <linux/etherdevice.h>
44
#include <linux/if_arp.h>
45
46
#include <net/ieee80211_radiotap.h>
47
#include <net/mac80211.h>
48
49
#include <asm/div64.h>
50
51
#include "iwl-3945.h"
52
#include "iwl-helpers.h"
53
54
#ifdef CONFIG_IWL3945_DEBUG
55
u32 iwl3945_debug_level;
56
#endif
57
58
static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
59
struct iwl3945_tx_queue *txq);
60
61
/******************************************************************************
62
*
63
* module boiler plate
64
*
65
******************************************************************************/
66
67
/* module parameters */
68
static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
69
static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
70
static int iwl3945_param_disable; /* def: 0 = enable radio */
71
static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
72
int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
73
static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
74
int iwl3945_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 8 Tx queues */
75
76
/*
77
* module name, copyright, version, etc.
78
* NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
79
*/
80
81
#define DRV_DESCRIPTION \
82
"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
83
84
#ifdef CONFIG_IWL3945_DEBUG
85
#define VD "d"
86
#else
87
#define VD
88
#endif
89
90
#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
91
#define VS "s"
92
#else
93
#define VS
94
#endif
95
96
#define IWLWIFI_VERSION "1.2.25" VD VS
97
#define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
98
#define DRV_VERSION IWLWIFI_VERSION
99
100
/* Change firmware file name, using "-" and incrementing number,
101
* *only* when uCode interface or architecture changes so that it
102
* is not compatible with earlier drivers.
103
* This number will also appear in << 8 position of 1st dword of uCode file */
104
#define IWL3945_UCODE_API "-1"
105
106
MODULE_DESCRIPTION(DRV_DESCRIPTION);
107
MODULE_VERSION(DRV_VERSION);
108
MODULE_AUTHOR(DRV_COPYRIGHT);
109
MODULE_LICENSE("GPL");
110
111
static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
112
{
113
u16 fc = le16_to_cpu(hdr->frame_control);
114
int hdr_len = iwlwifi_ieee80211_get_hdrlen(fc);
115
116
if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
117
return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
118
return NULL;
119
}
120
121
static const struct ieee80211_hw_mode *iwl3945_get_hw_mode(
122
struct iwl3945_priv *priv, int mode)
123
{
124
int i;
125
126
for (i = 0; i < 3; i++)
127
if (priv->modes[i].mode == mode)
128
return &priv->modes[i];
129
130
return NULL;
131
}
132
133
static int iwl3945_is_empty_essid(const char *essid, int essid_len)
134
{
135
/* Single white space is for Linksys APs */
136
if (essid_len == 1 && essid[0] == ' ')
137
return 1;
138
139
/* Otherwise, if the entire essid is 0, we assume it is hidden */
140
while (essid_len) {
141
essid_len--;
142
if (essid[essid_len] != '\0')
143
return 0;
144
}
145
146
return 1;
147
}
148
149
static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
150
{
151
static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
152
const char *s = essid;
153
char *d = escaped;
154
155
if (iwl3945_is_empty_essid(essid, essid_len)) {
156
memcpy(escaped, "<hidden>", sizeof("<hidden>"));
157
return escaped;
158
}
159
160
essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
161
while (essid_len--) {
162
if (*s == '\0') {
163
*d++ = '\\';
164
*d++ = '0';
165
s++;
166
} else
167
*d++ = *s++;
168
}
169
*d = '\0';
170
return escaped;
171
}
172
173
#ifndef hex_dump_to_buffer
174
static inline int snprint_line(char *buf, size_t count,
175
const u8 * data, u32 len, u32 ofs)
176
{
177
int out, i, j, l;
178
char c;
179
180
out = snprintf(buf, count, "%08X", ofs);
181
182
for (l = 0, i = 0; i < 2; i++) {
183
out += snprintf(buf + out, count - out, " ");
184
for (j = 0; j < 8 && l < len; j++, l++)
185
out +=
186
snprintf(buf + out, count - out, "%02X ",
187
data[(i * 8 + j)]);
188
for (; j < 8; j++)
189
out += snprintf(buf + out, count - out, " ");
190
}
191
out += snprintf(buf + out, count - out, " ");
192
for (l = 0, i = 0; i < 2; i++) {
193
out += snprintf(buf + out, count - out, " ");
194
for (j = 0; j < 8 && l < len; j++, l++) {
195
c = data[(i * 8 + j)];
196
if (!isascii(c) || !isprint(c))
197
c = '.';
198
199
out += snprintf(buf + out, count - out, "%c", c);
200
}
201
202
for (; j < 8; j++)
203
out += snprintf(buf + out, count - out, " ");
204
}
205
206
return out;
207
}
208
209
#ifdef CONFIG_IWL3945_DEBUG
210
static inline void printk_buf(int level, const void *p, u32 len)
211
{
212
const u8 *data = p;
213
char line[81];
214
u32 ofs = 0;
215
if (!(iwl3945_debug_level & level))
216
return;
217
218
while (len) {
219
snprint_line(line, sizeof(line), &data[ofs],
220
min(len, 16U), ofs);
221
printk(KERN_DEBUG "%s\n", line);
222
ofs += 16;
223
len -= min(len, 16U);
224
}
225
}
226
#else
227
#define printk_buf(level, p, len) do {} while (0)
228
#endif
229
230
#define hex_dump_to_buffer(d, s, l, g, lb, ls, a) \
231
snprint_line(lb, ls, d, min(s, (unsigned int)l), 0)
232
233
#define print_hex_dump(m, p, t, l, g, d, s, a) \
234
printk_buf(IWL_DL_INFO, d, s);
235
236
#endif /* hex_dump_to_buffer */
237
238
static void iwl3945_print_hex_dump(int level, void *p, u32 len)
239
{
240
#ifdef CONFIG_IWL3945_DEBUG
241
if (!(iwl3945_debug_level & level))
242
return;
243
244
print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
245
p, len, 1);
246
#endif
247
}
248
249
/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
250
* DMA services
251
*
252
* Theory of operation
253
*
254
* A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
255
* of buffer descriptors, each of which points to one or more data buffers for
256
* the device to read from or fill. Driver and device exchange status of each
257
* queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
258
* entries in each circular buffer, to protect against confusing empty and full
259
* queue states.
260
*
261
* The device reads or writes the data in the queues via the device's several
262
* DMA/FIFO channels. Each queue is mapped to a single DMA channel.
263
*
264
* For Tx queue, there are low mark and high mark limits. If, after queuing
265
* the packet for Tx, free space become < low mark, Tx queue stopped. When
266
* reclaiming packets (on 'tx done IRQ), if free space become > high mark,
267
* Tx queue resumed.
268
*
269
* The 3945 operates with six queues: One receive queue, one transmit queue
270
* (#4) for sending commands to the device firmware, and four transmit queues
271
* (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
272
***************************************************/
273
274
static int iwl3945_queue_space(const struct iwl3945_queue *q)
275
{
276
int s = q->read_ptr - q->write_ptr;
277
278
if (q->read_ptr > q->write_ptr)
279
s -= q->n_bd;
280
281
if (s <= 0)
282
s += q->n_window;
283
/* keep some reserve to not confuse empty and full situations */
284
s -= 2;
285
if (s < 0)
286
s = 0;
287
return s;
288
}
289
290
/**
291
* iwl3945_queue_inc_wrap - increment queue index, wrap back to beginning
292
* @index -- current index
293
* @n_bd -- total number of entries in queue (must be power of 2)
294
*/
295
static inline int iwl3945_queue_inc_wrap(int index, int n_bd)
296
{
297
return ++index & (n_bd - 1);
298
}
299
300
/**
301
* iwl3945_queue_dec_wrap - increment queue index, wrap back to end
302
* @index -- current index
303
* @n_bd -- total number of entries in queue (must be power of 2)
304
*/
305
static inline int iwl3945_queue_dec_wrap(int index, int n_bd)
306
{
307
return --index & (n_bd - 1);
308
}
309
310
static inline int x2_queue_used(const struct iwl3945_queue *q, int i)
311
{
312
return q->write_ptr > q->read_ptr ?
313
(i >= q->read_ptr && i < q->write_ptr) :
314
!(i < q->read_ptr && i >= q->write_ptr);
315
}
316
317
static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
318
{
319
/* This is for scan command, the big buffer at end of command array */
320
if (is_huge)
321
return q->n_window; /* must be power of 2 */
322
323
/* Otherwise, use normal size buffers */
324
return index & (q->n_window - 1);
325
}
326
327
/**
328
* iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
329
*/
330
static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
331
int count, int slots_num, u32 id)
332
{
333
q->n_bd = count;
334
q->n_window = slots_num;
335
q->id = id;
336
337
/* count must be power-of-two size, otherwise iwl3945_queue_inc_wrap
338
* and iwl3945_queue_dec_wrap are broken. */
339
BUG_ON(!is_power_of_2(count));
340
341
/* slots_num must be power-of-two size, otherwise
342
* get_cmd_index is broken. */
343
BUG_ON(!is_power_of_2(slots_num));
344
345
q->low_mark = q->n_window / 4;
346
if (q->low_mark < 4)
347
q->low_mark = 4;
348
349
q->high_mark = q->n_window / 8;
350
if (q->high_mark < 2)
351
q->high_mark = 2;
352
353
q->write_ptr = q->read_ptr = 0;
354
355
return 0;
356
}
357
358
/**
359
* iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
360
*/
361
static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
362
struct iwl3945_tx_queue *txq, u32 id)
363
{
364
struct pci_dev *dev = priv->pci_dev;
365
366
/* Driver private data, only for Tx (not command) queues,
367
* not shared with device. */
368
if (id != IWL_CMD_QUEUE_NUM) {
369
txq->txb = kmalloc(sizeof(txq->txb[0]) *
370
TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
371
if (!txq->txb) {
372
IWL_ERROR("kmalloc for auxiliary BD "
373
"structures failed\n");
374
goto error;
375
}
376
} else
377
txq->txb = NULL;
378
379
/* Circular buffer of transmit frame descriptors (TFDs),
380
* shared with device */
381
txq->bd = pci_alloc_consistent(dev,
382
sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
383
&txq->q.dma_addr);
384
385
if (!txq->bd) {
386
IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
387
sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
388
goto error;
389
}
390
txq->q.id = id;
391
392
return 0;
393
394
error:
395
if (txq->txb) {
396
kfree(txq->txb);
397
txq->txb = NULL;
398
}
399
400
return -ENOMEM;
401
}
402
403
/**
404
* iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
405
*/
406
int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
407
struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
408
{
409
struct pci_dev *dev = priv->pci_dev;
410
int len;
411
int rc = 0;
412
413
/*
414
* Alloc buffer array for commands (Tx or other types of commands).
415
* For the command queue (#4), allocate command space + one big
416
* command for scan, since scan command is very huge; the system will
417
* not have two scans at the same time, so only one is needed.
418
* For data Tx queues (all other queues), no super-size command
419
* space is needed.
420
*/
421
len = sizeof(struct iwl3945_cmd) * slots_num;
422
if (txq_id == IWL_CMD_QUEUE_NUM)
423
len += IWL_MAX_SCAN_SIZE;
424
txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
425
if (!txq->cmd)
426
return -ENOMEM;
427
428
/* Alloc driver data array and TFD circular buffer */
429
rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
430
if (rc) {
431
pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
432
433
return -ENOMEM;
434
}
435
txq->need_update = 0;
436
437
/* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
438
* iwl3945_queue_inc_wrap and iwl3945_queue_dec_wrap are broken. */
439
BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
440
441
/* Initialize queue high/low-water, head/tail indexes */
442
iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
443
444
/* Tell device where to find queue, enable DMA channel. */
445
iwl3945_hw_tx_queue_init(priv, txq);
446
447
return 0;
448
}
449
450
/**
451
* iwl3945_tx_queue_free - Deallocate DMA queue.
452
* @txq: Transmit queue to deallocate.
453
*
454
* Empty queue by removing and destroying all BD's.
455
* Free all buffers.
456
* 0-fill, but do not free "txq" descriptor structure.
457
*/
458
void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
459
{
460
struct iwl3945_queue *q = &txq->q;
461
struct pci_dev *dev = priv->pci_dev;
462
int len;
463
464
if (q->n_bd == 0)
465
return;
466
467
/* first, empty all BD's */
468
for (; q->write_ptr != q->read_ptr;
469
q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd))
470
iwl3945_hw_txq_free_tfd(priv, txq);
471
472
len = sizeof(struct iwl3945_cmd) * q->n_window;
473
if (q->id == IWL_CMD_QUEUE_NUM)
474
len += IWL_MAX_SCAN_SIZE;
475
476
/* De-alloc array of command/tx buffers */
477
pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
478
479
/* De-alloc circular buffer of TFDs */
480
if (txq->q.n_bd)
481
pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
482
txq->q.n_bd, txq->bd, txq->q.dma_addr);
483
484
/* De-alloc array of per-TFD driver data */
485
if (txq->txb) {
486
kfree(txq->txb);
487
txq->txb = NULL;
488
}
489
490
/* 0-fill queue descriptor structure */
491
memset(txq, 0, sizeof(*txq));
492
}
493
494
const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
495
496
/*************** STATION TABLE MANAGEMENT ****
497
* mac80211 should be examined to determine if sta_info is duplicating
498
* the functionality provided here
499
*/
500
501
/**************************************************************/
502
#if 0 /* temporary disable till we add real remove station */
503
/**
504
* iwl3945_remove_station - Remove driver's knowledge of station.
505
*
506
* NOTE: This does not remove station from device's station table.
507
*/
508
static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
509
{
510
int index = IWL_INVALID_STATION;
511
int i;
512
unsigned long flags;
513
514
spin_lock_irqsave(&priv->sta_lock, flags);
515
516
if (is_ap)
517
index = IWL_AP_ID;
518
else if (is_broadcast_ether_addr(addr))
519
index = priv->hw_setting.bcast_sta_id;
520
else
521
for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
522
if (priv->stations[i].used &&
523
!compare_ether_addr(priv->stations[i].sta.sta.addr,
524
addr)) {
525
index = i;
526
break;
527
}
528
529
if (unlikely(index == IWL_INVALID_STATION))
530
goto out;
531
532
if (priv->stations[index].used) {
533
priv->stations[index].used = 0;
534
priv->num_stations--;
535
}
536
537
BUG_ON(priv->num_stations < 0);
538
539
out:
540
spin_unlock_irqrestore(&priv->sta_lock, flags);
541
return 0;
542
}
543
#endif
544
545
/**
546
* iwl3945_clear_stations_table - Clear the driver's station table
547
*
548
* NOTE: This does not clear or otherwise alter the device's station table.
549
*/
550
static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
551
{
552
unsigned long flags;
553
554
spin_lock_irqsave(&priv->sta_lock, flags);
555
556
priv->num_stations = 0;
557
memset(priv->stations, 0, sizeof(priv->stations));
558
559
spin_unlock_irqrestore(&priv->sta_lock, flags);
560
}
561
562
/**
563
* iwl3945_add_station - Add station to station tables in driver and device
564
*/
565
u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
566
{
567
int i;
568
int index = IWL_INVALID_STATION;
569
struct iwl3945_station_entry *station;
570
unsigned long flags_spin;
571
u8 rate;
572
573
spin_lock_irqsave(&priv->sta_lock, flags_spin);
574
if (is_ap)
575
index = IWL_AP_ID;
576
else if (is_broadcast_ether_addr(addr))
577
index = priv->hw_setting.bcast_sta_id;
578
else
579
for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
580
if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
581
addr)) {
582
index = i;
583
break;
584
}
585
586
if (!priv->stations[i].used &&
587
index == IWL_INVALID_STATION)
588
index = i;
589
}
590
591
/* These two conditions has the same outcome but keep them separate
592
since they have different meaning */
593
if (unlikely(index == IWL_INVALID_STATION)) {
594
spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
595
return index;
596
}
597
598
if (priv->stations[index].used &&
599
!compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
600
spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
601
return index;
602
}
603
604
IWL_DEBUG_ASSOC("Add STA ID %d: " MAC_FMT "\n", index, MAC_ARG(addr));
605
station = &priv->stations[index];
606
station->used = 1;
607
priv->num_stations++;
608
609
/* Set up the REPLY_ADD_STA command to send to device */
610
memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
611
memcpy(station->sta.sta.addr, addr, ETH_ALEN);
612
station->sta.mode = 0;
613
station->sta.sta.sta_id = index;
614
station->sta.station_flags = 0;
615
616
if (priv->phymode == MODE_IEEE80211A)
617
rate = IWL_RATE_6M_PLCP;
618
else
619
rate = IWL_RATE_1M_PLCP;
620
621
/* Turn on both antennas for the station... */
622
station->sta.rate_n_flags =
623
iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
624
station->current_rate.rate_n_flags =
625
le16_to_cpu(station->sta.rate_n_flags);
626
627
spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
628
629
/* Add station to device's station table */
630
iwl3945_send_add_station(priv, &station->sta, flags);
631
return index;
632
633
}
634
635
/*************** DRIVER STATUS FUNCTIONS *****/
636
637
static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
638
{
639
/* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
640
* set but EXIT_PENDING is not */
641
return test_bit(STATUS_READY, &priv->status) &&
642
test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
643
!test_bit(STATUS_EXIT_PENDING, &priv->status);
644
}
645
646
static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
647
{
648
return test_bit(STATUS_ALIVE, &priv->status);
649
}
650
651
static inline int iwl3945_is_init(struct iwl3945_priv *priv)
652
{
653
return test_bit(STATUS_INIT, &priv->status);
654
}
655
656
static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
657
{
658
return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
659
test_bit(STATUS_RF_KILL_SW, &priv->status);
660
}
661
662
static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
663
{
664
665
if (iwl3945_is_rfkill(priv))
666
return 0;
667
668
return iwl3945_is_ready(priv);
669
}
670
671
/*************** HOST COMMAND QUEUE FUNCTIONS *****/
672
673
#define IWL_CMD(x) case x : return #x
674
675
static const char *get_cmd_string(u8 cmd)
676
{
677
switch (cmd) {
678
IWL_CMD(REPLY_ALIVE);
679
IWL_CMD(REPLY_ERROR);
680
IWL_CMD(REPLY_RXON);
681
IWL_CMD(REPLY_RXON_ASSOC);
682
IWL_CMD(REPLY_QOS_PARAM);
683
IWL_CMD(REPLY_RXON_TIMING);
684
IWL_CMD(REPLY_ADD_STA);
685
IWL_CMD(REPLY_REMOVE_STA);
686
IWL_CMD(REPLY_REMOVE_ALL_STA);
687
IWL_CMD(REPLY_3945_RX);
688
IWL_CMD(REPLY_TX);
689
IWL_CMD(REPLY_RATE_SCALE);
690
IWL_CMD(REPLY_LEDS_CMD);
691
IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
692
IWL_CMD(RADAR_NOTIFICATION);
693
IWL_CMD(REPLY_QUIET_CMD);
694
IWL_CMD(REPLY_CHANNEL_SWITCH);
695
IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
696
IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
697
IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
698
IWL_CMD(POWER_TABLE_CMD);
699
IWL_CMD(PM_SLEEP_NOTIFICATION);
700
IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
701
IWL_CMD(REPLY_SCAN_CMD);
702
IWL_CMD(REPLY_SCAN_ABORT_CMD);
703
IWL_CMD(SCAN_START_NOTIFICATION);
704
IWL_CMD(SCAN_RESULTS_NOTIFICATION);
705
IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
706
IWL_CMD(BEACON_NOTIFICATION);
707
IWL_CMD(REPLY_TX_BEACON);
708
IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
709
IWL_CMD(QUIET_NOTIFICATION);
710
IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
711
IWL_CMD(MEASURE_ABORT_NOTIFICATION);
712
IWL_CMD(REPLY_BT_CONFIG);
713
IWL_CMD(REPLY_STATISTICS_CMD);
714
IWL_CMD(STATISTICS_NOTIFICATION);
715
IWL_CMD(REPLY_CARD_STATE_CMD);
716
IWL_CMD(CARD_STATE_NOTIFICATION);
717
IWL_CMD(MISSED_BEACONS_NOTIFICATION);
718
default:
719
return "UNKNOWN";
720
721
}
722
}
723
724
#define HOST_COMPLETE_TIMEOUT (HZ / 2)
725
726
/**
727
* iwl3945_enqueue_hcmd - enqueue a uCode command
728
* @priv: device private data point
729
* @cmd: a point to the ucode command structure
730
*
731
* The function returns < 0 values to indicate the operation is
732
* failed. On success, it turns the index (> 0) of command in the
733
* command queue.
734
*/
735
static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
736
{
737
struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
738
struct iwl3945_queue *q = &txq->q;
739
struct iwl3945_tfd_frame *tfd;
740
u32 *control_flags;
741
struct iwl3945_cmd *out_cmd;
742
u32 idx;
743
u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
744
dma_addr_t phys_addr;
745
int pad;
746
u16 count;
747
int ret;
748
unsigned long flags;
749
750
/* If any of the command structures end up being larger than
751
* the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
752
* we will need to increase the size of the TFD entries */
753
BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
754
!(cmd->meta.flags & CMD_SIZE_HUGE));
755
756
if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
757
IWL_ERROR("No space for Tx\n");
758
return -ENOSPC;
759
}
760
761
spin_lock_irqsave(&priv->hcmd_lock, flags);
762
763
tfd = &txq->bd[q->write_ptr];
764
memset(tfd, 0, sizeof(*tfd));
765
766
control_flags = (u32 *) tfd;
767
768
idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
769
out_cmd = &txq->cmd[idx];
770
771
out_cmd->hdr.cmd = cmd->id;
772
memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
773
memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
774
775
/* At this point, the out_cmd now has all of the incoming cmd
776
* information */
777
778
out_cmd->hdr.flags = 0;
779
out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
780
INDEX_TO_SEQ(q->write_ptr));
781
if (out_cmd->meta.flags & CMD_SIZE_HUGE)
782
out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
783
784
phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
785
offsetof(struct iwl3945_cmd, hdr);
786
iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
787
788
pad = U32_PAD(cmd->len);
789
count = TFD_CTL_COUNT_GET(*control_flags);
790
*control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
791
792
IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
793
"%d bytes at %d[%d]:%d\n",
794
get_cmd_string(out_cmd->hdr.cmd),
795
out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
796
fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
797
798
txq->need_update = 1;
799
800
/* Increment and update queue's write index */
801
q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
802
ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
803
804
spin_unlock_irqrestore(&priv->hcmd_lock, flags);
805
return ret ? ret : idx;
806
}
807
808
static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
809
{
810
int ret;
811
812
BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
813
814
/* An asynchronous command can not expect an SKB to be set. */
815
BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
816
817
/* An asynchronous command MUST have a callback. */
818
BUG_ON(!cmd->meta.u.callback);
819
820
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
821
return -EBUSY;
822
823
ret = iwl3945_enqueue_hcmd(priv, cmd);
824
if (ret < 0) {
825
IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
826
get_cmd_string(cmd->id), ret);
827
return ret;
828
}
829
return 0;
830
}
831
832
static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
833
{
834
int cmd_idx;
835
int ret;
836
static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
837
838
BUG_ON(cmd->meta.flags & CMD_ASYNC);
839
840
/* A synchronous command can not have a callback set. */
841
BUG_ON(cmd->meta.u.callback != NULL);
842
843
if (atomic_xchg(&entry, 1)) {
844
IWL_ERROR("Error sending %s: Already sending a host command\n",
845
get_cmd_string(cmd->id));
846
return -EBUSY;
847
}
848
849
set_bit(STATUS_HCMD_ACTIVE, &priv->status);
850
851
if (cmd->meta.flags & CMD_WANT_SKB)
852
cmd->meta.source = &cmd->meta;
853
854
cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
855
if (cmd_idx < 0) {
856
ret = cmd_idx;
857
IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
858
get_cmd_string(cmd->id), ret);
859
goto out;
860
}
861
862
ret = wait_event_interruptible_timeout(priv->wait_command_queue,
863
!test_bit(STATUS_HCMD_ACTIVE, &priv->status),
864
HOST_COMPLETE_TIMEOUT);
865
if (!ret) {
866
if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
867
IWL_ERROR("Error sending %s: time out after %dms.\n",
868
get_cmd_string(cmd->id),
869
jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
870
871
clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
872
ret = -ETIMEDOUT;
873
goto cancel;
874
}
875
}
876
877
if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
878
IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
879
get_cmd_string(cmd->id));
880
ret = -ECANCELED;
881
goto fail;
882
}
883
if (test_bit(STATUS_FW_ERROR, &priv->status)) {
884
IWL_DEBUG_INFO("Command %s failed: FW Error\n",
885
get_cmd_string(cmd->id));
886
ret = -EIO;
887
goto fail;
888
}
889
if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
890
IWL_ERROR("Error: Response NULL in '%s'\n",
891
get_cmd_string(cmd->id));
892
ret = -EIO;
893
goto out;
894
}
895
896
ret = 0;
897
goto out;
898
899
cancel:
900
if (cmd->meta.flags & CMD_WANT_SKB) {
901
struct iwl3945_cmd *qcmd;
902
903
/* Cancel the CMD_WANT_SKB flag for the cmd in the
904
* TX cmd queue. Otherwise in case the cmd comes
905
* in later, it will possibly set an invalid
906
* address (cmd->meta.source). */
907
qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
908
qcmd->meta.flags &= ~CMD_WANT_SKB;
909
}
910
fail:
911
if (cmd->meta.u.skb) {
912
dev_kfree_skb_any(cmd->meta.u.skb);
913
cmd->meta.u.skb = NULL;
914
}
915
out:
916
atomic_set(&entry, 0);
917
return ret;
918
}
919
920
int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
921
{
922
if (cmd->meta.flags & CMD_ASYNC)
923
return iwl3945_send_cmd_async(priv, cmd);
924
925
return iwl3945_send_cmd_sync(priv, cmd);
926
}
927
928
int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
929
{
930
struct iwl3945_host_cmd cmd = {
931
.id = id,
932
.len = len,
933
.data = data,
934
};
935
936
return iwl3945_send_cmd_sync(priv, &cmd);
937
}
938
939
static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
940
{
941
struct iwl3945_host_cmd cmd = {
942
.id = id,
943
.len = sizeof(val),
944
.data = &val,
945
};
946
947
return iwl3945_send_cmd_sync(priv, &cmd);
948
}
949
950
int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
951
{
952
return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
953
}
954
955
/**
956
* iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
957
* @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
958
* @channel: Any channel valid for the requested phymode
959
960
* In addition to setting the staging RXON, priv->phymode is also set.
961
*
962
* NOTE: Does not commit to the hardware; it sets appropriate bit fields
963
* in the staging RXON flag structure based on the phymode
964
*/
965
static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv, u8 phymode, u16 channel)
966
{
967
if (!iwl3945_get_channel_info(priv, phymode, channel)) {
968
IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
969
channel, phymode);
970
return -EINVAL;
971
}
972
973
if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
974
(priv->phymode == phymode))
975
return 0;
976
977
priv->staging_rxon.channel = cpu_to_le16(channel);
978
if (phymode == MODE_IEEE80211A)
979
priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
980
else
981
priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
982
983
priv->phymode = phymode;
984
985
IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
986
987
return 0;
988
}
989
990
/**
991
* iwl3945_check_rxon_cmd - validate RXON structure is valid
992
*
993
* NOTE: This is really only useful during development and can eventually
994
* be #ifdef'd out once the driver is stable and folks aren't actively
995
* making changes
996
*/
997
static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
998
{
999
int error = 0;
1000
int counter = 1;
1001
1002
if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
1003
error |= le32_to_cpu(rxon->flags &
1004
(RXON_FLG_TGJ_NARROW_BAND_MSK |
1005
RXON_FLG_RADAR_DETECT_MSK));
1006
if (error)
1007
IWL_WARNING("check 24G fields %d | %d\n",
1008
counter++, error);
1009
} else {
1010
error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
1011
0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
1012
if (error)
1013
IWL_WARNING("check 52 fields %d | %d\n",
1014
counter++, error);
1015
error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
1016
if (error)
1017
IWL_WARNING("check 52 CCK %d | %d\n",
1018
counter++, error);
1019
}
1020
error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
1021
if (error)
1022
IWL_WARNING("check mac addr %d | %d\n", counter++, error);
1023
1024
/* make sure basic rates 6Mbps and 1Mbps are supported */
1025
error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
1026
((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
1027
if (error)
1028
IWL_WARNING("check basic rate %d | %d\n", counter++, error);
1029
1030
error |= (le16_to_cpu(rxon->assoc_id) > 2007);
1031
if (error)
1032
IWL_WARNING("check assoc id %d | %d\n", counter++, error);
1033
1034
error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
1035
== (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
1036
if (error)
1037
IWL_WARNING("check CCK and short slot %d | %d\n",
1038
counter++, error);
1039
1040
error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
1041
== (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
1042
if (error)
1043
IWL_WARNING("check CCK & auto detect %d | %d\n",
1044
counter++, error);
1045
1046
error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
1047
RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
1048
if (error)
1049
IWL_WARNING("check TGG and auto detect %d | %d\n",
1050
counter++, error);
1051
1052
if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
1053
error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
1054
RXON_FLG_ANT_A_MSK)) == 0);
1055
if (error)
1056
IWL_WARNING("check antenna %d %d\n", counter++, error);
1057
1058
if (error)
1059
IWL_WARNING("Tuning to channel %d\n",
1060
le16_to_cpu(rxon->channel));
1061
1062
if (error) {
1063
IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
1064
return -1;
1065
}
1066
return 0;
1067
}
1068
1069
/**
1070
* iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
1071
* @priv: staging_rxon is compared to active_rxon
1072
*
1073
* If the RXON structure is changing enough to require a new tune,
1074
* or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1075
* a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
1076
*/
1077
static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
1078
{
1079
1080
/* These items are only settable from the full RXON command */
1081
if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1082
compare_ether_addr(priv->staging_rxon.bssid_addr,
1083
priv->active_rxon.bssid_addr) ||
1084
compare_ether_addr(priv->staging_rxon.node_addr,
1085
priv->active_rxon.node_addr) ||
1086
compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1087
priv->active_rxon.wlap_bssid_addr) ||
1088
(priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1089
(priv->staging_rxon.channel != priv->active_rxon.channel) ||
1090
(priv->staging_rxon.air_propagation !=
1091
priv->active_rxon.air_propagation) ||
1092
(priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1093
return 1;
1094
1095
/* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1096
* be updated with the RXON_ASSOC command -- however only some
1097
* flag transitions are allowed using RXON_ASSOC */
1098
1099
/* Check if we are not switching bands */
1100
if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1101
(priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1102
return 1;
1103
1104
/* Check if we are switching association toggle */
1105
if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1106
(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1107
return 1;
1108
1109
return 0;
1110
}
1111
1112
static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
1113
{
1114
int rc = 0;
1115
struct iwl3945_rx_packet *res = NULL;
1116
struct iwl3945_rxon_assoc_cmd rxon_assoc;
1117
struct iwl3945_host_cmd cmd = {
1118
.id = REPLY_RXON_ASSOC,
1119
.len = sizeof(rxon_assoc),
1120
.meta.flags = CMD_WANT_SKB,
1121
.data = &rxon_assoc,
1122
};
1123
const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1124
const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
1125
1126
if ((rxon1->flags == rxon2->flags) &&
1127
(rxon1->filter_flags == rxon2->filter_flags) &&
1128
(rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1129
(rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1130
IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1131
return 0;
1132
}
1133
1134
rxon_assoc.flags = priv->staging_rxon.flags;
1135
rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1136
rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1137
rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1138
rxon_assoc.reserved = 0;
1139
1140
rc = iwl3945_send_cmd_sync(priv, &cmd);
1141
if (rc)
1142
return rc;
1143
1144
res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1145
if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1146
IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1147
rc = -EIO;
1148
}
1149
1150
priv->alloc_rxb_skb--;
1151
dev_kfree_skb_any(cmd.meta.u.skb);
1152
1153
return rc;
1154
}
1155
1156
/**
1157
* iwl3945_commit_rxon - commit staging_rxon to hardware
1158
*
1159
* The RXON command in staging_rxon is committed to the hardware and
1160
* the active_rxon structure is updated with the new data. This
1161
* function correctly transitions out of the RXON_ASSOC_MSK state if
1162
* a HW tune is required based on the RXON structure changes.
1163
*/
1164
static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
1165
{
1166
/* cast away the const for active_rxon in this function */
1167
struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1168
int rc = 0;
1169
1170
if (!iwl3945_is_alive(priv))
1171
return -1;
1172
1173
/* always get timestamp with Rx frame */
1174
priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1175
1176
/* select antenna */
1177
priv->staging_rxon.flags &=
1178
~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1179
priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1180
1181
rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
1182
if (rc) {
1183
IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1184
return -EINVAL;
1185
}
1186
1187
/* If we don't need to send a full RXON, we can use
1188
* iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1189
* and other flags for the current radio configuration. */
1190
if (!iwl3945_full_rxon_required(priv)) {
1191
rc = iwl3945_send_rxon_assoc(priv);
1192
if (rc) {
1193
IWL_ERROR("Error setting RXON_ASSOC "
1194
"configuration (%d).\n", rc);
1195
return rc;
1196
}
1197
1198
memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1199
1200
return 0;
1201
}
1202
1203
/* If we are currently associated and the new config requires
1204
* an RXON_ASSOC and the new config wants the associated mask enabled,
1205
* we must clear the associated from the active configuration
1206
* before we apply the new config */
1207
if (iwl3945_is_associated(priv) &&
1208
(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1209
IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1210
active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1211
1212
rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1213
sizeof(struct iwl3945_rxon_cmd),
1214
&priv->active_rxon);
1215
1216
/* If the mask clearing failed then we set
1217
* active_rxon back to what it was previously */
1218
if (rc) {
1219
active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1220
IWL_ERROR("Error clearing ASSOC_MSK on current "
1221
"configuration (%d).\n", rc);
1222
return rc;
1223
}
1224
}
1225
1226
IWL_DEBUG_INFO("Sending RXON\n"
1227
"* with%s RXON_FILTER_ASSOC_MSK\n"
1228
"* channel = %d\n"
1229
"* bssid = " MAC_FMT "\n",
1230
((priv->staging_rxon.filter_flags &
1231
RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1232
le16_to_cpu(priv->staging_rxon.channel),
1233
MAC_ARG(priv->staging_rxon.bssid_addr));
1234
1235
/* Apply the new configuration */
1236
rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1237
sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
1238
if (rc) {
1239
IWL_ERROR("Error setting new configuration (%d).\n", rc);
1240
return rc;
1241
}
1242
1243
memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1244
1245
iwl3945_clear_stations_table(priv);
1246
1247
/* If we issue a new RXON command which required a tune then we must
1248
* send a new TXPOWER command or we won't be able to Tx any frames */
1249
rc = iwl3945_hw_reg_send_txpower(priv);
1250
if (rc) {
1251
IWL_ERROR("Error setting Tx power (%d).\n", rc);
1252
return rc;
1253
}
1254
1255
/* Add the broadcast address so we can send broadcast frames */
1256
if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
1257
IWL_INVALID_STATION) {
1258
IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1259
return -EIO;
1260
}
1261
1262
/* If we have set the ASSOC_MSK and we are in BSS mode then
1263
* add the IWL_AP_ID to the station rate table */
1264
if (iwl3945_is_associated(priv) &&
1265
(priv->iw_mode == IEEE80211_IF_TYPE_STA))
1266
if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
1267
== IWL_INVALID_STATION) {
1268
IWL_ERROR("Error adding AP address for transmit.\n");
1269
return -EIO;
1270
}
1271
1272
/* Init the hardware's rate fallback order based on the
1273
* phymode */
1274
rc = iwl3945_init_hw_rate_table(priv);
1275
if (rc) {
1276
IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1277
return -EIO;
1278
}
1279
1280
return 0;
1281
}
1282
1283
static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
1284
{
1285
struct iwl3945_bt_cmd bt_cmd = {
1286
.flags = 3,
1287
.lead_time = 0xAA,
1288
.max_kill = 1,
1289
.kill_ack_mask = 0,
1290
.kill_cts_mask = 0,
1291
};
1292
1293
return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1294
sizeof(struct iwl3945_bt_cmd), &bt_cmd);
1295
}
1296
1297
static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
1298
{
1299
int rc = 0;
1300
struct iwl3945_rx_packet *res;
1301
struct iwl3945_host_cmd cmd = {
1302
.id = REPLY_SCAN_ABORT_CMD,
1303
.meta.flags = CMD_WANT_SKB,
1304
};
1305
1306
/* If there isn't a scan actively going on in the hardware
1307
* then we are in between scan bands and not actually
1308
* actively scanning, so don't send the abort command */
1309
if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1310
clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1311
return 0;
1312
}
1313
1314
rc = iwl3945_send_cmd_sync(priv, &cmd);
1315
if (rc) {
1316
clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1317
return rc;
1318
}
1319
1320
res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1321
if (res->u.status != CAN_ABORT_STATUS) {
1322
/* The scan abort will return 1 for success or
1323
* 2 for "failure". A failure condition can be
1324
* due to simply not being in an active scan which
1325
* can occur if we send the scan abort before we
1326
* the microcode has notified us that a scan is
1327
* completed. */
1328
IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1329
clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1330
clear_bit(STATUS_SCAN_HW, &priv->status);
1331
}
1332
1333
dev_kfree_skb_any(cmd.meta.u.skb);
1334
1335
return rc;
1336
}
1337
1338
static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1339
struct iwl3945_cmd *cmd,
1340
struct sk_buff *skb)
1341
{
1342
return 1;
1343
}
1344
1345
/*
1346
* CARD_STATE_CMD
1347
*
1348
* Use: Sets the device's internal card state to enable, disable, or halt
1349
*
1350
* When in the 'enable' state the card operates as normal.
1351
* When in the 'disable' state, the card enters into a low power mode.
1352
* When in the 'halt' state, the card is shut down and must be fully
1353
* restarted to come back on.
1354
*/
1355
static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
1356
{
1357
struct iwl3945_host_cmd cmd = {
1358
.id = REPLY_CARD_STATE_CMD,
1359
.len = sizeof(u32),
1360
.data = &flags,
1361
.meta.flags = meta_flag,
1362
};
1363
1364
if (meta_flag & CMD_ASYNC)
1365
cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1366
1367
return iwl3945_send_cmd(priv, &cmd);
1368
}
1369
1370
static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1371
struct iwl3945_cmd *cmd, struct sk_buff *skb)
1372
{
1373
struct iwl3945_rx_packet *res = NULL;
1374
1375
if (!skb) {
1376
IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1377
return 1;
1378
}
1379
1380
res = (struct iwl3945_rx_packet *)skb->data;
1381
if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1382
IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1383
res->hdr.flags);
1384
return 1;
1385
}
1386
1387
switch (res->u.add_sta.status) {
1388
case ADD_STA_SUCCESS_MSK:
1389
break;
1390
default:
1391
break;
1392
}
1393
1394
/* We didn't cache the SKB; let the caller free it */
1395
return 1;
1396
}
1397
1398
int iwl3945_send_add_station(struct iwl3945_priv *priv,
1399
struct iwl3945_addsta_cmd *sta, u8 flags)
1400
{
1401
struct iwl3945_rx_packet *res = NULL;
1402
int rc = 0;
1403
struct iwl3945_host_cmd cmd = {
1404
.id = REPLY_ADD_STA,
1405
.len = sizeof(struct iwl3945_addsta_cmd),
1406
.meta.flags = flags,
1407
.data = sta,
1408
};
1409
1410
if (flags & CMD_ASYNC)
1411
cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1412
else
1413
cmd.meta.flags |= CMD_WANT_SKB;
1414
1415
rc = iwl3945_send_cmd(priv, &cmd);
1416
1417
if (rc || (flags & CMD_ASYNC))
1418
return rc;
1419
1420
res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1421
if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1422
IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1423
res->hdr.flags);
1424
rc = -EIO;
1425
}
1426
1427
if (rc == 0) {
1428
switch (res->u.add_sta.status) {
1429
case ADD_STA_SUCCESS_MSK:
1430
IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1431
break;
1432
default:
1433
rc = -EIO;
1434
IWL_WARNING("REPLY_ADD_STA failed\n");
1435
break;
1436
}
1437
}
1438
1439
priv->alloc_rxb_skb--;
1440
dev_kfree_skb_any(cmd.meta.u.skb);
1441
1442
return rc;
1443
}
1444
1445
static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
1446
struct ieee80211_key_conf *keyconf,
1447
u8 sta_id)
1448
{
1449
unsigned long flags;
1450
__le16 key_flags = 0;
1451
1452
switch (keyconf->alg) {
1453
case ALG_CCMP:
1454
key_flags |= STA_KEY_FLG_CCMP;
1455
key_flags |= cpu_to_le16(
1456
keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1457
key_flags &= ~STA_KEY_FLG_INVALID;
1458
break;
1459
case ALG_TKIP:
1460
case ALG_WEP:
1461
default:
1462
return -EINVAL;
1463
}
1464
spin_lock_irqsave(&priv->sta_lock, flags);
1465
priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1466
priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1467
memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1468
keyconf->keylen);
1469
1470
memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1471
keyconf->keylen);
1472
priv->stations[sta_id].sta.key.key_flags = key_flags;
1473
priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1474
priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1475
1476
spin_unlock_irqrestore(&priv->sta_lock, flags);
1477
1478
IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1479
iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1480
return 0;
1481
}
1482
1483
static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
1484
{
1485
unsigned long flags;
1486
1487
spin_lock_irqsave(&priv->sta_lock, flags);
1488
memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1489
memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
1490
priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1491
priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1492
priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1493
spin_unlock_irqrestore(&priv->sta_lock, flags);
1494
1495
IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1496
iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1497
return 0;
1498
}
1499
1500
static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
1501
{
1502
struct list_head *element;
1503
1504
IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1505
priv->frames_count);
1506
1507
while (!list_empty(&priv->free_frames)) {
1508
element = priv->free_frames.next;
1509
list_del(element);
1510
kfree(list_entry(element, struct iwl3945_frame, list));
1511
priv->frames_count--;
1512
}
1513
1514
if (priv->frames_count) {
1515
IWL_WARNING("%d frames still in use. Did we lose one?\n",
1516
priv->frames_count);
1517
priv->frames_count = 0;
1518
}
1519
}
1520
1521
static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
1522
{
1523
struct iwl3945_frame *frame;
1524
struct list_head *element;
1525
if (list_empty(&priv->free_frames)) {
1526
frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1527
if (!frame) {
1528
IWL_ERROR("Could not allocate frame!\n");
1529
return NULL;
1530
}
1531
1532
priv->frames_count++;
1533
return frame;
1534
}
1535
1536
element = priv->free_frames.next;
1537
list_del(element);
1538
return list_entry(element, struct iwl3945_frame, list);
1539
}
1540
1541
static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
1542
{
1543
memset(frame, 0, sizeof(*frame));
1544
list_add(&frame->list, &priv->free_frames);
1545
}
1546
1547
unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
1548
struct ieee80211_hdr *hdr,
1549
const u8 *dest, int left)
1550
{
1551
1552
if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1553
((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1554
(priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1555
return 0;
1556
1557
if (priv->ibss_beacon->len > left)
1558
return 0;
1559
1560
memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1561
1562
return priv->ibss_beacon->len;
1563
}
1564
1565
static int iwl3945_rate_index_from_plcp(int plcp)
1566
{
1567
int i = 0;
1568
1569
for (i = 0; i < IWL_RATE_COUNT; i++)
1570
if (iwl3945_rates[i].plcp == plcp)
1571
return i;
1572
return -1;
1573
}
1574
1575
static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
1576
{
1577
u8 i;
1578
1579
for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1580
i = iwl3945_rates[i].next_ieee) {
1581
if (rate_mask & (1 << i))
1582
return iwl3945_rates[i].plcp;
1583
}
1584
1585
return IWL_RATE_INVALID;
1586
}
1587
1588
static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
1589
{
1590
struct iwl3945_frame *frame;
1591
unsigned int frame_size;
1592
int rc;
1593
u8 rate;
1594
1595
frame = iwl3945_get_free_frame(priv);
1596
1597
if (!frame) {
1598
IWL_ERROR("Could not obtain free frame buffer for beacon "
1599
"command.\n");
1600
return -ENOMEM;
1601
}
1602
1603
if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1604
rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
1605
0xFF0);
1606
if (rate == IWL_INVALID_RATE)
1607
rate = IWL_RATE_6M_PLCP;
1608
} else {
1609
rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1610
if (rate == IWL_INVALID_RATE)
1611
rate = IWL_RATE_1M_PLCP;
1612
}
1613
1614
frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1615
1616
rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1617
&frame->u.cmd[0]);
1618
1619
iwl3945_free_frame(priv, frame);
1620
1621
return rc;
1622
}
1623
1624
/******************************************************************************
1625
*
1626
* EEPROM related functions
1627
*
1628
******************************************************************************/
1629
1630
static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
1631
{
1632
memcpy(mac, priv->eeprom.mac_address, 6);
1633
}
1634
1635
/**
1636
* iwl3945_eeprom_init - read EEPROM contents
1637
*
1638
* Load the EEPROM contents from adapter into priv->eeprom
1639
*
1640
* NOTE: This routine uses the non-debug IO access functions.
1641
*/
1642
int iwl3945_eeprom_init(struct iwl3945_priv *priv)
1643
{
1644
u16 *e = (u16 *)&priv->eeprom;
1645
u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
1646
u32 r;
1647
int sz = sizeof(priv->eeprom);
1648
int rc;
1649
int i;
1650
u16 addr;
1651
1652
/* The EEPROM structure has several padding buffers within it
1653
* and when adding new EEPROM maps is subject to programmer errors
1654
* which may be very difficult to identify without explicitly
1655
* checking the resulting size of the eeprom map. */
1656
BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1657
1658
if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1659
IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1660
return -ENOENT;
1661
}
1662
1663
/* Make sure driver (instead of uCode) is allowed to read EEPROM */
1664
rc = iwl3945_eeprom_acquire_semaphore(priv);
1665
if (rc < 0) {
1666
IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1667
return -ENOENT;
1668
}
1669
1670
/* eeprom is an array of 16bit values */
1671
for (addr = 0; addr < sz; addr += sizeof(u16)) {
1672
_iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1673
_iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1674
1675
for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1676
i += IWL_EEPROM_ACCESS_DELAY) {
1677
r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
1678
if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1679
break;
1680
udelay(IWL_EEPROM_ACCESS_DELAY);
1681
}
1682
1683
if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1684
IWL_ERROR("Time out reading EEPROM[%d]", addr);
1685
return -ETIMEDOUT;
1686
}
1687
e[addr / 2] = le16_to_cpu(r >> 16);
1688
}
1689
1690
return 0;
1691
}
1692
1693
/******************************************************************************
1694
*
1695
* Misc. internal state and helper functions
1696
*
1697
******************************************************************************/
1698
#ifdef CONFIG_IWL3945_DEBUG
1699
1700
/**
1701
* iwl3945_report_frame - dump frame to syslog during debug sessions
1702
*
1703
* You may hack this function to show different aspects of received frames,
1704
* including selective frame dumps.
1705
* group100 parameter selects whether to show 1 out of 100 good frames.
1706
*/
1707
void iwl3945_report_frame(struct iwl3945_priv *priv,
1708
struct iwl3945_rx_packet *pkt,
1709
struct ieee80211_hdr *header, int group100)
1710
{
1711
u32 to_us;
1712
u32 print_summary = 0;
1713
u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1714
u32 hundred = 0;
1715
u32 dataframe = 0;
1716
u16 fc;
1717
u16 seq_ctl;
1718
u16 channel;
1719
u16 phy_flags;
1720
int rate_sym;
1721
u16 length;
1722
u16 status;
1723
u16 bcn_tmr;
1724
u32 tsf_low;
1725
u64 tsf;
1726
u8 rssi;
1727
u8 agc;
1728
u16 sig_avg;
1729
u16 noise_diff;
1730
struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1731
struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1732
struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
1733
u8 *data = IWL_RX_DATA(pkt);
1734
1735
/* MAC header */
1736
fc = le16_to_cpu(header->frame_control);
1737
seq_ctl = le16_to_cpu(header->seq_ctrl);
1738
1739
/* metadata */
1740
channel = le16_to_cpu(rx_hdr->channel);
1741
phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1742
rate_sym = rx_hdr->rate;
1743
length = le16_to_cpu(rx_hdr->len);
1744
1745
/* end-of-frame status and timestamp */
1746
status = le32_to_cpu(rx_end->status);
1747
bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1748
tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1749
tsf = le64_to_cpu(rx_end->timestamp);
1750
1751
/* signal statistics */
1752
rssi = rx_stats->rssi;
1753
agc = rx_stats->agc;
1754
sig_avg = le16_to_cpu(rx_stats->sig_avg);
1755
noise_diff = le16_to_cpu(rx_stats->noise_diff);
1756
1757
to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1758
1759
/* if data frame is to us and all is good,
1760
* (optionally) print summary for only 1 out of every 100 */
1761
if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1762
(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1763
dataframe = 1;
1764
if (!group100)
1765
print_summary = 1; /* print each frame */
1766
else if (priv->framecnt_to_us < 100) {
1767
priv->framecnt_to_us++;
1768
print_summary = 0;
1769
} else {
1770
priv->framecnt_to_us = 0;
1771
print_summary = 1;
1772
hundred = 1;
1773
}
1774
} else {
1775
/* print summary for all other frames */
1776
print_summary = 1;
1777
}
1778
1779
if (print_summary) {
1780
char *title;
1781
u32 rate;
1782
1783
if (hundred)
1784
title = "100Frames";
1785
else if (fc & IEEE80211_FCTL_RETRY)
1786
title = "Retry";
1787
else if (ieee80211_is_assoc_response(fc))
1788
title = "AscRsp";
1789
else if (ieee80211_is_reassoc_response(fc))
1790
title = "RasRsp";
1791
else if (ieee80211_is_probe_response(fc)) {
1792
title = "PrbRsp";
1793
print_dump = 1; /* dump frame contents */
1794
} else if (ieee80211_is_beacon(fc)) {
1795
title = "Beacon";
1796
print_dump = 1; /* dump frame contents */
1797
} else if (ieee80211_is_atim(fc))
1798
title = "ATIM";
1799
else if (ieee80211_is_auth(fc))
1800
title = "Auth";
1801
else if (ieee80211_is_deauth(fc))
1802
title = "DeAuth";
1803
else if (ieee80211_is_disassoc(fc))
1804
title = "DisAssoc";
1805
else
1806
title = "Frame";
1807
1808
rate = iwl3945_rate_index_from_plcp(rate_sym);
1809
if (rate == -1)
1810
rate = 0;
1811
else
1812
rate = iwl3945_rates[rate].ieee / 2;
1813
1814
/* print frame summary.
1815
* MAC addresses show just the last byte (for brevity),
1816
* but you can hack it to show more, if you'd like to. */
1817
if (dataframe)
1818
IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1819
"len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1820
title, fc, header->addr1[5],
1821
length, rssi, channel, rate);
1822
else {
1823
/* src/dst addresses assume managed mode */
1824
IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1825
"src=0x%02x, rssi=%u, tim=%lu usec, "
1826
"phy=0x%02x, chnl=%d\n",
1827
title, fc, header->addr1[5],
1828
header->addr3[5], rssi,
1829
tsf_low - priv->scan_start_tsf,
1830
phy_flags, channel);
1831
}
1832
}
1833
if (print_dump)
1834
iwl3945_print_hex_dump(IWL_DL_RX, data, length);
1835
}
1836
#endif
1837
1838
static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
1839
{
1840
if (priv->hw_setting.shared_virt)
1841
pci_free_consistent(priv->pci_dev,
1842
sizeof(struct iwl3945_shared),
1843
priv->hw_setting.shared_virt,
1844
priv->hw_setting.shared_phys);
1845
}
1846
1847
/**
1848
* iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1849
*
1850
* return : set the bit for each supported rate insert in ie
1851
*/
1852
static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1853
u16 basic_rate, int *left)
1854
{
1855
u16 ret_rates = 0, bit;
1856
int i;
1857
u8 *cnt = ie;
1858
u8 *rates = ie + 1;
1859
1860
for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1861
if (bit & supported_rate) {
1862
ret_rates |= bit;
1863
rates[*cnt] = iwl3945_rates[i].ieee |
1864
((bit & basic_rate) ? 0x80 : 0x00);
1865
(*cnt)++;
1866
(*left)--;
1867
if ((*left <= 0) ||
1868
(*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1869
break;
1870
}
1871
}
1872
1873
return ret_rates;
1874
}
1875
1876
/**
1877
* iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1878
*/
1879
static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
1880
struct ieee80211_mgmt *frame,
1881
int left, int is_direct)
1882
{
1883
int len = 0;
1884
u8 *pos = NULL;
1885
u16 active_rates, ret_rates, cck_rates;
1886
1887
/* Make sure there is enough space for the probe request,
1888
* two mandatory IEs and the data */
1889
left -= 24;
1890
if (left < 0)
1891
return 0;
1892
len += 24;
1893
1894
frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1895
memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
1896
memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1897
memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
1898
frame->seq_ctrl = 0;
1899
1900
/* fill in our indirect SSID IE */
1901
/* ...next IE... */
1902
1903
left -= 2;
1904
if (left < 0)
1905
return 0;
1906
len += 2;
1907
pos = &(frame->u.probe_req.variable[0]);
1908
*pos++ = WLAN_EID_SSID;
1909
*pos++ = 0;
1910
1911
/* fill in our direct SSID IE... */
1912
if (is_direct) {
1913
/* ...next IE... */
1914
left -= 2 + priv->essid_len;
1915
if (left < 0)
1916
return 0;
1917
/* ... fill it in... */
1918
*pos++ = WLAN_EID_SSID;
1919
*pos++ = priv->essid_len;
1920
memcpy(pos, priv->essid, priv->essid_len);
1921
pos += priv->essid_len;
1922
len += 2 + priv->essid_len;
1923
}
1924
1925
/* fill in supported rate */
1926
/* ...next IE... */
1927
left -= 2;
1928
if (left < 0)
1929
return 0;
1930
1931
/* ... fill it in... */
1932
*pos++ = WLAN_EID_SUPP_RATES;
1933
*pos = 0;
1934
1935
priv->active_rate = priv->rates_mask;
1936
active_rates = priv->active_rate;
1937
priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1938
1939
cck_rates = IWL_CCK_RATES_MASK & active_rates;
1940
ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1941
priv->active_rate_basic, &left);
1942
active_rates &= ~ret_rates;
1943
1944
ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1945
priv->active_rate_basic, &left);
1946
active_rates &= ~ret_rates;
1947
1948
len += 2 + *pos;
1949
pos += (*pos) + 1;
1950
if (active_rates == 0)
1951
goto fill_end;
1952
1953
/* fill in supported extended rate */
1954
/* ...next IE... */
1955
left -= 2;
1956
if (left < 0)
1957
return 0;
1958
/* ... fill it in... */
1959
*pos++ = WLAN_EID_EXT_SUPP_RATES;
1960
*pos = 0;
1961
iwl3945_supported_rate_to_ie(pos, active_rates,
1962
priv->active_rate_basic, &left);
1963
if (*pos > 0)
1964
len += 2 + *pos;
1965
1966
fill_end:
1967
return (u16)len;
1968
}
1969
1970
/*
1971
* QoS support
1972
*/
1973
#ifdef CONFIG_IWL3945_QOS
1974
static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1975
struct iwl3945_qosparam_cmd *qos)
1976
{
1977
1978
return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1979
sizeof(struct iwl3945_qosparam_cmd), qos);
1980
}
1981
1982
static void iwl3945_reset_qos(struct iwl3945_priv *priv)
1983
{
1984
u16 cw_min = 15;
1985
u16 cw_max = 1023;
1986
u8 aifs = 2;
1987
u8 is_legacy = 0;
1988
unsigned long flags;
1989
int i;
1990
1991
spin_lock_irqsave(&priv->lock, flags);
1992
priv->qos_data.qos_active = 0;
1993
1994
if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1995
if (priv->qos_data.qos_enable)
1996
priv->qos_data.qos_active = 1;
1997
if (!(priv->active_rate & 0xfff0)) {
1998
cw_min = 31;
1999
is_legacy = 1;
2000
}
2001
} else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2002
if (priv->qos_data.qos_enable)
2003
priv->qos_data.qos_active = 1;
2004
} else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
2005
cw_min = 31;
2006
is_legacy = 1;
2007
}
2008
2009
if (priv->qos_data.qos_active)
2010
aifs = 3;
2011
2012
priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
2013
priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
2014
priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
2015
priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
2016
priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
2017
2018
if (priv->qos_data.qos_active) {
2019
i = 1;
2020
priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
2021
priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
2022
priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
2023
priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2024
priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2025
2026
i = 2;
2027
priv->qos_data.def_qos_parm.ac[i].cw_min =
2028
cpu_to_le16((cw_min + 1) / 2 - 1);
2029
priv->qos_data.def_qos_parm.ac[i].cw_max =
2030
cpu_to_le16(cw_max);
2031
priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2032
if (is_legacy)
2033
priv->qos_data.def_qos_parm.ac[i].edca_txop =
2034
cpu_to_le16(6016);
2035
else
2036
priv->qos_data.def_qos_parm.ac[i].edca_txop =
2037
cpu_to_le16(3008);
2038
priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2039
2040
i = 3;
2041
priv->qos_data.def_qos_parm.ac[i].cw_min =
2042
cpu_to_le16((cw_min + 1) / 4 - 1);
2043
priv->qos_data.def_qos_parm.ac[i].cw_max =
2044
cpu_to_le16((cw_max + 1) / 2 - 1);
2045
priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2046
priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2047
if (is_legacy)
2048
priv->qos_data.def_qos_parm.ac[i].edca_txop =
2049
cpu_to_le16(3264);
2050
else
2051
priv->qos_data.def_qos_parm.ac[i].edca_txop =
2052
cpu_to_le16(1504);
2053
} else {
2054
for (i = 1; i < 4; i++) {
2055
priv->qos_data.def_qos_parm.ac[i].cw_min =
2056
cpu_to_le16(cw_min);
2057
priv->qos_data.def_qos_parm.ac[i].cw_max =
2058
cpu_to_le16(cw_max);
2059
priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
2060
priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2061
priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2062
}
2063
}
2064
IWL_DEBUG_QOS("set QoS to default \n");
2065
2066
spin_unlock_irqrestore(&priv->lock, flags);
2067
}
2068
2069
static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
2070
{
2071
unsigned long flags;
2072
2073
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2074
return;
2075
2076
if (!priv->qos_data.qos_enable)
2077
return;
2078
2079
spin_lock_irqsave(&priv->lock, flags);
2080
priv->qos_data.def_qos_parm.qos_flags = 0;
2081
2082
if (priv->qos_data.qos_cap.q_AP.queue_request &&
2083
!priv->qos_data.qos_cap.q_AP.txop_request)
2084
priv->qos_data.def_qos_parm.qos_flags |=
2085
QOS_PARAM_FLG_TXOP_TYPE_MSK;
2086
2087
if (priv->qos_data.qos_active)
2088
priv->qos_data.def_qos_parm.qos_flags |=
2089
QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2090
2091
spin_unlock_irqrestore(&priv->lock, flags);
2092
2093
if (force || iwl3945_is_associated(priv)) {
2094
IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
2095
priv->qos_data.qos_active);
2096
2097
iwl3945_send_qos_params_command(priv,
2098
&(priv->qos_data.def_qos_parm));
2099
}
2100
}
2101
2102
#endif /* CONFIG_IWL3945_QOS */
2103
/*
2104
* Power management (not Tx power!) functions
2105
*/
2106
#define MSEC_TO_USEC 1024
2107
2108
#define NOSLP __constant_cpu_to_le32(0)
2109
#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
2110
#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2111
#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2112
__constant_cpu_to_le32(X1), \
2113
__constant_cpu_to_le32(X2), \
2114
__constant_cpu_to_le32(X3), \
2115
__constant_cpu_to_le32(X4)}
2116
2117
2118
/* default power management (not Tx power) table values */
2119
/* for tim 0-10 */
2120
static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
2121
{{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2122
{{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2123
{{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2124
{{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2125
{{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2126
{{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2127
};
2128
2129
/* for tim > 10 */
2130
static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
2131
{{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2132
{{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2133
SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2134
{{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2135
SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2136
{{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2137
SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2138
{{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2139
{{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2140
SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2141
};
2142
2143
int iwl3945_power_init_handle(struct iwl3945_priv *priv)
2144
{
2145
int rc = 0, i;
2146
struct iwl3945_power_mgr *pow_data;
2147
int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
2148
u16 pci_pm;
2149
2150
IWL_DEBUG_POWER("Initialize power \n");
2151
2152
pow_data = &(priv->power_data);
2153
2154
memset(pow_data, 0, sizeof(*pow_data));
2155
2156
pow_data->active_index = IWL_POWER_RANGE_0;
2157
pow_data->dtim_val = 0xffff;
2158
2159
memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2160
memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2161
2162
rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2163
if (rc != 0)
2164
return 0;
2165
else {
2166
struct iwl3945_powertable_cmd *cmd;
2167
2168
IWL_DEBUG_POWER("adjust power command flags\n");
2169
2170
for (i = 0; i < IWL_POWER_AC; i++) {
2171
cmd = &pow_data->pwr_range_0[i].cmd;
2172
2173
if (pci_pm & 0x1)
2174
cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2175
else
2176
cmd->flags |= IWL_POWER_PCI_PM_MSK;
2177
}
2178
}
2179
return rc;
2180
}
2181
2182
static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
2183
struct iwl3945_powertable_cmd *cmd, u32 mode)
2184
{
2185
int rc = 0, i;
2186
u8 skip;
2187
u32 max_sleep = 0;
2188
struct iwl3945_power_vec_entry *range;
2189
u8 period = 0;
2190
struct iwl3945_power_mgr *pow_data;
2191
2192
if (mode > IWL_POWER_INDEX_5) {
2193
IWL_DEBUG_POWER("Error invalid power mode \n");
2194
return -1;
2195
}
2196
pow_data = &(priv->power_data);
2197
2198
if (pow_data->active_index == IWL_POWER_RANGE_0)
2199
range = &pow_data->pwr_range_0[0];
2200
else
2201
range = &pow_data->pwr_range_1[1];
2202
2203
memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
2204
2205
#ifdef IWL_MAC80211_DISABLE
2206
if (priv->assoc_network != NULL) {
2207
unsigned long flags;
2208
2209
period = priv->assoc_network->tim.tim_period;
2210
}
2211
#endif /*IWL_MAC80211_DISABLE */
2212
skip = range[mode].no_dtim;
2213
2214
if (period == 0) {
2215
period = 1;
2216
skip = 0;
2217
}
2218
2219
if (skip == 0) {
2220
max_sleep = period;
2221
cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2222
} else {
2223
__le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2224
max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2225
cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2226
}
2227
2228
for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2229
if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2230
cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2231
}
2232
2233
IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2234
IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2235
IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2236
IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2237
le32_to_cpu(cmd->sleep_interval[0]),
2238
le32_to_cpu(cmd->sleep_interval[1]),
2239
le32_to_cpu(cmd->sleep_interval[2]),
2240
le32_to_cpu(cmd->sleep_interval[3]),
2241
le32_to_cpu(cmd->sleep_interval[4]));
2242
2243
return rc;
2244
}
2245
2246
static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
2247
{
2248
u32 final_mode = mode;
2249
int rc;
2250
struct iwl3945_powertable_cmd cmd;
2251
2252
/* If on battery, set to 3,
2253
* if plugged into AC power, set to CAM ("continuously aware mode"),
2254
* else user level */
2255
switch (mode) {
2256
case IWL_POWER_BATTERY:
2257
final_mode = IWL_POWER_INDEX_3;
2258
break;
2259
case IWL_POWER_AC:
2260
final_mode = IWL_POWER_MODE_CAM;
2261
break;
2262
default:
2263
final_mode = mode;
2264
break;
2265
}
2266
2267
iwl3945_update_power_cmd(priv, &cmd, final_mode);
2268
2269
rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2270
2271
if (final_mode == IWL_POWER_MODE_CAM)
2272
clear_bit(STATUS_POWER_PMI, &priv->status);
2273
else
2274
set_bit(STATUS_POWER_PMI, &priv->status);
2275
2276
return rc;
2277
}
2278
2279
int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
2280
{
2281
/* Filter incoming packets to determine if they are targeted toward
2282
* this network, discarding packets coming from ourselves */
2283
switch (priv->iw_mode) {
2284
case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2285
/* packets from our adapter are dropped (echo) */
2286
if (!compare_ether_addr(header->addr2, priv->mac_addr))
2287
return 0;
2288
/* {broad,multi}cast packets to our IBSS go through */
2289
if (is_multicast_ether_addr(header->addr1))
2290
return !compare_ether_addr(header->addr3, priv->bssid);
2291
/* packets to our adapter go through */
2292
return !compare_ether_addr(header->addr1, priv->mac_addr);
2293
case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2294
/* packets from our adapter are dropped (echo) */
2295
if (!compare_ether_addr(header->addr3, priv->mac_addr))
2296
return 0;
2297
/* {broad,multi}cast packets to our BSS go through */
2298
if (is_multicast_ether_addr(header->addr1))
2299
return !compare_ether_addr(header->addr2, priv->bssid);
2300
/* packets to our adapter go through */
2301
return !compare_ether_addr(header->addr1, priv->mac_addr);
2302
}
2303
2304
return 1;
2305
}
2306
2307
#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2308
2309
static const char *iwl3945_get_tx_fail_reason(u32 status)
2310
{
2311
switch (status & TX_STATUS_MSK) {
2312
case TX_STATUS_SUCCESS:
2313
return "SUCCESS";
2314
TX_STATUS_ENTRY(SHORT_LIMIT);
2315
TX_STATUS_ENTRY(LONG_LIMIT);
2316
TX_STATUS_ENTRY(FIFO_UNDERRUN);
2317
TX_STATUS_ENTRY(MGMNT_ABORT);
2318
TX_STATUS_ENTRY(NEXT_FRAG);
2319
TX_STATUS_ENTRY(LIFE_EXPIRE);
2320
TX_STATUS_ENTRY(DEST_PS);
2321
TX_STATUS_ENTRY(ABORTED);
2322
TX_STATUS_ENTRY(BT_RETRY);
2323
TX_STATUS_ENTRY(STA_INVALID);
2324
TX_STATUS_ENTRY(FRAG_DROPPED);
2325
TX_STATUS_ENTRY(TID_DISABLE);
2326
TX_STATUS_ENTRY(FRAME_FLUSHED);
2327
TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2328
TX_STATUS_ENTRY(TX_LOCKED);
2329
TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2330
}
2331
2332
return "UNKNOWN";
2333
}
2334
2335
/**
2336
* iwl3945_scan_cancel - Cancel any currently executing HW scan
2337
*
2338
* NOTE: priv->mutex is not required before calling this function
2339
*/
2340
static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
2341
{
2342
if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2343
clear_bit(STATUS_SCANNING, &priv->status);
2344
return 0;
2345
}
2346
2347
if (test_bit(STATUS_SCANNING, &priv->status)) {
2348
if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2349
IWL_DEBUG_SCAN("Queuing scan abort.\n");
2350
set_bit(STATUS_SCAN_ABORTING, &priv->status);
2351
queue_work(priv->workqueue, &priv->abort_scan);
2352
2353
} else
2354
IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2355
2356
return test_bit(STATUS_SCANNING, &priv->status);
2357
}
2358
2359
return 0;
2360
}
2361
2362
/**
2363
* iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
2364
* @ms: amount of time to wait (in milliseconds) for scan to abort
2365
*
2366
* NOTE: priv->mutex must be held before calling this function
2367
*/
2368
static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
2369
{
2370
unsigned long now = jiffies;
2371
int ret;
2372
2373
ret = iwl3945_scan_cancel(priv);
2374
if (ret && ms) {
2375
mutex_unlock(&priv->mutex);
2376
while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2377
test_bit(STATUS_SCANNING, &priv->status))
2378
msleep(1);
2379
mutex_lock(&priv->mutex);
2380
2381
return test_bit(STATUS_SCANNING, &priv->status);
2382
}
2383
2384
return ret;
2385
}
2386
2387
static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
2388
{
2389
/* Reset ieee stats */
2390
2391
/* We don't reset the net_device_stats (ieee->stats) on
2392
* re-association */
2393
2394
priv->last_seq_num = -1;
2395
priv->last_frag_num = -1;
2396
priv->last_packet_time = 0;
2397
2398
iwl3945_scan_cancel(priv);
2399
}
2400
2401
#define MAX_UCODE_BEACON_INTERVAL 1024
2402
#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2403
2404
static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
2405
{
2406
u16 new_val = 0;
2407
u16 beacon_factor = 0;
2408
2409
beacon_factor =
2410
(beacon_val + MAX_UCODE_BEACON_INTERVAL)
2411
/ MAX_UCODE_BEACON_INTERVAL;
2412
new_val = beacon_val / beacon_factor;
2413
2414
return cpu_to_le16(new_val);
2415
}
2416
2417
static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
2418
{
2419
u64 interval_tm_unit;
2420
u64 tsf, result;
2421
unsigned long flags;
2422
struct ieee80211_conf *conf = NULL;
2423
u16 beacon_int = 0;
2424
2425
conf = ieee80211_get_hw_conf(priv->hw);
2426
2427
spin_lock_irqsave(&priv->lock, flags);
2428
priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2429
priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2430
2431
priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2432
2433
tsf = priv->timestamp1;
2434
tsf = ((tsf << 32) | priv->timestamp0);
2435
2436
beacon_int = priv->beacon_int;
2437
spin_unlock_irqrestore(&priv->lock, flags);
2438
2439
if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2440
if (beacon_int == 0) {
2441
priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2442
priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2443
} else {
2444
priv->rxon_timing.beacon_interval =
2445
cpu_to_le16(beacon_int);
2446
priv->rxon_timing.beacon_interval =
2447
iwl3945_adjust_beacon_interval(
2448
le16_to_cpu(priv->rxon_timing.beacon_interval));
2449
}
2450
2451
priv->rxon_timing.atim_window = 0;
2452
} else {
2453
priv->rxon_timing.beacon_interval =
2454
iwl3945_adjust_beacon_interval(conf->beacon_int);
2455
/* TODO: we need to get atim_window from upper stack
2456
* for now we set to 0 */
2457
priv->rxon_timing.atim_window = 0;
2458
}
2459
2460
interval_tm_unit =
2461
(le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2462
result = do_div(tsf, interval_tm_unit);
2463
priv->rxon_timing.beacon_init_val =
2464
cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2465
2466
IWL_DEBUG_ASSOC
2467
("beacon interval %d beacon timer %d beacon tim %d\n",
2468
le16_to_cpu(priv->rxon_timing.beacon_interval),
2469
le32_to_cpu(priv->rxon_timing.beacon_init_val),
2470
le16_to_cpu(priv->rxon_timing.atim_window));
2471
}
2472
2473
static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
2474
{
2475
if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2476
IWL_ERROR("APs don't scan.\n");
2477
return 0;
2478
}
2479
2480
if (!iwl3945_is_ready_rf(priv)) {
2481
IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2482
return -EIO;
2483
}
2484
2485
if (test_bit(STATUS_SCANNING, &priv->status)) {
2486
IWL_DEBUG_SCAN("Scan already in progress.\n");
2487
return -EAGAIN;
2488
}
2489
2490
if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2491
IWL_DEBUG_SCAN("Scan request while abort pending. "
2492
"Queuing.\n");
2493
return -EAGAIN;
2494
}
2495
2496
IWL_DEBUG_INFO("Starting scan...\n");
2497
priv->scan_bands = 2;
2498
set_bit(STATUS_SCANNING, &priv->status);
2499
priv->scan_start = jiffies;
2500
priv->scan_pass_start = priv->scan_start;
2501
2502
queue_work(priv->workqueue, &priv->request_scan);
2503
2504
return 0;
2505
}
2506
2507
static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
2508
{
2509
struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
2510
2511
if (hw_decrypt)
2512
rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2513
else
2514
rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2515
2516
return 0;
2517
}
2518
2519
static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode)
2520
{
2521
if (phymode == MODE_IEEE80211A) {
2522
priv->staging_rxon.flags &=
2523
~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2524
| RXON_FLG_CCK_MSK);
2525
priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2526
} else {
2527
/* Copied from iwl3945_bg_post_associate() */
2528
if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2529
priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2530
else
2531
priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2532
2533
if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2534
priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2535
2536
priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2537
priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2538
priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2539
}
2540
}
2541
2542
/*
2543
* initialize rxon structure with default values from eeprom
2544
*/
2545
static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
2546
{
2547
const struct iwl3945_channel_info *ch_info;
2548
2549
memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2550
2551
switch (priv->iw_mode) {
2552
case IEEE80211_IF_TYPE_AP:
2553
priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2554
break;
2555
2556
case IEEE80211_IF_TYPE_STA:
2557
priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2558
priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2559
break;
2560
2561
case IEEE80211_IF_TYPE_IBSS:
2562
priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2563
priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2564
priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2565
RXON_FILTER_ACCEPT_GRP_MSK;
2566
break;
2567
2568
case IEEE80211_IF_TYPE_MNTR:
2569
priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2570
priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2571
RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2572
break;
2573
}
2574
2575
#if 0
2576
/* TODO: Figure out when short_preamble would be set and cache from
2577
* that */
2578
if (!hw_to_local(priv->hw)->short_preamble)
2579
priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2580
else
2581
priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2582
#endif
2583
2584
ch_info = iwl3945_get_channel_info(priv, priv->phymode,
2585
le16_to_cpu(priv->staging_rxon.channel));
2586
2587
if (!ch_info)
2588
ch_info = &priv->channel_info[0];
2589
2590
/*
2591
* in some case A channels are all non IBSS
2592
* in this case force B/G channel
2593
*/
2594
if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2595
!(is_channel_ibss(ch_info)))
2596
ch_info = &priv->channel_info[0];
2597
2598
priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2599
if (is_channel_a_band(ch_info))
2600
priv->phymode = MODE_IEEE80211A;
2601
else
2602
priv->phymode = MODE_IEEE80211G;
2603
2604
iwl3945_set_flags_for_phymode(priv, priv->phymode);
2605
2606
priv->staging_rxon.ofdm_basic_rates =
2607
(IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2608
priv->staging_rxon.cck_basic_rates =
2609
(IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2610
}
2611
2612
static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
2613
{
2614
if (mode == IEEE80211_IF_TYPE_IBSS) {
2615
const struct iwl3945_channel_info *ch_info;
2616
2617
ch_info = iwl3945_get_channel_info(priv,
2618
priv->phymode,
2619
le16_to_cpu(priv->staging_rxon.channel));
2620
2621
if (!ch_info || !is_channel_ibss(ch_info)) {
2622
IWL_ERROR("channel %d not IBSS channel\n",
2623
le16_to_cpu(priv->staging_rxon.channel));
2624
return -EINVAL;
2625
}
2626
}
2627
2628
priv->iw_mode = mode;
2629
2630
iwl3945_connection_init_rx_config(priv);
2631
memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2632
2633
iwl3945_clear_stations_table(priv);
2634
2635
/* dont commit rxon if rf-kill is on*/
2636
if (!iwl3945_is_ready_rf(priv))
2637
return -EAGAIN;
2638
2639
cancel_delayed_work(&priv->scan_check);
2640
if (iwl3945_scan_cancel_timeout(priv, 100)) {
2641
IWL_WARNING("Aborted scan still in progress after 100ms\n");
2642
IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2643
return -EAGAIN;
2644
}
2645
2646
iwl3945_commit_rxon(priv);
2647
2648
return 0;
2649
}
2650
2651
static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
2652
struct ieee80211_tx_control *ctl,
2653
struct iwl3945_cmd *cmd,
2654
struct sk_buff *skb_frag,
2655
int last_frag)
2656
{
2657
struct iwl3945_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
2658
2659
switch (keyinfo->alg) {
2660
case ALG_CCMP:
2661
cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2662
memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2663
IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2664
break;
2665
2666
case ALG_TKIP:
2667
#if 0
2668
cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2669
2670
if (last_frag)
2671
memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2672
8);
2673
else
2674
memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2675
#endif
2676
break;
2677
2678
case ALG_WEP:
2679
cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2680
(ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2681
2682
if (keyinfo->keylen == 13)
2683
cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2684
2685
memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2686
2687
IWL_DEBUG_TX("Configuring packet for WEP encryption "
2688
"with key %d\n", ctl->key_idx);
2689
break;
2690
2691
case ALG_NONE:
2692
IWL_DEBUG_TX("Tx packet in the clear (encrypt requested).\n");
2693
break;
2694
2695
default:
2696
printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2697
break;
2698
}
2699
}
2700
2701
/*
2702
* handle build REPLY_TX command notification.
2703
*/
2704
static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2705
struct iwl3945_cmd *cmd,
2706
struct ieee80211_tx_control *ctrl,
2707
struct ieee80211_hdr *hdr,
2708
int is_unicast, u8 std_id)
2709
{
2710
__le16 *qc;
2711
u16 fc = le16_to_cpu(hdr->frame_control);
2712
__le32 tx_flags = cmd->cmd.tx.tx_flags;
2713
2714
cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2715
if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2716
tx_flags |= TX_CMD_FLG_ACK_MSK;
2717
if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2718
tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2719
if (ieee80211_is_probe_response(fc) &&
2720
!(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2721
tx_flags |= TX_CMD_FLG_TSF_MSK;
2722
} else {
2723
tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2724
tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2725
}
2726
2727
cmd->cmd.tx.sta_id = std_id;
2728
if (ieee80211_get_morefrag(hdr))
2729
tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2730
2731
qc = ieee80211_get_qos_ctrl(hdr);
2732
if (qc) {
2733
cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2734
tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2735
} else
2736
tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2737
2738
if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2739
tx_flags |= TX_CMD_FLG_RTS_MSK;
2740
tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2741
} else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2742
tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2743
tx_flags |= TX_CMD_FLG_CTS_MSK;
2744
}
2745
2746
if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2747
tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2748
2749
tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2750
if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2751
if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2752
(fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
2753
cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2754
else
2755
cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2756
} else {
2757
cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2758
#ifdef CONFIG_IWL3945_LEDS
2759
priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2760
#endif
2761
}
2762
2763
cmd->cmd.tx.driver_txop = 0;
2764
cmd->cmd.tx.tx_flags = tx_flags;
2765
cmd->cmd.tx.next_frame_len = 0;
2766
}
2767
2768
/**
2769
* iwl3945_get_sta_id - Find station's index within station table
2770
*/
2771
static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
2772
{
2773
int sta_id;
2774
u16 fc = le16_to_cpu(hdr->frame_control);
2775
2776
/* If this frame is broadcast or management, use broadcast station id */
2777
if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2778
is_multicast_ether_addr(hdr->addr1))
2779
return priv->hw_setting.bcast_sta_id;
2780
2781
switch (priv->iw_mode) {
2782
2783
/* If we are a client station in a BSS network, use the special
2784
* AP station entry (that's the only station we communicate with) */
2785
case IEEE80211_IF_TYPE_STA:
2786
return IWL_AP_ID;
2787
2788
/* If we are an AP, then find the station, or use BCAST */
2789
case IEEE80211_IF_TYPE_AP:
2790
sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2791
if (sta_id != IWL_INVALID_STATION)
2792
return sta_id;
2793
return priv->hw_setting.bcast_sta_id;
2794
2795
/* If this frame is going out to an IBSS network, find the station,
2796
* or create a new station table entry */
2797
case IEEE80211_IF_TYPE_IBSS:
2798
sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2799
if (sta_id != IWL_INVALID_STATION)
2800
return sta_id;
2801
2802
/* Create new station table entry */
2803
sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2804
2805
if (sta_id != IWL_INVALID_STATION)
2806
return sta_id;
2807
2808
IWL_DEBUG_DROP("Station " MAC_FMT " not in station map. "
2809
"Defaulting to broadcast...\n",
2810
MAC_ARG(hdr->addr1));
2811
iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2812
return priv->hw_setting.bcast_sta_id;
2813
2814
default:
2815
IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
2816
return priv->hw_setting.bcast_sta_id;
2817
}
2818
}
2819
2820
/*
2821
* start REPLY_TX command process
2822
*/
2823
static int iwl3945_tx_skb(struct iwl3945_priv *priv,
2824
struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2825
{
2826
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2827
struct iwl3945_tfd_frame *tfd;
2828
u32 *control_flags;
2829
int txq_id = ctl->queue;
2830
struct iwl3945_tx_queue *txq = NULL;
2831
struct iwl3945_queue *q = NULL;
2832
dma_addr_t phys_addr;
2833
dma_addr_t txcmd_phys;
2834
struct iwl3945_cmd *out_cmd = NULL;
2835
u16 len, idx, len_org;
2836
u8 id, hdr_len, unicast;
2837
u8 sta_id;
2838
u16 seq_number = 0;
2839
u16 fc;
2840
__le16 *qc;
2841
u8 wait_write_ptr = 0;
2842
unsigned long flags;
2843
int rc;
2844
2845
spin_lock_irqsave(&priv->lock, flags);
2846
if (iwl3945_is_rfkill(priv)) {
2847
IWL_DEBUG_DROP("Dropping - RF KILL\n");
2848
goto drop_unlock;
2849
}
2850
2851
if (!priv->interface_id) {
2852
IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
2853
goto drop_unlock;
2854
}
2855
2856
if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
2857
IWL_ERROR("ERROR: No TX rate available.\n");
2858
goto drop_unlock;
2859
}
2860
2861
unicast = !is_multicast_ether_addr(hdr->addr1);
2862
id = 0;
2863
2864
fc = le16_to_cpu(hdr->frame_control);
2865
2866
#ifdef CONFIG_IWL3945_DEBUG
2867
if (ieee80211_is_auth(fc))
2868
IWL_DEBUG_TX("Sending AUTH frame\n");
2869
else if (ieee80211_is_assoc_request(fc))
2870
IWL_DEBUG_TX("Sending ASSOC frame\n");
2871
else if (ieee80211_is_reassoc_request(fc))
2872
IWL_DEBUG_TX("Sending REASSOC frame\n");
2873
#endif
2874
2875
/* drop all data frame if we are not associated */
2876
if (!iwl3945_is_associated(priv) && !priv->assoc_id &&
2877
((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
2878
IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2879
goto drop_unlock;
2880
}
2881
2882
spin_unlock_irqrestore(&priv->lock, flags);
2883
2884
hdr_len = iwlwifi_ieee80211_get_hdrlen(fc);
2885
2886
/* Find (or create) index into station table for destination station */
2887
sta_id = iwl3945_get_sta_id(priv, hdr);
2888
if (sta_id == IWL_INVALID_STATION) {
2889
IWL_DEBUG_DROP("Dropping - INVALID STATION: " MAC_FMT "\n",
2890
MAC_ARG(hdr->addr1));
2891
goto drop;
2892
}
2893
2894
IWL_DEBUG_RATE("station Id %d\n", sta_id);
2895
2896
qc = ieee80211_get_qos_ctrl(hdr);
2897
if (qc) {
2898
u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2899
seq_number = priv->stations[sta_id].tid[tid].seq_number &
2900
IEEE80211_SCTL_SEQ;
2901
hdr->seq_ctrl = cpu_to_le16(seq_number) |
2902
(hdr->seq_ctrl &
2903
__constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2904
seq_number += 0x10;
2905
}
2906
2907
/* Descriptor for chosen Tx queue */
2908
txq = &priv->txq[txq_id];
2909
q = &txq->q;
2910
2911
spin_lock_irqsave(&priv->lock, flags);
2912
2913
/* Set up first empty TFD within this queue's circular TFD buffer */
2914
tfd = &txq->bd[q->write_ptr];
2915
memset(tfd, 0, sizeof(*tfd));
2916
control_flags = (u32 *) tfd;
2917
idx = get_cmd_index(q, q->write_ptr, 0);
2918
2919
/* Set up driver data for this TFD */
2920
memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2921
txq->txb[q->write_ptr].skb[0] = skb;
2922
memcpy(&(txq->txb[q->write_ptr].status.control),
2923
ctl, sizeof(struct ieee80211_tx_control));
2924
2925
/* Init first empty entry in queue's array of Tx/cmd buffers */
2926
out_cmd = &txq->cmd[idx];
2927
memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2928
memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2929
2930
/*
2931
* Set up the Tx-command (not MAC!) header.
2932
* Store the chosen Tx queue and TFD index within the sequence field;
2933
* after Tx, uCode's Tx response will return this value so driver can
2934
* locate the frame within the tx queue and do post-tx processing.
2935
*/
2936
out_cmd->hdr.cmd = REPLY_TX;
2937
out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2938
INDEX_TO_SEQ(q->write_ptr)));
2939
2940
/* Copy MAC header from skb into command buffer */
2941
memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2942
2943
/*
2944
* Use the first empty entry in this queue's command buffer array
2945
* to contain the Tx command and MAC header concatenated together
2946
* (payload data will be in another buffer).
2947
* Size of this varies, due to varying MAC header length.
2948
* If end is not dword aligned, we'll have 2 extra bytes at the end
2949
* of the MAC header (device reads on dword boundaries).
2950
* We'll tell device about this padding later.
2951
*/
2952
len = priv->hw_setting.tx_cmd_len +
2953
sizeof(struct iwl3945_cmd_header) + hdr_len;
2954
2955
len_org = len;
2956
len = (len + 3) & ~3;
2957
2958
if (len_org != len)
2959
len_org = 1;
2960
else
2961
len_org = 0;
2962
2963
/* Physical address of this Tx command's header (not MAC header!),
2964
* within command buffer array. */
2965
txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2966
offsetof(struct iwl3945_cmd, hdr);
2967
2968
/* Add buffer containing Tx command and MAC(!) header to TFD's
2969
* first entry */
2970
iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2971
2972
if (ctl->key_idx != -1)
2973
iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
2974
2975
/* Set up TFD's 2nd entry to point directly to remainder of skb,
2976
* if any (802.11 null frames have no payload). */
2977
len = skb->len - hdr_len;
2978
if (len) {
2979
phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2980
len, PCI_DMA_TODEVICE);
2981
iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2982
}
2983
2984
if (!len)
2985
/* If there is no payload, then we use only one Tx buffer */
2986
*control_flags = TFD_CTL_COUNT_SET(1);
2987
else
2988
/* Else use 2 buffers.
2989
* Tell 3945 about any padding after MAC header */
2990
*control_flags = TFD_CTL_COUNT_SET(2) |
2991
TFD_CTL_PAD_SET(U32_PAD(len));
2992
2993
/* Total # bytes to be transmitted */
2994
len = (u16)skb->len;
2995
out_cmd->cmd.tx.len = cpu_to_le16(len);
2996
2997
/* TODO need this for burst mode later on */
2998
iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
2999
3000
/* set is_hcca to 0; it probably will never be implemented */
3001
iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
3002
3003
out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
3004
out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
3005
3006
if (!ieee80211_get_morefrag(hdr)) {
3007
txq->need_update = 1;
3008
if (qc) {
3009
u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
3010
priv->stations[sta_id].tid[tid].seq_number = seq_number;
3011
}
3012
} else {
3013
wait_write_ptr = 1;
3014
txq->need_update = 0;
3015
}
3016
3017
iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
3018
sizeof(out_cmd->cmd.tx));
3019
3020
iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
3021
iwlwifi_ieee80211_get_hdrlen(fc));
3022
3023
/* Tell device the write index *just past* this latest filled TFD */
3024
q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
3025
rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
3026
spin_unlock_irqrestore(&priv->lock, flags);
3027
3028
if (rc)
3029
return rc;
3030
3031
if ((iwl3945_queue_space(q) < q->high_mark)
3032
&& priv->mac80211_registered) {
3033
if (wait_write_ptr) {
3034
spin_lock_irqsave(&priv->lock, flags);
3035
txq->need_update = 1;
3036
iwl3945_tx_queue_update_write_ptr(priv, txq);
3037
spin_unlock_irqrestore(&priv->lock, flags);
3038
}
3039
3040
iwlwifi_ieee80211_stop_queue(priv->hw, ctl->queue);
3041
}
3042
3043
return 0;
3044
3045
drop_unlock:
3046
spin_unlock_irqrestore(&priv->lock, flags);
3047
drop:
3048
return -1;
3049
}
3050
3051
static void iwl3945_set_rate(struct iwl3945_priv *priv)
3052
{
3053
const struct ieee80211_hw_mode *hw = NULL;
3054
struct ieee80211_rate *rate;
3055
int i;
3056
3057
hw = iwl3945_get_hw_mode(priv, priv->phymode);
3058
if (!hw) {
3059
IWL_ERROR("Failed to set rate: unable to get hw mode\n");
3060
return;
3061
}
3062
3063
priv->active_rate = 0;
3064
priv->active_rate_basic = 0;
3065
3066
IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
3067
hw->mode == MODE_IEEE80211A ?
3068
'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
3069
3070
for (i = 0; i < hw->num_rates; i++) {
3071
rate = &(hw->rates[i]);
3072
if ((rate->val < IWL_RATE_COUNT) &&
3073
(rate->flags & IEEE80211_RATE_SUPPORTED)) {
3074
IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
3075
rate->val, iwl3945_rates[rate->val].plcp,
3076
(rate->flags & IEEE80211_RATE_BASIC) ?
3077
"*" : "");
3078
priv->active_rate |= (1 << rate->val);
3079
if (rate->flags & IEEE80211_RATE_BASIC)
3080
priv->active_rate_basic |= (1 << rate->val);
3081
} else
3082
IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
3083
rate->val, iwl3945_rates[rate->val].plcp);
3084
}
3085
3086
IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3087
priv->active_rate, priv->active_rate_basic);
3088
3089
/*
3090
* If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3091
* otherwise set it to the default of all CCK rates and 6, 12, 24 for
3092
* OFDM
3093
*/
3094
if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3095
priv->staging_rxon.cck_basic_rates =
3096
((priv->active_rate_basic &
3097
IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3098
else
3099
priv->staging_rxon.cck_basic_rates =
3100
(IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3101
3102
if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3103
priv->staging_rxon.ofdm_basic_rates =
3104
((priv->active_rate_basic &
3105
(IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3106
IWL_FIRST_OFDM_RATE) & 0xFF;
3107
else
3108
priv->staging_rxon.ofdm_basic_rates =
3109
(IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3110
}
3111
3112
static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
3113
{
3114
unsigned long flags;
3115
3116
if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3117
return;
3118
3119
IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3120
disable_radio ? "OFF" : "ON");
3121
3122
if (disable_radio) {
3123
iwl3945_scan_cancel(priv);
3124
/* FIXME: This is a workaround for AP */
3125
if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3126
spin_lock_irqsave(&priv->lock, flags);
3127
iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3128
CSR_UCODE_SW_BIT_RFKILL);
3129
spin_unlock_irqrestore(&priv->lock, flags);
3130
iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
3131
set_bit(STATUS_RF_KILL_SW, &priv->status);
3132
}
3133
return;
3134
}
3135
3136
spin_lock_irqsave(&priv->lock, flags);
3137
iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3138
3139
clear_bit(STATUS_RF_KILL_SW, &priv->status);
3140
spin_unlock_irqrestore(&priv->lock, flags);
3141
3142
/* wake up ucode */
3143
msleep(10);
3144
3145
spin_lock_irqsave(&priv->lock, flags);
3146
iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3147
if (!iwl3945_grab_nic_access(priv))
3148
iwl3945_release_nic_access(priv);
3149
spin_unlock_irqrestore(&priv->lock, flags);
3150
3151
if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3152
IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3153
"disabled by HW switch\n");
3154
return;
3155
}
3156
3157
queue_work(priv->workqueue, &priv->restart);
3158
return;
3159
}
3160
3161
void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
3162
u32 decrypt_res, struct ieee80211_rx_status *stats)
3163
{
3164
u16 fc =
3165
le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3166
3167
if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3168
return;
3169
3170
if (!(fc & IEEE80211_FCTL_PROTECTED))
3171
return;
3172
3173
IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3174
switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3175
case RX_RES_STATUS_SEC_TYPE_TKIP:
3176
if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3177
RX_RES_STATUS_BAD_ICV_MIC)
3178
stats->flag |= RX_FLAG_MMIC_ERROR;
3179
case RX_RES_STATUS_SEC_TYPE_WEP:
3180
case RX_RES_STATUS_SEC_TYPE_CCMP:
3181
if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3182
RX_RES_STATUS_DECRYPT_OK) {
3183
IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3184
stats->flag |= RX_FLAG_DECRYPTED;
3185
}
3186
break;
3187
3188
default:
3189
break;
3190
}
3191
}
3192
3193
void iwl3945_handle_data_packet_monitor(struct iwl3945_priv *priv,
3194
struct iwl3945_rx_mem_buffer *rxb,
3195
void *data, short len,
3196
struct ieee80211_rx_status *stats,
3197
u16 phy_flags)
3198
{
3199
struct iwl3945_rt_rx_hdr *iwl3945_rt;
3200
3201
/* First cache any information we need before we overwrite
3202
* the information provided in the skb from the hardware */
3203
s8 signal = stats->ssi;
3204
s8 noise = 0;
3205
int rate = stats->rate;
3206
u64 tsf = stats->mactime;
3207
__le16 phy_flags_hw = cpu_to_le16(phy_flags);
3208
3209
/* We received data from the HW, so stop the watchdog */
3210
if (len > IWL_RX_BUF_SIZE - sizeof(*iwl3945_rt)) {
3211
IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
3212
return;
3213
}
3214
3215
/* copy the frame data to write after where the radiotap header goes */
3216
iwl3945_rt = (void *)rxb->skb->data;
3217
memmove(iwl3945_rt->payload, data, len);
3218
3219
iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
3220
iwl3945_rt->rt_hdr.it_pad = 0; /* always good to zero */
3221
3222
/* total header + data */
3223
iwl3945_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl3945_rt));
3224
3225
/* Set the size of the skb to the size of the frame */
3226
skb_put(rxb->skb, sizeof(*iwl3945_rt) + len);
3227
3228
/* Big bitfield of all the fields we provide in radiotap */
3229
iwl3945_rt->rt_hdr.it_present =
3230
cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
3231
(1 << IEEE80211_RADIOTAP_FLAGS) |
3232
(1 << IEEE80211_RADIOTAP_RATE) |
3233
(1 << IEEE80211_RADIOTAP_CHANNEL) |
3234
(1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
3235
(1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
3236
(1 << IEEE80211_RADIOTAP_ANTENNA));
3237
3238
/* Zero the flags, we'll add to them as we go */
3239
iwl3945_rt->rt_flags = 0;
3240
3241
iwl3945_rt->rt_tsf = cpu_to_le64(tsf);
3242
3243
/* Convert to dBm */
3244
iwl3945_rt->rt_dbmsignal = signal;
3245
iwl3945_rt->rt_dbmnoise = noise;
3246
3247
/* Convert the channel frequency and set the flags */
3248
iwl3945_rt->rt_channelMHz = cpu_to_le16(stats->freq);
3249
if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
3250
iwl3945_rt->rt_chbitmask =
3251
cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
3252
else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
3253
iwl3945_rt->rt_chbitmask =
3254
cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
3255
else /* 802.11g */
3256
iwl3945_rt->rt_chbitmask =
3257
cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
3258
3259
rate = iwl3945_rate_index_from_plcp(rate);
3260
if (rate == -1)
3261
iwl3945_rt->rt_rate = 0;
3262
else
3263
iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
3264
3265
/* antenna number */
3266
iwl3945_rt->rt_antenna =
3267
le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
3268
3269
/* set the preamble flag if we have it */
3270
if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
3271
iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3272
3273
IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
3274
3275
stats->flag |= RX_FLAG_RADIOTAP;
3276
iwlwifi_ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3277
rxb->skb = NULL;
3278
}
3279
3280
3281
#define IWL_PACKET_RETRY_TIME HZ
3282
3283
int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
3284
{
3285
u16 sc = le16_to_cpu(header->seq_ctrl);
3286
u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3287
u16 frag = sc & IEEE80211_SCTL_FRAG;
3288
u16 *last_seq, *last_frag;
3289
unsigned long *last_time;
3290
3291
switch (priv->iw_mode) {
3292
case IEEE80211_IF_TYPE_IBSS:{
3293
struct list_head *p;
3294
struct iwl3945_ibss_seq *entry = NULL;
3295
u8 *mac = header->addr2;
3296
int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3297
3298
__list_for_each(p, &priv->ibss_mac_hash[index]) {
3299
entry = list_entry(p, struct iwl3945_ibss_seq, list);
3300
if (!compare_ether_addr(entry->mac, mac))
3301
break;
3302
}
3303
if (p == &priv->ibss_mac_hash[index]) {
3304
entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3305
if (!entry) {
3306
IWL_ERROR("Cannot malloc new mac entry\n");
3307
return 0;
3308
}
3309
memcpy(entry->mac, mac, ETH_ALEN);
3310
entry->seq_num = seq;
3311
entry->frag_num = frag;
3312
entry->packet_time = jiffies;
3313
list_add(&entry->list, &priv->ibss_mac_hash[index]);
3314
return 0;
3315
}
3316
last_seq = &entry->seq_num;
3317
last_frag = &entry->frag_num;
3318
last_time = &entry->packet_time;
3319
break;
3320
}
3321
case IEEE80211_IF_TYPE_STA:
3322
last_seq = &priv->last_seq_num;
3323
last_frag = &priv->last_frag_num;
3324
last_time = &priv->last_packet_time;
3325
break;
3326
default:
3327
return 0;
3328
}
3329
if ((*last_seq == seq) &&
3330
time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3331
if (*last_frag == frag)
3332
goto drop;
3333
if (*last_frag + 1 != frag)
3334
/* out-of-order fragment */
3335
goto drop;
3336
} else
3337
*last_seq = seq;
3338
3339
*last_frag = frag;
3340
*last_time = jiffies;
3341
return 0;
3342
3343
drop:
3344
return 1;
3345
}
3346
3347
#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3348
3349
#include "iwl-spectrum.h"
3350
3351
#define BEACON_TIME_MASK_LOW 0x00FFFFFF
3352
#define BEACON_TIME_MASK_HIGH 0xFF000000
3353
#define TIME_UNIT 1024
3354
3355
/*
3356
* extended beacon time format
3357
* time in usec will be changed into a 32-bit value in 8:24 format
3358
* the high 1 byte is the beacon counts
3359
* the lower 3 bytes is the time in usec within one beacon interval
3360
*/
3361
3362
static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
3363
{
3364
u32 quot;
3365
u32 rem;
3366
u32 interval = beacon_interval * 1024;
3367
3368
if (!interval || !usec)
3369
return 0;
3370
3371
quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3372
rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3373
3374
return (quot << 24) + rem;
3375
}
3376
3377
/* base is usually what we get from ucode with each received frame,
3378
* the same as HW timer counter counting down
3379
*/
3380
3381
static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
3382
{
3383
u32 base_low = base & BEACON_TIME_MASK_LOW;
3384
u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3385
u32 interval = beacon_interval * TIME_UNIT;
3386
u32 res = (base & BEACON_TIME_MASK_HIGH) +
3387
(addon & BEACON_TIME_MASK_HIGH);
3388
3389
if (base_low > addon_low)
3390
res += base_low - addon_low;
3391
else if (base_low < addon_low) {
3392
res += interval + base_low - addon_low;
3393
res += (1 << 24);
3394
} else
3395
res += (1 << 24);
3396
3397
return cpu_to_le32(res);
3398
}
3399
3400
static int iwl3945_get_measurement(struct iwl3945_priv *priv,
3401
struct ieee80211_measurement_params *params,
3402
u8 type)
3403
{
3404
struct iwl3945_spectrum_cmd spectrum;
3405
struct iwl3945_rx_packet *res;
3406
struct iwl3945_host_cmd cmd = {
3407
.id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3408
.data = (void *)&spectrum,
3409
.meta.flags = CMD_WANT_SKB,
3410
};
3411
u32 add_time = le64_to_cpu(params->start_time);
3412
int rc;
3413
int spectrum_resp_status;
3414
int duration = le16_to_cpu(params->duration);
3415
3416
if (iwl3945_is_associated(priv))
3417
add_time =
3418
iwl3945_usecs_to_beacons(
3419
le64_to_cpu(params->start_time) - priv->last_tsf,
3420
le16_to_cpu(priv->rxon_timing.beacon_interval));
3421
3422
memset(&spectrum, 0, sizeof(spectrum));
3423
3424
spectrum.channel_count = cpu_to_le16(1);
3425
spectrum.flags =
3426
RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3427
spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3428
cmd.len = sizeof(spectrum);
3429
spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3430
3431
if (iwl3945_is_associated(priv))
3432
spectrum.start_time =
3433
iwl3945_add_beacon_time(priv->last_beacon_time,
3434
add_time,
3435
le16_to_cpu(priv->rxon_timing.beacon_interval));
3436
else
3437
spectrum.start_time = 0;
3438
3439
spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3440
spectrum.channels[0].channel = params->channel;
3441
spectrum.channels[0].type = type;
3442
if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3443
spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3444
RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3445
3446
rc = iwl3945_send_cmd_sync(priv, &cmd);
3447
if (rc)
3448
return rc;
3449
3450
res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
3451
if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3452
IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3453
rc = -EIO;
3454
}
3455
3456
spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3457
switch (spectrum_resp_status) {
3458
case 0: /* Command will be handled */
3459
if (res->u.spectrum.id != 0xff) {
3460
IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3461
res->u.spectrum.id);
3462
priv->measurement_status &= ~MEASUREMENT_READY;
3463
}
3464
priv->measurement_status |= MEASUREMENT_ACTIVE;
3465
rc = 0;
3466
break;
3467
3468
case 1: /* Command will not be handled */
3469
rc = -EAGAIN;
3470
break;
3471
}
3472
3473
dev_kfree_skb_any(cmd.meta.u.skb);
3474
3475
return rc;
3476
}
3477
#endif
3478
3479
static void iwl3945_txstatus_to_ieee(struct iwl3945_priv *priv,
3480
struct iwl3945_tx_info *tx_sta)
3481
{
3482
3483
tx_sta->status.ack_signal = 0;
3484
tx_sta->status.excessive_retries = 0;
3485
tx_sta->status.queue_length = 0;
3486
tx_sta->status.queue_number = 0;
3487
3488
if (in_interrupt())
3489
iwlwifi_iwlwifi_ieee80211_tx_status_irqsafe(priv->hw,
3490
tx_sta->skb[0], &(tx_sta->status));
3491
else
3492
iwlwifi_ieee80211_tx_status(priv->hw,
3493
tx_sta->skb[0], &(tx_sta->status));
3494
3495
tx_sta->skb[0] = NULL;
3496
}
3497
3498
/**
3499
* iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
3500
*
3501
* When FW advances 'R' index, all entries between old and new 'R' index
3502
* need to be reclaimed. As result, some free space forms. If there is
3503
* enough free space (> low mark), wake the stack that feeds us.
3504
*/
3505
static int iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, int txq_id, int index)
3506
{
3507
struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3508
struct iwl3945_queue *q = &txq->q;
3509
int nfreed = 0;
3510
3511
if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3512
IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3513
"is out of range [0-%d] %d %d.\n", txq_id,
3514
index, q->n_bd, q->write_ptr, q->read_ptr);
3515
return 0;
3516
}
3517
3518
for (index = iwl3945_queue_inc_wrap(index, q->n_bd);
3519
q->read_ptr != index;
3520
q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3521
if (txq_id != IWL_CMD_QUEUE_NUM) {
3522
iwl3945_txstatus_to_ieee(priv,
3523
&(txq->txb[txq->q.read_ptr]));
3524
iwl3945_hw_txq_free_tfd(priv, txq);
3525
} else if (nfreed > 1) {
3526
IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3527
q->write_ptr, q->read_ptr);
3528
queue_work(priv->workqueue, &priv->restart);
3529
}
3530
nfreed++;
3531
}
3532
3533
if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
3534
(txq_id != IWL_CMD_QUEUE_NUM) &&
3535
priv->mac80211_registered)
3536
iwlwifi_ieee80211_wake_queue(priv->hw, txq_id);
3537
3538
3539
return nfreed;
3540
}
3541
3542
static int iwl3945_is_tx_success(u32 status)
3543
{
3544
return (status & 0xFF) == 0x1;
3545
}
3546
3547
/******************************************************************************
3548
*
3549
* Generic RX handler implementations
3550
*
3551
******************************************************************************/
3552
/**
3553
* iwl3945_rx_reply_tx - Handle Tx response
3554
*/
3555
static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
3556
struct iwl3945_rx_mem_buffer *rxb)
3557
{
3558
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3559
u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3560
int txq_id = SEQ_TO_QUEUE(sequence);
3561
int index = SEQ_TO_INDEX(sequence);
3562
struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3563
struct iwlwifi_ieee80211_tx_status *tx_status;
3564
struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3565
u32 status = le32_to_cpu(tx_resp->status);
3566
3567
if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3568
IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3569
"is out of range [0-%d] %d %d\n", txq_id,
3570
index, txq->q.n_bd, txq->q.write_ptr,
3571
txq->q.read_ptr);
3572
return;
3573
}
3574
3575
tx_status = &(txq->txb[txq->q.read_ptr].status);
3576
3577
tx_status->retry_count = tx_resp->failure_frame;
3578
tx_status->queue_number = status;
3579
tx_status->queue_length = tx_resp->bt_kill_count;
3580
tx_status->queue_length |= tx_resp->failure_rts;
3581
3582
tx_status->flags =
3583
iwl3945_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
3584
3585
tx_status->control.tx_rate = iwl3945_rate_index_from_plcp(tx_resp->rate);
3586
3587
IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
3588
txq_id, iwl3945_get_tx_fail_reason(status), status,
3589
tx_resp->rate, tx_resp->failure_frame);
3590
3591
IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3592
if (index != -1)
3593
iwl3945_tx_queue_reclaim(priv, txq_id, index);
3594
3595
if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3596
IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3597
}
3598
3599
3600
static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3601
struct iwl3945_rx_mem_buffer *rxb)
3602
{
3603
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3604
struct iwl3945_alive_resp *palive;
3605
struct delayed_work *pwork;
3606
3607
palive = &pkt->u.alive_frame;
3608
3609
IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3610
"0x%01X 0x%01X\n",
3611
palive->is_valid, palive->ver_type,
3612
palive->ver_subtype);
3613
3614
if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3615
IWL_DEBUG_INFO("Initialization Alive received.\n");
3616
memcpy(&priv->card_alive_init,
3617
&pkt->u.alive_frame,
3618
sizeof(struct iwl3945_init_alive_resp));
3619
pwork = &priv->init_alive_start;
3620
} else {
3621
IWL_DEBUG_INFO("Runtime Alive received.\n");
3622
memcpy(&priv->card_alive, &pkt->u.alive_frame,
3623
sizeof(struct iwl3945_alive_resp));
3624
pwork = &priv->alive_start;
3625
iwl3945_disable_events(priv);
3626
}
3627
3628
/* We delay the ALIVE response by 5ms to
3629
* give the HW RF Kill time to activate... */
3630
if (palive->is_valid == UCODE_VALID_OK)
3631
queue_delayed_work(priv->workqueue, pwork,
3632
msecs_to_jiffies(5));
3633
else
3634
IWL_WARNING("uCode did not respond OK.\n");
3635
}
3636
3637
static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3638
struct iwl3945_rx_mem_buffer *rxb)
3639
{
3640
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3641
3642
IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3643
return;
3644
}
3645
3646
static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3647
struct iwl3945_rx_mem_buffer *rxb)
3648
{
3649
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3650
3651
IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3652
"seq 0x%04X ser 0x%08X\n",
3653
le32_to_cpu(pkt->u.err_resp.error_type),
3654
get_cmd_string(pkt->u.err_resp.cmd_id),
3655
pkt->u.err_resp.cmd_id,
3656
le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3657
le32_to_cpu(pkt->u.err_resp.error_info));
3658
}
3659
3660
#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3661
3662
static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
3663
{
3664
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3665
struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3666
struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
3667
IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3668
le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3669
rxon->channel = csa->channel;
3670
priv->staging_rxon.channel = csa->channel;
3671
}
3672
3673
static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3674
struct iwl3945_rx_mem_buffer *rxb)
3675
{
3676
#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3677
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3678
struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
3679
3680
if (!report->state) {
3681
IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3682
"Spectrum Measure Notification: Start\n");
3683
return;
3684
}
3685
3686
memcpy(&priv->measure_report, report, sizeof(*report));
3687
priv->measurement_status |= MEASUREMENT_READY;
3688
#endif
3689
}
3690
3691
static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3692
struct iwl3945_rx_mem_buffer *rxb)
3693
{
3694
#ifdef CONFIG_IWL3945_DEBUG
3695
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3696
struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
3697
IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3698
sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3699
#endif
3700
}
3701
3702
static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3703
struct iwl3945_rx_mem_buffer *rxb)
3704
{
3705
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3706
IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3707
"notification for %s:\n",
3708
le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3709
iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3710
}
3711
3712
static void iwl3945_bg_beacon_update(struct work_struct *work)
3713
{
3714
struct iwl3945_priv *priv =
3715
container_of(work, struct iwl3945_priv, beacon_update);
3716
struct sk_buff *beacon;
3717
3718
/* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3719
beacon = iwlwifi_ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
3720
3721
if (!beacon) {
3722
IWL_ERROR("update beacon failed\n");
3723
return;
3724
}
3725
3726
mutex_lock(&priv->mutex);
3727
/* new beacon skb is allocated every time; dispose previous.*/
3728
if (priv->ibss_beacon)
3729
dev_kfree_skb(priv->ibss_beacon);
3730
3731
priv->ibss_beacon = beacon;
3732
mutex_unlock(&priv->mutex);
3733
3734
iwl3945_send_beacon_cmd(priv);
3735
}
3736
3737
static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3738
struct iwl3945_rx_mem_buffer *rxb)
3739
{
3740
#ifdef CONFIG_IWL3945_DEBUG
3741
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3742
struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3743
u8 rate = beacon->beacon_notify_hdr.rate;
3744
3745
IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3746
"tsf %d %d rate %d\n",
3747
le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3748
beacon->beacon_notify_hdr.failure_frame,
3749
le32_to_cpu(beacon->ibss_mgr_status),
3750
le32_to_cpu(beacon->high_tsf),
3751
le32_to_cpu(beacon->low_tsf), rate);
3752
#endif
3753
3754
if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3755
(!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3756
queue_work(priv->workqueue, &priv->beacon_update);
3757
}
3758
3759
/* Service response to REPLY_SCAN_CMD (0x80) */
3760
static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3761
struct iwl3945_rx_mem_buffer *rxb)
3762
{
3763
#ifdef CONFIG_IWL3945_DEBUG
3764
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3765
struct iwl3945_scanreq_notification *notif =
3766
(struct iwl3945_scanreq_notification *)pkt->u.raw;
3767
3768
IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3769
#endif
3770
}
3771
3772
/* Service SCAN_START_NOTIFICATION (0x82) */
3773
static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3774
struct iwl3945_rx_mem_buffer *rxb)
3775
{
3776
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3777
struct iwl3945_scanstart_notification *notif =
3778
(struct iwl3945_scanstart_notification *)pkt->u.raw;
3779
priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3780
IWL_DEBUG_SCAN("Scan start: "
3781
"%d [802.11%s] "
3782
"(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3783
notif->channel,
3784
notif->band ? "bg" : "a",
3785
notif->tsf_high,
3786
notif->tsf_low, notif->status, notif->beacon_timer);
3787
}
3788
3789
/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3790
static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3791
struct iwl3945_rx_mem_buffer *rxb)
3792
{
3793
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3794
struct iwl3945_scanresults_notification *notif =
3795
(struct iwl3945_scanresults_notification *)pkt->u.raw;
3796
3797
IWL_DEBUG_SCAN("Scan ch.res: "
3798
"%d [802.11%s] "
3799
"(TSF: 0x%08X:%08X) - %d "
3800
"elapsed=%lu usec (%dms since last)\n",
3801
notif->channel,
3802
notif->band ? "bg" : "a",
3803
le32_to_cpu(notif->tsf_high),
3804
le32_to_cpu(notif->tsf_low),
3805
le32_to_cpu(notif->statistics[0]),
3806
le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3807
jiffies_to_msecs(elapsed_jiffies
3808
(priv->last_scan_jiffies, jiffies)));
3809
3810
priv->last_scan_jiffies = jiffies;
3811
priv->next_scan_jiffies = 0;
3812
}
3813
3814
/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3815
static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3816
struct iwl3945_rx_mem_buffer *rxb)
3817
{
3818
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3819
struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3820
3821
IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3822
scan_notif->scanned_channels,
3823
scan_notif->tsf_low,
3824
scan_notif->tsf_high, scan_notif->status);
3825
3826
/* The HW is no longer scanning */
3827
clear_bit(STATUS_SCAN_HW, &priv->status);
3828
3829
/* The scan completion notification came in, so kill that timer... */
3830
cancel_delayed_work(&priv->scan_check);
3831
3832
IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3833
(priv->scan_bands == 2) ? "2.4" : "5.2",
3834
jiffies_to_msecs(elapsed_jiffies
3835
(priv->scan_pass_start, jiffies)));
3836
3837
/* Remove this scanned band from the list
3838
* of pending bands to scan */
3839
priv->scan_bands--;
3840
3841
/* If a request to abort was given, or the scan did not succeed
3842
* then we reset the scan state machine and terminate,
3843
* re-queuing another scan if one has been requested */
3844
if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3845
IWL_DEBUG_INFO("Aborted scan completed.\n");
3846
clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3847
} else {
3848
/* If there are more bands on this scan pass reschedule */
3849
if (priv->scan_bands > 0)
3850
goto reschedule;
3851
}
3852
3853
priv->last_scan_jiffies = jiffies;
3854
priv->next_scan_jiffies = 0;
3855
IWL_DEBUG_INFO("Setting scan to off\n");
3856
3857
clear_bit(STATUS_SCANNING, &priv->status);
3858
3859
IWL_DEBUG_INFO("Scan took %dms\n",
3860
jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3861
3862
queue_work(priv->workqueue, &priv->scan_completed);
3863
3864
return;
3865
3866
reschedule:
3867
priv->scan_pass_start = jiffies;
3868
queue_work(priv->workqueue, &priv->request_scan);
3869
}
3870
3871
/* Handle notification from uCode that card's power state is changing
3872
* due to software, hardware, or critical temperature RFKILL */
3873
static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3874
struct iwl3945_rx_mem_buffer *rxb)
3875
{
3876
struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3877
u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3878
unsigned long status = priv->status;
3879
3880
IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3881
(flags & HW_CARD_DISABLED) ? "Kill" : "On",
3882
(flags & SW_CARD_DISABLED) ? "Kill" : "On");
3883
3884
iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3885
CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3886
3887
if (flags & HW_CARD_DISABLED)
3888
set_bit(STATUS_RF_KILL_HW, &priv->status);
3889
else
3890
clear_bit(STATUS_RF_KILL_HW, &priv->status);
3891
3892
3893
if (flags & SW_CARD_DISABLED)
3894
set_bit(STATUS_RF_KILL_SW, &priv->status);
3895
else
3896
clear_bit(STATUS_RF_KILL_SW, &priv->status);
3897
3898
iwl3945_scan_cancel(priv);
3899
3900
if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3901
test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3902
(test_bit(STATUS_RF_KILL_SW, &status) !=
3903
test_bit(STATUS_RF_KILL_SW, &priv->status)))
3904
queue_work(priv->workqueue, &priv->rf_kill);
3905
else
3906
wake_up_interruptible(&priv->wait_command_queue);
3907
}
3908
3909
/**
3910
* iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3911
*
3912
* Setup the RX handlers for each of the reply types sent from the uCode
3913
* to the host.
3914
*
3915
* This function chains into the hardware specific files for them to setup
3916
* any hardware specific handlers as well.
3917
*/
3918
static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
3919
{
3920
priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3921
priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3922
priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3923
priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3924
priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3925
iwl3945_rx_spectrum_measure_notif;
3926
priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3927
priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3928
iwl3945_rx_pm_debug_statistics_notif;
3929
priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3930
3931
/*
3932
* The same handler is used for both the REPLY to a discrete
3933
* statistics request from the host as well as for the periodic
3934
* statistics notifications (after received beacons) from the uCode.
3935
*/
3936
priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3937
priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3938
3939
priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3940
priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3941
priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3942
iwl3945_rx_scan_results_notif;
3943
priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3944
iwl3945_rx_scan_complete_notif;
3945
priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3946
priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
3947
3948
/* Set up hardware specific Rx handlers */
3949
iwl3945_hw_rx_handler_setup(priv);
3950
}
3951
3952
/**
3953
* iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3954
* @rxb: Rx buffer to reclaim
3955
*
3956
* If an Rx buffer has an async callback associated with it the callback
3957
* will be executed. The attached skb (if present) will only be freed
3958
* if the callback returns 1
3959
*/
3960
static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3961
struct iwl3945_rx_mem_buffer *rxb)
3962
{
3963
struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3964
u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3965
int txq_id = SEQ_TO_QUEUE(sequence);
3966
int index = SEQ_TO_INDEX(sequence);
3967
int huge = sequence & SEQ_HUGE_FRAME;
3968
int cmd_index;
3969
struct iwl3945_cmd *cmd;
3970
3971
/* If a Tx command is being handled and it isn't in the actual
3972
* command queue then there a command routing bug has been introduced
3973
* in the queue management code. */
3974
if (txq_id != IWL_CMD_QUEUE_NUM)
3975
IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3976
txq_id, pkt->hdr.cmd);
3977
BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3978
3979
cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3980
cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3981
3982
/* Input error checking is done when commands are added to queue. */
3983
if (cmd->meta.flags & CMD_WANT_SKB) {
3984
cmd->meta.source->u.skb = rxb->skb;
3985
rxb->skb = NULL;
3986
} else if (cmd->meta.u.callback &&
3987
!cmd->meta.u.callback(priv, cmd, rxb->skb))
3988
rxb->skb = NULL;
3989
3990
iwl3945_tx_queue_reclaim(priv, txq_id, index);
3991
3992
if (!(cmd->meta.flags & CMD_ASYNC)) {
3993
clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3994
wake_up_interruptible(&priv->wait_command_queue);
3995
}
3996
}
3997
3998
/************************** RX-FUNCTIONS ****************************/
3999
/*
4000
* Rx theory of operation
4001
*
4002
* The host allocates 32 DMA target addresses and passes the host address
4003
* to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
4004
* 0 to 31
4005
*
4006
* Rx Queue Indexes
4007
* The host/firmware share two index registers for managing the Rx buffers.
4008
*
4009
* The READ index maps to the first position that the firmware may be writing
4010
* to -- the driver can read up to (but not including) this position and get
4011
* good data.
4012
* The READ index is managed by the firmware once the card is enabled.
4013
*
4014
* The WRITE index maps to the last position the driver has read from -- the
4015
* position preceding WRITE is the last slot the firmware can place a packet.
4016
*
4017
* The queue is empty (no good data) if WRITE = READ - 1, and is full if
4018
* WRITE = READ.
4019
*
4020
* During initialization, the host sets up the READ queue position to the first
4021
* INDEX position, and WRITE to the last (READ - 1 wrapped)
4022
*
4023
* When the firmware places a packet in a buffer, it will advance the READ index
4024
* and fire the RX interrupt. The driver can then query the READ index and
4025
* process as many packets as possible, moving the WRITE index forward as it
4026
* resets the Rx queue buffers with new memory.
4027
*
4028
* The management in the driver is as follows:
4029
* + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
4030
* iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
4031
* to replenish the iwl->rxq->rx_free.
4032
* + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
4033
* iwl->rxq is replenished and the READ INDEX is updated (updating the
4034
* 'processed' and 'read' driver indexes as well)
4035
* + A received packet is processed and handed to the kernel network stack,
4036
* detached from the iwl->rxq. The driver 'processed' index is updated.
4037
* + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
4038
* list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
4039
* INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
4040
* were enough free buffers and RX_STALLED is set it is cleared.
4041
*
4042
*
4043
* Driver sequence:
4044
*
4045
* iwl3945_rx_queue_alloc() Allocates rx_free
4046
* iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
4047
* iwl3945_rx_queue_restock
4048
* iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
4049
* queue, updates firmware pointers, and updates
4050
* the WRITE index. If insufficient rx_free buffers
4051
* are available, schedules iwl3945_rx_replenish
4052
*
4053
* -- enable interrupts --
4054
* ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
4055
* READ INDEX, detaching the SKB from the pool.
4056
* Moves the packet buffer from queue to rx_used.
4057
* Calls iwl3945_rx_queue_restock to refill any empty
4058
* slots.
4059
* ...
4060
*
4061
*/
4062
4063
/**
4064
* iwl3945_rx_queue_space - Return number of free slots available in queue.
4065
*/
4066
static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
4067
{
4068
int s = q->read - q->write;
4069
if (s <= 0)
4070
s += RX_QUEUE_SIZE;
4071
/* keep some buffer to not confuse full and empty queue */
4072
s -= 2;
4073
if (s < 0)
4074
s = 0;
4075
return s;
4076
}
4077
4078
/**
4079
* iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
4080
*/
4081
int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
4082
{
4083
u32 reg = 0;
4084
int rc = 0;
4085
unsigned long flags;
4086
4087
spin_lock_irqsave(&q->lock, flags);
4088
4089
if (q->need_update == 0)
4090
goto exit_unlock;
4091
4092
/* If power-saving is in use, make sure device is awake */
4093
if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4094
reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
4095
4096
if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4097
iwl3945_set_bit(priv, CSR_GP_CNTRL,
4098
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4099
goto exit_unlock;
4100
}
4101
4102
rc = iwl3945_grab_nic_access(priv);
4103
if (rc)
4104
goto exit_unlock;
4105
4106
/* Device expects a multiple of 8 */
4107
iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
4108
q->write & ~0x7);
4109
iwl3945_release_nic_access(priv);
4110
4111
/* Else device is assumed to be awake */
4112
} else
4113
/* Device expects a multiple of 8 */
4114
iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
4115
4116
4117
q->need_update = 0;
4118
4119
exit_unlock:
4120
spin_unlock_irqrestore(&q->lock, flags);
4121
return rc;
4122
}
4123
4124
/**
4125
* iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
4126
*/
4127
static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
4128
dma_addr_t dma_addr)
4129
{
4130
return cpu_to_le32((u32)dma_addr);
4131
}
4132
4133
/**
4134
* iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
4135
*
4136
* If there are slots in the RX queue that need to be restocked,
4137
* and we have free pre-allocated buffers, fill the ranks as much
4138
* as we can, pulling from rx_free.
4139
*
4140
* This moves the 'write' index forward to catch up with 'processed', and
4141
* also updates the memory address in the firmware to reference the new
4142
* target buffer.
4143
*/
4144
static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
4145
{
4146
struct iwl3945_rx_queue *rxq = &priv->rxq;
4147
struct list_head *element;
4148
struct iwl3945_rx_mem_buffer *rxb;
4149
unsigned long flags;
4150
int write, rc;
4151
4152
spin_lock_irqsave(&rxq->lock, flags);
4153
write = rxq->write & ~0x7;
4154
while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
4155
/* Get next free Rx buffer, remove from free list */
4156
element = rxq->rx_free.next;
4157
rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
4158
list_del(element);
4159
4160
/* Point to Rx buffer via next RBD in circular buffer */
4161
rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
4162
rxq->queue[rxq->write] = rxb;
4163
rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4164
rxq->free_count--;
4165
}
4166
spin_unlock_irqrestore(&rxq->lock, flags);
4167
/* If the pre-allocated buffer pool is dropping low, schedule to
4168
* refill it */
4169
if (rxq->free_count <= RX_LOW_WATERMARK)
4170
queue_work(priv->workqueue, &priv->rx_replenish);
4171
4172
4173
/* If we've added more space for the firmware to place data, tell it.
4174
* Increment device's write pointer in multiples of 8. */
4175
if ((write != (rxq->write & ~0x7))
4176
|| (abs(rxq->write - rxq->read) > 7)) {
4177
spin_lock_irqsave(&rxq->lock, flags);
4178
rxq->need_update = 1;
4179
spin_unlock_irqrestore(&rxq->lock, flags);
4180
rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
4181
if (rc)
4182
return rc;
4183
}
4184
4185
return 0;
4186
}
4187
4188
/**
4189
* iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
4190
*
4191
* When moving to rx_free an SKB is allocated for the slot.
4192
*
4193
* Also restock the Rx queue via iwl3945_rx_queue_restock.
4194
* This is called as a scheduled work item (except for during initialization)
4195
*/
4196
static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
4197
{
4198
struct iwl3945_rx_queue *rxq = &priv->rxq;
4199
struct list_head *element;
4200
struct iwl3945_rx_mem_buffer *rxb;
4201
unsigned long flags;
4202
spin_lock_irqsave(&rxq->lock, flags);
4203
while (!list_empty(&rxq->rx_used)) {
4204
element = rxq->rx_used.next;
4205
rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
4206
4207
/* Alloc a new receive buffer */
4208
rxb->skb =
4209
alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
4210
if (!rxb->skb) {
4211
if (net_ratelimit())
4212
printk(KERN_CRIT DRV_NAME
4213
": Can not allocate SKB buffers\n");
4214
/* We don't reschedule replenish work here -- we will
4215
* call the restock method and if it still needs
4216
* more buffers it will schedule replenish */
4217
break;
4218
}
4219
priv->alloc_rxb_skb++;
4220
list_del(element);
4221
4222
/* Get physical address of RB/SKB */
4223
rxb->dma_addr =
4224
pci_map_single(priv->pci_dev, rxb->skb->data,
4225
IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4226
list_add_tail(&rxb->list, &rxq->rx_free);
4227
rxq->free_count++;
4228
}
4229
spin_unlock_irqrestore(&rxq->lock, flags);
4230
}
4231
4232
/*
4233
* this should be called while priv->lock is locked
4234
*/
4235
static void __iwl3945_rx_replenish(void *data)
4236
{
4237
struct iwl3945_priv *priv = data;
4238
4239
iwl3945_rx_allocate(priv);
4240
iwl3945_rx_queue_restock(priv);
4241
}
4242
4243
4244
void iwl3945_rx_replenish(void *data)
4245
{
4246
struct iwl3945_priv *priv = data;
4247
unsigned long flags;
4248
4249
iwl3945_rx_allocate(priv);
4250
4251
spin_lock_irqsave(&priv->lock, flags);
4252
iwl3945_rx_queue_restock(priv);
4253
spin_unlock_irqrestore(&priv->lock, flags);
4254
}
4255
4256
/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
4257
* If an SKB has been detached, the POOL needs to have its SKB set to NULL
4258
* This free routine walks the list of POOL entries and if SKB is set to
4259
* non NULL it is unmapped and freed
4260
*/
4261
static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
4262
{
4263
int i;
4264
for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4265
if (rxq->pool[i].skb != NULL) {
4266
pci_unmap_single(priv->pci_dev,
4267
rxq->pool[i].dma_addr,
4268
IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4269
dev_kfree_skb(rxq->pool[i].skb);
4270
}
4271
}
4272
4273
pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4274
rxq->dma_addr);
4275
rxq->bd = NULL;
4276
}
4277
4278
int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
4279
{
4280
struct iwl3945_rx_queue *rxq = &priv->rxq;
4281
struct pci_dev *dev = priv->pci_dev;
4282
int i;
4283
4284
spin_lock_init(&rxq->lock);
4285
INIT_LIST_HEAD(&rxq->rx_free);
4286
INIT_LIST_HEAD(&rxq->rx_used);
4287
4288
/* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
4289
rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4290
if (!rxq->bd)
4291
return -ENOMEM;
4292
4293
/* Fill the rx_used queue with _all_ of the Rx buffers */
4294
for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4295
list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4296
4297
/* Set us so that we have processed and used all buffers, but have
4298
* not restocked the Rx queue with fresh buffers */
4299
rxq->read = rxq->write = 0;
4300
rxq->free_count = 0;
4301
rxq->need_update = 0;
4302
return 0;
4303
}
4304
4305
void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
4306
{
4307
unsigned long flags;
4308
int i;
4309
spin_lock_irqsave(&rxq->lock, flags);
4310
INIT_LIST_HEAD(&rxq->rx_free);
4311
INIT_LIST_HEAD(&rxq->rx_used);
4312
/* Fill the rx_used queue with _all_ of the Rx buffers */
4313
for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4314
/* In the reset function, these buffers may have been allocated
4315
* to an SKB, so we need to unmap and free potential storage */
4316
if (rxq->pool[i].skb != NULL) {
4317
pci_unmap_single(priv->pci_dev,
4318
rxq->pool[i].dma_addr,
4319
IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4320
priv->alloc_rxb_skb--;
4321
dev_kfree_skb(rxq->pool[i].skb);
4322
rxq->pool[i].skb = NULL;
4323
}
4324
list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4325
}
4326
4327
/* Set us so that we have processed and used all buffers, but have
4328
* not restocked the Rx queue with fresh buffers */
4329
rxq->read = rxq->write = 0;
4330
rxq->free_count = 0;
4331
spin_unlock_irqrestore(&rxq->lock, flags);
4332
}
4333
4334
/* Convert linear signal-to-noise ratio into dB */
4335
static u8 ratio2dB[100] = {
4336
/* 0 1 2 3 4 5 6 7 8 9 */
4337
0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4338
20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4339
26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4340
29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4341
32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4342
34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4343
36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4344
37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4345
38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4346
39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4347
};
4348
4349
/* Calculates a relative dB value from a ratio of linear
4350
* (i.e. not dB) signal levels.
4351
* Conversion assumes that levels are voltages (20*log), not powers (10*log). */
4352
int iwl3945_calc_db_from_ratio(int sig_ratio)
4353
{
4354
/* Anything above 1000:1 just report as 60 dB */
4355
if (sig_ratio > 1000)
4356
return 60;
4357
4358
/* Above 100:1, divide by 10 and use table,
4359
* add 20 dB to make up for divide by 10 */
4360
if (sig_ratio > 100)
4361
return (20 + (int)ratio2dB[sig_ratio/10]);
4362
4363
/* We shouldn't see this */
4364
if (sig_ratio < 1)
4365
return 0;
4366
4367
/* Use table for ratios 1:1 - 99:1 */
4368
return (int)ratio2dB[sig_ratio];
4369
}
4370
4371
#define PERFECT_RSSI (-20) /* dBm */
4372
#define WORST_RSSI (-95) /* dBm */
4373
#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4374
4375
/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4376
* See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4377
* about formulas used below. */
4378
int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
4379
{
4380
int sig_qual;
4381
int degradation = PERFECT_RSSI - rssi_dbm;
4382
4383
/* If we get a noise measurement, use signal-to-noise ratio (SNR)
4384
* as indicator; formula is (signal dbm - noise dbm).
4385
* SNR at or above 40 is a great signal (100%).
4386
* Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4387
* Weakest usable signal is usually 10 - 15 dB SNR. */
4388
if (noise_dbm) {
4389
if (rssi_dbm - noise_dbm >= 40)
4390
return 100;
4391
else if (rssi_dbm < noise_dbm)
4392
return 0;
4393
sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4394
4395
/* Else use just the signal level.
4396
* This formula is a least squares fit of data points collected and
4397
* compared with a reference system that had a percentage (%) display
4398
* for signal quality. */
4399
} else
4400
sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4401
(15 * RSSI_RANGE + 62 * degradation)) /
4402
(RSSI_RANGE * RSSI_RANGE);
4403
4404
if (sig_qual > 100)
4405
sig_qual = 100;
4406
else if (sig_qual < 1)
4407
sig_qual = 0;
4408
4409
return sig_qual;
4410
}
4411
4412
/**
4413
* iwl3945_rx_handle - Main entry function for receiving responses from uCode
4414
*
4415
* Uses the priv->rx_handlers callback function array to invoke
4416
* the appropriate handlers, including command responses,
4417
* frame-received notifications, and other notifications.
4418
*/
4419
static void iwl3945_rx_handle(struct iwl3945_priv *priv)
4420
{
4421
struct iwl3945_rx_mem_buffer *rxb;
4422
struct iwl3945_rx_packet *pkt;
4423
struct iwl3945_rx_queue *rxq = &priv->rxq;
4424
u32 r, i;
4425
int reclaim;
4426
unsigned long flags;
4427
u8 fill_rx = 0;
4428
u32 count = 0;
4429
4430
/* uCode's read index (stored in shared DRAM) indicates the last Rx
4431
* buffer that the driver may process (last buffer filled by ucode). */
4432
r = iwl3945_hw_get_rx_read(priv);
4433
i = rxq->read;
4434
4435
if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4436
fill_rx = 1;
4437
/* Rx interrupt, but nothing sent from uCode */
4438
if (i == r)
4439
IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4440
4441
while (i != r) {
4442
rxb = rxq->queue[i];
4443
4444
/* If an RXB doesn't have a Rx queue slot associated with it,
4445
* then a bug has been introduced in the queue refilling
4446
* routines -- catch it here */
4447
BUG_ON(rxb == NULL);
4448
4449
rxq->queue[i] = NULL;
4450
4451
pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4452
IWL_RX_BUF_SIZE,
4453
PCI_DMA_FROMDEVICE);
4454
pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
4455
4456
/* Reclaim a command buffer only if this packet is a response
4457
* to a (driver-originated) command.
4458
* If the packet (e.g. Rx frame) originated from uCode,
4459
* there is no command buffer to reclaim.
4460
* Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4461
* but apparently a few don't get set; catch them here. */
4462
reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4463
(pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4464
(pkt->hdr.cmd != REPLY_TX);
4465
4466
/* Based on type of command response or notification,
4467
* handle those that need handling via function in
4468
* rx_handlers table. See iwl3945_setup_rx_handlers() */
4469
if (priv->rx_handlers[pkt->hdr.cmd]) {
4470
IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4471
"r = %d, i = %d, %s, 0x%02x\n", r, i,
4472
get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4473
priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4474
} else {
4475
/* No handling needed */
4476
IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4477
"r %d i %d No handler needed for %s, 0x%02x\n",
4478
r, i, get_cmd_string(pkt->hdr.cmd),
4479
pkt->hdr.cmd);
4480
}
4481
4482
if (reclaim) {
4483
/* Invoke any callbacks, transfer the skb to caller, and
4484
* fire off the (possibly) blocking iwl3945_send_cmd()
4485
* as we reclaim the driver command queue */
4486
if (rxb && rxb->skb)
4487
iwl3945_tx_cmd_complete(priv, rxb);
4488
else
4489
IWL_WARNING("Claim null rxb?\n");
4490
}
4491
4492
/* For now we just don't re-use anything. We can tweak this
4493
* later to try and re-use notification packets and SKBs that
4494
* fail to Rx correctly */
4495
if (rxb->skb != NULL) {
4496
priv->alloc_rxb_skb--;
4497
dev_kfree_skb_any(rxb->skb);
4498
rxb->skb = NULL;
4499
}
4500
4501
pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4502
IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4503
spin_lock_irqsave(&rxq->lock, flags);
4504
list_add_tail(&rxb->list, &priv->rxq.rx_used);
4505
spin_unlock_irqrestore(&rxq->lock, flags);
4506
i = (i + 1) & RX_QUEUE_MASK;
4507
/* If there are a lot of unused frames,
4508
* restock the Rx queue so ucode won't assert. */
4509
if (fill_rx) {
4510
count++;
4511
if (count >= 8) {
4512
priv->rxq.read = i;
4513
__iwl3945_rx_replenish(priv);
4514
count = 0;
4515
}
4516
}
4517
}
4518
4519
/* Backtrack one entry */
4520
priv->rxq.read = i;
4521
iwl3945_rx_queue_restock(priv);
4522
}
4523
4524
/**
4525
* iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4526
*/
4527
static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4528
struct iwl3945_tx_queue *txq)
4529
{
4530
u32 reg = 0;
4531
int rc = 0;
4532
int txq_id = txq->q.id;
4533
4534
if (txq->need_update == 0)
4535
return rc;
4536
4537
/* if we're trying to save power */
4538
if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4539
/* wake up nic if it's powered down ...
4540
* uCode will wake up, and interrupt us again, so next
4541
* time we'll skip this part. */
4542
reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
4543
4544
if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4545
IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4546
iwl3945_set_bit(priv, CSR_GP_CNTRL,
4547
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4548
return rc;
4549
}
4550
4551
/* restore this queue's parameters in nic hardware. */
4552
rc = iwl3945_grab_nic_access(priv);
4553
if (rc)
4554
return rc;
4555
iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
4556
txq->q.write_ptr | (txq_id << 8));
4557
iwl3945_release_nic_access(priv);
4558
4559
/* else not in power-save mode, uCode will never sleep when we're
4560
* trying to tx (during RFKILL, we're not trying to tx). */
4561
} else
4562
iwl3945_write32(priv, HBUS_TARG_WRPTR,
4563
txq->q.write_ptr | (txq_id << 8));
4564
4565
txq->need_update = 0;
4566
4567
return rc;
4568
}
4569
4570
#ifdef CONFIG_IWL3945_DEBUG
4571
static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
4572
{
4573
IWL_DEBUG_RADIO("RX CONFIG:\n");
4574
iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4575
IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4576
IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4577
IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4578
le32_to_cpu(rxon->filter_flags));
4579
IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4580
IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4581
rxon->ofdm_basic_rates);
4582
IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4583
IWL_DEBUG_RADIO("u8[6] node_addr: " MAC_FMT "\n",
4584
MAC_ARG(rxon->node_addr));
4585
IWL_DEBUG_RADIO("u8[6] bssid_addr: " MAC_FMT "\n",
4586
MAC_ARG(rxon->bssid_addr));
4587
IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4588
}
4589
#endif
4590
4591
static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
4592
{
4593
IWL_DEBUG_ISR("Enabling interrupts\n");
4594
set_bit(STATUS_INT_ENABLED, &priv->status);
4595
iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4596
}
4597
4598
static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
4599
{
4600
clear_bit(STATUS_INT_ENABLED, &priv->status);
4601
4602
/* disable interrupts from uCode/NIC to host */
4603
iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4604
4605
/* acknowledge/clear/reset any interrupts still pending
4606
* from uCode or flow handler (Rx/Tx DMA) */
4607
iwl3945_write32(priv, CSR_INT, 0xffffffff);
4608
iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4609
IWL_DEBUG_ISR("Disabled interrupts\n");
4610
}
4611
4612
static const char *desc_lookup(int i)
4613
{
4614
switch (i) {
4615
case 1:
4616
return "FAIL";
4617
case 2:
4618
return "BAD_PARAM";
4619
case 3:
4620
return "BAD_CHECKSUM";
4621
case 4:
4622
return "NMI_INTERRUPT";
4623
case 5:
4624
return "SYSASSERT";
4625
case 6:
4626
return "FATAL_ERROR";
4627
}
4628
4629
return "UNKNOWN";
4630
}
4631
4632
#define ERROR_START_OFFSET (1 * sizeof(u32))
4633
#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4634
4635
static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
4636
{
4637
u32 i;
4638
u32 desc, time, count, base, data1;
4639
u32 blink1, blink2, ilink1, ilink2;
4640
int rc;
4641
4642
base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4643
4644
if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4645
IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4646
return;
4647
}
4648
4649
rc = iwl3945_grab_nic_access(priv);
4650
if (rc) {
4651
IWL_WARNING("Can not read from adapter at this time.\n");
4652
return;
4653
}
4654
4655
count = iwl3945_read_targ_mem(priv, base);
4656
4657
if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4658
IWL_ERROR("Start IWL Error Log Dump:\n");
4659
IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4660
priv->status, priv->config, count);
4661
}
4662
4663
IWL_ERROR("Desc Time asrtPC blink2 "
4664
"ilink1 nmiPC Line\n");
4665
for (i = ERROR_START_OFFSET;
4666
i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4667
i += ERROR_ELEM_SIZE) {
4668
desc = iwl3945_read_targ_mem(priv, base + i);
4669
time =
4670
iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
4671
blink1 =
4672
iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
4673
blink2 =
4674
iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
4675
ilink1 =
4676
iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
4677
ilink2 =
4678
iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
4679
data1 =
4680
iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
4681
4682
IWL_ERROR
4683
("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4684
desc_lookup(desc), desc, time, blink1, blink2,
4685
ilink1, ilink2, data1);
4686
}
4687
4688
iwl3945_release_nic_access(priv);
4689
4690
}
4691
4692
#define EVENT_START_OFFSET (6 * sizeof(u32))
4693
4694
/**
4695
* iwl3945_print_event_log - Dump error event log to syslog
4696
*
4697
* NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
4698
*/
4699
static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
4700
u32 num_events, u32 mode)
4701
{
4702
u32 i;
4703
u32 base; /* SRAM byte address of event log header */
4704
u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4705
u32 ptr; /* SRAM byte address of log data */
4706
u32 ev, time, data; /* event log data */
4707
4708
if (num_events == 0)
4709
return;
4710
4711
base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4712
4713
if (mode == 0)
4714
event_size = 2 * sizeof(u32);
4715
else
4716
event_size = 3 * sizeof(u32);
4717
4718
ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4719
4720
/* "time" is actually "data" for mode 0 (no timestamp).
4721
* place event id # at far right for easier visual parsing. */
4722
for (i = 0; i < num_events; i++) {
4723
ev = iwl3945_read_targ_mem(priv, ptr);
4724
ptr += sizeof(u32);
4725
time = iwl3945_read_targ_mem(priv, ptr);
4726
ptr += sizeof(u32);
4727
if (mode == 0)
4728
IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4729
else {
4730
data = iwl3945_read_targ_mem(priv, ptr);
4731
ptr += sizeof(u32);
4732
IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4733
}
4734
}
4735
}
4736
4737
static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
4738
{
4739
int rc;
4740
u32 base; /* SRAM byte address of event log header */
4741
u32 capacity; /* event log capacity in # entries */
4742
u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4743
u32 num_wraps; /* # times uCode wrapped to top of log */
4744
u32 next_entry; /* index of next entry to be written by uCode */
4745
u32 size; /* # entries that we'll print */
4746
4747
base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4748
if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4749
IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4750
return;
4751
}
4752
4753
rc = iwl3945_grab_nic_access(priv);
4754
if (rc) {
4755
IWL_WARNING("Can not read from adapter at this time.\n");
4756
return;
4757
}
4758
4759
/* event log header */
4760
capacity = iwl3945_read_targ_mem(priv, base);
4761
mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4762
num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4763
next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
4764
4765
size = num_wraps ? capacity : next_entry;
4766
4767
/* bail out if nothing in log */
4768
if (size == 0) {
4769
IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4770
iwl3945_release_nic_access(priv);
4771
return;
4772
}
4773
4774
IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4775
size, num_wraps);
4776
4777
/* if uCode has wrapped back to top of log, start at the oldest entry,
4778
* i.e the next one that uCode would fill. */
4779
if (num_wraps)
4780
iwl3945_print_event_log(priv, next_entry,
4781
capacity - next_entry, mode);
4782
4783
/* (then/else) start at top of log */
4784
iwl3945_print_event_log(priv, 0, next_entry, mode);
4785
4786
iwl3945_release_nic_access(priv);
4787
}
4788
4789
/**
4790
* iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4791
*/
4792
static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
4793
{
4794
/* Set the FW error flag -- cleared on iwl3945_down */
4795
set_bit(STATUS_FW_ERROR, &priv->status);
4796
4797
/* Cancel currently queued command. */
4798
clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4799
4800
#ifdef CONFIG_IWL3945_DEBUG
4801
if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4802
iwl3945_dump_nic_error_log(priv);
4803
iwl3945_dump_nic_event_log(priv);
4804
iwl3945_print_rx_config_cmd(&priv->staging_rxon);
4805
}
4806
#endif
4807
4808
wake_up_interruptible(&priv->wait_command_queue);
4809
4810
/* Keep the restart process from trying to send host
4811
* commands by clearing the INIT status bit */
4812
clear_bit(STATUS_READY, &priv->status);
4813
4814
if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4815
IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4816
"Restarting adapter due to uCode error.\n");
4817
4818
if (iwl3945_is_associated(priv)) {
4819
memcpy(&priv->recovery_rxon, &priv->active_rxon,
4820
sizeof(priv->recovery_rxon));
4821
priv->error_recovering = 1;
4822
}
4823
queue_work(priv->workqueue, &priv->restart);
4824
}
4825
}
4826
4827
static void iwl3945_error_recovery(struct iwl3945_priv *priv)
4828
{
4829
unsigned long flags;
4830
4831
memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4832
sizeof(priv->staging_rxon));
4833
priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4834
iwl3945_commit_rxon(priv);
4835
4836
iwl3945_add_station(priv, priv->bssid, 1, 0);
4837
4838
spin_lock_irqsave(&priv->lock, flags);
4839
priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4840
priv->error_recovering = 0;
4841
spin_unlock_irqrestore(&priv->lock, flags);
4842
}
4843
4844
static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
4845
{
4846
u32 inta, handled = 0;
4847
u32 inta_fh;
4848
unsigned long flags;
4849
#ifdef CONFIG_IWL3945_DEBUG
4850
u32 inta_mask;
4851
#endif
4852
4853
spin_lock_irqsave(&priv->lock, flags);
4854
4855
/* Ack/clear/reset pending uCode interrupts.
4856
* Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4857
* and will clear only when CSR_FH_INT_STATUS gets cleared. */
4858
inta = iwl3945_read32(priv, CSR_INT);
4859
iwl3945_write32(priv, CSR_INT, inta);
4860
4861
/* Ack/clear/reset pending flow-handler (DMA) interrupts.
4862
* Any new interrupts that happen after this, either while we're
4863
* in this tasklet, or later, will show up in next ISR/tasklet. */
4864
inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4865
iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4866
4867
#ifdef CONFIG_IWL3945_DEBUG
4868
if (iwl3945_debug_level & IWL_DL_ISR) {
4869
/* just for debug */
4870
inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4871
IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4872
inta, inta_mask, inta_fh);
4873
}
4874
#endif
4875
4876
/* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4877
* atomic, make sure that inta covers all the interrupts that
4878
* we've discovered, even if FH interrupt came in just after
4879
* reading CSR_INT. */
4880
if (inta_fh & CSR_FH_INT_RX_MASK)
4881
inta |= CSR_INT_BIT_FH_RX;
4882
if (inta_fh & CSR_FH_INT_TX_MASK)
4883
inta |= CSR_INT_BIT_FH_TX;
4884
4885
/* Now service all interrupt bits discovered above. */
4886
if (inta & CSR_INT_BIT_HW_ERR) {
4887
IWL_ERROR("Microcode HW error detected. Restarting.\n");
4888
4889
/* Tell the device to stop sending interrupts */
4890
iwl3945_disable_interrupts(priv);
4891
4892
iwl3945_irq_handle_error(priv);
4893
4894
handled |= CSR_INT_BIT_HW_ERR;
4895
4896
spin_unlock_irqrestore(&priv->lock, flags);
4897
4898
return;
4899
}
4900
4901
#ifdef CONFIG_IWL3945_DEBUG
4902
if (iwl3945_debug_level & (IWL_DL_ISR)) {
4903
/* NIC fires this, but we don't use it, redundant with WAKEUP */
4904
if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
4905
IWL_DEBUG_ISR("Microcode started or stopped.\n");
4906
4907
/* Alive notification via Rx interrupt will do the real work */
4908
if (inta & CSR_INT_BIT_ALIVE)
4909
IWL_DEBUG_ISR("Alive interrupt\n");
4910
}
4911
#endif
4912
/* Safely ignore these bits for debug checks below */
4913
inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
4914
4915
/* HW RF KILL switch toggled (4965 only) */
4916
if (inta & CSR_INT_BIT_RF_KILL) {
4917
int hw_rf_kill = 0;
4918
if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
4919
CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4920
hw_rf_kill = 1;
4921
4922
IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4923
"RF_KILL bit toggled to %s.\n",
4924
hw_rf_kill ? "disable radio":"enable radio");
4925
4926
/* Queue restart only if RF_KILL switch was set to "kill"
4927
* when we loaded driver, and is now set to "enable".
4928
* After we're Alive, RF_KILL gets handled by
4929
* iwl3945_rx_card_state_notif() */
4930
if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4931
clear_bit(STATUS_RF_KILL_HW, &priv->status);
4932
queue_work(priv->workqueue, &priv->restart);
4933
}
4934
4935
handled |= CSR_INT_BIT_RF_KILL;
4936
}
4937
4938
/* Chip got too hot and stopped itself (4965 only) */
4939
if (inta & CSR_INT_BIT_CT_KILL) {
4940
IWL_ERROR("Microcode CT kill error detected.\n");
4941
handled |= CSR_INT_BIT_CT_KILL;
4942
}
4943
4944
/* Error detected by uCode */
4945
if (inta & CSR_INT_BIT_SW_ERR) {
4946
IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4947
inta);
4948
iwl3945_irq_handle_error(priv);
4949
handled |= CSR_INT_BIT_SW_ERR;
4950
}
4951
4952
/* uCode wakes up after power-down sleep */
4953
if (inta & CSR_INT_BIT_WAKEUP) {
4954
IWL_DEBUG_ISR("Wakeup interrupt\n");
4955
iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4956
iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4957
iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4958
iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4959
iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4960
iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4961
iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4962
4963
handled |= CSR_INT_BIT_WAKEUP;
4964
}
4965
4966
/* All uCode command responses, including Tx command responses,
4967
* Rx "responses" (frame-received notification), and other
4968
* notifications from uCode come through here*/
4969
if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4970
iwl3945_rx_handle(priv);
4971
handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4972
}
4973
4974
if (inta & CSR_INT_BIT_FH_TX) {
4975
IWL_DEBUG_ISR("Tx interrupt\n");
4976
4977
iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4978
if (!iwl3945_grab_nic_access(priv)) {
4979
iwl3945_write_direct32(priv,
4980
FH_TCSR_CREDIT
4981
(ALM_FH_SRVC_CHNL), 0x0);
4982
iwl3945_release_nic_access(priv);
4983
}
4984
handled |= CSR_INT_BIT_FH_TX;
4985
}
4986
4987
if (inta & ~handled)
4988
IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4989
4990
if (inta & ~CSR_INI_SET_MASK) {
4991
IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4992
inta & ~CSR_INI_SET_MASK);
4993
IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4994
}
4995
4996
/* Re-enable all interrupts */
4997
iwl3945_enable_interrupts(priv);
4998
4999
#ifdef CONFIG_IWL3945_DEBUG
5000
if (iwl3945_debug_level & (IWL_DL_ISR)) {
5001
inta = iwl3945_read32(priv, CSR_INT);
5002
inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
5003
inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
5004
IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
5005
"flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
5006
}
5007
#endif
5008
spin_unlock_irqrestore(&priv->lock, flags);
5009
}
5010
5011
static irqreturn_t iwl3945_isr(int irq, void *data)
5012
{
5013
struct iwl3945_priv *priv = data;
5014
u32 inta, inta_mask;
5015
u32 inta_fh;
5016
if (!priv)
5017
return IRQ_NONE;
5018
5019
spin_lock(&priv->lock);
5020
5021
/* Disable (but don't clear!) interrupts here to avoid
5022
* back-to-back ISRs and sporadic interrupts from our NIC.
5023
* If we have something to service, the tasklet will re-enable ints.
5024
* If we *don't* have something, we'll re-enable before leaving here. */
5025
inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
5026
iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
5027
5028
/* Discover which interrupts are active/pending */
5029
inta = iwl3945_read32(priv, CSR_INT);
5030
inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
5031
5032
/* Ignore interrupt if there's nothing in NIC to service.
5033
* This may be due to IRQ shared with another device,
5034
* or due to sporadic interrupts thrown from our NIC. */
5035
if (!inta && !inta_fh) {
5036
IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
5037
goto none;
5038
}
5039
5040
if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
5041
/* Hardware disappeared. It might have already raised
5042
* an interrupt */
5043
IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
5044
goto unplugged;
5045
}
5046
5047
IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5048
inta, inta_mask, inta_fh);
5049
5050
/* iwl3945_irq_tasklet() will service interrupts and re-enable them */
5051
tasklet_schedule(&priv->irq_tasklet);
5052
5053
unplugged:
5054
spin_unlock(&priv->lock);
5055
return IRQ_HANDLED;
5056
5057
none:
5058
/* re-enable interrupts here since we don't have anything to service. */
5059
iwl3945_enable_interrupts(priv);
5060
spin_unlock(&priv->lock);
5061
return IRQ_NONE;
5062
}
5063
5064
/************************** EEPROM BANDS ****************************
5065
*
5066
* The iwl3945_eeprom_band definitions below provide the mapping from the
5067
* EEPROM contents to the specific channel number supported for each
5068
* band.
5069
*
5070
* For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
5071
* definition below maps to physical channel 42 in the 5.2GHz spectrum.
5072
* The specific geography and calibration information for that channel
5073
* is contained in the eeprom map itself.
5074
*
5075
* During init, we copy the eeprom information and channel map
5076
* information into priv->channel_info_24/52 and priv->channel_map_24/52
5077
*
5078
* channel_map_24/52 provides the index in the channel_info array for a
5079
* given channel. We have to have two separate maps as there is channel
5080
* overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
5081
* band_2
5082
*
5083
* A value of 0xff stored in the channel_map indicates that the channel
5084
* is not supported by the hardware at all.
5085
*
5086
* A value of 0xfe in the channel_map indicates that the channel is not
5087
* valid for Tx with the current hardware. This means that
5088
* while the system can tune and receive on a given channel, it may not
5089
* be able to associate or transmit any frames on that
5090
* channel. There is no corresponding channel information for that
5091
* entry.
5092
*
5093
*********************************************************************/
5094
5095
/* 2.4 GHz */
5096
static const u8 iwl3945_eeprom_band_1[14] = {
5097
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
5098
};
5099
5100
/* 5.2 GHz bands */
5101
static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
5102
183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
5103
};
5104
5105
static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
5106
34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5107
};
5108
5109
static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
5110
100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5111
};
5112
5113
static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
5114
145, 149, 153, 157, 161, 165
5115
};
5116
5117
static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
5118
int *eeprom_ch_count,
5119
const struct iwl3945_eeprom_channel
5120
**eeprom_ch_info,
5121
const u8 **eeprom_ch_index)
5122
{
5123
switch (band) {
5124
case 1: /* 2.4GHz band */
5125
*eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
5126
*eeprom_ch_info = priv->eeprom.band_1_channels;
5127
*eeprom_ch_index = iwl3945_eeprom_band_1;
5128
break;
5129
case 2: /* 4.9GHz band */
5130
*eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
5131
*eeprom_ch_info = priv->eeprom.band_2_channels;
5132
*eeprom_ch_index = iwl3945_eeprom_band_2;
5133
break;
5134
case 3: /* 5.2GHz band */
5135
*eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
5136
*eeprom_ch_info = priv->eeprom.band_3_channels;
5137
*eeprom_ch_index = iwl3945_eeprom_band_3;
5138
break;
5139
case 4: /* 5.5GHz band */
5140
*eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
5141
*eeprom_ch_info = priv->eeprom.band_4_channels;
5142
*eeprom_ch_index = iwl3945_eeprom_band_4;
5143
break;
5144
case 5: /* 5.7GHz band */
5145
*eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
5146
*eeprom_ch_info = priv->eeprom.band_5_channels;
5147
*eeprom_ch_index = iwl3945_eeprom_band_5;
5148
break;
5149
default:
5150
BUG();
5151
return;
5152
}
5153
}
5154
5155
/**
5156
* iwl3945_get_channel_info - Find driver's private channel info
5157
*
5158
* Based on band and channel number.
5159
*/
5160
const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
5161
int phymode, u16 channel)
5162
{
5163
int i;
5164
5165
switch (phymode) {
5166
case MODE_IEEE80211A:
5167
for (i = 14; i < priv->channel_count; i++) {
5168
if (priv->channel_info[i].channel == channel)
5169
return &priv->channel_info[i];
5170
}
5171
break;
5172
5173
case MODE_IEEE80211B:
5174
case MODE_IEEE80211G:
5175
if (channel >= 1 && channel <= 14)
5176
return &priv->channel_info[channel - 1];
5177
break;
5178
5179
}
5180
5181
return NULL;
5182
}
5183
5184
#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5185
? # x " " : "")
5186
5187
/**
5188
* iwl3945_init_channel_map - Set up driver's info for all possible channels
5189
*/
5190
static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
5191
{
5192
int eeprom_ch_count = 0;
5193
const u8 *eeprom_ch_index = NULL;
5194
const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
5195
int band, ch;
5196
struct iwl3945_channel_info *ch_info;
5197
5198
if (priv->channel_count) {
5199
IWL_DEBUG_INFO("Channel map already initialized.\n");
5200
return 0;
5201
}
5202
5203
if (priv->eeprom.version < 0x2f) {
5204
IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5205
priv->eeprom.version);
5206
return -EINVAL;
5207
}
5208
5209
IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5210
5211
priv->channel_count =
5212
ARRAY_SIZE(iwl3945_eeprom_band_1) +
5213
ARRAY_SIZE(iwl3945_eeprom_band_2) +
5214
ARRAY_SIZE(iwl3945_eeprom_band_3) +
5215
ARRAY_SIZE(iwl3945_eeprom_band_4) +
5216
ARRAY_SIZE(iwl3945_eeprom_band_5);
5217
5218
IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5219
5220
priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
5221
priv->channel_count, GFP_KERNEL);
5222
if (!priv->channel_info) {
5223
IWL_ERROR("Could not allocate channel_info\n");
5224
priv->channel_count = 0;
5225
return -ENOMEM;
5226
}
5227
5228
ch_info = priv->channel_info;
5229
5230
/* Loop through the 5 EEPROM bands adding them in order to the
5231
* channel map we maintain (that contains additional information than
5232
* what just in the EEPROM) */
5233
for (band = 1; band <= 5; band++) {
5234
5235
iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
5236
&eeprom_ch_info, &eeprom_ch_index);
5237
5238
/* Loop through each band adding each of the channels */
5239
for (ch = 0; ch < eeprom_ch_count; ch++) {
5240
ch_info->channel = eeprom_ch_index[ch];
5241
ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
5242
MODE_IEEE80211A;
5243
5244
/* permanently store EEPROM's channel regulatory flags
5245
* and max power in channel info database. */
5246
ch_info->eeprom = eeprom_ch_info[ch];
5247
5248
/* Copy the run-time flags so they are there even on
5249
* invalid channels */
5250
ch_info->flags = eeprom_ch_info[ch].flags;
5251
5252
if (!(is_channel_valid(ch_info))) {
5253
IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5254
"No traffic\n",
5255
ch_info->channel,
5256
ch_info->flags,
5257
is_channel_a_band(ch_info) ?
5258
"5.2" : "2.4");
5259
ch_info++;
5260
continue;
5261
}
5262
5263
/* Initialize regulatory-based run-time data */
5264
ch_info->max_power_avg = ch_info->curr_txpow =
5265
eeprom_ch_info[ch].max_power_avg;
5266
ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5267
ch_info->min_power = 0;
5268
5269
IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5270
" %ddBm): Ad-Hoc %ssupported\n",
5271
ch_info->channel,
5272
is_channel_a_band(ch_info) ?
5273
"5.2" : "2.4",
5274
CHECK_AND_PRINT(IBSS),
5275
CHECK_AND_PRINT(ACTIVE),
5276
CHECK_AND_PRINT(RADAR),
5277
CHECK_AND_PRINT(WIDE),
5278
CHECK_AND_PRINT(NARROW),
5279
CHECK_AND_PRINT(DFS),
5280
eeprom_ch_info[ch].flags,
5281
eeprom_ch_info[ch].max_power_avg,
5282
((eeprom_ch_info[ch].
5283
flags & EEPROM_CHANNEL_IBSS)
5284
&& !(eeprom_ch_info[ch].
5285
flags & EEPROM_CHANNEL_RADAR))
5286
? "" : "not ");
5287
5288
/* Set the user_txpower_limit to the highest power
5289
* supported by any channel */
5290
if (eeprom_ch_info[ch].max_power_avg >
5291
priv->user_txpower_limit)
5292
priv->user_txpower_limit =
5293
eeprom_ch_info[ch].max_power_avg;
5294
5295
ch_info++;
5296
}
5297
}
5298
5299
/* Set up txpower settings in driver for all channels */
5300
if (iwl3945_txpower_set_from_eeprom(priv))
5301
return -EIO;
5302
5303
return 0;
5304
}
5305
5306
/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5307
* sending probe req. This should be set long enough to hear probe responses
5308
* from more than one AP. */
5309
#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5310
#define IWL_ACTIVE_DWELL_TIME_52 (10)
5311
5312
/* For faster active scanning, scan will move to the next channel if fewer than
5313
* PLCP_QUIET_THRESH packets are heard on this channel within
5314
* ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5315
* time if it's a quiet channel (nothing responded to our probe, and there's
5316
* no other traffic).
5317
* Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5318
#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5319
#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5320
5321
/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5322
* Must be set longer than active dwell time.
5323
* For the most reliable scan, set > AP beacon interval (typically 100msec). */
5324
#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5325
#define IWL_PASSIVE_DWELL_TIME_52 (10)
5326
#define IWL_PASSIVE_DWELL_BASE (100)
5327
#define IWL_CHANNEL_TUNE_TIME 5
5328
5329
static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv, int phymode)
5330
{
5331
if (phymode == MODE_IEEE80211A)
5332
return IWL_ACTIVE_DWELL_TIME_52;
5333
else
5334
return IWL_ACTIVE_DWELL_TIME_24;
5335
}
5336
5337
static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv, int phymode)
5338
{
5339
u16 active = iwl3945_get_active_dwell_time(priv, phymode);
5340
u16 passive = (phymode != MODE_IEEE80211A) ?
5341
IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5342
IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5343
5344
if (iwl3945_is_associated(priv)) {
5345
/* If we're associated, we clamp the maximum passive
5346
* dwell time to be 98% of the beacon interval (minus
5347
* 2 * channel tune time) */
5348
passive = priv->beacon_int;
5349
if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5350
passive = IWL_PASSIVE_DWELL_BASE;
5351
passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5352
}
5353
5354
if (passive <= active)
5355
passive = active + 1;
5356
5357
return passive;
5358
}
5359
5360
static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv, int phymode,
5361
u8 is_active, u8 direct_mask,
5362
struct iwl3945_scan_channel *scan_ch)
5363
{
5364
const struct ieee80211_channel *channels = NULL;
5365
const struct ieee80211_hw_mode *hw_mode;
5366
const struct iwl3945_channel_info *ch_info;
5367
u16 passive_dwell = 0;
5368
u16 active_dwell = 0;
5369
int added, i;
5370
5371
hw_mode = iwl3945_get_hw_mode(priv, phymode);
5372
if (!hw_mode)
5373
return 0;
5374
5375
channels = hw_mode->channels;
5376
5377
active_dwell = iwl3945_get_active_dwell_time(priv, phymode);
5378
passive_dwell = iwl3945_get_passive_dwell_time(priv, phymode);
5379
5380
for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
5381
if (channels[i].chan ==
5382
le16_to_cpu(priv->active_rxon.channel)) {
5383
if (iwl3945_is_associated(priv)) {
5384
IWL_DEBUG_SCAN
5385
("Skipping current channel %d\n",
5386
le16_to_cpu(priv->active_rxon.channel));
5387
continue;
5388
}
5389
} else if (priv->only_active_channel)
5390
continue;
5391
5392
scan_ch->channel = channels[i].chan;
5393
5394
ch_info = iwl3945_get_channel_info(priv, phymode, scan_ch->channel);
5395
if (!is_channel_valid(ch_info)) {
5396
IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5397
scan_ch->channel);
5398
continue;
5399
}
5400
5401
if (!is_active || is_channel_passive(ch_info) ||
5402
!(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
5403
scan_ch->type = 0; /* passive */
5404
else
5405
scan_ch->type = 1; /* active */
5406
5407
if (scan_ch->type & 1)
5408
scan_ch->type |= (direct_mask << 1);
5409
5410
if (is_channel_narrow(ch_info))
5411
scan_ch->type |= (1 << 7);
5412
5413
scan_ch->active_dwell = cpu_to_le16(active_dwell);
5414
scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5415
5416
/* Set txpower levels to defaults */
5417
scan_ch->tpc.dsp_atten = 110;
5418
/* scan_pwr_info->tpc.dsp_atten; */
5419
5420
/*scan_pwr_info->tpc.tx_gain; */
5421
if (phymode == MODE_IEEE80211A)
5422
scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5423
else {
5424
scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5425
/* NOTE: if we were doing 6Mb OFDM for scans we'd use
5426
* power level:
5427
* scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
5428
*/
5429
}
5430
5431
IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5432
scan_ch->channel,
5433
(scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5434
(scan_ch->type & 1) ?
5435
active_dwell : passive_dwell);
5436
5437
scan_ch++;
5438
added++;
5439
}
5440
5441
IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5442
return added;
5443
}
5444
5445
static void iwl3945_reset_channel_flag(struct iwl3945_priv *priv)
5446
{
5447
int i, j;
5448
for (i = 0; i < 3; i++) {
5449
struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
5450
for (j = 0; j < hw_mode->num_channels; j++)
5451
hw_mode->channels[j].flag = hw_mode->channels[j].val;
5452
}
5453
}
5454
5455
static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
5456
struct ieee80211_rate *rates)
5457
{
5458
int i;
5459
5460
for (i = 0; i < IWL_RATE_COUNT; i++) {
5461
rates[i].rate = iwl3945_rates[i].ieee * 5;
5462
rates[i].val = i; /* Rate scaling will work on indexes */
5463
rates[i].val2 = i;
5464
rates[i].flags = IEEE80211_RATE_SUPPORTED;
5465
/* Only OFDM have the bits-per-symbol set */
5466
if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
5467
rates[i].flags |= IEEE80211_RATE_OFDM;
5468
else {
5469
/*
5470
* If CCK 1M then set rate flag to CCK else CCK_2
5471
* which is CCK | PREAMBLE2
5472
*/
5473
rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
5474
IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
5475
}
5476
5477
/* Set up which ones are basic rates... */
5478
if (IWL_BASIC_RATES_MASK & (1 << i))
5479
rates[i].flags |= IEEE80211_RATE_BASIC;
5480
}
5481
}
5482
5483
/**
5484
* iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
5485
*/
5486
static int iwl3945_init_geos(struct iwl3945_priv *priv)
5487
{
5488
struct iwl3945_channel_info *ch;
5489
struct ieee80211_hw_mode *modes;
5490
struct ieee80211_channel *channels;
5491
struct ieee80211_channel *geo_ch;
5492
struct ieee80211_rate *rates;
5493
int i = 0;
5494
enum {
5495
A = 0,
5496
B = 1,
5497
G = 2,
5498
};
5499
int mode_count = 3;
5500
5501
if (priv->modes) {
5502
IWL_DEBUG_INFO("Geography modes already initialized.\n");
5503
set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5504
return 0;
5505
}
5506
5507
modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
5508
GFP_KERNEL);
5509
if (!modes)
5510
return -ENOMEM;
5511
5512
channels = kzalloc(sizeof(struct ieee80211_channel) *
5513
priv->channel_count, GFP_KERNEL);
5514
if (!channels) {
5515
kfree(modes);
5516
return -ENOMEM;
5517
}
5518
5519
rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5520
GFP_KERNEL);
5521
if (!rates) {
5522
kfree(modes);
5523
kfree(channels);
5524
return -ENOMEM;
5525
}
5526
5527
/* 0 = 802.11a
5528
* 1 = 802.11b
5529
* 2 = 802.11g
5530
*/
5531
5532
/* 5.2GHz channels start after the 2.4GHz channels */
5533
modes[A].mode = MODE_IEEE80211A;
5534
modes[A].channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
5535
modes[A].rates = &rates[4];
5536
modes[A].num_rates = 8; /* just OFDM */
5537
modes[A].num_channels = 0;
5538
5539
modes[B].mode = MODE_IEEE80211B;
5540
modes[B].channels = channels;
5541
modes[B].rates = rates;
5542
modes[B].num_rates = 4; /* just CCK */
5543
modes[B].num_channels = 0;
5544
5545
modes[G].mode = MODE_IEEE80211G;
5546
modes[G].channels = channels;
5547
modes[G].rates = rates;
5548
modes[G].num_rates = 12; /* OFDM & CCK */
5549
modes[G].num_channels = 0;
5550
5551
priv->ieee_channels = channels;
5552
priv->ieee_rates = rates;
5553
5554
iwl3945_init_hw_rates(priv, rates);
5555
5556
for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5557
ch = &priv->channel_info[i];
5558
5559
if (!is_channel_valid(ch)) {
5560
IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5561
"skipping.\n",
5562
ch->channel, is_channel_a_band(ch) ?
5563
"5.2" : "2.4");
5564
continue;
5565
}
5566
5567
if (is_channel_a_band(ch))
5568
geo_ch = &modes[A].channels[modes[A].num_channels++];
5569
else {
5570
geo_ch = &modes[B].channels[modes[B].num_channels++];
5571
modes[G].num_channels++;
5572
}
5573
5574
geo_ch->freq = ieee80211chan2mhz(ch->channel);
5575
geo_ch->chan = ch->channel;
5576
geo_ch->power_level = ch->max_power_avg;
5577
geo_ch->antenna_max = 0xff;
5578
5579
if (is_channel_valid(ch)) {
5580
geo_ch->flag = IEEE80211_CHAN_W_SCAN;
5581
if (ch->flags & EEPROM_CHANNEL_IBSS)
5582
geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
5583
5584
if (ch->flags & EEPROM_CHANNEL_ACTIVE)
5585
geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
5586
5587
if (ch->flags & EEPROM_CHANNEL_RADAR)
5588
geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
5589
5590
if (ch->max_power_avg > priv->max_channel_txpower_limit)
5591
priv->max_channel_txpower_limit =
5592
ch->max_power_avg;
5593
}
5594
5595
geo_ch->val = geo_ch->flag;
5596
}
5597
5598
if ((modes[A].num_channels == 0) && priv->is_abg) {
5599
printk(KERN_INFO DRV_NAME
5600
": Incorrectly detected BG card as ABG. Please send "
5601
"your PCI ID 0x%04X:0x%04X to maintainer.\n",
5602
priv->pci_dev->device, priv->pci_dev->subsystem_device);
5603
priv->is_abg = 0;
5604
}
5605
5606
printk(KERN_INFO DRV_NAME
5607
": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5608
modes[G].num_channels, modes[A].num_channels);
5609
5610
/*
5611
* NOTE: We register these in preference of order -- the
5612
* stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
5613
* a phymode based on rates or AP capabilities but seems to
5614
* configure it purely on if the channel being configured
5615
* is supported by a mode -- and the first match is taken
5616
*/
5617
5618
if (modes[G].num_channels)
5619
iwlwifi_iwlwifi_ieee80211_register_hwmode(priv->hw, &modes[G]);
5620
if (modes[B].num_channels)
5621
iwlwifi_iwlwifi_ieee80211_register_hwmode(priv->hw, &modes[B]);
5622
if (modes[A].num_channels)
5623
iwlwifi_iwlwifi_ieee80211_register_hwmode(priv->hw, &modes[A]);
5624
5625
priv->modes = modes;
5626
set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5627
5628
return 0;
5629
}
5630
5631
/******************************************************************************
5632
*
5633
* uCode download functions
5634
*
5635
******************************************************************************/
5636
5637
static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
5638
{
5639
iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5640
iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5641
iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5642
iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5643
iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5644
iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5645
}
5646
5647
/**
5648
* iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
5649
* looking at all data.
5650
*/
5651
static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
5652
{
5653
u32 val;
5654
u32 save_len = len;
5655
int rc = 0;
5656
u32 errcnt;
5657
5658
IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5659
5660
rc = iwl3945_grab_nic_access(priv);
5661
if (rc)
5662
return rc;
5663
5664
iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5665
5666
errcnt = 0;
5667
for (; len > 0; len -= sizeof(u32), image++) {
5668
/* read data comes through single port, auto-incr addr */
5669
/* NOTE: Use the debugless read so we don't flood kernel log
5670
* if IWL_DL_IO is set */
5671
val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5672
if (val != le32_to_cpu(*image)) {
5673
IWL_ERROR("uCode INST section is invalid at "
5674
"offset 0x%x, is 0x%x, s/b 0x%x\n",
5675
save_len - len, val, le32_to_cpu(*image));
5676
rc = -EIO;
5677
errcnt++;
5678
if (errcnt >= 20)
5679
break;
5680
}
5681
}
5682
5683
iwl3945_release_nic_access(priv);
5684
5685
if (!errcnt)
5686
IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
5687
5688
return rc;
5689
}
5690
5691
5692
/**
5693
* iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
5694
* using sample data 100 bytes apart. If these sample points are good,
5695
* it's a pretty good bet that everything between them is good, too.
5696
*/
5697
static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
5698
{
5699
u32 val;
5700
int rc = 0;
5701
u32 errcnt = 0;
5702
u32 i;
5703
5704
IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5705
5706
rc = iwl3945_grab_nic_access(priv);
5707
if (rc)
5708
return rc;
5709
5710
for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5711
/* read data comes through single port, auto-incr addr */
5712
/* NOTE: Use the debugless read so we don't flood kernel log
5713
* if IWL_DL_IO is set */
5714
iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5715
i + RTC_INST_LOWER_BOUND);
5716
val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5717
if (val != le32_to_cpu(*image)) {
5718
#if 0 /* Enable this if you want to see details */
5719
IWL_ERROR("uCode INST section is invalid at "
5720
"offset 0x%x, is 0x%x, s/b 0x%x\n",
5721
i, val, *image);
5722
#endif
5723
rc = -EIO;
5724
errcnt++;
5725
if (errcnt >= 3)
5726
break;
5727
}
5728
}
5729
5730
iwl3945_release_nic_access(priv);
5731
5732
return rc;
5733
}
5734
5735
5736
/**
5737
* iwl3945_verify_ucode - determine which instruction image is in SRAM,
5738
* and verify its contents
5739
*/
5740
static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
5741
{
5742
__le32 *image;
5743
u32 len;
5744
int rc = 0;
5745
5746
/* Try bootstrap */
5747
image = (__le32 *)priv->ucode_boot.v_addr;
5748
len = priv->ucode_boot.len;
5749
rc = iwl3945_verify_inst_sparse(priv, image, len);
5750
if (rc == 0) {
5751
IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5752
return 0;
5753
}
5754
5755
/* Try initialize */
5756
image = (__le32 *)priv->ucode_init.v_addr;
5757
len = priv->ucode_init.len;
5758
rc = iwl3945_verify_inst_sparse(priv, image, len);
5759
if (rc == 0) {
5760
IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5761
return 0;
5762
}
5763
5764
/* Try runtime/protocol */
5765
image = (__le32 *)priv->ucode_code.v_addr;
5766
len = priv->ucode_code.len;
5767
rc = iwl3945_verify_inst_sparse(priv, image, len);
5768
if (rc == 0) {
5769
IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5770
return 0;
5771
}
5772
5773
IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5774
5775
/* Since nothing seems to match, show first several data entries in
5776
* instruction SRAM, so maybe visual inspection will give a clue.
5777
* Selection of bootstrap image (vs. other images) is arbitrary. */
5778
image = (__le32 *)priv->ucode_boot.v_addr;
5779
len = priv->ucode_boot.len;
5780
rc = iwl3945_verify_inst_full(priv, image, len);
5781
5782
return rc;
5783
}
5784
5785
5786
/* check contents of special bootstrap uCode SRAM */
5787
static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
5788
{
5789
__le32 *image = priv->ucode_boot.v_addr;
5790
u32 len = priv->ucode_boot.len;
5791
u32 reg;
5792
u32 val;
5793
5794
IWL_DEBUG_INFO("Begin verify bsm\n");
5795
5796
/* verify BSM SRAM contents */
5797
val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
5798
for (reg = BSM_SRAM_LOWER_BOUND;
5799
reg < BSM_SRAM_LOWER_BOUND + len;
5800
reg += sizeof(u32), image ++) {
5801
val = iwl3945_read_prph(priv, reg);
5802
if (val != le32_to_cpu(*image)) {
5803
IWL_ERROR("BSM uCode verification failed at "
5804
"addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5805
BSM_SRAM_LOWER_BOUND,
5806
reg - BSM_SRAM_LOWER_BOUND, len,
5807
val, le32_to_cpu(*image));
5808
return -EIO;
5809
}
5810
}
5811
5812
IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5813
5814
return 0;
5815
}
5816
5817
/**
5818
* iwl3945_load_bsm - Load bootstrap instructions
5819
*
5820
* BSM operation:
5821
*
5822
* The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5823
* in special SRAM that does not power down during RFKILL. When powering back
5824
* up after power-saving sleeps (or during initial uCode load), the BSM loads
5825
* the bootstrap program into the on-board processor, and starts it.
5826
*
5827
* The bootstrap program loads (via DMA) instructions and data for a new
5828
* program from host DRAM locations indicated by the host driver in the
5829
* BSM_DRAM_* registers. Once the new program is loaded, it starts
5830
* automatically.
5831
*
5832
* When initializing the NIC, the host driver points the BSM to the
5833
* "initialize" uCode image. This uCode sets up some internal data, then
5834
* notifies host via "initialize alive" that it is complete.
5835
*
5836
* The host then replaces the BSM_DRAM_* pointer values to point to the
5837
* normal runtime uCode instructions and a backup uCode data cache buffer
5838
* (filled initially with starting data values for the on-board processor),
5839
* then triggers the "initialize" uCode to load and launch the runtime uCode,
5840
* which begins normal operation.
5841
*
5842
* When doing a power-save shutdown, runtime uCode saves data SRAM into
5843
* the backup data cache in DRAM before SRAM is powered down.
5844
*
5845
* When powering back up, the BSM loads the bootstrap program. This reloads
5846
* the runtime uCode instructions and the backup data cache into SRAM,
5847
* and re-launches the runtime uCode from where it left off.
5848
*/
5849
static int iwl3945_load_bsm(struct iwl3945_priv *priv)
5850
{
5851
__le32 *image = priv->ucode_boot.v_addr;
5852
u32 len = priv->ucode_boot.len;
5853
dma_addr_t pinst;
5854
dma_addr_t pdata;
5855
u32 inst_len;
5856
u32 data_len;
5857
int rc;
5858
int i;
5859
u32 done;
5860
u32 reg_offset;
5861
5862
IWL_DEBUG_INFO("Begin load bsm\n");
5863
5864
/* make sure bootstrap program is no larger than BSM's SRAM size */
5865
if (len > IWL_MAX_BSM_SIZE)
5866
return -EINVAL;
5867
5868
/* Tell bootstrap uCode where to find the "Initialize" uCode
5869
* in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5870
* NOTE: iwl3945_initialize_alive_start() will replace these values,
5871
* after the "initialize" uCode has run, to point to
5872
* runtime/protocol instructions and backup data cache. */
5873
pinst = priv->ucode_init.p_addr;
5874
pdata = priv->ucode_init_data.p_addr;
5875
inst_len = priv->ucode_init.len;
5876
data_len = priv->ucode_init_data.len;
5877
5878
rc = iwl3945_grab_nic_access(priv);
5879
if (rc)
5880
return rc;
5881
5882
iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5883
iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5884
iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5885
iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5886
5887
/* Fill BSM memory with bootstrap instructions */
5888
for (reg_offset = BSM_SRAM_LOWER_BOUND;
5889
reg_offset < BSM_SRAM_LOWER_BOUND + len;
5890
reg_offset += sizeof(u32), image++)
5891
_iwl3945_write_prph(priv, reg_offset,
5892
le32_to_cpu(*image));
5893
5894
rc = iwl3945_verify_bsm(priv);
5895
if (rc) {
5896
iwl3945_release_nic_access(priv);
5897
return rc;
5898
}
5899
5900
/* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5901
iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5902
iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
5903
RTC_INST_LOWER_BOUND);
5904
iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5905
5906
/* Load bootstrap code into instruction SRAM now,
5907
* to prepare to load "initialize" uCode */
5908
iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5909
BSM_WR_CTRL_REG_BIT_START);
5910
5911
/* Wait for load of bootstrap uCode to finish */
5912
for (i = 0; i < 100; i++) {
5913
done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
5914
if (!(done & BSM_WR_CTRL_REG_BIT_START))
5915
break;
5916
udelay(10);
5917
}
5918
if (i < 100)
5919
IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5920
else {
5921
IWL_ERROR("BSM write did not complete!\n");
5922
return -EIO;
5923
}
5924
5925
/* Enable future boot loads whenever power management unit triggers it
5926
* (e.g. when powering back up after power-save shutdown) */
5927
iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5928
BSM_WR_CTRL_REG_BIT_START_EN);
5929
5930
iwl3945_release_nic_access(priv);
5931
5932
return 0;
5933
}
5934
5935
static void iwl3945_nic_start(struct iwl3945_priv *priv)
5936
{
5937
/* Remove all resets to allow NIC to operate */
5938
iwl3945_write32(priv, CSR_RESET, 0);
5939
}
5940
5941
/**
5942
* iwl3945_read_ucode - Read uCode images from disk file.
5943
*
5944
* Copy into buffers for card to fetch via bus-mastering
5945
*/
5946
static int iwl3945_read_ucode(struct iwl3945_priv *priv)
5947
{
5948
struct iwl3945_ucode *ucode;
5949
int ret = 0;
5950
const struct firmware *ucode_raw;
5951
/* firmware file name contains uCode/driver compatibility version */
5952
const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
5953
u8 *src;
5954
size_t len;
5955
u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5956
5957
/* Ask kernel firmware_class module to get the boot firmware off disk.
5958
* request_firmware() is synchronous, file is in memory on return. */
5959
ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5960
if (ret < 0) {
5961
IWL_ERROR("%s firmware file req failed: Reason %d\n",
5962
name, ret);
5963
goto error;
5964
}
5965
5966
IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5967
name, ucode_raw->size);
5968
5969
/* Make sure that we got at least our header! */
5970
if (ucode_raw->size < sizeof(*ucode)) {
5971
IWL_ERROR("File size way too small!\n");
5972
ret = -EINVAL;
5973
goto err_release;
5974
}
5975
5976
/* Data from ucode file: header followed by uCode images */
5977
ucode = (void *)ucode_raw->data;
5978
5979
ver = le32_to_cpu(ucode->ver);
5980
inst_size = le32_to_cpu(ucode->inst_size);
5981
data_size = le32_to_cpu(ucode->data_size);
5982
init_size = le32_to_cpu(ucode->init_size);
5983
init_data_size = le32_to_cpu(ucode->init_data_size);
5984
boot_size = le32_to_cpu(ucode->boot_size);
5985
5986
IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5987
IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5988
IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5989
IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5990
IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5991
IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5992
5993
/* Verify size of file vs. image size info in file's header */
5994
if (ucode_raw->size < sizeof(*ucode) +
5995
inst_size + data_size + init_size +
5996
init_data_size + boot_size) {
5997
5998
IWL_DEBUG_INFO("uCode file size %d too small\n",
5999
(int)ucode_raw->size);
6000
ret = -EINVAL;
6001
goto err_release;
6002
}
6003
6004
/* Verify that uCode images will fit in card's SRAM */
6005
if (inst_size > IWL_MAX_INST_SIZE) {
6006
IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
6007
inst_size);
6008
ret = -EINVAL;
6009
goto err_release;
6010
}
6011
6012
if (data_size > IWL_MAX_DATA_SIZE) {
6013
IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
6014
data_size);
6015
ret = -EINVAL;
6016
goto err_release;
6017
}
6018
if (init_size > IWL_MAX_INST_SIZE) {
6019
IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
6020
init_size);
6021
ret = -EINVAL;
6022
goto err_release;
6023
}
6024
if (init_data_size > IWL_MAX_DATA_SIZE) {
6025
IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
6026
init_data_size);
6027
ret = -EINVAL;
6028
goto err_release;
6029
}
6030
if (boot_size > IWL_MAX_BSM_SIZE) {
6031
IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
6032
boot_size);
6033
ret = -EINVAL;
6034
goto err_release;
6035
}
6036
6037
/* Allocate ucode buffers for card's bus-master loading ... */
6038
6039
/* Runtime instructions and 2 copies of data:
6040
* 1) unmodified from disk
6041
* 2) backup cache for save/restore during power-downs */
6042
priv->ucode_code.len = inst_size;
6043
iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
6044
6045
priv->ucode_data.len = data_size;
6046
iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
6047
6048
priv->ucode_data_backup.len = data_size;
6049
iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
6050
6051
if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
6052
!priv->ucode_data_backup.v_addr)
6053
goto err_pci_alloc;
6054
6055
/* Initialization instructions and data */
6056
if (init_size && init_data_size) {
6057
priv->ucode_init.len = init_size;
6058
iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
6059
6060
priv->ucode_init_data.len = init_data_size;
6061
iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
6062
6063
if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6064
goto err_pci_alloc;
6065
}
6066
6067
/* Bootstrap (instructions only, no data) */
6068
if (boot_size) {
6069
priv->ucode_boot.len = boot_size;
6070
iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
6071
6072
if (!priv->ucode_boot.v_addr)
6073
goto err_pci_alloc;
6074
}
6075
6076
/* Copy images into buffers for card's bus-master reads ... */
6077
6078
/* Runtime instructions (first block of data in file) */
6079
src = &ucode->data[0];
6080
len = priv->ucode_code.len;
6081
IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
6082
memcpy(priv->ucode_code.v_addr, src, len);
6083
IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6084
priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6085
6086
/* Runtime data (2nd block)
6087
* NOTE: Copy into backup buffer will be done in iwl3945_up() */
6088
src = &ucode->data[inst_size];
6089
len = priv->ucode_data.len;
6090
IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
6091
memcpy(priv->ucode_data.v_addr, src, len);
6092
memcpy(priv->ucode_data_backup.v_addr, src, len);
6093
6094
/* Initialization instructions (3rd block) */
6095
if (init_size) {
6096
src = &ucode->data[inst_size + data_size];
6097
len = priv->ucode_init.len;
6098
IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6099
len);
6100
memcpy(priv->ucode_init.v_addr, src, len);
6101
}
6102
6103
/* Initialization data (4th block) */
6104
if (init_data_size) {
6105
src = &ucode->data[inst_size + data_size + init_size];
6106
len = priv->ucode_init_data.len;
6107
IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
6108
(int)len);
6109
memcpy(priv->ucode_init_data.v_addr, src, len);
6110
}
6111
6112
/* Bootstrap instructions (5th block) */
6113
src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6114
len = priv->ucode_boot.len;
6115
IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
6116
(int)len);
6117
memcpy(priv->ucode_boot.v_addr, src, len);
6118
6119
/* We have our copies now, allow OS release its copies */
6120
release_firmware(ucode_raw);
6121
return 0;
6122
6123
err_pci_alloc:
6124
IWL_ERROR("failed to allocate pci memory\n");
6125
ret = -ENOMEM;
6126
iwl3945_dealloc_ucode_pci(priv);
6127
6128
err_release:
6129
release_firmware(ucode_raw);
6130
6131
error:
6132
return ret;
6133
}
6134
6135
6136
/**
6137
* iwl3945_set_ucode_ptrs - Set uCode address location
6138
*
6139
* Tell initialization uCode where to find runtime uCode.
6140
*
6141
* BSM registers initially contain pointers to initialization uCode.
6142
* We need to replace them to load runtime uCode inst and data,
6143
* and to save runtime data when powering down.
6144
*/
6145
static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
6146
{
6147
dma_addr_t pinst;
6148
dma_addr_t pdata;
6149
int rc = 0;
6150
unsigned long flags;
6151
6152
/* bits 31:0 for 3945 */
6153
pinst = priv->ucode_code.p_addr;
6154
pdata = priv->ucode_data_backup.p_addr;
6155
6156
spin_lock_irqsave(&priv->lock, flags);
6157
rc = iwl3945_grab_nic_access(priv);
6158
if (rc) {
6159
spin_unlock_irqrestore(&priv->lock, flags);
6160
return rc;
6161
}
6162
6163
/* Tell bootstrap uCode where to find image to load */
6164
iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6165
iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6166
iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
6167
priv->ucode_data.len);
6168
6169
/* Inst bytecount must be last to set up, bit 31 signals uCode
6170
* that all new ptr/size info is in place */
6171
iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
6172
priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6173
6174
iwl3945_release_nic_access(priv);
6175
6176
spin_unlock_irqrestore(&priv->lock, flags);
6177
6178
IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6179
6180
return rc;
6181
}
6182
6183
/**
6184
* iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
6185
*
6186
* Called after REPLY_ALIVE notification received from "initialize" uCode.
6187
*
6188
* Tell "initialize" uCode to go ahead and load the runtime uCode.
6189
*/
6190
static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
6191
{
6192
/* Check alive response for "valid" sign from uCode */
6193
if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6194
/* We had an error bringing up the hardware, so take it
6195
* all the way back down so we can try again */
6196
IWL_DEBUG_INFO("Initialize Alive failed.\n");
6197
goto restart;
6198
}
6199
6200
/* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6201
* This is a paranoid check, because we would not have gotten the
6202
* "initialize" alive if code weren't properly loaded. */
6203
if (iwl3945_verify_ucode(priv)) {
6204
/* Runtime instruction load was bad;
6205
* take it all the way back down so we can try again */
6206
IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6207
goto restart;
6208
}
6209
6210
/* Send pointers to protocol/runtime uCode image ... init code will
6211
* load and launch runtime uCode, which will send us another "Alive"
6212
* notification. */
6213
IWL_DEBUG_INFO("Initialization Alive received.\n");
6214
if (iwl3945_set_ucode_ptrs(priv)) {
6215
/* Runtime instruction load won't happen;
6216
* take it all the way back down so we can try again */
6217
IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6218
goto restart;
6219
}
6220
return;
6221
6222
restart:
6223
queue_work(priv->workqueue, &priv->restart);
6224
}
6225
6226
6227
/**
6228
* iwl3945_alive_start - called after REPLY_ALIVE notification received
6229
* from protocol/runtime uCode (initialization uCode's
6230
* Alive gets handled by iwl3945_init_alive_start()).
6231
*/
6232
static void iwl3945_alive_start(struct iwl3945_priv *priv)
6233
{
6234
int rc = 0;
6235
int thermal_spin = 0;
6236
u32 rfkill;
6237
6238
IWL_DEBUG_INFO("Runtime Alive received.\n");
6239
6240
if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6241
/* We had an error bringing up the hardware, so take it
6242
* all the way back down so we can try again */
6243
IWL_DEBUG_INFO("Alive failed.\n");
6244
goto restart;
6245
}
6246
6247
/* Initialize uCode has loaded Runtime uCode ... verify inst image.
6248
* This is a paranoid check, because we would not have gotten the
6249
* "runtime" alive if code weren't properly loaded. */
6250
if (iwl3945_verify_ucode(priv)) {
6251
/* Runtime instruction load was bad;
6252
* take it all the way back down so we can try again */
6253
IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6254
goto restart;
6255
}
6256
6257
iwl3945_clear_stations_table(priv);
6258
6259
rc = iwl3945_grab_nic_access(priv);
6260
if (rc) {
6261
IWL_WARNING("Can not read rfkill status from adapter\n");
6262
return;
6263
}
6264
6265
rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
6266
IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
6267
iwl3945_release_nic_access(priv);
6268
6269
if (rfkill & 0x1) {
6270
clear_bit(STATUS_RF_KILL_HW, &priv->status);
6271
/* if rfkill is not on, then wait for thermal
6272
* sensor in adapter to kick in */
6273
while (iwl3945_hw_get_temperature(priv) == 0) {
6274
thermal_spin++;
6275
udelay(10);
6276
}
6277
6278
if (thermal_spin)
6279
IWL_DEBUG_INFO("Thermal calibration took %dus\n",
6280
thermal_spin * 10);
6281
} else
6282
set_bit(STATUS_RF_KILL_HW, &priv->status);
6283
6284
/* After the ALIVE response, we can send commands to 3945 uCode */
6285
set_bit(STATUS_ALIVE, &priv->status);
6286
6287
/* Clear out the uCode error bit if it is set */
6288
clear_bit(STATUS_FW_ERROR, &priv->status);
6289
6290
rc = iwl3945_init_channel_map(priv);
6291
if (rc) {
6292
IWL_ERROR("initializing regulatory failed: %d\n", rc);
6293
return;
6294
}
6295
6296
iwl3945_init_geos(priv);
6297
iwl3945_reset_channel_flag(priv);
6298
6299
if (iwl3945_is_rfkill(priv))
6300
return;
6301
6302
iwlwifi_ieee80211_start_queues(priv->hw);
6303
6304
priv->active_rate = priv->rates_mask;
6305
priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6306
6307
iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
6308
6309
if (iwl3945_is_associated(priv)) {
6310
struct iwl3945_rxon_cmd *active_rxon =
6311
(struct iwl3945_rxon_cmd *)(&priv->active_rxon);
6312
6313
memcpy(&priv->staging_rxon, &priv->active_rxon,
6314
sizeof(priv->staging_rxon));
6315
active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6316
} else {
6317
/* Initialize our rx_config data */
6318
iwl3945_connection_init_rx_config(priv);
6319
memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6320
}
6321
6322
/* Configure Bluetooth device coexistence support */
6323
iwl3945_send_bt_config(priv);
6324
6325
/* Configure the adapter for unassociated operation */
6326
iwl3945_commit_rxon(priv);
6327
6328
/* At this point, the NIC is initialized and operational */
6329
priv->notif_missed_beacons = 0;
6330
set_bit(STATUS_READY, &priv->status);
6331
6332
iwl3945_reg_txpower_periodic(priv);
6333
6334
iwl3945_led_register(priv);
6335
6336
IWL_DEBUG_INFO("ALIVE processing complete.\n");
6337
wake_up_interruptible(&priv->wait_command_queue);
6338
6339
if (priv->error_recovering)
6340
iwl3945_error_recovery(priv);
6341
6342
return;
6343
6344
restart:
6345
queue_work(priv->workqueue, &priv->restart);
6346
}
6347
6348
static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
6349
6350
static void __iwl3945_down(struct iwl3945_priv *priv)
6351
{
6352
unsigned long flags;
6353
int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6354
struct ieee80211_conf *conf = NULL;
6355
6356
IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6357
6358
conf = ieee80211_get_hw_conf(priv->hw);
6359
6360
if (!exit_pending)
6361
set_bit(STATUS_EXIT_PENDING, &priv->status);
6362
6363
iwl3945_led_unregister(priv);
6364
iwl3945_clear_stations_table(priv);
6365
6366
/* Unblock any waiting calls */
6367
wake_up_interruptible_all(&priv->wait_command_queue);
6368
6369
/* Wipe out the EXIT_PENDING status bit if we are not actually
6370
* exiting the module */
6371
if (!exit_pending)
6372
clear_bit(STATUS_EXIT_PENDING, &priv->status);
6373
6374
/* stop and reset the on-board processor */
6375
iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6376
6377
/* tell the device to stop sending interrupts */
6378
iwl3945_disable_interrupts(priv);
6379
6380
if (priv->mac80211_registered)
6381
iwlwifi_iwlwifi_ieee80211_stop_queues(priv->hw);
6382
6383
/* If we have not previously called iwl3945_init() then
6384
* clear all bits but the RF Kill and SUSPEND bits and return */
6385
if (!iwl3945_is_init(priv)) {
6386
priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6387
STATUS_RF_KILL_HW |
6388
test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6389
STATUS_RF_KILL_SW |
6390
test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6391
STATUS_IN_SUSPEND;
6392
goto exit;
6393
}
6394
6395
/* ...otherwise clear out all the status bits but the RF Kill and
6396
* SUSPEND bits and continue taking the NIC down. */
6397
priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6398
STATUS_RF_KILL_HW |
6399
test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6400
STATUS_RF_KILL_SW |
6401
test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6402
STATUS_IN_SUSPEND |
6403
test_bit(STATUS_FW_ERROR, &priv->status) <<
6404
STATUS_FW_ERROR;
6405
6406
spin_lock_irqsave(&priv->lock, flags);
6407
iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
6408
spin_unlock_irqrestore(&priv->lock, flags);
6409
6410
iwl3945_hw_txq_ctx_stop(priv);
6411
iwl3945_hw_rxq_stop(priv);
6412
6413
spin_lock_irqsave(&priv->lock, flags);
6414
if (!iwl3945_grab_nic_access(priv)) {
6415
iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
6416
APMG_CLK_VAL_DMA_CLK_RQT);
6417
iwl3945_release_nic_access(priv);
6418
}
6419
spin_unlock_irqrestore(&priv->lock, flags);
6420
6421
udelay(5);
6422
6423
iwl3945_hw_nic_stop_master(priv);
6424
iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6425
iwl3945_hw_nic_reset(priv);
6426
6427
exit:
6428
memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
6429
6430
if (priv->ibss_beacon)
6431
dev_kfree_skb(priv->ibss_beacon);
6432
priv->ibss_beacon = NULL;
6433
6434
/* clear out any free frames */
6435
iwl3945_clear_free_frames(priv);
6436
}
6437
6438
static void iwl3945_down(struct iwl3945_priv *priv)
6439
{
6440
mutex_lock(&priv->mutex);
6441
__iwl3945_down(priv);
6442
mutex_unlock(&priv->mutex);
6443
6444
iwl3945_cancel_deferred_work(priv);
6445
}
6446
6447
#define MAX_HW_RESTARTS 5
6448
6449
static int __iwl3945_up(struct iwl3945_priv *priv)
6450
{
6451
int rc, i;
6452
6453
if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6454
IWL_WARNING("Exit pending; will not bring the NIC up\n");
6455
return -EIO;
6456
}
6457
6458
if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6459
IWL_WARNING("Radio disabled by SW RF kill (module "
6460
"parameter)\n");
6461
return -ENODEV;
6462
}
6463
6464
/* If platform's RF_KILL switch is NOT set to KILL */
6465
if (iwl3945_read32(priv, CSR_GP_CNTRL) &
6466
CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6467
clear_bit(STATUS_RF_KILL_HW, &priv->status);
6468
else {
6469
set_bit(STATUS_RF_KILL_HW, &priv->status);
6470
if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6471
IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6472
return -ENODEV;
6473
}
6474
}
6475
6476
iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6477
6478
rc = iwl3945_hw_nic_init(priv);
6479
if (rc) {
6480
IWL_ERROR("Unable to int nic\n");
6481
return rc;
6482
}
6483
6484
/* make sure rfkill handshake bits are cleared */
6485
iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6486
iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
6487
CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6488
6489
/* clear (again), then enable host interrupts */
6490
iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6491
iwl3945_enable_interrupts(priv);
6492
6493
/* really make sure rfkill handshake bits are cleared */
6494
iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6495
iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6496
6497
/* Copy original ucode data image from disk into backup cache.
6498
* This will be used to initialize the on-board processor's
6499
* data SRAM for a clean start when the runtime program first loads. */
6500
memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6501
priv->ucode_data.len);
6502
6503
/* We return success when we resume from suspend and rf_kill is on. */
6504
if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6505
return 0;
6506
6507
for (i = 0; i < MAX_HW_RESTARTS; i++) {
6508
6509
iwl3945_clear_stations_table(priv);
6510
6511
/* load bootstrap state machine,
6512
* load bootstrap program into processor's memory,
6513
* prepare to load the "initialize" uCode */
6514
rc = iwl3945_load_bsm(priv);
6515
6516
if (rc) {
6517
IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6518
continue;
6519
}
6520
6521
/* start card; "initialize" will load runtime ucode */
6522
iwl3945_nic_start(priv);
6523
6524
IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6525
6526
return 0;
6527
}
6528
6529
set_bit(STATUS_EXIT_PENDING, &priv->status);
6530
__iwl3945_down(priv);
6531
6532
/* tried to restart and config the device for as long as our
6533
* patience could withstand */
6534
IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6535
return -EIO;
6536
}
6537
6538
6539
/*****************************************************************************
6540
*
6541
* Workqueue callbacks
6542
*
6543
*****************************************************************************/
6544
6545
static void iwl3945_bg_init_alive_start(struct work_struct *data)
6546
{
6547
struct iwl3945_priv *priv =
6548
container_of(data, struct iwl3945_priv, init_alive_start.work);
6549
6550
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6551
return;
6552
6553
mutex_lock(&priv->mutex);
6554
iwl3945_init_alive_start(priv);
6555
mutex_unlock(&priv->mutex);
6556
}
6557
6558
static void iwl3945_bg_alive_start(struct work_struct *data)
6559
{
6560
struct iwl3945_priv *priv =
6561
container_of(data, struct iwl3945_priv, alive_start.work);
6562
6563
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6564
return;
6565
6566
mutex_lock(&priv->mutex);
6567
iwl3945_alive_start(priv);
6568
mutex_unlock(&priv->mutex);
6569
}
6570
6571
static void iwl3945_bg_rf_kill(struct work_struct *work)
6572
{
6573
struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
6574
6575
wake_up_interruptible(&priv->wait_command_queue);
6576
6577
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6578
return;
6579
6580
mutex_lock(&priv->mutex);
6581
6582
if (!iwl3945_is_rfkill(priv)) {
6583
IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6584
"HW and/or SW RF Kill no longer active, restarting "
6585
"device\n");
6586
if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6587
queue_work(priv->workqueue, &priv->restart);
6588
} else {
6589
6590
if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6591
IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6592
"disabled by SW switch\n");
6593
else
6594
IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6595
"Kill switch must be turned off for "
6596
"wireless networking to work.\n");
6597
}
6598
mutex_unlock(&priv->mutex);
6599
}
6600
6601
#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6602
6603
static void iwl3945_bg_scan_check(struct work_struct *data)
6604
{
6605
struct iwl3945_priv *priv =
6606
container_of(data, struct iwl3945_priv, scan_check.work);
6607
6608
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6609
return;
6610
6611
mutex_lock(&priv->mutex);
6612
if (test_bit(STATUS_SCANNING, &priv->status) ||
6613
test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6614
IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6615
"Scan completion watchdog resetting adapter (%dms)\n",
6616
jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6617
6618
if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6619
iwl3945_send_scan_abort(priv);
6620
}
6621
mutex_unlock(&priv->mutex);
6622
}
6623
6624
static void iwl3945_bg_request_scan(struct work_struct *data)
6625
{
6626
struct iwl3945_priv *priv =
6627
container_of(data, struct iwl3945_priv, request_scan);
6628
struct iwl3945_host_cmd cmd = {
6629
.id = REPLY_SCAN_CMD,
6630
.len = sizeof(struct iwl3945_scan_cmd),
6631
.meta.flags = CMD_SIZE_HUGE,
6632
};
6633
int rc = 0;
6634
struct iwl3945_scan_cmd *scan;
6635
struct ieee80211_conf *conf = NULL;
6636
u8 direct_mask;
6637
int phymode;
6638
6639
conf = ieee80211_get_hw_conf(priv->hw);
6640
6641
mutex_lock(&priv->mutex);
6642
6643
if (!iwl3945_is_ready(priv)) {
6644
IWL_WARNING("request scan called when driver not ready.\n");
6645
goto done;
6646
}
6647
6648
/* Make sure the scan wasn't cancelled before this queued work
6649
* was given the chance to run... */
6650
if (!test_bit(STATUS_SCANNING, &priv->status))
6651
goto done;
6652
6653
/* This should never be called or scheduled if there is currently
6654
* a scan active in the hardware. */
6655
if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6656
IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6657
"Ignoring second request.\n");
6658
rc = -EIO;
6659
goto done;
6660
}
6661
6662
if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6663
IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6664
goto done;
6665
}
6666
6667
if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6668
IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6669
goto done;
6670
}
6671
6672
if (iwl3945_is_rfkill(priv)) {
6673
IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6674
goto done;
6675
}
6676
6677
if (!test_bit(STATUS_READY, &priv->status)) {
6678
IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6679
goto done;
6680
}
6681
6682
if (!priv->scan_bands) {
6683
IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6684
goto done;
6685
}
6686
6687
if (!priv->scan) {
6688
priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6689
IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6690
if (!priv->scan) {
6691
rc = -ENOMEM;
6692
goto done;
6693
}
6694
}
6695
scan = priv->scan;
6696
memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6697
6698
scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6699
scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6700
6701
if (iwl3945_is_associated(priv)) {
6702
u16 interval = 0;
6703
u32 extra;
6704
u32 suspend_time = 100;
6705
u32 scan_suspend_time = 100;
6706
unsigned long flags;
6707
6708
IWL_DEBUG_INFO("Scanning while associated...\n");
6709
6710
spin_lock_irqsave(&priv->lock, flags);
6711
interval = priv->beacon_int;
6712
spin_unlock_irqrestore(&priv->lock, flags);
6713
6714
scan->suspend_time = 0;
6715
scan->max_out_time = cpu_to_le32(200 * 1024);
6716
if (!interval)
6717
interval = suspend_time;
6718
/*
6719
* suspend time format:
6720
* 0-19: beacon interval in usec (time before exec.)
6721
* 20-23: 0
6722
* 24-31: number of beacons (suspend between channels)
6723
*/
6724
6725
extra = (suspend_time / interval) << 24;
6726
scan_suspend_time = 0xFF0FFFFF &
6727
(extra | ((suspend_time % interval) * 1024));
6728
6729
scan->suspend_time = cpu_to_le32(scan_suspend_time);
6730
IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6731
scan_suspend_time, interval);
6732
}
6733
6734
/* We should add the ability for user to lock to PASSIVE ONLY */
6735
if (priv->one_direct_scan) {
6736
IWL_DEBUG_SCAN
6737
("Kicking off one direct scan for '%s'\n",
6738
iwl3945_escape_essid(priv->direct_ssid,
6739
priv->direct_ssid_len));
6740
scan->direct_scan[0].id = WLAN_EID_SSID;
6741
scan->direct_scan[0].len = priv->direct_ssid_len;
6742
memcpy(scan->direct_scan[0].ssid,
6743
priv->direct_ssid, priv->direct_ssid_len);
6744
direct_mask = 1;
6745
} else if (!iwl3945_is_associated(priv) && priv->essid_len) {
6746
scan->direct_scan[0].id = WLAN_EID_SSID;
6747
scan->direct_scan[0].len = priv->essid_len;
6748
memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6749
direct_mask = 1;
6750
} else
6751
direct_mask = 0;
6752
6753
/* We don't build a direct scan probe request; the uCode will do
6754
* that based on the direct_mask added to each channel entry */
6755
scan->tx_cmd.len = cpu_to_le16(
6756
iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6757
IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
6758
scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6759
scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6760
scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6761
6762
/* flags + rate selection */
6763
6764
switch (priv->scan_bands) {
6765
case 2:
6766
scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6767
scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6768
scan->good_CRC_th = 0;
6769
phymode = MODE_IEEE80211G;
6770
break;
6771
6772
case 1:
6773
scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6774
scan->good_CRC_th = IWL_GOOD_CRC_TH;
6775
phymode = MODE_IEEE80211A;
6776
break;
6777
6778
default:
6779
IWL_WARNING("Invalid scan band count\n");
6780
goto done;
6781
}
6782
6783
/* select Rx antennas */
6784
scan->flags |= iwl3945_get_antenna_flags(priv);
6785
6786
if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6787
scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6788
6789
if (direct_mask)
6790
IWL_DEBUG_SCAN
6791
("Initiating direct scan for %s.\n",
6792
iwl3945_escape_essid(priv->essid, priv->essid_len));
6793
else
6794
IWL_DEBUG_SCAN("Initiating indirect scan.\n");
6795
6796
scan->channel_count =
6797
iwl3945_get_channels_for_scan(
6798
priv, phymode, 1, /* active */
6799
direct_mask,
6800
(void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6801
6802
cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6803
scan->channel_count * sizeof(struct iwl3945_scan_channel);
6804
cmd.data = scan;
6805
scan->len = cpu_to_le16(cmd.len);
6806
6807
set_bit(STATUS_SCAN_HW, &priv->status);
6808
rc = iwl3945_send_cmd_sync(priv, &cmd);
6809
if (rc)
6810
goto done;
6811
6812
queue_delayed_work(priv->workqueue, &priv->scan_check,
6813
IWL_SCAN_CHECK_WATCHDOG);
6814
6815
mutex_unlock(&priv->mutex);
6816
return;
6817
6818
done:
6819
/* inform mac80211 scan aborted */
6820
queue_work(priv->workqueue, &priv->scan_completed);
6821
mutex_unlock(&priv->mutex);
6822
}
6823
6824
static void iwl3945_bg_up(struct work_struct *data)
6825
{
6826
struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
6827
6828
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6829
return;
6830
6831
mutex_lock(&priv->mutex);
6832
__iwl3945_up(priv);
6833
mutex_unlock(&priv->mutex);
6834
}
6835
6836
static void iwl3945_bg_restart(struct work_struct *data)
6837
{
6838
struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
6839
6840
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6841
return;
6842
6843
iwl3945_down(priv);
6844
queue_work(priv->workqueue, &priv->up);
6845
}
6846
6847
static void iwl3945_bg_rx_replenish(struct work_struct *data)
6848
{
6849
struct iwl3945_priv *priv =
6850
container_of(data, struct iwl3945_priv, rx_replenish);
6851
6852
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6853
return;
6854
6855
mutex_lock(&priv->mutex);
6856
iwl3945_rx_replenish(priv);
6857
mutex_unlock(&priv->mutex);
6858
}
6859
6860
#define IWL_DELAY_NEXT_SCAN (HZ*2)
6861
6862
static void iwl3945_bg_post_associate(struct work_struct *data)
6863
{
6864
struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
6865
post_associate.work);
6866
6867
int rc = 0;
6868
struct ieee80211_conf *conf = NULL;
6869
6870
if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6871
IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6872
return;
6873
}
6874
6875
6876
IWL_DEBUG_ASSOC("Associated as %d to: " MAC_FMT "\n",
6877
priv->assoc_id, MAC_ARG(priv->active_rxon.bssid_addr));
6878
6879
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6880
return;
6881
6882
mutex_lock(&priv->mutex);
6883
6884
if (!priv->interface_id || !priv->is_open) {
6885
mutex_unlock(&priv->mutex);
6886
return;
6887
}
6888
iwl3945_scan_cancel_timeout(priv, 200);
6889
6890
conf = ieee80211_get_hw_conf(priv->hw);
6891
6892
priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6893
iwl3945_commit_rxon(priv);
6894
6895
memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6896
iwl3945_setup_rxon_timing(priv);
6897
rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6898
sizeof(priv->rxon_timing), &priv->rxon_timing);
6899
if (rc)
6900
IWL_WARNING("REPLY_RXON_TIMING failed - "
6901
"Attempting to continue.\n");
6902
6903
priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6904
6905
priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6906
6907
IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6908
priv->assoc_id, priv->beacon_int);
6909
6910
if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6911
priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6912
else
6913
priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6914
6915
if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6916
if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6917
priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6918
else
6919
priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6920
6921
if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6922
priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6923
6924
}
6925
6926
iwl3945_commit_rxon(priv);
6927
6928
switch (priv->iw_mode) {
6929
case IEEE80211_IF_TYPE_STA:
6930
iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6931
break;
6932
6933
case IEEE80211_IF_TYPE_IBSS:
6934
6935
/* clear out the station table */
6936
iwl3945_clear_stations_table(priv);
6937
6938
iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6939
iwl3945_add_station(priv, priv->bssid, 0, 0);
6940
iwl3945_sync_sta(priv, IWL_STA_ID,
6941
(priv->phymode == MODE_IEEE80211A)?
6942
IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6943
CMD_ASYNC);
6944
iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6945
iwl3945_send_beacon_cmd(priv);
6946
6947
break;
6948
6949
default:
6950
IWL_ERROR("%s Should not be called in %d mode\n",
6951
__FUNCTION__, priv->iw_mode);
6952
break;
6953
}
6954
6955
iwl3945_sequence_reset(priv);
6956
6957
#ifdef CONFIG_IWL3945_QOS
6958
iwl3945_activate_qos(priv, 0);
6959
#endif /* CONFIG_IWL3945_QOS */
6960
/* we have just associated, don't start scan too early */
6961
priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6962
mutex_unlock(&priv->mutex);
6963
}
6964
6965
static void iwl3945_bg_abort_scan(struct work_struct *work)
6966
{
6967
struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
6968
6969
if (!iwl3945_is_ready(priv))
6970
return;
6971
6972
mutex_lock(&priv->mutex);
6973
6974
set_bit(STATUS_SCAN_ABORTING, &priv->status);
6975
iwl3945_send_scan_abort(priv);
6976
6977
mutex_unlock(&priv->mutex);
6978
}
6979
6980
static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6981
6982
static void iwl3945_bg_scan_completed(struct work_struct *work)
6983
{
6984
struct iwl3945_priv *priv =
6985
container_of(work, struct iwl3945_priv, scan_completed);
6986
6987
IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6988
6989
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6990
return;
6991
6992
if (test_bit(STATUS_CONF_PENDING, &priv->status))
6993
iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
6994
6995
iwlwifi_ieee80211_scan_completed(priv->hw);
6996
6997
/* Since setting the TXPOWER may have been deferred while
6998
* performing the scan, fire one off */
6999
mutex_lock(&priv->mutex);
7000
iwl3945_hw_reg_send_txpower(priv);
7001
mutex_unlock(&priv->mutex);
7002
}
7003
7004
/*****************************************************************************
7005
*
7006
* mac80211 entry point functions
7007
*
7008
*****************************************************************************/
7009
7010
#define UCODE_READY_TIMEOUT (2 * HZ)
7011
7012
static int iwl3945_mac_open(struct ieee80211_hw *hw)
7013
{
7014
struct iwl3945_priv *priv = hw->priv;
7015
int ret;
7016
7017
IWL_DEBUG_MAC80211("enter\n");
7018
7019
if (pci_enable_device(priv->pci_dev)) {
7020
IWL_ERROR("Fail to pci_enable_device\n");
7021
return -ENODEV;
7022
}
7023
pci_restore_state(priv->pci_dev);
7024
pci_enable_msi(priv->pci_dev);
7025
7026
ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
7027
DRV_NAME, priv);
7028
if (ret) {
7029
IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
7030
goto out_disable_msi;
7031
}
7032
7033
/* we should be verifying the device is ready to be opened */
7034
mutex_lock(&priv->mutex);
7035
7036
memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
7037
/* fetch ucode file from disk, alloc and copy to bus-master buffers ...
7038
* ucode filename and max sizes are card-specific. */
7039
7040
if (!priv->ucode_code.len) {
7041
ret = iwl3945_read_ucode(priv);
7042
if (ret) {
7043
IWL_ERROR("Could not read microcode: %d\n", ret);
7044
mutex_unlock(&priv->mutex);
7045
goto out_release_irq;
7046
}
7047
}
7048
7049
ret = __iwl3945_up(priv);
7050
7051
mutex_unlock(&priv->mutex);
7052
7053
if (ret)
7054
goto out_release_irq;
7055
7056
IWL_DEBUG_INFO("Start UP work.\n");
7057
7058
if (test_bit(STATUS_IN_SUSPEND, &priv->status))
7059
return 0;
7060
7061
/* Wait for START_ALIVE from ucode. Otherwise callbacks from
7062
* mac80211 will not be run successfully. */
7063
ret = wait_event_interruptible_timeout(priv->wait_command_queue,
7064
test_bit(STATUS_READY, &priv->status),
7065
UCODE_READY_TIMEOUT);
7066
if (!ret) {
7067
if (!test_bit(STATUS_READY, &priv->status)) {
7068
IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
7069
jiffies_to_msecs(UCODE_READY_TIMEOUT));
7070
ret = -ETIMEDOUT;
7071
goto out_release_irq;
7072
}
7073
}
7074
7075
priv->is_open = 1;
7076
IWL_DEBUG_MAC80211("leave\n");
7077
return 0;
7078
7079
out_release_irq:
7080
free_irq(priv->pci_dev->irq, priv);
7081
out_disable_msi:
7082
pci_disable_msi(priv->pci_dev);
7083
pci_disable_device(priv->pci_dev);
7084
priv->is_open = 0;
7085
IWL_DEBUG_MAC80211("leave - failed\n");
7086
return ret;
7087
}
7088
7089
static int iwl3945_mac_stop(struct ieee80211_hw *hw)
7090
{
7091
struct iwl3945_priv *priv = hw->priv;
7092
7093
IWL_DEBUG_MAC80211("enter\n");
7094
7095
if (!priv->is_open) {
7096
IWL_DEBUG_MAC80211("leave - skip\n");
7097
return 0;
7098
}
7099
7100
priv->is_open = 0;
7101
7102
if (iwl3945_is_ready_rf(priv)) {
7103
/* stop mac, cancel any scan request and clear
7104
* RXON_FILTER_ASSOC_MSK BIT
7105
*/
7106
mutex_lock(&priv->mutex);
7107
iwl3945_scan_cancel_timeout(priv, 100);
7108
cancel_delayed_work(&priv->post_associate);
7109
mutex_unlock(&priv->mutex);
7110
}
7111
7112
iwl3945_down(priv);
7113
7114
flush_workqueue(priv->workqueue);
7115
free_irq(priv->pci_dev->irq, priv);
7116
pci_disable_msi(priv->pci_dev);
7117
pci_save_state(priv->pci_dev);
7118
pci_disable_device(priv->pci_dev);
7119
7120
IWL_DEBUG_MAC80211("leave\n");
7121
7122
return 0;
7123
}
7124
7125
static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
7126
struct ieee80211_tx_control *ctl)
7127
{
7128
struct iwl3945_priv *priv = hw->priv;
7129
7130
IWL_DEBUG_MAC80211("enter\n");
7131
7132
if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7133
IWL_DEBUG_MAC80211("leave - monitor\n");
7134
return -1;
7135
}
7136
7137
IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
7138
ctl->tx_rate);
7139
7140
if (iwl3945_tx_skb(priv, skb, ctl))
7141
dev_kfree_skb_any(skb);
7142
7143
IWL_DEBUG_MAC80211("leave\n");
7144
return 0;
7145
}
7146
7147
static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
7148
struct ieee80211_if_init_conf *conf)
7149
{
7150
struct iwl3945_priv *priv = hw->priv;
7151
unsigned long flags;
7152
7153
IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
7154
7155
if (priv->interface_id) {
7156
IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
7157
return -EOPNOTSUPP;
7158
}
7159
7160
spin_lock_irqsave(&priv->lock, flags);
7161
priv->interface_id = conf->if_id;
7162
7163
spin_unlock_irqrestore(&priv->lock, flags);
7164
7165
mutex_lock(&priv->mutex);
7166
7167
if (conf->mac_addr) {
7168
IWL_DEBUG_MAC80211("Set: " MAC_FMT "\n", MAC_ARG(conf->mac_addr));
7169
memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7170
}
7171
7172
if (iwl3945_is_ready(priv))
7173
iwl3945_set_mode(priv, conf->type);
7174
7175
mutex_unlock(&priv->mutex);
7176
7177
IWL_DEBUG_MAC80211("leave\n");
7178
return 0;
7179
}
7180
7181
/**
7182
* iwl3945_mac_config - mac80211 config callback
7183
*
7184
* We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7185
* be set inappropriately and the driver currently sets the hardware up to
7186
* use it whenever needed.
7187
*/
7188
static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
7189
{
7190
struct iwl3945_priv *priv = hw->priv;
7191
const struct iwl3945_channel_info *ch_info;
7192
unsigned long flags;
7193
int ret = 0;
7194
7195
mutex_lock(&priv->mutex);
7196
IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
7197
7198
if (!iwl3945_is_ready(priv)) {
7199
IWL_DEBUG_MAC80211("leave - not ready\n");
7200
ret = -EIO;
7201
goto out;
7202
}
7203
7204
/* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
7205
* what is exposed through include/ declarations */
7206
if (unlikely(!iwl3945_param_disable_hw_scan &&
7207
test_bit(STATUS_SCANNING, &priv->status))) {
7208
IWL_DEBUG_MAC80211("leave - scanning\n");
7209
set_bit(STATUS_CONF_PENDING, &priv->status);
7210
mutex_unlock(&priv->mutex);
7211
return 0;
7212
}
7213
7214
spin_lock_irqsave(&priv->lock, flags);
7215
7216
ch_info = iwl3945_get_channel_info(priv, conf->phymode, conf->channel);
7217
if (!is_channel_valid(ch_info)) {
7218
IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7219
conf->channel, conf->phymode);
7220
IWL_DEBUG_MAC80211("leave - invalid channel\n");
7221
spin_unlock_irqrestore(&priv->lock, flags);
7222
ret = -EINVAL;
7223
goto out;
7224
}
7225
7226
iwl3945_set_rxon_channel(priv, conf->phymode, conf->channel);
7227
7228
iwl3945_set_flags_for_phymode(priv, conf->phymode);
7229
7230
/* The list of supported rates and rate mask can be different
7231
* for each phymode; since the phymode may have changed, reset
7232
* the rate mask to what mac80211 lists */
7233
iwl3945_set_rate(priv);
7234
7235
spin_unlock_irqrestore(&priv->lock, flags);
7236
7237
#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7238
if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
7239
iwl3945_hw_channel_switch(priv, conf->channel);
7240
goto out;
7241
}
7242
#endif
7243
7244
iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
7245
7246
if (!conf->radio_enabled) {
7247
IWL_DEBUG_MAC80211("leave - radio disabled\n");
7248
goto out;
7249
}
7250
7251
if (iwl3945_is_rfkill(priv)) {
7252
IWL_DEBUG_MAC80211("leave - RF kill\n");
7253
ret = -EIO;
7254
goto out;
7255
}
7256
7257
iwl3945_set_rate(priv);
7258
7259
if (memcmp(&priv->active_rxon,
7260
&priv->staging_rxon, sizeof(priv->staging_rxon)))
7261
iwl3945_commit_rxon(priv);
7262
else
7263
IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7264
7265
IWL_DEBUG_MAC80211("leave\n");
7266
7267
out:
7268
clear_bit(STATUS_CONF_PENDING, &priv->status);
7269
mutex_unlock(&priv->mutex);
7270
return ret;
7271
}
7272
7273
static void iwl3945_config_ap(struct iwl3945_priv *priv)
7274
{
7275
int rc = 0;
7276
7277
if (priv->status & STATUS_EXIT_PENDING)
7278
return;
7279
7280
/* The following should be done only at AP bring up */
7281
if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7282
7283
/* RXON - unassoc (to set timing command) */
7284
priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7285
iwl3945_commit_rxon(priv);
7286
7287
/* RXON Timing */
7288
memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
7289
iwl3945_setup_rxon_timing(priv);
7290
rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7291
sizeof(priv->rxon_timing), &priv->rxon_timing);
7292
if (rc)
7293
IWL_WARNING("REPLY_RXON_TIMING failed - "
7294
"Attempting to continue.\n");
7295
7296
/* FIXME: what should be the assoc_id for AP? */
7297
priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7298
if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7299
priv->staging_rxon.flags |=
7300
RXON_FLG_SHORT_PREAMBLE_MSK;
7301
else
7302
priv->staging_rxon.flags &=
7303
~RXON_FLG_SHORT_PREAMBLE_MSK;
7304
7305
if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7306
if (priv->assoc_capability &
7307
WLAN_CAPABILITY_SHORT_SLOT_TIME)
7308
priv->staging_rxon.flags |=
7309
RXON_FLG_SHORT_SLOT_MSK;
7310
else
7311
priv->staging_rxon.flags &=
7312
~RXON_FLG_SHORT_SLOT_MSK;
7313
7314
if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7315
priv->staging_rxon.flags &=
7316
~RXON_FLG_SHORT_SLOT_MSK;
7317
}
7318
/* restore RXON assoc */
7319
priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7320
iwl3945_commit_rxon(priv);
7321
iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
7322
}
7323
iwl3945_send_beacon_cmd(priv);
7324
7325
/* FIXME - we need to add code here to detect a totally new
7326
* configuration, reset the AP, unassoc, rxon timing, assoc,
7327
* clear sta table, add BCAST sta... */
7328
}
7329
7330
static int iwl3945_mac_config_interface(struct ieee80211_hw *hw, int if_id,
7331
struct ieee80211_if_conf *conf)
7332
{
7333
struct iwl3945_priv *priv = hw->priv;
7334
unsigned long flags;
7335
int rc;
7336
7337
if (conf == NULL)
7338
return -EIO;
7339
7340
if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7341
(!conf->beacon || !conf->ssid_len)) {
7342
IWL_DEBUG_MAC80211
7343
("Leaving in AP mode because HostAPD is not ready.\n");
7344
return 0;
7345
}
7346
7347
if (!iwl3945_is_alive(priv))
7348
return -EAGAIN;
7349
7350
mutex_lock(&priv->mutex);
7351
7352
IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
7353
if (conf->bssid)
7354
IWL_DEBUG_MAC80211("bssid: " MAC_FMT "\n",
7355
MAC_ARG(conf->bssid));
7356
7357
if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7358
!(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
7359
IWL_DEBUG_MAC80211("leave - scanning\n");
7360
mutex_unlock(&priv->mutex);
7361
return 0;
7362
}
7363
7364
if (priv->interface_id != if_id) {
7365
IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
7366
mutex_unlock(&priv->mutex);
7367
return 0;
7368
}
7369
7370
if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7371
if (!conf->bssid) {
7372
conf->bssid = priv->mac_addr;
7373
memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
7374
IWL_DEBUG_MAC80211("bssid was set to: " MAC_FMT "\n",
7375
MAC_ARG(conf->bssid));
7376
}
7377
if (priv->ibss_beacon)
7378
dev_kfree_skb(priv->ibss_beacon);
7379
7380
priv->ibss_beacon = conf->beacon;
7381
}
7382
7383
if (iwl3945_is_rfkill(priv))
7384
goto done;
7385
7386
if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7387
!is_multicast_ether_addr(conf->bssid)) {
7388
/* If there is currently a HW scan going on in the background
7389
* then we need to cancel it else the RXON below will fail. */
7390
if (iwl3945_scan_cancel_timeout(priv, 100)) {
7391
IWL_WARNING("Aborted scan still in progress "
7392
"after 100ms\n");
7393
IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7394
mutex_unlock(&priv->mutex);
7395
return -EAGAIN;
7396
}
7397
memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7398
7399
/* TODO: Audit driver for usage of these members and see
7400
* if mac80211 deprecates them (priv->bssid looks like it
7401
* shouldn't be there, but I haven't scanned the IBSS code
7402
* to verify) - jpk */
7403
memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7404
7405
if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7406
iwl3945_config_ap(priv);
7407
else {
7408
rc = iwl3945_commit_rxon(priv);
7409
if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
7410
iwl3945_add_station(priv,
7411
priv->active_rxon.bssid_addr, 1, 0);
7412
}
7413
7414
} else {
7415
iwl3945_scan_cancel_timeout(priv, 100);
7416
priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7417
iwl3945_commit_rxon(priv);
7418
}
7419
7420
done:
7421
spin_lock_irqsave(&priv->lock, flags);
7422
if (!conf->ssid_len)
7423
memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7424
else
7425
memcpy(priv->essid, conf->ssid, conf->ssid_len);
7426
7427
priv->essid_len = conf->ssid_len;
7428
spin_unlock_irqrestore(&priv->lock, flags);
7429
7430
IWL_DEBUG_MAC80211("leave\n");
7431
mutex_unlock(&priv->mutex);
7432
7433
return 0;
7434
}
7435
7436
static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
7437
struct ieee80211_if_init_conf *conf)
7438
{
7439
struct iwl3945_priv *priv = hw->priv;
7440
7441
IWL_DEBUG_MAC80211("enter\n");
7442
7443
mutex_lock(&priv->mutex);
7444
7445
if (iwl3945_is_ready_rf(priv)) {
7446
iwl3945_scan_cancel_timeout(priv, 100);
7447
cancel_delayed_work(&priv->post_associate);
7448
priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7449
iwl3945_commit_rxon(priv);
7450
}
7451
if (priv->interface_id == conf->if_id) {
7452
priv->interface_id = 0;
7453
memset(priv->bssid, 0, ETH_ALEN);
7454
memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7455
priv->essid_len = 0;
7456
}
7457
mutex_unlock(&priv->mutex);
7458
7459
IWL_DEBUG_MAC80211("leave\n");
7460
}
7461
7462
static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
7463
{
7464
int rc = 0;
7465
unsigned long flags;
7466
struct iwl3945_priv *priv = hw->priv;
7467
7468
IWL_DEBUG_MAC80211("enter\n");
7469
7470
mutex_lock(&priv->mutex);
7471
spin_lock_irqsave(&priv->lock, flags);
7472
7473
if (!iwl3945_is_ready_rf(priv)) {
7474
rc = -EIO;
7475
IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7476
goto out_unlock;
7477
}
7478
7479
if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7480
rc = -EIO;
7481
IWL_ERROR("ERROR: APs don't scan\n");
7482
goto out_unlock;
7483
}
7484
7485
/* we don't schedule scan within next_scan_jiffies period */
7486
if (priv->next_scan_jiffies &&
7487
time_after(priv->next_scan_jiffies, jiffies)) {
7488
rc = -EAGAIN;
7489
goto out_unlock;
7490
}
7491
/* if we just finished scan ask for delay */
7492
if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7493
IWL_DELAY_NEXT_SCAN, jiffies)) {
7494
rc = -EAGAIN;
7495
goto out_unlock;
7496
}
7497
if (len) {
7498
IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
7499
iwl3945_escape_essid(ssid, len), (int)len);
7500
7501
priv->one_direct_scan = 1;
7502
priv->direct_ssid_len = (u8)
7503
min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7504
memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
7505
} else
7506
priv->one_direct_scan = 0;
7507
7508
rc = iwl3945_scan_initiate(priv);
7509
7510
IWL_DEBUG_MAC80211("leave\n");
7511
7512
out_unlock:
7513
spin_unlock_irqrestore(&priv->lock, flags);
7514
mutex_unlock(&priv->mutex);
7515
7516
return rc;
7517
}
7518
7519
static int iwl3945_mac_set_key(struct ieee80211_hw *hw, set_key_cmd cmd, u8 *addr,
7520
struct ieee80211_key_conf *key, int aid)
7521
{
7522
struct iwl3945_priv *priv = hw->priv;
7523
int rc = 0;
7524
u8 sta_id;
7525
7526
IWL_DEBUG_MAC80211("enter\n");
7527
7528
if (!iwl3945_param_hwcrypto) {
7529
IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7530
return -EOPNOTSUPP;
7531
}
7532
7533
sta_id = iwl3945_hw_find_station(priv, addr);
7534
if (sta_id == IWL_INVALID_STATION) {
7535
IWL_DEBUG_MAC80211("leave - " MAC_FMT " not in station map.\n",
7536
MAC_ARG(addr));
7537
return -EINVAL;
7538
}
7539
7540
mutex_lock(&priv->mutex);
7541
7542
iwl3945_scan_cancel_timeout(priv, 100);
7543
7544
switch (cmd) {
7545
case SET_KEY:
7546
rc = iwl3945_update_sta_key_info(priv, key, sta_id);
7547
if (!rc) {
7548
iwl3945_set_rxon_hwcrypto(priv, 1);
7549
iwl3945_commit_rxon(priv);
7550
key->hw_key_idx = sta_id;
7551
IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7552
}
7553
break;
7554
case DISABLE_KEY:
7555
rc = iwl3945_clear_sta_key_info(priv, sta_id);
7556
if (!rc) {
7557
iwl3945_set_rxon_hwcrypto(priv, 0);
7558
iwl3945_commit_rxon(priv);
7559
IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7560
}
7561
break;
7562
default:
7563
rc = -EINVAL;
7564
}
7565
7566
IWL_DEBUG_MAC80211("leave\n");
7567
mutex_unlock(&priv->mutex);
7568
7569
return rc;
7570
}
7571
7572
static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
7573
const struct ieee80211_tx_queue_params *params)
7574
{
7575
struct iwl3945_priv *priv = hw->priv;
7576
#ifdef CONFIG_IWL3945_QOS
7577
unsigned long flags;
7578
int q;
7579
#endif /* CONFIG_IWL3945_QOS */
7580
7581
IWL_DEBUG_MAC80211("enter\n");
7582
7583
if (!iwl3945_is_ready_rf(priv)) {
7584
IWL_DEBUG_MAC80211("leave - RF not ready\n");
7585
return -EIO;
7586
}
7587
7588
if (queue >= AC_NUM) {
7589
IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7590
return 0;
7591
}
7592
7593
#ifdef CONFIG_IWL3945_QOS
7594
if (!priv->qos_data.qos_enable) {
7595
priv->qos_data.qos_active = 0;
7596
IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7597
return 0;
7598
}
7599
q = AC_NUM - 1 - queue;
7600
7601
spin_lock_irqsave(&priv->lock, flags);
7602
7603
priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7604
priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7605
priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7606
priv->qos_data.def_qos_parm.ac[q].edca_txop =
7607
cpu_to_le16((params->burst_time * 100));
7608
7609
priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7610
priv->qos_data.qos_active = 1;
7611
7612
spin_unlock_irqrestore(&priv->lock, flags);
7613
7614
mutex_lock(&priv->mutex);
7615
if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7616
iwl3945_activate_qos(priv, 1);
7617
else if (priv->assoc_id && iwl3945_is_associated(priv))
7618
iwl3945_activate_qos(priv, 0);
7619
7620
mutex_unlock(&priv->mutex);
7621
7622
#endif /*CONFIG_IWL3945_QOS */
7623
7624
IWL_DEBUG_MAC80211("leave\n");
7625
return 0;
7626
}
7627
7628
static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7629
struct ieee80211_tx_queue_stats *stats)
7630
{
7631
struct iwl3945_priv *priv = hw->priv;
7632
int i, avail;
7633
struct iwl3945_tx_queue *txq;
7634
struct iwl3945_queue *q;
7635
unsigned long flags;
7636
7637
IWL_DEBUG_MAC80211("enter\n");
7638
7639
if (!iwl3945_is_ready_rf(priv)) {
7640
IWL_DEBUG_MAC80211("leave - RF not ready\n");
7641
return -EIO;
7642
}
7643
7644
spin_lock_irqsave(&priv->lock, flags);
7645
7646
for (i = 0; i < AC_NUM; i++) {
7647
txq = &priv->txq[i];
7648
q = &txq->q;
7649
avail = iwl3945_queue_space(q);
7650
7651
stats->data[i].len = q->n_window - avail;
7652
stats->data[i].limit = q->n_window - q->high_mark;
7653
stats->data[i].count = q->n_window;
7654
7655
}
7656
spin_unlock_irqrestore(&priv->lock, flags);
7657
7658
IWL_DEBUG_MAC80211("leave\n");
7659
7660
return 0;
7661
}
7662
7663
static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
7664
struct ieee80211_low_level_stats *stats)
7665
{
7666
IWL_DEBUG_MAC80211("enter\n");
7667
IWL_DEBUG_MAC80211("leave\n");
7668
7669
return 0;
7670
}
7671
7672
static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
7673
{
7674
IWL_DEBUG_MAC80211("enter\n");
7675
IWL_DEBUG_MAC80211("leave\n");
7676
7677
return 0;
7678
}
7679
7680
static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7681
{
7682
struct iwl3945_priv *priv = hw->priv;
7683
unsigned long flags;
7684
7685
mutex_lock(&priv->mutex);
7686
IWL_DEBUG_MAC80211("enter\n");
7687
7688
#ifdef CONFIG_IWL3945_QOS
7689
iwl3945_reset_qos(priv);
7690
#endif
7691
cancel_delayed_work(&priv->post_associate);
7692
7693
spin_lock_irqsave(&priv->lock, flags);
7694
priv->assoc_id = 0;
7695
priv->assoc_capability = 0;
7696
priv->call_post_assoc_from_beacon = 0;
7697
7698
/* new association get rid of ibss beacon skb */
7699
if (priv->ibss_beacon)
7700
dev_kfree_skb(priv->ibss_beacon);
7701
7702
priv->ibss_beacon = NULL;
7703
7704
priv->beacon_int = priv->hw->conf.beacon_int;
7705
priv->timestamp1 = 0;
7706
priv->timestamp0 = 0;
7707
if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7708
priv->beacon_int = 0;
7709
7710
spin_unlock_irqrestore(&priv->lock, flags);
7711
7712
if (!iwl3945_is_ready_rf(priv)) {
7713
IWL_DEBUG_MAC80211("leave - not ready\n");
7714
mutex_unlock(&priv->mutex);
7715
return;
7716
}
7717
7718
/* we are restarting association process
7719
* clear RXON_FILTER_ASSOC_MSK bit
7720
*/
7721
if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
7722
iwl3945_scan_cancel_timeout(priv, 100);
7723
priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7724
iwl3945_commit_rxon(priv);
7725
}
7726
7727
/* Per mac80211.h: This is only used in IBSS mode... */
7728
if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7729
7730
IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7731
mutex_unlock(&priv->mutex);
7732
return;
7733
}
7734
7735
priv->only_active_channel = 0;
7736
7737
iwl3945_set_rate(priv);
7738
7739
mutex_unlock(&priv->mutex);
7740
7741
IWL_DEBUG_MAC80211("leave\n");
7742
7743
}
7744
7745
static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
7746
struct ieee80211_tx_control *control)
7747
{
7748
struct iwl3945_priv *priv = hw->priv;
7749
unsigned long flags;
7750
7751
mutex_lock(&priv->mutex);
7752
IWL_DEBUG_MAC80211("enter\n");
7753
7754
if (!iwl3945_is_ready_rf(priv)) {
7755
IWL_DEBUG_MAC80211("leave - RF not ready\n");
7756
mutex_unlock(&priv->mutex);
7757
return -EIO;
7758
}
7759
7760
if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7761
IWL_DEBUG_MAC80211("leave - not IBSS\n");
7762
mutex_unlock(&priv->mutex);
7763
return -EIO;
7764
}
7765
7766
spin_lock_irqsave(&priv->lock, flags);
7767
7768
if (priv->ibss_beacon)
7769
dev_kfree_skb(priv->ibss_beacon);
7770
7771
priv->ibss_beacon = skb;
7772
7773
priv->assoc_id = 0;
7774
7775
IWL_DEBUG_MAC80211("leave\n");
7776
spin_unlock_irqrestore(&priv->lock, flags);
7777
7778
#ifdef CONFIG_IWL3945_QOS
7779
iwl3945_reset_qos(priv);
7780
#endif
7781
7782
queue_work(priv->workqueue, &priv->post_associate.work);
7783
7784
mutex_unlock(&priv->mutex);
7785
7786
return 0;
7787
}
7788
7789
/*****************************************************************************
7790
*
7791
* sysfs attributes
7792
*
7793
*****************************************************************************/
7794
7795
#ifdef CONFIG_IWL3945_DEBUG
7796
7797
/*
7798
* The following adds a new attribute to the sysfs representation
7799
* of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7800
* used for controlling the debug level.
7801
*
7802
* See the level definitions in iwl for details.
7803
*/
7804
7805
static ssize_t show_debug_level(struct device_driver *d, char *buf)
7806
{
7807
return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
7808
}
7809
static ssize_t store_debug_level(struct device_driver *d,
7810
const char *buf, size_t count)
7811
{
7812
char *p = (char *)buf;
7813
u32 val;
7814
7815
val = simple_strtoul(p, &p, 0);
7816
if (p == buf)
7817
printk(KERN_INFO DRV_NAME
7818
": %s is not in hex or decimal form.\n", buf);
7819
else
7820
iwl3945_debug_level = val;
7821
7822
return strnlen(buf, count);
7823
}
7824
7825
static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7826
show_debug_level, store_debug_level);
7827
7828
#endif /* CONFIG_IWL3945_DEBUG */
7829
7830
static ssize_t show_rf_kill(struct device *d,
7831
struct device_attribute *attr, char *buf)
7832
{
7833
/*
7834
* 0 - RF kill not enabled
7835
* 1 - SW based RF kill active (sysfs)
7836
* 2 - HW based RF kill active
7837
* 3 - Both HW and SW based RF kill active
7838
*/
7839
struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7840
int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7841
(test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7842
7843
return sprintf(buf, "%i\n", val);
7844
}
7845
7846
static ssize_t store_rf_kill(struct device *d,
7847
struct device_attribute *attr,
7848
const char *buf, size_t count)
7849
{
7850
struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7851
7852
mutex_lock(&priv->mutex);
7853
iwl3945_radio_kill_sw(priv, buf[0] == '1');
7854
mutex_unlock(&priv->mutex);
7855
7856
return count;
7857
}
7858
7859
static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7860
7861
static ssize_t show_temperature(struct device *d,
7862
struct device_attribute *attr, char *buf)
7863
{
7864
struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7865
7866
if (!iwl3945_is_alive(priv))
7867
return -EAGAIN;
7868
7869
return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7870
}
7871
7872
static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7873
7874
static ssize_t show_rs_window(struct device *d,
7875
struct device_attribute *attr,
7876
char *buf)
7877
{
7878
struct iwl3945_priv *priv = d->driver_data;
7879
return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
7880
}
7881
static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7882
7883
static ssize_t show_tx_power(struct device *d,
7884
struct device_attribute *attr, char *buf)
7885
{
7886
struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7887
return sprintf(buf, "%d\n", priv->user_txpower_limit);
7888
}
7889
7890
static ssize_t store_tx_power(struct device *d,
7891
struct device_attribute *attr,
7892
const char *buf, size_t count)
7893
{
7894
struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7895
char *p = (char *)buf;
7896
u32 val;
7897
7898
val = simple_strtoul(p, &p, 10);
7899
if (p == buf)
7900
printk(KERN_INFO DRV_NAME
7901
": %s is not in decimal form.\n", buf);
7902
else
7903
iwl3945_hw_reg_set_txpower(priv, val);
7904
7905
return count;
7906
}
7907
7908
static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7909
7910
static ssize_t show_flags(struct device *d,
7911
struct device_attribute *attr, char *buf)
7912
{
7913
struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7914
7915
return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7916
}
7917
7918
static ssize_t store_flags(struct device *d,
7919
struct device_attribute *attr,
7920
const char *buf, size_t count)
7921
{
7922
struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7923
u32 flags = simple_strtoul(buf, NULL, 0);
7924
7925
mutex_lock(&priv->mutex);
7926
if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7927
/* Cancel any currently running scans... */
7928
if (iwl3945_scan_cancel_timeout(priv, 100))
7929
IWL_WARNING("Could not cancel scan.\n");
7930
else {
7931
IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7932
flags);
7933
priv->staging_rxon.flags = cpu_to_le32(flags);
7934
iwl3945_commit_rxon(priv);
7935
}
7936
}
7937
mutex_unlock(&priv->mutex);
7938
7939
return count;
7940
}
7941
7942
static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7943
7944
static ssize_t show_filter_flags(struct device *d,
7945
struct device_attribute *attr, char *buf)
7946
{
7947
struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7948
7949
return sprintf(buf, "0x%04X\n",
7950
le32_to_cpu(priv->active_rxon.filter_flags));
7951
}
7952
7953
static ssize_t store_filter_flags(struct device *d,
7954
struct device_attribute *attr,
7955
const char *buf, size_t count)
7956
{
7957
struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7958
u32 filter_flags = simple_strtoul(buf, NULL, 0);
7959
7960
mutex_lock(&priv->mutex);
7961
if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7962
/* Cancel any currently running scans... */
7963
if (iwl3945_scan_cancel_timeout(priv, 100))
7964
IWL_WARNING("Could not cancel scan.\n");
7965
else {
7966
IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7967
"0x%04X\n", filter_flags);
7968
priv->staging_rxon.filter_flags =
7969
cpu_to_le32(filter_flags);
7970
iwl3945_commit_rxon(priv);
7971
}
7972
}
7973
mutex_unlock(&priv->mutex);
7974
7975
return count;
7976
}
7977
7978
static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7979
store_filter_flags);
7980
7981
static ssize_t show_tune(struct device *d,
7982
struct device_attribute *attr, char *buf)
7983
{
7984
struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7985
7986
return sprintf(buf, "0x%04X\n",
7987
(priv->phymode << 8) |
7988
le16_to_cpu(priv->active_rxon.channel));
7989
}
7990
7991
static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode);
7992
7993
static ssize_t store_tune(struct device *d,
7994
struct device_attribute *attr,
7995
const char *buf, size_t count)
7996
{
7997
struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7998
char *p = (char *)buf;
7999
u16 tune = simple_strtoul(p, &p, 0);
8000
u8 phymode = (tune >> 8) & 0xff;
8001
u16 channel = tune & 0xff;
8002
8003
IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
8004
8005
mutex_lock(&priv->mutex);
8006
if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
8007
(priv->phymode != phymode)) {
8008
const struct iwl3945_channel_info *ch_info;
8009
8010
ch_info = iwl3945_get_channel_info(priv, phymode, channel);
8011
if (!ch_info) {
8012
IWL_WARNING("Requested invalid phymode/channel "
8013
"combination: %d %d\n", phymode, channel);
8014
mutex_unlock(&priv->mutex);
8015
return -EINVAL;
8016
}
8017
8018
/* Cancel any currently running scans... */
8019
if (iwl3945_scan_cancel_timeout(priv, 100))
8020
IWL_WARNING("Could not cancel scan.\n");
8021
else {
8022
IWL_DEBUG_INFO("Committing phymode and "
8023
"rxon.channel = %d %d\n",
8024
phymode, channel);
8025
8026
iwl3945_set_rxon_channel(priv, phymode, channel);
8027
iwl3945_set_flags_for_phymode(priv, phymode);
8028
8029
iwl3945_set_rate(priv);
8030
iwl3945_commit_rxon(priv);
8031
}
8032
}
8033
mutex_unlock(&priv->mutex);
8034
8035
return count;
8036
}
8037
8038
static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
8039
8040
#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
8041
8042
static ssize_t show_measurement(struct device *d,
8043
struct device_attribute *attr, char *buf)
8044
{
8045
struct iwl3945_priv *priv = dev_get_drvdata(d);
8046
struct iwl3945_spectrum_notification measure_report;
8047
u32 size = sizeof(measure_report), len = 0, ofs = 0;
8048
u8 *data = (u8 *) & measure_report;
8049
unsigned long flags;
8050
8051
spin_lock_irqsave(&priv->lock, flags);
8052
if (!(priv->measurement_status & MEASUREMENT_READY)) {
8053
spin_unlock_irqrestore(&priv->lock, flags);
8054
return 0;
8055
}
8056
memcpy(&measure_report, &priv->measure_report, size);
8057
priv->measurement_status = 0;
8058
spin_unlock_irqrestore(&priv->lock, flags);
8059
8060
while (size && (PAGE_SIZE - len)) {
8061
hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8062
PAGE_SIZE - len, 1);
8063
len = strlen(buf);
8064
if (PAGE_SIZE - len)
8065
buf[len++] = '\n';
8066
8067
ofs += 16;
8068
size -= min(size, 16U);
8069
}
8070
8071
return len;
8072
}
8073
8074
static ssize_t store_measurement(struct device *d,
8075
struct device_attribute *attr,
8076
const char *buf, size_t count)
8077
{
8078
struct iwl3945_priv *priv = dev_get_drvdata(d);
8079
struct ieee80211_measurement_params params = {
8080
.channel = le16_to_cpu(priv->active_rxon.channel),
8081
.start_time = cpu_to_le64(priv->last_tsf),
8082
.duration = cpu_to_le16(1),
8083
};
8084
u8 type = IWL_MEASURE_BASIC;
8085
u8 buffer[32];
8086
u8 channel;
8087
8088
if (count) {
8089
char *p = buffer;
8090
strncpy(buffer, buf, min(sizeof(buffer), count));
8091
channel = simple_strtoul(p, NULL, 0);
8092
if (channel)
8093
params.channel = channel;
8094
8095
p = buffer;
8096
while (*p && *p != ' ')
8097
p++;
8098
if (*p)
8099
type = simple_strtoul(p + 1, NULL, 0);
8100
}
8101
8102
IWL_DEBUG_INFO("Invoking measurement of type %d on "
8103
"channel %d (for '%s')\n", type, params.channel, buf);
8104
iwl3945_get_measurement(priv, ¶ms, type);
8105
8106
return count;
8107
}
8108
8109
static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8110
show_measurement, store_measurement);
8111
#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
8112
8113
static ssize_t show_rate(struct device *d,
8114
struct device_attribute *attr, char *buf)
8115
{
8116
struct iwl3945_priv *priv = dev_get_drvdata(d);
8117
unsigned long flags;
8118
int i;
8119
8120
spin_lock_irqsave(&priv->sta_lock, flags);
8121
if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
8122
i = priv->stations[IWL_AP_ID].current_rate.s.rate;
8123
else
8124
i = priv->stations[IWL_STA_ID].current_rate.s.rate;
8125
spin_unlock_irqrestore(&priv->sta_lock, flags);
8126
8127
i = iwl3945_rate_index_from_plcp(i);
8128
if (i == -1)
8129
return sprintf(buf, "0\n");
8130
8131
return sprintf(buf, "%d%s\n",
8132
(iwl3945_rates[i].ieee >> 1),
8133
(iwl3945_rates[i].ieee & 0x1) ? ".5" : "");
8134
}
8135
8136
static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
8137
8138
static ssize_t store_retry_rate(struct device *d,
8139
struct device_attribute *attr,
8140
const char *buf, size_t count)
8141
{
8142
struct iwl3945_priv *priv = dev_get_drvdata(d);
8143
8144
priv->retry_rate = simple_strtoul(buf, NULL, 0);
8145
if (priv->retry_rate <= 0)
8146
priv->retry_rate = 1;
8147
8148
return count;
8149
}
8150
8151
static ssize_t show_retry_rate(struct device *d,
8152
struct device_attribute *attr, char *buf)
8153
{
8154
struct iwl3945_priv *priv = dev_get_drvdata(d);
8155
return sprintf(buf, "%d", priv->retry_rate);
8156
}
8157
8158
static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8159
store_retry_rate);
8160
8161
static ssize_t store_power_level(struct device *d,
8162
struct device_attribute *attr,
8163
const char *buf, size_t count)
8164
{
8165
struct iwl3945_priv *priv = dev_get_drvdata(d);
8166
int rc;
8167
int mode;
8168
8169
mode = simple_strtoul(buf, NULL, 0);
8170
mutex_lock(&priv->mutex);
8171
8172
if (!iwl3945_is_ready(priv)) {
8173
rc = -EAGAIN;
8174
goto out;
8175
}
8176
8177
if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8178
mode = IWL_POWER_AC;
8179
else
8180
mode |= IWL_POWER_ENABLED;
8181
8182
if (mode != priv->power_mode) {
8183
rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
8184
if (rc) {
8185
IWL_DEBUG_MAC80211("failed setting power mode.\n");
8186
goto out;
8187
}
8188
priv->power_mode = mode;
8189
}
8190
8191
rc = count;
8192
8193
out:
8194
mutex_unlock(&priv->mutex);
8195
return rc;
8196
}
8197
8198
#define MAX_WX_STRING 80
8199
8200
/* Values are in microsecond */
8201
static const s32 timeout_duration[] = {
8202
350000,
8203
250000,
8204
75000,
8205
37000,
8206
25000,
8207
};
8208
static const s32 period_duration[] = {
8209
400000,
8210
700000,
8211
1000000,
8212
1000000,
8213
1000000
8214
};
8215
8216
static ssize_t show_power_level(struct device *d,
8217
struct device_attribute *attr, char *buf)
8218
{
8219
struct iwl3945_priv *priv = dev_get_drvdata(d);
8220
int level = IWL_POWER_LEVEL(priv->power_mode);
8221
char *p = buf;
8222
8223
p += sprintf(p, "%d ", level);
8224
switch (level) {
8225
case IWL_POWER_MODE_CAM:
8226
case IWL_POWER_AC:
8227
p += sprintf(p, "(AC)");
8228
break;
8229
case IWL_POWER_BATTERY:
8230
p += sprintf(p, "(BATTERY)");
8231
break;
8232
default:
8233
p += sprintf(p,
8234
"(Timeout %dms, Period %dms)",
8235
timeout_duration[level - 1] / 1000,
8236
period_duration[level - 1] / 1000);
8237
}
8238
8239
if (!(priv->power_mode & IWL_POWER_ENABLED))
8240
p += sprintf(p, " OFF\n");
8241
else
8242
p += sprintf(p, " \n");
8243
8244
return (p - buf + 1);
8245
8246
}
8247
8248
static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8249
store_power_level);
8250
8251
static ssize_t show_channels(struct device *d,
8252
struct device_attribute *attr, char *buf)
8253
{
8254
struct iwl3945_priv *priv = dev_get_drvdata(d);
8255
int len = 0, i;
8256
struct ieee80211_channel *channels = NULL;
8257
const struct ieee80211_hw_mode *hw_mode = NULL;
8258
int count = 0;
8259
8260
if (!iwl3945_is_ready(priv))
8261
return -EAGAIN;
8262
8263
hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211G);
8264
if (!hw_mode)
8265
hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211B);
8266
if (hw_mode) {
8267
channels = hw_mode->channels;
8268
count = hw_mode->num_channels;
8269
}
8270
8271
len +=
8272
sprintf(&buf[len],
8273
"Displaying %d channels in 2.4GHz band "
8274
"(802.11bg):\n", count);
8275
8276
for (i = 0; i < count; i++)
8277
len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8278
channels[i].chan,
8279
channels[i].power_level,
8280
channels[i].
8281
flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8282
" (IEEE 802.11h required)" : "",
8283
(!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8284
|| (channels[i].
8285
flag &
8286
IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8287
", IBSS",
8288
channels[i].
8289
flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8290
"active/passive" : "passive only");
8291
8292
hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211A);
8293
if (hw_mode) {
8294
channels = hw_mode->channels;
8295
count = hw_mode->num_channels;
8296
} else {
8297
channels = NULL;
8298
count = 0;
8299
}
8300
8301
len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
8302
"(802.11a):\n", count);
8303
8304
for (i = 0; i < count; i++)
8305
len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8306
channels[i].chan,
8307
channels[i].power_level,
8308
channels[i].
8309
flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8310
" (IEEE 802.11h required)" : "",
8311
(!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8312
|| (channels[i].
8313
flag &
8314
IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8315
", IBSS",
8316
channels[i].
8317
flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8318
"active/passive" : "passive only");
8319
8320
return len;
8321
}
8322
8323
static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8324
8325
static ssize_t show_statistics(struct device *d,
8326
struct device_attribute *attr, char *buf)
8327
{
8328
struct iwl3945_priv *priv = dev_get_drvdata(d);
8329
u32 size = sizeof(struct iwl3945_notif_statistics);
8330
u32 len = 0, ofs = 0;
8331
u8 *data = (u8 *) & priv->statistics;
8332
int rc = 0;
8333
8334
if (!iwl3945_is_alive(priv))
8335
return -EAGAIN;
8336
8337
mutex_lock(&priv->mutex);
8338
rc = iwl3945_send_statistics_request(priv);
8339
mutex_unlock(&priv->mutex);
8340
8341
if (rc) {
8342
len = sprintf(buf,
8343
"Error sending statistics request: 0x%08X\n", rc);
8344
return len;
8345
}
8346
8347
while (size && (PAGE_SIZE - len)) {
8348
hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8349
PAGE_SIZE - len, 1);
8350
len = strlen(buf);
8351
if (PAGE_SIZE - len)
8352
buf[len++] = '\n';
8353
8354
ofs += 16;
8355
size -= min(size, 16U);
8356
}
8357
8358
return len;
8359
}
8360
8361
static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8362
8363
static ssize_t show_antenna(struct device *d,
8364
struct device_attribute *attr, char *buf)
8365
{
8366
struct iwl3945_priv *priv = dev_get_drvdata(d);
8367
8368
if (!iwl3945_is_alive(priv))
8369
return -EAGAIN;
8370
8371
return sprintf(buf, "%d\n", priv->antenna);
8372
}
8373
8374
static ssize_t store_antenna(struct device *d,
8375
struct device_attribute *attr,
8376
const char *buf, size_t count)
8377
{
8378
int ant;
8379
struct iwl3945_priv *priv = dev_get_drvdata(d);
8380
8381
if (count == 0)
8382
return 0;
8383
8384
if (sscanf(buf, "%1i", &ant) != 1) {
8385
IWL_DEBUG_INFO("not in hex or decimal form.\n");
8386
return count;
8387
}
8388
8389
if ((ant >= 0) && (ant <= 2)) {
8390
IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
8391
priv->antenna = (enum iwl3945_antenna)ant;
8392
} else
8393
IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8394
8395
8396
return count;
8397
}
8398
8399
static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8400
8401
static ssize_t show_status(struct device *d,
8402
struct device_attribute *attr, char *buf)
8403
{
8404
struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
8405
if (!iwl3945_is_alive(priv))
8406
return -EAGAIN;
8407
return sprintf(buf, "0x%08x\n", (int)priv->status);
8408
}
8409
8410
static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8411
8412
static ssize_t dump_error_log(struct device *d,
8413
struct device_attribute *attr,
8414
const char *buf, size_t count)
8415
{
8416
char *p = (char *)buf;
8417
8418
if (p[0] == '1')
8419
iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
8420
8421
return strnlen(buf, count);
8422
}
8423
8424
static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8425
8426
static ssize_t dump_event_log(struct device *d,
8427
struct device_attribute *attr,
8428
const char *buf, size_t count)
8429
{
8430
char *p = (char *)buf;
8431
8432
if (p[0] == '1')
8433
iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
8434
8435
return strnlen(buf, count);
8436
}
8437
8438
static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8439
8440
/*****************************************************************************
8441
*
8442
* driver setup and teardown
8443
*
8444
*****************************************************************************/
8445
8446
static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
8447
{
8448
priv->workqueue = create_workqueue(DRV_NAME);
8449
8450
init_waitqueue_head(&priv->wait_command_queue);
8451
8452
INIT_WORK(&priv->up, iwl3945_bg_up);
8453
INIT_WORK(&priv->restart, iwl3945_bg_restart);
8454
INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
8455
INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
8456
INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
8457
INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
8458
INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
8459
INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
8460
INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
8461
INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
8462
INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
8463
INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
8464
8465
iwl3945_hw_setup_deferred_work(priv);
8466
8467
tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
8468
iwl3945_irq_tasklet, (unsigned long)priv);
8469
}
8470
8471
#ifndef cancel_work_sync
8472
#define cancel_work_sync(x)
8473
#endif
8474
8475
static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
8476
{
8477
iwl3945_hw_cancel_deferred_work(priv);
8478
8479
cancel_delayed_work(&priv->init_alive_start);
8480
cancel_delayed_work(&priv->scan_check);
8481
cancel_delayed_work(&priv->alive_start);
8482
cancel_delayed_work(&priv->post_associate);
8483
cancel_work_sync(&priv->beacon_update);
8484
}
8485
8486
static struct attribute *iwl3945_sysfs_entries[] = {
8487
&dev_attr_antenna.attr,
8488
&dev_attr_channels.attr,
8489
&dev_attr_dump_errors.attr,
8490
&dev_attr_dump_events.attr,
8491
&dev_attr_flags.attr,
8492
&dev_attr_filter_flags.attr,
8493
#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
8494
&dev_attr_measurement.attr,
8495
#endif
8496
&dev_attr_power_level.attr,
8497
&dev_attr_rate.attr,
8498
&dev_attr_retry_rate.attr,
8499
&dev_attr_rf_kill.attr,
8500
&dev_attr_rs_window.attr,
8501
&dev_attr_statistics.attr,
8502
&dev_attr_status.attr,
8503
&dev_attr_temperature.attr,
8504
&dev_attr_tune.attr,
8505
&dev_attr_tx_power.attr,
8506
8507
NULL
8508
};
8509
8510
static struct attribute_group iwl3945_attribute_group = {
8511
.name = NULL, /* put in device directory */
8512
.attrs = iwl3945_sysfs_entries,
8513
};
8514
8515
static struct ieee80211_ops iwl3945_hw_ops = {
8516
.tx = iwl3945_mac_tx,
8517
.open = iwl3945_mac_open,
8518
.stop = iwl3945_mac_stop,
8519
.add_interface = iwl3945_mac_add_interface,
8520
.remove_interface = iwl3945_mac_remove_interface,
8521
.config = iwl3945_mac_config,
8522
.config_interface = iwl3945_mac_config_interface,
8523
.set_key = iwl3945_mac_set_key,
8524
.get_stats = iwl3945_mac_get_stats,
8525
.get_tx_stats = iwl3945_mac_get_tx_stats,
8526
.conf_tx = iwl3945_mac_conf_tx,
8527
.get_tsf = iwl3945_mac_get_tsf,
8528
.reset_tsf = iwl3945_mac_reset_tsf,
8529
.beacon_update = iwl3945_mac_beacon_update,
8530
.hw_scan = iwl3945_mac_hw_scan
8531
};
8532
8533
static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8534
{
8535
int err = 0;
8536
u32 pci_id;
8537
struct iwl3945_priv *priv;
8538
struct ieee80211_hw *hw;
8539
int i;
8540
8541
/* Disabling hardware scan means that mac80211 will perform scans
8542
* "the hard way", rather than using device's scan. */
8543
if (iwl3945_param_disable_hw_scan) {
8544
IWL_DEBUG_INFO("Disabling hw_scan\n");
8545
iwl3945_hw_ops.hw_scan = NULL;
8546
}
8547
8548
if ((iwl3945_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8549
(iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
8550
IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8551
IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8552
err = -EINVAL;
8553
goto out;
8554
}
8555
8556
/* mac80211 allocates memory for this device instance, including
8557
* space for this driver's private structure */
8558
hw = iwlwifi_ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
8559
if (hw == NULL) {
8560
IWL_ERROR("Can not allocate network device\n");
8561
err = -ENOMEM;
8562
goto out;
8563
}
8564
SET_IEEE80211_DEV(hw, &pdev->dev);
8565
8566
IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8567
priv = hw->priv;
8568
priv->hw = hw;
8569
8570
priv->pci_dev = pdev;
8571
8572
/* Select antenna (may be helpful if only one antenna is connected) */
8573
priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
8574
#ifdef CONFIG_IWL3945_DEBUG
8575
iwl3945_debug_level = iwl3945_param_debug;
8576
atomic_set(&priv->restrict_refcnt, 0);
8577
#endif
8578
priv->retry_rate = 1;
8579
8580
priv->ibss_beacon = NULL;
8581
8582
/* Tell mac80211 and its clients (e.g. Wireless Extensions)
8583
* the range of signal quality values that we'll provide.
8584
* Negative values for level/noise indicate that we'll provide dBm.
8585
* For WE, at least, non-0 values here *enable* display of values
8586
* in app (iwconfig). */
8587
hw->max_rssi = -20; /* signal level, negative indicates dBm */
8588
hw->max_noise = -20; /* noise level, negative indicates dBm */
8589
hw->max_signal = 100; /* link quality indication (%) */
8590
8591
/* Tell mac80211 our Tx characteristics */
8592
hw->flags = IEEE80211_HW_WEP_INCLUDE_IV |
8593
IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8594
8595
/* 4 EDCA QOS priorities */
8596
hw->queues = 4;
8597
8598
spin_lock_init(&priv->lock);
8599
spin_lock_init(&priv->power_data.lock);
8600
spin_lock_init(&priv->sta_lock);
8601
spin_lock_init(&priv->hcmd_lock);
8602
8603
for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8604
INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8605
8606
INIT_LIST_HEAD(&priv->free_frames);
8607
8608
mutex_init(&priv->mutex);
8609
if (pci_enable_device(pdev)) {
8610
err = -ENODEV;
8611
goto out_iwlwifi_ieee80211_free_hw;
8612
}
8613
8614
pci_set_master(pdev);
8615
8616
/* Clear the driver's (not device's) station table */
8617
iwl3945_clear_stations_table(priv);
8618
8619
priv->data_retry_limit = -1;
8620
priv->ieee_channels = NULL;
8621
priv->ieee_rates = NULL;
8622
priv->phymode = -1;
8623
8624
err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8625
if (!err)
8626
err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8627
if (err) {
8628
printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8629
goto out_pci_disable_device;
8630
}
8631
8632
pci_set_drvdata(pdev, priv);
8633
err = pci_request_regions(pdev, DRV_NAME);
8634
if (err)
8635
goto out_pci_disable_device;
8636
8637
/* We disable the RETRY_TIMEOUT register (0x41) to keep
8638
* PCI Tx retries from interfering with C3 CPU state */
8639
pci_write_config_byte(pdev, 0x41, 0x00);
8640
8641
priv->hw_base = pci_iomap(pdev, 0, 0);
8642
if (!priv->hw_base) {
8643
err = -ENODEV;
8644
goto out_pci_release_regions;
8645
}
8646
8647
IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8648
(unsigned long long) pci_resource_len(pdev, 0));
8649
IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8650
8651
/* Initialize module parameter values here */
8652
8653
/* Disable radio (SW RF KILL) via parameter when loading driver */
8654
if (iwl3945_param_disable) {
8655
set_bit(STATUS_RF_KILL_SW, &priv->status);
8656
IWL_DEBUG_INFO("Radio disabled.\n");
8657
}
8658
8659
priv->iw_mode = IEEE80211_IF_TYPE_STA;
8660
8661
pci_id =
8662
(priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
8663
8664
switch (pci_id) {
8665
case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
8666
case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
8667
case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
8668
case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
8669
priv->is_abg = 0;
8670
break;
8671
8672
/*
8673
* Rest are assumed ABG SKU -- if this is not the
8674
* case then the card will get the wrong 'Detected'
8675
* line in the kernel log however the code that
8676
* initializes the GEO table will detect no A-band
8677
* channels and remove the is_abg mask.
8678
*/
8679
default:
8680
priv->is_abg = 1;
8681
break;
8682
}
8683
8684
printk(KERN_INFO DRV_NAME
8685
": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
8686
priv->is_abg ? "A" : "");
8687
8688
/* Device-specific setup */
8689
if (iwl3945_hw_set_hw_setting(priv)) {
8690
IWL_ERROR("failed to set hw settings\n");
8691
goto out_iounmap;
8692
}
8693
8694
#ifdef CONFIG_IWL3945_QOS
8695
if (iwl3945_param_qos_enable)
8696
priv->qos_data.qos_enable = 1;
8697
8698
iwl3945_reset_qos(priv);
8699
8700
priv->qos_data.qos_active = 0;
8701
priv->qos_data.qos_cap.val = 0;
8702
#endif /* CONFIG_IWL3945_QOS */
8703
8704
iwl3945_set_rxon_channel(priv, MODE_IEEE80211G, 6);
8705
iwl3945_setup_deferred_work(priv);
8706
iwl3945_setup_rx_handlers(priv);
8707
8708
priv->rates_mask = IWL_RATES_MASK;
8709
/* If power management is turned on, default to AC mode */
8710
priv->power_mode = IWL_POWER_AC;
8711
priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8712
8713
iwl3945_disable_interrupts(priv);
8714
8715
err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8716
if (err) {
8717
IWL_ERROR("failed to create sysfs device attributes\n");
8718
goto out_release_irq;
8719
}
8720
8721
/* nic init */
8722
iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8723
CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8724
8725
iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8726
err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8727
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8728
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8729
if (err < 0) {
8730
IWL_DEBUG_INFO("Failed to init the card\n");
8731
goto out_remove_sysfs;
8732
}
8733
/* Read the EEPROM */
8734
err = iwl3945_eeprom_init(priv);
8735
if (err) {
8736
IWL_ERROR("Unable to init EEPROM\n");
8737
goto out_remove_sysfs;
8738
}
8739
/* MAC Address location in EEPROM same for 3945/4965 */
8740
get_eeprom_mac(priv, priv->mac_addr);
8741
IWL_DEBUG_INFO("MAC address: " MAC_FMT "\n", MAC_ARG(priv->mac_addr));
8742
SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8743
8744
iwl3945_rate_control_register(priv->hw);
8745
err = iwlwifi_ieee80211_register_hw(priv->hw);
8746
if (err) {
8747
IWL_ERROR("Failed to register network device (error %d)\n", err);
8748
goto out_remove_sysfs;
8749
}
8750
8751
priv->hw->conf.beacon_int = 100;
8752
priv->mac80211_registered = 1;
8753
pci_save_state(pdev);
8754
pci_disable_device(pdev);
8755
8756
return 0;
8757
8758
out_remove_sysfs:
8759
iwl3945_rate_control_unregister(priv->hw);
8760
sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8761
8762
out_release_irq:
8763
destroy_workqueue(priv->workqueue);
8764
priv->workqueue = NULL;
8765
iwl3945_unset_hw_setting(priv);
8766
8767
out_iounmap:
8768
pci_iounmap(pdev, priv->hw_base);
8769
out_pci_release_regions:
8770
pci_release_regions(pdev);
8771
out_pci_disable_device:
8772
pci_disable_device(pdev);
8773
pci_set_drvdata(pdev, NULL);
8774
out_iwlwifi_ieee80211_free_hw:
8775
iwlwifi_ieee80211_free_hw(priv->hw);
8776
out:
8777
return err;
8778
}
8779
8780
static void iwl3945_pci_remove(struct pci_dev *pdev)
8781
{
8782
struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8783
struct list_head *p, *q;
8784
int i;
8785
8786
if (!priv)
8787
return;
8788
8789
IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8790
8791
set_bit(STATUS_EXIT_PENDING, &priv->status);
8792
8793
iwl3945_down(priv);
8794
8795
/* Free MAC hash list for ADHOC */
8796
for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8797
list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8798
list_del(p);
8799
kfree(list_entry(p, struct iwl3945_ibss_seq, list));
8800
}
8801
}
8802
8803
sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8804
8805
iwl3945_dealloc_ucode_pci(priv);
8806
8807
if (priv->rxq.bd)
8808
iwl3945_rx_queue_free(priv, &priv->rxq);
8809
iwl3945_hw_txq_ctx_free(priv);
8810
8811
iwl3945_unset_hw_setting(priv);
8812
iwl3945_clear_stations_table(priv);
8813
8814
if (priv->mac80211_registered) {
8815
iwlwifi_ieee80211_unregister_hw(priv->hw);
8816
iwl3945_rate_control_unregister(priv->hw);
8817
}
8818
8819
/*netif_stop_queue(dev); */
8820
flush_workqueue(priv->workqueue);
8821
8822
/* iwlwifi_ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8823
* priv->workqueue... so we can't take down the workqueue
8824
* until now... */
8825
destroy_workqueue(priv->workqueue);
8826
priv->workqueue = NULL;
8827
8828
pci_iounmap(pdev, priv->hw_base);
8829
pci_release_regions(pdev);
8830
pci_disable_device(pdev);
8831
pci_set_drvdata(pdev, NULL);
8832
8833
kfree(priv->channel_info);
8834
8835
kfree(priv->ieee_channels);
8836
kfree(priv->ieee_rates);
8837
8838
if (priv->ibss_beacon)
8839
dev_kfree_skb(priv->ibss_beacon);
8840
8841
iwlwifi_ieee80211_free_hw(priv->hw);
8842
}
8843
8844
#ifdef CONFIG_PM
8845
8846
static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8847
{
8848
struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8849
8850
if (priv->is_open) {
8851
set_bit(STATUS_IN_SUSPEND, &priv->status);
8852
iwl3945_mac_stop(priv->hw);
8853
priv->is_open = 1;
8854
}
8855
8856
pci_set_power_state(pdev, PCI_D3hot);
8857
8858
return 0;
8859
}
8860
8861
static int iwl3945_pci_resume(struct pci_dev *pdev)
8862
{
8863
struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8864
8865
pci_set_power_state(pdev, PCI_D0);
8866
8867
if (priv->is_open)
8868
iwl3945_mac_open(priv->hw);
8869
8870
clear_bit(STATUS_IN_SUSPEND, &priv->status);
8871
return 0;
8872
}
8873
8874
#endif /* CONFIG_PM */
8875
8876
/*****************************************************************************
8877
*
8878
* driver and module entry point
8879
*
8880
*****************************************************************************/
8881
8882
static struct pci_driver iwl3945_driver = {
8883
.name = DRV_NAME,
8884
.id_table = iwl3945_hw_card_ids,
8885
.probe = iwl3945_pci_probe,
8886
.remove = __devexit_p(iwl3945_pci_remove),
8887
#ifdef CONFIG_PM
8888
.suspend = iwl3945_pci_suspend,
8889
.resume = iwl3945_pci_resume,
8890
#endif
8891
};
8892
8893
static int __init iwl3945_init(void)
8894
{
8895
8896
int ret;
8897
printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8898
printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8899
ret = pci_register_driver(&iwl3945_driver);
8900
if (ret) {
8901
IWL_ERROR("Unable to initialize PCI module\n");
8902
return ret;
8903
}
8904
#ifdef CONFIG_IWL3945_DEBUG
8905
ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8906
if (ret) {
8907
IWL_ERROR("Unable to create driver sysfs file\n");
8908
pci_unregister_driver(&iwl3945_driver);
8909
return ret;
8910
}
8911
#endif
8912
8913
return ret;
8914
}
8915
8916
static void __exit iwl3945_exit(void)
8917
{
8918
#ifdef CONFIG_IWL3945_DEBUG
8919
driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8920
#endif
8921
pci_unregister_driver(&iwl3945_driver);
8922
}
8923
8924
module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8925
MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8926
module_param_named(disable, iwl3945_param_disable, int, 0444);
8927
MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8928
module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8929
MODULE_PARM_DESC(hwcrypto,
8930
"using hardware crypto engine (default 0 [software])\n");
8931
module_param_named(debug, iwl3945_param_debug, int, 0444);
8932
MODULE_PARM_DESC(debug, "debug output mask");
8933
module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8934
MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8935
8936
module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8937
MODULE_PARM_DESC(queues_num, "number of hw queues.");
8938
8939
/* QoS */
8940
module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
8941
MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8942
8943
module_exit(iwl3945_exit);
8944
module_init(iwl3945_init);
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Version: 2.0.1