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/******************************************************************************
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* Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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* Contact Information:
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* James P. Ketrenos <ipw2100-admin@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*****************************************************************************/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/version.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <linux/delay.h>
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#include <linux/skbuff.h>
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#include <linux/netdevice.h>
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#include <linux/wireless.h>
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#include <linux/firmware.h>
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#include <net/mac80211.h>
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#include <linux/etherdevice.h>
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#include <linux/delay.h>
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#include "iwl-helpers.h"
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#include "iwl-3945-rs.h"
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#define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \
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[IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
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IWL_RATE_##r##M_IEEE, \
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IWL_RATE_##ip##M_INDEX, \
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IWL_RATE_##in##M_INDEX, \
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IWL_RATE_##rp##M_INDEX, \
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IWL_RATE_##rn##M_INDEX, \
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IWL_RATE_##pp##M_INDEX, \
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IWL_RATE_##np##M_INDEX, \
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IWL_RATE_##r##M_INDEX_TABLE, \
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IWL_RATE_##ip##M_INDEX_TABLE }
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* rate, prev rate, next rate, prev tgg rate, next tgg rate
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* If there isn't a valid next or previous rate then INV is used which
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* maps to IWL_RATE_INVALID
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const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
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IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2), /* 1mbps */
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IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */
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IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */
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IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */
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IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */
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IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */
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IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */
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IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */
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IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */
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IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */
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IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */
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IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
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/* 1 = enable the iwl3945_disable_events() function */
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#define IWL_EVT_DISABLE (0)
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#define IWL_EVT_DISABLE_SIZE (1532/32)
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* iwl3945_disable_events - Disable selected events in uCode event log
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* Disable an event by writing "1"s into "disable"
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* bitmap in SRAM. Bit position corresponds to Event # (id/type).
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* Default values of 0 enable uCode events to be logged.
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* Use for only special debugging. This function is just a placeholder as-is,
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* you'll need to provide the special bits! ...
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* ... and set IWL_EVT_DISABLE to 1. */
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void iwl3945_disable_events(struct iwl3945_priv *priv)
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u32 base; /* SRAM address of event log header */
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u32 disable_ptr; /* SRAM address of event-disable bitmap array */
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u32 array_size; /* # of u32 entries in array */
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u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
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0x00000000, /* 31 - 0 Event id numbers */
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0x00000000, /* 63 - 32 */
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0x00000000, /* 95 - 64 */
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0x00000000, /* 127 - 96 */
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0x00000000, /* 159 - 128 */
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0x00000000, /* 191 - 160 */
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0x00000000, /* 223 - 192 */
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0x00000000, /* 255 - 224 */
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0x00000000, /* 287 - 256 */
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0x00000000, /* 319 - 288 */
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0x00000000, /* 351 - 320 */
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0x00000000, /* 383 - 352 */
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0x00000000, /* 415 - 384 */
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0x00000000, /* 447 - 416 */
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0x00000000, /* 479 - 448 */
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0x00000000, /* 511 - 480 */
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0x00000000, /* 543 - 512 */
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0x00000000, /* 575 - 544 */
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0x00000000, /* 607 - 576 */
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0x00000000, /* 639 - 608 */
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0x00000000, /* 671 - 640 */
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0x00000000, /* 703 - 672 */
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0x00000000, /* 735 - 704 */
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0x00000000, /* 767 - 736 */
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0x00000000, /* 799 - 768 */
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0x00000000, /* 831 - 800 */
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0x00000000, /* 863 - 832 */
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0x00000000, /* 895 - 864 */
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0x00000000, /* 927 - 896 */
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0x00000000, /* 959 - 928 */
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0x00000000, /* 991 - 960 */
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0x00000000, /* 1023 - 992 */
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0x00000000, /* 1055 - 1024 */
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0x00000000, /* 1087 - 1056 */
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0x00000000, /* 1119 - 1088 */
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0x00000000, /* 1151 - 1120 */
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0x00000000, /* 1183 - 1152 */
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0x00000000, /* 1215 - 1184 */
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0x00000000, /* 1247 - 1216 */
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0x00000000, /* 1279 - 1248 */
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0x00000000, /* 1311 - 1280 */
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0x00000000, /* 1343 - 1312 */
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0x00000000, /* 1375 - 1344 */
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0x00000000, /* 1407 - 1376 */
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0x00000000, /* 1439 - 1408 */
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0x00000000, /* 1471 - 1440 */
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0x00000000, /* 1503 - 1472 */
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base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
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if (!iwl3945_hw_valid_rtc_data_addr(base)) {
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IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
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ret = iwl3945_grab_nic_access(priv);
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IWL_WARNING("Can not read from adapter at this time.\n");
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disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
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array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
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iwl3945_release_nic_access(priv);
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if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
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IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
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ret = iwl3945_grab_nic_access(priv);
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for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
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iwl3945_write_targ_mem(priv,
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disable_ptr + (i * sizeof(u32)),
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iwl3945_release_nic_access(priv);
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IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
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IWL_DEBUG_INFO(" by writing \"1\"s into disable bitmap\n");
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IWL_DEBUG_INFO(" in SRAM at 0x%x, size %d u32s\n",
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disable_ptr, array_size);
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* iwl3945_get_antenna_flags - Get antenna flags for RXON command
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* @priv: eeprom and antenna fields are used to determine antenna flags
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* priv->eeprom is used to determine if antenna AUX/MAIN are reversed
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* priv->antenna specifies the antenna diversity mode:
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* IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
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* IWL_ANTENNA_MAIN - Force MAIN antenna
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* IWL_ANTENNA_AUX - Force AUX antenna
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__le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
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switch (priv->antenna) {
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case IWL_ANTENNA_DIVERSITY:
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case IWL_ANTENNA_MAIN:
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if (priv->eeprom.antenna_switch_type)
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return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
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return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
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case IWL_ANTENNA_AUX:
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if (priv->eeprom.antenna_switch_type)
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return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
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return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
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/* bad antenna selector value */
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IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
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return 0; /* "diversity" is default if error */
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/*****************************************************************************
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* Intel PRO/Wireless 3945ABG/BG Network Connection
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* RX handler implementations
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*****************************************************************************/
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void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
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struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
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IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
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(int)sizeof(struct iwl3945_notif_statistics),
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le32_to_cpu(pkt->len));
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memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
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priv->last_statistics_time = jiffies;
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static void iwl3945_handle_data_packet(struct iwl3945_priv *priv, int is_data,
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struct iwl3945_rx_mem_buffer *rxb,
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struct ieee80211_rx_status *stats,
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struct ieee80211_hdr *hdr;
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struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
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struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
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struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
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short len = le16_to_cpu(rx_hdr->len);
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/* We received data from the HW, so stop the watchdog */
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if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
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IWL_DEBUG_DROP("Corruption detected!\n");
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/* We only process data packets if the interface is open */
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if (unlikely(!priv->is_open)) {
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("Dropping packet while interface is not open.\n");
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if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
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if (iwl3945_param_hwcrypto)
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iwl3945_set_decrypted_flag(priv, rxb->skb,
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le32_to_cpu(rx_end->status),
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iwl3945_handle_data_packet_monitor(priv, rxb, IWL_RX_DATA(pkt),
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len, stats, phy_flags);
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skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
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/* Set the size of the skb to the size of the frame */
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skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
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hdr = (void *)rxb->skb->data;
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if (iwl3945_param_hwcrypto)
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iwl3945_set_decrypted_flag(priv, rxb->skb,
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le32_to_cpu(rx_end->status), stats);
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iwlwifi_ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
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#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
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static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
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struct iwl3945_rx_mem_buffer *rxb)
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struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
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struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
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struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
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struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
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struct ieee80211_hdr *header;
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u16 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
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u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
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u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
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struct ieee80211_rx_status stats = {
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.mactime = le64_to_cpu(rx_end->timestamp),
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.freq = ieee80211chan2mhz(le16_to_cpu(rx_hdr->channel)),
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.channel = le16_to_cpu(rx_hdr->channel),
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.phymode = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
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MODE_IEEE80211G : MODE_IEEE80211A,
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.rate = rx_hdr->rate,
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if ((unlikely(rx_stats->phy_count > 20))) {
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("dsp size out of range [0,20]: "
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"%d/n", rx_stats->phy_count);
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if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
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|| !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
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IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
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if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
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iwl3945_handle_data_packet(priv, 1, rxb, &stats, phy_flags);
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/* Convert 3945's rssi indicator to dBm */
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stats.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
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/* Set default noise value to -127 */
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if (priv->last_rx_noise == 0)
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priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
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/* 3945 provides noise info for OFDM frames only.
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* sig_avg and noise_diff are measured by the 3945's digital signal
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* processor (DSP), and indicate linear levels of signal level and
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* distortion/noise within the packet preamble after
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* automatic gain control (AGC). sig_avg should stay fairly
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* constant if the radio's AGC is working well.
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* Since these values are linear (not dB or dBm), linear
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* signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
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* Convert linear SNR to dB SNR, then subtract that from rssi dBm
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* to obtain noise level in dBm.
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* Calculate stats.signal (quality indicator in %) based on SNR. */
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if (rx_stats_noise_diff) {
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snr = rx_stats_sig_avg / rx_stats_noise_diff;
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stats.noise = stats.ssi - iwl3945_calc_db_from_ratio(snr);
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stats.signal = iwl3945_calc_sig_qual(stats.ssi, stats.noise);
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/* If noise info not available, calculate signal quality indicator (%)
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* using just the dBm signal level. */
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stats.noise = priv->last_rx_noise;
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stats.signal = iwl3945_calc_sig_qual(stats.ssi, 0);
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IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
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stats.ssi, stats.noise, stats.signal,
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rx_stats_sig_avg, rx_stats_noise_diff);
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stats.freq = ieee80211chan2mhz(stats.channel);
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/* can be covered by iwl3945_report_frame() in most cases */
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/* IWL_DEBUG_RX("RX status: 0x%08X\n", rx_end->status); */
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header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
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network_packet = iwl3945_is_network_packet(priv, header);
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#ifdef CONFIG_IWL3945_DEBUG
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if (iwl3945_debug_level & IWL_DL_STATS && net_ratelimit())
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("[%c] %d RSSI: %d Signal: %u, Noise: %u, Rate: %u\n",
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network_packet ? '*' : ' ',
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stats.channel, stats.ssi, stats.ssi,
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stats.ssi, stats.rate);
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if (iwl3945_debug_level & (IWL_DL_RX))
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/* Set "1" to report good data frames in groups of 100 */
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iwl3945_report_frame(priv, pkt, header, 1);
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if (network_packet) {
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priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
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priv->last_tsf = le64_to_cpu(rx_end->timestamp);
393
priv->last_rx_rssi = stats.ssi;
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priv->last_rx_noise = stats.noise;
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switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
398
case IEEE80211_FTYPE_MGMT:
399
switch (le16_to_cpu(header->frame_control) &
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IEEE80211_FCTL_STYPE) {
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case IEEE80211_STYPE_PROBE_RESP:
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case IEEE80211_STYPE_BEACON:{
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/* If this is a beacon or probe response for
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* our network then cache the beacon
406
if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
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&& !compare_ether_addr(header->addr2,
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((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
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&& !compare_ether_addr(header->addr3,
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struct ieee80211_mgmt *mgmt =
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(struct ieee80211_mgmt *)header;
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(__le32 *) & mgmt->u.beacon.
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priv->timestamp0 = le32_to_cpu(pos[0]);
419
priv->timestamp1 = le32_to_cpu(pos[1]);
420
priv->beacon_int = le16_to_cpu(
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mgmt->u.beacon.beacon_int);
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if (priv->call_post_assoc_from_beacon &&
424
IEEE80211_IF_TYPE_STA))
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queue_work(priv->workqueue,
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&priv->post_associate.work);
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priv->call_post_assoc_from_beacon = 0;
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case IEEE80211_STYPE_ACTION:
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/* TODO: Parse 802.11h frames for CSA... */
439
* TODO: There is no callback function from upper
440
* stack to inform us when associated status. this
441
* work around to sniff assoc_resp management frame
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* and finish the association process.
444
case IEEE80211_STYPE_ASSOC_RESP:
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case IEEE80211_STYPE_REASSOC_RESP:{
446
struct ieee80211_mgmt *mgnt =
447
(struct ieee80211_mgmt *)header;
449
/* We have just associated, give some
450
* time for the 4-way handshake if
451
* any. Don't start scan too early. */
452
priv->next_scan_jiffies = jiffies +
453
IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
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priv->assoc_id = (~((1 << 15) | (1 << 14)) &
458
priv->assoc_capability =
459
le16_to_cpu(mgnt->u.assoc_resp.capab_info);
460
if (priv->beacon_int)
461
queue_work(priv->workqueue,
462
&priv->post_associate.work);
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priv->call_post_assoc_from_beacon = 1;
468
case IEEE80211_STYPE_PROBE_REQ:{
469
if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
471
("Dropping (non network): " MAC_FMT
472
", " MAC_FMT ", " MAC_FMT "\n",
473
MAC_ARG(header->addr1),
474
MAC_ARG(header->addr2),
475
MAC_ARG(header->addr3));
480
iwl3945_handle_data_packet(priv, 0, rxb, &stats, phy_flags);
483
case IEEE80211_FTYPE_CTL:
486
case IEEE80211_FTYPE_DATA:
487
if (unlikely(iwl3945_is_duplicate_packet(priv, header)))
488
IWL_DEBUG_DROP("Dropping (dup): " MAC_FMT ", "
489
MAC_FMT ", " MAC_FMT "\n",
490
MAC_ARG(header->addr1),
491
MAC_ARG(header->addr2),
492
MAC_ARG(header->addr3));
494
iwl3945_handle_data_packet(priv, 1, rxb, &stats,
500
int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
501
dma_addr_t addr, u16 len)
505
struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
507
count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
508
pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
510
if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
511
IWL_ERROR("Error can not send more than %d chunks\n",
516
tfd->pa[count].addr = cpu_to_le32(addr);
517
tfd->pa[count].len = cpu_to_le32(len);
521
tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
522
TFD_CTL_PAD_SET(pad));
528
* iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
530
* Does NOT advance any indexes
532
int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
534
struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
535
struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
536
struct pci_dev *dev = priv->pci_dev;
541
if (txq->q.id == IWL_CMD_QUEUE_NUM)
542
/* nothing to cleanup after for host commands */
546
counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
547
if (counter > NUM_TFD_CHUNKS) {
548
IWL_ERROR("Too many chunks: %i\n", counter);
549
/* @todo issue fatal error, it is quite serious situation */
553
/* unmap chunks if any */
555
for (i = 1; i < counter; i++) {
556
pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
557
le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
558
if (txq->txb[txq->q.read_ptr].skb[0]) {
559
struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
560
if (txq->txb[txq->q.read_ptr].skb[0]) {
561
/* Can be called from interrupt context */
562
dev_kfree_skb_any(skb);
563
txq->txb[txq->q.read_ptr].skb[0] = NULL;
570
u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
573
int ret = IWL_INVALID_STATION;
576
spin_lock_irqsave(&priv->sta_lock, flags);
577
for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
578
if ((priv->stations[i].used) &&
580
(priv->stations[i].sta.sta.addr, addr))) {
585
IWL_DEBUG_INFO("can not find STA " MAC_FMT " (total %d)\n",
586
MAC_ARG(addr), priv->num_stations);
588
spin_unlock_irqrestore(&priv->sta_lock, flags);
593
* iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
596
void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
597
struct iwl3945_cmd *cmd,
598
struct ieee80211_tx_control *ctrl,
599
struct ieee80211_hdr *hdr, int sta_id, int tx_id)
602
u16 rate_index = min(ctrl->tx_rate & 0xffff, IWL_RATE_COUNT - 1);
608
u16 fc = le16_to_cpu(hdr->frame_control);
610
rate = iwl3945_rates[rate_index].plcp;
611
tx_flags = cmd->cmd.tx.tx_flags;
613
/* We need to figure out how to get the sta->supp_rates while
614
* in this running context; perhaps encoding into ctrl->tx_rate? */
615
rate_mask = IWL_RATES_MASK;
617
spin_lock_irqsave(&priv->sta_lock, flags);
619
priv->stations[sta_id].current_rate.rate_n_flags = rate;
621
if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
622
(sta_id != IWL3945_BROADCAST_ID) &&
623
(sta_id != IWL_MULTICAST_ID))
624
priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
626
spin_unlock_irqrestore(&priv->sta_lock, flags);
628
if (tx_id >= IWL_CMD_QUEUE_NUM)
633
if (ieee80211_is_probe_response(fc)) {
634
data_retry_limit = 3;
635
if (data_retry_limit < rts_retry_limit)
636
rts_retry_limit = data_retry_limit;
638
data_retry_limit = IWL_DEFAULT_TX_RETRY;
640
if (priv->data_retry_limit != -1)
641
data_retry_limit = priv->data_retry_limit;
643
if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
644
switch (fc & IEEE80211_FCTL_STYPE) {
645
case IEEE80211_STYPE_AUTH:
646
case IEEE80211_STYPE_DEAUTH:
647
case IEEE80211_STYPE_ASSOC_REQ:
648
case IEEE80211_STYPE_REASSOC_REQ:
649
if (tx_flags & TX_CMD_FLG_RTS_MSK) {
650
tx_flags &= ~TX_CMD_FLG_RTS_MSK;
651
tx_flags |= TX_CMD_FLG_CTS_MSK;
659
cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
660
cmd->cmd.tx.data_retry_limit = data_retry_limit;
661
cmd->cmd.tx.rate = rate;
662
cmd->cmd.tx.tx_flags = tx_flags;
665
cmd->cmd.tx.supp_rates[0] =
666
((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
669
cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
671
IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
672
"cck/ofdm mask: 0x%x/0x%x\n", sta_id,
673
cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
674
cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
677
u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
679
unsigned long flags_spin;
680
struct iwl3945_station_entry *station;
682
if (sta_id == IWL_INVALID_STATION)
683
return IWL_INVALID_STATION;
685
spin_lock_irqsave(&priv->sta_lock, flags_spin);
686
station = &priv->stations[sta_id];
688
station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
689
station->sta.rate_n_flags = cpu_to_le16(tx_rate);
690
station->current_rate.rate_n_flags = tx_rate;
691
station->sta.mode = STA_CONTROL_MODIFY_MSK;
693
spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
695
iwl3945_send_add_station(priv, &station->sta, flags);
696
IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
701
static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
706
spin_lock_irqsave(&priv->lock, flags);
707
rc = iwl3945_grab_nic_access(priv);
709
spin_unlock_irqrestore(&priv->lock, flags);
716
rc = pci_read_config_dword(priv->pci_dev,
717
PCI_POWER_SOURCE, &val);
718
if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
719
iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
720
APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
721
~APMG_PS_CTRL_MSK_PWR_SRC);
722
iwl3945_release_nic_access(priv);
724
iwl3945_poll_bit(priv, CSR_GPIO_IN,
725
CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
726
CSR_GPIO_IN_BIT_AUX_POWER, 5000);
728
iwl3945_release_nic_access(priv);
730
iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
731
APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
732
~APMG_PS_CTRL_MSK_PWR_SRC);
734
iwl3945_release_nic_access(priv);
735
iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
736
CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */
738
spin_unlock_irqrestore(&priv->lock, flags);
743
static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
748
spin_lock_irqsave(&priv->lock, flags);
749
rc = iwl3945_grab_nic_access(priv);
751
spin_unlock_irqrestore(&priv->lock, flags);
755
iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
756
iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
757
priv->hw_setting.shared_phys +
758
offsetof(struct iwl3945_shared, rx_read_ptr[0]));
759
iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
760
iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
761
ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
762
ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
763
ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
764
ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
765
(RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
766
ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
767
(1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
768
ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
770
/* fake read to flush all prev I/O */
771
iwl3945_read_direct32(priv, FH_RSSR_CTRL);
773
iwl3945_release_nic_access(priv);
774
spin_unlock_irqrestore(&priv->lock, flags);
779
static int iwl3945_tx_reset(struct iwl3945_priv *priv)
784
spin_lock_irqsave(&priv->lock, flags);
785
rc = iwl3945_grab_nic_access(priv);
787
spin_unlock_irqrestore(&priv->lock, flags);
792
iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
795
iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
797
/* all 6 fifo are active */
798
iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
800
iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
801
iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
802
iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
803
iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
805
iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
806
priv->hw_setting.shared_phys);
808
iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
809
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
810
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
811
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
812
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
813
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
814
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
815
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
817
iwl3945_release_nic_access(priv);
818
spin_unlock_irqrestore(&priv->lock, flags);
824
* iwl3945_txq_ctx_reset - Reset TX queue context
826
* Destroys all DMA structures and initialize them again
828
static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
831
int txq_id, slots_num;
833
iwl3945_hw_txq_ctx_free(priv);
836
rc = iwl3945_tx_reset(priv);
841
for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
842
slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
843
TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
844
rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
847
IWL_ERROR("Tx %d queue init failed\n", txq_id);
855
iwl3945_hw_txq_ctx_free(priv);
859
int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
864
struct iwl3945_rx_queue *rxq = &priv->rxq;
866
iwl3945_power_init_handle(priv);
868
spin_lock_irqsave(&priv->lock, flags);
869
iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
870
iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
871
CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
873
iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
874
rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
875
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
876
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
878
spin_unlock_irqrestore(&priv->lock, flags);
879
IWL_DEBUG_INFO("Failed to init the card\n");
883
rc = iwl3945_grab_nic_access(priv);
885
spin_unlock_irqrestore(&priv->lock, flags);
888
iwl3945_write_prph(priv, APMG_CLK_EN_REG,
889
APMG_CLK_VAL_DMA_CLK_RQT |
890
APMG_CLK_VAL_BSM_CLK_RQT);
892
iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
893
APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
894
iwl3945_release_nic_access(priv);
895
spin_unlock_irqrestore(&priv->lock, flags);
897
/* Determine HW type */
898
rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
901
IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
903
iwl3945_nic_set_pwr_src(priv, 1);
904
spin_lock_irqsave(&priv->lock, flags);
906
if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
907
IWL_DEBUG_INFO("RTP type \n");
908
else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
909
IWL_DEBUG_INFO("ALM-MB type\n");
910
iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
911
CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MB);
913
IWL_DEBUG_INFO("ALM-MM type\n");
914
iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
915
CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MM);
918
if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
919
IWL_DEBUG_INFO("SKU OP mode is mrc\n");
920
iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
921
CSR_HW_IF_CONFIG_REG_BIT_SKU_MRC);
923
IWL_DEBUG_INFO("SKU OP mode is basic\n");
925
if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
926
IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
927
priv->eeprom.board_revision);
928
iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
929
CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
931
IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
932
priv->eeprom.board_revision);
933
iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
934
CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
937
if (priv->eeprom.almgor_m_version <= 1) {
938
iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
939
CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
940
IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
941
priv->eeprom.almgor_m_version);
943
IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
944
priv->eeprom.almgor_m_version);
945
iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
946
CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
948
spin_unlock_irqrestore(&priv->lock, flags);
950
if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
951
IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
953
if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
954
IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
956
/* Allocate the RX queue, or reset if it is already allocated */
958
rc = iwl3945_rx_queue_alloc(priv);
960
IWL_ERROR("Unable to initialize Rx queue\n");
964
iwl3945_rx_queue_reset(priv, rxq);
966
iwl3945_rx_replenish(priv);
968
iwl3945_rx_init(priv, rxq);
970
spin_lock_irqsave(&priv->lock, flags);
972
/* Look at using this instead:
973
rxq->need_update = 1;
974
iwl3945_rx_queue_update_write_ptr(priv, rxq);
977
rc = iwl3945_grab_nic_access(priv);
979
spin_unlock_irqrestore(&priv->lock, flags);
982
iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
983
iwl3945_release_nic_access(priv);
985
spin_unlock_irqrestore(&priv->lock, flags);
987
rc = iwl3945_txq_ctx_reset(priv);
991
set_bit(STATUS_INIT, &priv->status);
997
* iwl3945_hw_txq_ctx_free - Free TXQ Context
999
* Destroy all TX DMA queues and structures
1001
void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1006
for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1007
iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1010
void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1013
unsigned long flags;
1015
spin_lock_irqsave(&priv->lock, flags);
1016
if (iwl3945_grab_nic_access(priv)) {
1017
spin_unlock_irqrestore(&priv->lock, flags);
1018
iwl3945_hw_txq_ctx_free(priv);
1023
iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1025
/* reset TFD queues */
1026
for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1027
iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1028
iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1029
ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1033
iwl3945_release_nic_access(priv);
1034
spin_unlock_irqrestore(&priv->lock, flags);
1036
iwl3945_hw_txq_ctx_free(priv);
1039
int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1043
unsigned long flags;
1045
spin_lock_irqsave(&priv->lock, flags);
1047
/* set stop master bit */
1048
iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1050
reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1052
if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1053
(reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1054
IWL_DEBUG_INFO("Card in power save, master is already "
1057
rc = iwl3945_poll_bit(priv, CSR_RESET,
1058
CSR_RESET_REG_FLAG_MASTER_DISABLED,
1059
CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1061
spin_unlock_irqrestore(&priv->lock, flags);
1066
spin_unlock_irqrestore(&priv->lock, flags);
1067
IWL_DEBUG_INFO("stop master\n");
1072
int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1075
unsigned long flags;
1077
iwl3945_hw_nic_stop_master(priv);
1079
spin_lock_irqsave(&priv->lock, flags);
1081
iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1083
rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1084
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1085
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1087
rc = iwl3945_grab_nic_access(priv);
1089
iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1090
APMG_CLK_VAL_BSM_CLK_RQT);
1094
iwl3945_set_bit(priv, CSR_GP_CNTRL,
1095
CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1097
iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1098
iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1102
iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1103
APMG_CLK_VAL_DMA_CLK_RQT |
1104
APMG_CLK_VAL_BSM_CLK_RQT);
1107
iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1108
APMG_PS_CTRL_VAL_RESET_REQ);
1110
iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1111
APMG_PS_CTRL_VAL_RESET_REQ);
1112
iwl3945_release_nic_access(priv);
1115
/* Clear the 'host command active' bit... */
1116
clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1118
wake_up_interruptible(&priv->wait_command_queue);
1119
spin_unlock_irqrestore(&priv->lock, flags);
1125
* iwl3945_hw_reg_adjust_power_by_temp
1126
* return index delta into power gain settings table
1128
static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1130
return (new_reading - old_reading) * (-11) / 100;
1134
* iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1136
static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1138
return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1141
int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1143
return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1147
* iwl3945_hw_reg_txpower_get_temperature
1148
* get the current temperature by reading from NIC
1150
static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1154
temperature = iwl3945_hw_get_temperature(priv);
1156
/* driver's okay range is -260 to +25.
1157
* human readable okay range is 0 to +285 */
1158
IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1160
/* handle insane temp reading */
1161
if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1162
IWL_ERROR("Error bad temperature value %d\n", temperature);
1164
/* if really really hot(?),
1165
* substitute the 3rd band/group's temp measured at factory */
1166
if (priv->last_temperature > 100)
1167
temperature = priv->eeprom.groups[2].temperature;
1168
else /* else use most recent "sane" value from driver */
1169
temperature = priv->last_temperature;
1172
return temperature; /* raw, not "human readable" */
1175
/* Adjust Txpower only if temperature variance is greater than threshold.
1177
* Both are lower than older versions' 9 degrees */
1178
#define IWL_TEMPERATURE_LIMIT_TIMER 6
1181
* is_temp_calib_needed - determines if new calibration is needed
1183
* records new temperature in tx_mgr->temperature.
1184
* replaces tx_mgr->last_temperature *only* if calib needed
1185
* (assumes caller will actually do the calibration!). */
1186
static int is_temp_calib_needed(struct iwl3945_priv *priv)
1190
priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1191
temp_diff = priv->temperature - priv->last_temperature;
1193
/* get absolute value */
1194
if (temp_diff < 0) {
1195
IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1196
temp_diff = -temp_diff;
1197
} else if (temp_diff == 0)
1198
IWL_DEBUG_POWER("Same temp,\n");
1200
IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1202
/* if we don't need calibration, *don't* update last_temperature */
1203
if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1204
IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1208
IWL_DEBUG_POWER("Timed thermal calib needed\n");
1210
/* assume that caller will actually do calib ...
1211
* update the "last temperature" value */
1212
priv->last_temperature = priv->temperature;
1216
#define IWL_MAX_GAIN_ENTRIES 78
1217
#define IWL_CCK_FROM_OFDM_POWER_DIFF -5
1218
#define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1220
/* radio and DSP power table, each step is 1/2 dB.
1221
* 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1222
static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1224
{251, 127}, /* 2.4 GHz, highest power */
1301
{3, 95} }, /* 2.4 GHz, lowest power */
1303
{251, 127}, /* 5.x GHz, highest power */
1380
{3, 120} } /* 5.x GHz, lowest power */
1383
static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1387
if (index >= IWL_MAX_GAIN_ENTRIES)
1388
return IWL_MAX_GAIN_ENTRIES - 1;
1392
/* Kick off thermal recalibration check every 60 seconds */
1393
#define REG_RECALIB_PERIOD (60)
1396
* iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1398
* Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1399
* or 6 Mbit (OFDM) rates.
1401
static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1402
s32 rate_index, const s8 *clip_pwrs,
1403
struct iwl3945_channel_info *ch_info,
1406
struct iwl3945_scan_power_info *scan_power_info;
1410
scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1412
/* use this channel group's 6Mbit clipping/saturation pwr,
1413
* but cap at regulatory scan power restriction (set during init
1414
* based on eeprom channel data) for this channel. */
1415
power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1417
/* further limit to user's max power preference.
1418
* FIXME: Other spectrum management power limitations do not
1419
* seem to apply?? */
1420
power = min(power, priv->user_txpower_limit);
1421
scan_power_info->requested_power = power;
1423
/* find difference between new scan *power* and current "normal"
1424
* Tx *power* for 6Mb. Use this difference (x2) to adjust the
1425
* current "normal" temperature-compensated Tx power *index* for
1426
* this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1428
power_index = ch_info->power_info[rate_index].power_table_index
1429
- (power - ch_info->power_info
1430
[IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1432
/* store reference index that we use when adjusting *all* scan
1433
* powers. So we can accommodate user (all channel) or spectrum
1434
* management (single channel) power changes "between" temperature
1435
* feedback compensation procedures.
1436
* don't force fit this reference index into gain table; it may be a
1437
* negative number. This will help avoid errors when we're at
1438
* the lower bounds (highest gains, for warmest temperatures)
1441
/* don't exceed table bounds for "real" setting */
1442
power_index = iwl3945_hw_reg_fix_power_index(power_index);
1444
scan_power_info->power_table_index = power_index;
1445
scan_power_info->tpc.tx_gain =
1446
power_gain_table[band_index][power_index].tx_gain;
1447
scan_power_info->tpc.dsp_atten =
1448
power_gain_table[band_index][power_index].dsp_atten;
1452
* iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1454
* Configures power settings for all rates for the current channel,
1455
* using values from channel info struct, and send to NIC
1457
int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1460
const struct iwl3945_channel_info *ch_info = NULL;
1461
struct iwl3945_txpowertable_cmd txpower = {
1462
.channel = priv->active_rxon.channel,
1465
txpower.band = (priv->phymode == MODE_IEEE80211A) ? 0 : 1;
1466
ch_info = iwl3945_get_channel_info(priv,
1468
le16_to_cpu(priv->active_rxon.channel));
1471
("Failed to get channel info for channel %d [%d]\n",
1472
le16_to_cpu(priv->active_rxon.channel), priv->phymode);
1476
if (!is_channel_valid(ch_info)) {
1477
IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1478
"non-Tx channel.\n");
1482
/* fill cmd with power settings for all rates for current channel */
1483
/* Fill OFDM rate */
1484
for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1485
rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1487
txpower.power[i].tpc = ch_info->power_info[i].tpc;
1488
txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1490
IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1491
le16_to_cpu(txpower.channel),
1493
txpower.power[i].tpc.tx_gain,
1494
txpower.power[i].tpc.dsp_atten,
1495
txpower.power[i].rate);
1497
/* Fill CCK rates */
1498
for (rate_idx = IWL_FIRST_CCK_RATE;
1499
rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1500
txpower.power[i].tpc = ch_info->power_info[i].tpc;
1501
txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1503
IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1504
le16_to_cpu(txpower.channel),
1506
txpower.power[i].tpc.tx_gain,
1507
txpower.power[i].tpc.dsp_atten,
1508
txpower.power[i].rate);
1511
return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1512
sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1517
* iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1518
* @ch_info: Channel to update. Uses power_info.requested_power.
1520
* Replace requested_power and base_power_index ch_info fields for
1523
* Called if user or spectrum management changes power preferences.
1524
* Takes into account h/w and modulation limitations (clip power).
1526
* This does *not* send anything to NIC, just sets up ch_info for one channel.
1528
* NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1529
* properly fill out the scan powers, and actual h/w gain settings,
1530
* and send changes to NIC
1532
static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1533
struct iwl3945_channel_info *ch_info)
1535
struct iwl3945_channel_power_info *power_info;
1536
int power_changed = 0;
1538
const s8 *clip_pwrs;
1541
/* Get this chnlgrp's rate-to-max/clip-powers table */
1542
clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1544
/* Get this channel's rate-to-current-power settings table */
1545
power_info = ch_info->power_info;
1547
/* update OFDM Txpower settings */
1548
for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1549
i++, ++power_info) {
1552
/* limit new power to be no more than h/w capability */
1553
power = min(ch_info->curr_txpow, clip_pwrs[i]);
1554
if (power == power_info->requested_power)
1557
/* find difference between old and new requested powers,
1558
* update base (non-temp-compensated) power index */
1559
delta_idx = (power - power_info->requested_power) * 2;
1560
power_info->base_power_index -= delta_idx;
1562
/* save new requested power value */
1563
power_info->requested_power = power;
1568
/* update CCK Txpower settings, based on OFDM 12M setting ...
1569
* ... all CCK power settings for a given channel are the *same*. */
1570
if (power_changed) {
1572
ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1573
requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1575
/* do all CCK rates' iwl3945_channel_power_info structures */
1576
for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1577
power_info->requested_power = power;
1578
power_info->base_power_index =
1579
ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1580
base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1589
* iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1591
* NOTE: Returned power limit may be less (but not more) than requested,
1592
* based strictly on regulatory (eeprom and spectrum mgt) limitations
1593
* (no consideration for h/w clipping limitations).
1595
static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1600
/* if we're using TGd limits, use lower of TGd or EEPROM */
1601
if (ch_info->tgd_data.max_power != 0)
1602
max_power = min(ch_info->tgd_data.max_power,
1603
ch_info->eeprom.max_power_avg);
1605
/* else just use EEPROM limits */
1608
max_power = ch_info->eeprom.max_power_avg;
1610
return min(max_power, ch_info->max_power_avg);
1614
* iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1616
* Compensate txpower settings of *all* channels for temperature.
1617
* This only accounts for the difference between current temperature
1618
* and the factory calibration temperatures, and bases the new settings
1619
* on the channel's base_power_index.
1621
* If RxOn is "associated", this sends the new Txpower to NIC!
1623
static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1625
struct iwl3945_channel_info *ch_info = NULL;
1627
const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1633
int temperature = priv->temperature;
1635
/* set up new Tx power info for each and every channel, 2.4 and 5.x */
1636
for (i = 0; i < priv->channel_count; i++) {
1637
ch_info = &priv->channel_info[i];
1638
a_band = is_channel_a_band(ch_info);
1640
/* Get this chnlgrp's factory calibration temperature */
1641
ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1644
/* get power index adjustment based on curr and factory
1646
delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1649
/* set tx power value for all rates, OFDM and CCK */
1650
for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1653
ch_info->power_info[rate_index].base_power_index;
1655
/* temperature compensate */
1656
power_idx += delta_index;
1658
/* stay within table range */
1659
power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1660
ch_info->power_info[rate_index].
1661
power_table_index = (u8) power_idx;
1662
ch_info->power_info[rate_index].tpc =
1663
power_gain_table[a_band][power_idx];
1666
/* Get this chnlgrp's rate-to-max/clip-powers table */
1667
clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1669
/* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1670
for (scan_tbl_index = 0;
1671
scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1672
s32 actual_index = (scan_tbl_index == 0) ?
1673
IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1674
iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1675
actual_index, clip_pwrs,
1680
/* send Txpower command for current channel to ucode */
1681
return iwl3945_hw_reg_send_txpower(priv);
1684
int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
1686
struct iwl3945_channel_info *ch_info;
1691
if (priv->user_txpower_limit == power) {
1692
IWL_DEBUG_POWER("Requested Tx power same as current "
1693
"limit: %ddBm.\n", power);
1697
IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1698
priv->user_txpower_limit = power;
1700
/* set up new Tx powers for each and every channel, 2.4 and 5.x */
1702
for (i = 0; i < priv->channel_count; i++) {
1703
ch_info = &priv->channel_info[i];
1704
a_band = is_channel_a_band(ch_info);
1706
/* find minimum power of all user and regulatory constraints
1707
* (does not consider h/w clipping limitations) */
1708
max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1709
max_power = min(power, max_power);
1710
if (max_power != ch_info->curr_txpow) {
1711
ch_info->curr_txpow = max_power;
1713
/* this considers the h/w clipping limitations */
1714
iwl3945_hw_reg_set_new_power(priv, ch_info);
1718
/* update txpower settings for all channels,
1719
* send to NIC if associated. */
1720
is_temp_calib_needed(priv);
1721
iwl3945_hw_reg_comp_txpower_temp(priv);
1726
/* will add 3945 channel switch cmd handling later */
1727
int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
1733
* iwl3945_reg_txpower_periodic - called when time to check our temperature.
1735
* -- reset periodic timer
1736
* -- see if temp has changed enough to warrant re-calibration ... if so:
1737
* -- correct coeffs for temp (can reset temp timer)
1738
* -- save this temp as "last",
1739
* -- send new set of gain settings to NIC
1740
* NOTE: This should continue working, even when we're not associated,
1741
* so we can keep our internal table of scan powers current. */
1742
void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
1744
/* This will kick in the "brute force"
1745
* iwl3945_hw_reg_comp_txpower_temp() below */
1746
if (!is_temp_calib_needed(priv))
1749
/* Set up a new set of temp-adjusted TxPowers, send to NIC.
1750
* This is based *only* on current temperature,
1751
* ignoring any previous power measurements */
1752
iwl3945_hw_reg_comp_txpower_temp(priv);
1755
queue_delayed_work(priv->workqueue,
1756
&priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
1759
static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
1761
struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
1762
thermal_periodic.work);
1764
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1767
mutex_lock(&priv->mutex);
1768
iwl3945_reg_txpower_periodic(priv);
1769
mutex_unlock(&priv->mutex);
1773
* iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1776
* This function is used when initializing channel-info structs.
1778
* NOTE: These channel groups do *NOT* match the bands above!
1779
* These channel groups are based on factory-tested channels;
1780
* on A-band, EEPROM's "group frequency" entries represent the top
1781
* channel in each group 1-4. Group 5 All B/G channels are in group 0.
1783
static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
1784
const struct iwl3945_channel_info *ch_info)
1786
struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
1788
u16 group_index = 0; /* based on factory calib frequencies */
1791
/* Find the group index for the channel ... don't use index 1(?) */
1792
if (is_channel_a_band(ch_info)) {
1793
for (group = 1; group < 5; group++) {
1794
grp_channel = ch_grp[group].group_channel;
1795
if (ch_info->channel <= grp_channel) {
1796
group_index = group;
1800
/* group 4 has a few channels *above* its factory cal freq */
1804
group_index = 0; /* 2.4 GHz, group 0 */
1806
IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
1812
* iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
1814
* Interpolate to get nominal (i.e. at factory calibration temperature) index
1815
* into radio/DSP gain settings table for requested power.
1817
static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
1819
s32 setting_index, s32 *new_index)
1821
const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
1823
s32 power = 2 * requested_power;
1825
const struct iwl3945_eeprom_txpower_sample *samples;
1830
chnl_grp = &priv->eeprom.groups[setting_index];
1831
samples = chnl_grp->samples;
1832
for (i = 0; i < 5; i++) {
1833
if (power == samples[i].power) {
1834
*new_index = samples[i].gain_index;
1839
if (power > samples[1].power) {
1842
} else if (power > samples[2].power) {
1845
} else if (power > samples[3].power) {
1853
denominator = (s32) samples[index1].power - (s32) samples[index0].power;
1854
if (denominator == 0)
1856
gains0 = (s32) samples[index0].gain_index * (1 << 19);
1857
gains1 = (s32) samples[index1].gain_index * (1 << 19);
1858
res = gains0 + (gains1 - gains0) *
1859
((s32) power - (s32) samples[index0].power) / denominator +
1861
*new_index = res >> 19;
1865
static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
1869
const struct iwl3945_eeprom_txpower_group *group;
1871
IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
1873
for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
1874
s8 *clip_pwrs; /* table of power levels for each rate */
1875
s8 satur_pwr; /* saturation power for each chnl group */
1876
group = &priv->eeprom.groups[i];
1878
/* sanity check on factory saturation power value */
1879
if (group->saturation_power < 40) {
1880
IWL_WARNING("Error: saturation power is %d, "
1881
"less than minimum expected 40\n",
1882
group->saturation_power);
1887
* Derive requested power levels for each rate, based on
1888
* hardware capabilities (saturation power for band).
1889
* Basic value is 3dB down from saturation, with further
1890
* power reductions for highest 3 data rates. These
1891
* backoffs provide headroom for high rate modulation
1892
* power peaks, without too much distortion (clipping).
1894
/* we'll fill in this array with h/w max power levels */
1895
clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
1897
/* divide factory saturation power by 2 to find -3dB level */
1898
satur_pwr = (s8) (group->saturation_power >> 1);
1900
/* fill in channel group's nominal powers for each rate */
1901
for (rate_index = 0;
1902
rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
1903
switch (rate_index) {
1904
case IWL_RATE_36M_INDEX_TABLE:
1905
if (i == 0) /* B/G */
1906
*clip_pwrs = satur_pwr;
1908
*clip_pwrs = satur_pwr - 5;
1910
case IWL_RATE_48M_INDEX_TABLE:
1912
*clip_pwrs = satur_pwr - 7;
1914
*clip_pwrs = satur_pwr - 10;
1916
case IWL_RATE_54M_INDEX_TABLE:
1918
*clip_pwrs = satur_pwr - 9;
1920
*clip_pwrs = satur_pwr - 12;
1923
*clip_pwrs = satur_pwr;
1931
* iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
1933
* Second pass (during init) to set up priv->channel_info
1935
* Set up Tx-power settings in our channel info database for each VALID
1936
* (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
1937
* and current temperature.
1939
* Since this is based on current temperature (at init time), these values may
1940
* not be valid for very long, but it gives us a starting/default point,
1941
* and allows us to active (i.e. using Tx) scan.
1943
* This does *not* write values to NIC, just sets up our internal table.
1945
int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
1947
struct iwl3945_channel_info *ch_info = NULL;
1948
struct iwl3945_channel_power_info *pwr_info;
1952
const s8 *clip_pwrs; /* array of power levels for each rate */
1955
u8 pwr_index, base_pwr_index, a_band;
1959
/* save temperature reference,
1960
* so we can determine next time to calibrate */
1961
temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1962
priv->last_temperature = temperature;
1964
iwl3945_hw_reg_init_channel_groups(priv);
1966
/* initialize Tx power info for each and every channel, 2.4 and 5.x */
1967
for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
1969
a_band = is_channel_a_band(ch_info);
1970
if (!is_channel_valid(ch_info))
1973
/* find this channel's channel group (*not* "band") index */
1974
ch_info->group_index =
1975
iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
1977
/* Get this chnlgrp's rate->max/clip-powers table */
1978
clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1980
/* calculate power index *adjustment* value according to
1981
* diff between current temperature and factory temperature */
1982
delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1983
priv->eeprom.groups[ch_info->group_index].
1986
IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
1987
ch_info->channel, delta_index, temperature +
1990
/* set tx power value for all OFDM rates */
1991
for (rate_index = 0; rate_index < IWL_OFDM_RATES;
1996
/* use channel group's clip-power table,
1997
* but don't exceed channel's max power */
1998
s8 pwr = min(ch_info->max_power_avg,
1999
clip_pwrs[rate_index]);
2001
pwr_info = &ch_info->power_info[rate_index];
2003
/* get base (i.e. at factory-measured temperature)
2004
* power table index for this rate's power */
2005
rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2006
ch_info->group_index,
2009
IWL_ERROR("Invalid power index\n");
2012
pwr_info->base_power_index = (u8) power_idx;
2014
/* temperature compensate */
2015
power_idx += delta_index;
2017
/* stay within range of gain table */
2018
power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2020
/* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2021
pwr_info->requested_power = pwr;
2022
pwr_info->power_table_index = (u8) power_idx;
2023
pwr_info->tpc.tx_gain =
2024
power_gain_table[a_band][power_idx].tx_gain;
2025
pwr_info->tpc.dsp_atten =
2026
power_gain_table[a_band][power_idx].dsp_atten;
2029
/* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2030
pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2031
power = pwr_info->requested_power +
2032
IWL_CCK_FROM_OFDM_POWER_DIFF;
2033
pwr_index = pwr_info->power_table_index +
2034
IWL_CCK_FROM_OFDM_INDEX_DIFF;
2035
base_pwr_index = pwr_info->base_power_index +
2036
IWL_CCK_FROM_OFDM_INDEX_DIFF;
2038
/* stay within table range */
2039
pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2040
gain = power_gain_table[a_band][pwr_index].tx_gain;
2041
dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2043
/* fill each CCK rate's iwl3945_channel_power_info structure
2044
* NOTE: All CCK-rate Txpwrs are the same for a given chnl!
2045
* NOTE: CCK rates start at end of OFDM rates! */
2046
for (rate_index = 0;
2047
rate_index < IWL_CCK_RATES; rate_index++) {
2048
pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2049
pwr_info->requested_power = power;
2050
pwr_info->power_table_index = pwr_index;
2051
pwr_info->base_power_index = base_pwr_index;
2052
pwr_info->tpc.tx_gain = gain;
2053
pwr_info->tpc.dsp_atten = dsp_atten;
2056
/* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2057
for (scan_tbl_index = 0;
2058
scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2059
s32 actual_index = (scan_tbl_index == 0) ?
2060
IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2061
iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2062
actual_index, clip_pwrs, ch_info, a_band);
2069
int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2072
unsigned long flags;
2074
spin_lock_irqsave(&priv->lock, flags);
2075
rc = iwl3945_grab_nic_access(priv);
2077
spin_unlock_irqrestore(&priv->lock, flags);
2081
iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2082
rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2084
IWL_ERROR("Can't stop Rx DMA.\n");
2086
iwl3945_release_nic_access(priv);
2087
spin_unlock_irqrestore(&priv->lock, flags);
2092
int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2095
unsigned long flags;
2096
int txq_id = txq->q.id;
2098
struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2100
shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2102
spin_lock_irqsave(&priv->lock, flags);
2103
rc = iwl3945_grab_nic_access(priv);
2105
spin_unlock_irqrestore(&priv->lock, flags);
2108
iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2109
iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2111
iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2112
ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2113
ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2114
ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2115
ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2116
ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2117
iwl3945_release_nic_access(priv);
2119
/* fake read to flush all prev. writes */
2120
iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2121
spin_unlock_irqrestore(&priv->lock, flags);
2126
int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2128
struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2130
return le32_to_cpu(shared_data->rx_read_ptr[0]);
2134
* iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2136
int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2138
int rc, i, index, prev_index;
2139
struct iwl3945_rate_scaling_cmd rate_cmd = {
2140
.reserved = {0, 0, 0},
2142
struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2144
for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2145
index = iwl3945_rates[i].table_rs_index;
2147
table[index].rate_n_flags =
2148
iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2149
table[index].try_cnt = priv->retry_rate;
2150
prev_index = iwl3945_get_prev_ieee_rate(i);
2151
table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2154
switch (priv->phymode) {
2155
case MODE_IEEE80211A:
2156
IWL_DEBUG_RATE("Select A mode rate scale\n");
2157
/* If one of the following CCK rates is used,
2158
* have it fall back to the 6M OFDM rate */
2159
for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2160
table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2162
/* Don't fall back to CCK rates */
2163
table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2165
/* Don't drop out of OFDM rates */
2166
table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2167
iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2170
case MODE_IEEE80211B:
2171
IWL_DEBUG_RATE("Select B mode rate scale\n");
2172
/* If an OFDM rate is used, have it fall back to the
2174
for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2175
table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2177
/* CCK shouldn't fall back to OFDM... */
2178
table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2182
IWL_DEBUG_RATE("Select G mode rate scale\n");
2186
/* Update the rate scaling for control frame Tx */
2187
rate_cmd.table_id = 0;
2188
rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2193
/* Update the rate scaling for data frame Tx */
2194
rate_cmd.table_id = 1;
2195
return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2199
/* Called when initializing driver */
2200
int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2202
memset((void *)&priv->hw_setting, 0,
2203
sizeof(struct iwl3945_driver_hw_info));
2205
priv->hw_setting.shared_virt =
2206
pci_alloc_consistent(priv->pci_dev,
2207
sizeof(struct iwl3945_shared),
2208
&priv->hw_setting.shared_phys);
2210
if (!priv->hw_setting.shared_virt) {
2211
IWL_ERROR("failed to allocate pci memory\n");
2212
mutex_unlock(&priv->mutex);
2216
priv->hw_setting.ac_queue_count = AC_NUM;
2217
priv->hw_setting.rx_buffer_size = IWL_RX_BUF_SIZE;
2218
priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2219
priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2220
priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2221
priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2222
priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2226
unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2227
struct iwl3945_frame *frame, u8 rate)
2229
struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2230
unsigned int frame_size;
2232
tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2233
memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2235
tx_beacon_cmd->tx.sta_id = IWL3945_BROADCAST_ID;
2236
tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2238
frame_size = iwl3945_fill_beacon_frame(priv,
2239
tx_beacon_cmd->frame,
2240
iwl3945_broadcast_addr,
2241
sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2243
BUG_ON(frame_size > MAX_MPDU_SIZE);
2244
tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2246
tx_beacon_cmd->tx.rate = rate;
2247
tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2248
TX_CMD_FLG_TSF_MSK);
2250
/* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2251
tx_beacon_cmd->tx.supp_rates[0] =
2252
(IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2254
tx_beacon_cmd->tx.supp_rates[1] =
2255
(IWL_CCK_BASIC_RATES_MASK & 0xF);
2257
return (sizeof(struct iwl3945_tx_beacon_cmd) + frame_size);
2260
void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2262
priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2265
void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2267
INIT_DELAYED_WORK(&priv->thermal_periodic,
2268
iwl3945_bg_reg_txpower_periodic);
2271
void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2273
cancel_delayed_work(&priv->thermal_periodic);
2276
struct pci_device_id iwl3945_hw_card_ids[] = {
2277
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4222)},
2278
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4227)},
2283
* Clear the OWNER_MSK, to establish driver (instead of uCode running on
2284
* embedded controller) as EEPROM reader; each read is a series of pulses
2285
* to/from the EEPROM chip, not a single event, so even reads could conflict
2286
* if they weren't arbitrated by some ownership mechanism. Here, the driver
2287
* simply claims ownership, which should be safe when this function is called
2288
* (i.e. before loading uCode!).
2290
inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
2292
_iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2296
MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);
added
removed
updates/wireless/iwlwifi/iwlwifi/origin/iwl-3945.c
