3
;==========================================================================
4
; $Id: p18f66j10.inc,v 1.2 2005/03/24 04:08:46 craigfranklin Exp $
5
; MPASM PIC18F66J10 processor include
7
; (c) Copyright 1999-2005 Microchip Technology, All rights reserved
8
;==========================================================================
12
;==========================================================================
13
; This header file defines configurations, registers, and other useful
14
; bits of information for the PIC18F66J10 microcontroller. These names
15
; are taken to match the data sheets as closely as possible.
17
; Note that the processor must be selected before this file is included.
18
; The processor may be selected the following ways:
20
; 1. Command line switch:
21
; C:\MPASM MYFILE.ASM /PIC18F66J10
22
; 2. LIST directive in the source file
24
; 3. Processor Type entry in the MPASM full-screen interface
25
; 4. Setting the processor in the MPLAB Project Dialog
26
;==========================================================================
28
;==========================================================================
32
;==========================================================================
34
MESSG "Processor-header file mismatch. Verify selected processor."
37
;==========================================================================
38
; 18xxxx Family EQUates
39
;==========================================================================
50
;==========================================================================
52
;==========================================================================
53
; 16Cxxx/17Cxxx Substitutions
54
;==========================================================================
55
#define DDRA TRISA ; PIC17Cxxx SFR substitution
56
#define DDRB TRISB ; PIC17Cxxx SFR substitution
57
#define DDRC TRISC ; PIC17Cxxx SFR substitution
58
#define DDRD TRISD ; PIC17Cxxx SFR substitution
59
#define DDRE TRISE ; PIC17Cxxx SFR substitution
61
;==========================================================================
63
; Register Definitions
65
;==========================================================================
67
;----- Register Files -----------------------------------------------------
241
;----- SSP2CON2 Bits -----------------------------------------------------
252
;----- SSP2CON1 Bits -----------------------------------------------------
263
;----- SSP2STAT Bits -----------------------------------------------------
274
I2C_START EQU H'0003'
281
NOT_WRITE EQU H'0002'
282
NOT_ADDRESS EQU H'0005'
284
READ_WRITE EQU H'0002'
285
DATA_ADDRESS EQU H'0005'
291
;----- ECCP2DEL Bits -----------------------------------------------------
302
;----- ECCP2AS Bits -----------------------------------------------------
313
;----- ECCP3DEL Bits -----------------------------------------------------
324
;----- ECC3PAS Bits -----------------------------------------------------
335
;----- RCSTA2 Bits -----------------------------------------------------
353
;----- TXSTA2 Bits -----------------------------------------------------
369
;----- CCP5CON Bits -----------------------------------------------------
381
;----- CCP4CON Bits -----------------------------------------------------
393
;----- T4CON Bits -----------------------------------------------------
403
;----- ECCP1DEL Bits -----------------------------------------------------
414
;----- BAUDCON2 Bits -----------------------------------------------------
423
;----- BAUDCON1 Bits -----------------------------------------------------
432
;----- PORTA Bits -----------------------------------------------------
453
;----- PORTB Bits -----------------------------------------------------
477
;----- PORTC Bits -----------------------------------------------------
501
; DT is a reserved word
505
;----- PORTD Bits -----------------------------------------------------
542
;----- PORTE Bits -----------------------------------------------------
566
;----- PORTF Bits -----------------------------------------------------
586
;----- PORTG Bits -----------------------------------------------------
603
;----- LATA Bits -----------------------------------------------------
612
;----- LATB Bits -----------------------------------------------------
623
;----- LATC Bits -----------------------------------------------------
634
;----- LATD Bits -----------------------------------------------------
645
;----- LATE Bits -----------------------------------------------------
656
;----- LATF Bits -----------------------------------------------------
666
;----- LATG Bits -----------------------------------------------------
674
;----- DDRA Bits -----------------------------------------------------
683
;----- TRISA Bits -----------------------------------------------------
692
;----- DDRB Bits -----------------------------------------------------
703
;----- TRISB Bits -----------------------------------------------------
714
;----- DDRC Bits -----------------------------------------------------
725
;----- TRISC Bits -----------------------------------------------------
736
;----- DDRD Bits -----------------------------------------------------
747
;----- TRISD Bits -----------------------------------------------------
758
;----- DDRE Bits -----------------------------------------------------
769
;----- TRISE Bits -----------------------------------------------------
780
;----- DDRF Bits -----------------------------------------------------
790
;----- TRISF Bits -----------------------------------------------------
800
;----- DDRG Bits -----------------------------------------------------
808
;----- TRISG Bits -----------------------------------------------------
816
;----- OSCTUNE Bits -----------------------------------------------------
820
;----- MEMCON Bits -----------------------------------------------------
828
;----- PIE1 Bits -----------------------------------------------------
843
;----- PIR1 Bits -----------------------------------------------------
858
;----- IPR1 Bits -----------------------------------------------------
873
;----- PIE2 Bits -----------------------------------------------------
883
;----- PIR2 Bits -----------------------------------------------------
893
;----- IPR2 Bits -----------------------------------------------------
903
;----- PIE3 Bits -----------------------------------------------------
914
;----- PIR3 Bits -----------------------------------------------------
925
;----- IPR3 Bits -----------------------------------------------------
936
;----- RCSTA Bits -----------------------------------------------------
954
;----- RCSTA1 Bits -----------------------------------------------------
972
;----- TXSTA Bits -----------------------------------------------------
988
;----- TXSTA1 Bits -----------------------------------------------------
1004
;----- PSPCON Bits -----------------------------------------------------
1011
;----- T3CON Bits -----------------------------------------------------
1021
T3INSYNC EQU H'0002'
1023
NOT_T3SYNC EQU H'0002'
1026
;----- CMCON Bits -----------------------------------------------------
1037
;----- CVRCON Bits -----------------------------------------------------
1048
;----- ECCP1AS Bits -----------------------------------------------------
1057
;----- CCP3CON Bits -----------------------------------------------------
1066
;----- ECCP3CON Bits -----------------------------------------------------
1080
;----- CCP2CON Bits -----------------------------------------------------
1089
;----- ECCP2CON Bits -----------------------------------------------------
1103
;----- CCP1CON Bits -----------------------------------------------------
1115
;----- ECCP1CON Bits -----------------------------------------------------
1129
;----- ADCON2 Bits -----------------------------------------------------
1139
;----- ADCON1 Bits -----------------------------------------------------
1148
;----- ADCON0 Bits -----------------------------------------------------
1160
NOT_DONE EQU H'0001'
1163
;----- SSP1CON2 Bits -----------------------------------------------------
1174
;----- SSPCON2 Bits -----------------------------------------------------
1185
;----- SSP1CON1 Bits -----------------------------------------------------
1196
;----- SSPCON1 Bits -----------------------------------------------------
1207
;----- SSP1STAT Bits -----------------------------------------------------
1217
I2C_READ EQU H'0002'
1218
I2C_START EQU H'0003'
1219
I2C_STOP EQU H'0004'
1225
NOT_WRITE EQU H'0002'
1226
NOT_ADDRESS EQU H'0005'
1228
READ_WRITE EQU H'0002'
1229
DATA_ADDRESS EQU H'0005'
1235
;----- SSPSTAT Bits -----------------------------------------------------
1245
I2C_READ EQU H'0002'
1246
I2C_START EQU H'0003'
1247
I2C_STOP EQU H'0004'
1253
NOT_WRITE EQU H'0002'
1254
NOT_ADDRESS EQU H'0005'
1256
READ_WRITE EQU H'0002'
1257
DATA_ADDRESS EQU H'0005'
1263
;----- T2CON Bits -----------------------------------------------------
1267
T2OUTPS0 EQU H'0003'
1268
T2OUTPS1 EQU H'0004'
1269
T2OUTPS2 EQU H'0005'
1270
T2OUTPS3 EQU H'0006'
1273
;----- T1CON Bits -----------------------------------------------------
1283
T1INSYNC EQU H'0002'
1285
NOT_T1SYNC EQU H'0002'
1288
;----- RCON Bits -----------------------------------------------------
1303
;----- WDTCON Bits -----------------------------------------------------
1309
;----- OSCCON Bits -----------------------------------------------------
1316
;----- T0CON Bits -----------------------------------------------------
1327
;----- STATUS Bits -----------------------------------------------------
1335
;----- INTCON3 Bits -----------------------------------------------------
1355
;----- INTCON2 Bits -----------------------------------------------------
1363
NOT_RBPU EQU H'0007'
1369
;----- INTCON Bits -----------------------------------------------------
1387
;----- STKPTR Bits -----------------------------------------------------
1398
;==========================================================================
1402
;==========================================================================
1404
__BADRAM H'0800'-H'0F5F'
1405
__BADRAM H'0F7A'-H'0F7B'
1406
__BADRAM H'0F87'-H'0F88'
1407
__BADRAM H'0F90'-H'0F91'
1408
__BADRAM H'0F99'-H'0F9A'
1409
__BADRAM H'0FA6'-H'0FAA'
1413
;==========================================================================
1415
; IMPORTANT: For the PIC18 devices, the __CONFIG directive has been
1416
; superseded by the CONFIG directive. The following settings
1417
; are available for this device.
1419
; Background Debugger Enable:
1420
; DEBUG = ON Enabled
1421
; DEBUG = OFF Disabled
1423
; Extended Instruction Set Enable:
1424
; XINST = OFF Disabled
1425
; XINST = ON Enabled
1427
; Stack Overflow Reset:
1428
; STVR = OFF Disabled
1432
; LVP = OFF Disabled
1436
; WDT = OFF Disabled
1439
; Configuration Word Signature:
1445
; CP0 = OFF Disabled
1447
; Fail Safe Clock Monitor:
1448
; FCMEM = OFF Disabled
1449
; FCMEM = ON Enabled
1451
; Internal/External Switch Over:
1452
; IESO = OFF Disabled
1455
; Oscillator Selection bits:
1456
; FOSC = HS HS oscillator
1457
; FOSC = HSPLL HS oscillator, Software Controlled PLL
1458
; FOSC = EC External Clock
1459
; FOSC = ECPLL External Clock, Software Controlled PLL
1461
; Watchdog Postscaler:
1472
; WDTPS = 1024 1:1024
1473
; WDTPS = 2048 1:2048
1474
; WDTPS = 4096 1:4096
1475
; WDTPS = 8192 1:8192
1476
; WDTPS = 16384 1:16384
1477
; WDTPS = 32768 1:32768
1479
; External Bus Data Wait:
1481
; WAIT = OFF Disabled
1483
; Data Bus Width Select:
1484
; BW = 8 8-bit external bus
1485
; BW = 16 16-bit external bus
1487
; Processor Mode Selection:
1488
; MODE = MM Microcontroller Mode - External bus disabled
1489
; MODE = XM12 Extended Microcontroller Mode - 12-bit address mode
1490
; MODE = XM16 Extended Microcontroller Mode - 16-bit address mode
1491
; MODE = XM20 Extended Microcontroller Mode - 20-bit address mode
1493
; External Address Bus Shift Enable:
1494
; EASHIFT = OFF External bus reflects PC value
1495
; EASHIFT = ON External bus starts at 000000h
1498
; CCP2MUX = OFF Disabled
1499
; CCP2MUX = ON Enabled
1501
;==========================================================================
1502
;==========================================================================
1504
; Configuration Bits
1514
;==========================================================================
1516
; The following is an assignment of address values for all of the
1517
; configuration registers for the purpose of table reads
1518
_CONFIG1L EQU H'300000'
1519
_CONFIG1H EQU H'300001'
1520
_CONFIG2L EQU H'300002'
1521
_CONFIG2H EQU H'300003'
1522
_CONFIG3L EQU H'300004'
1523
_CONFIG3H EQU H'300005'
1525
;----- CONFIG1L Options --------------------------------------------------
1526
_DEBUG_ON_1L EQU H'7F' ; Enabled
1527
_DEBUG_OFF_1L EQU H'FF' ; Disabled
1529
_XINST_OFF_1L EQU H'BF' ; Disabled
1530
_XINST_ON_1L EQU H'FF' ; Enabled
1532
_STVR_OFF_1L EQU H'DF' ; Disabled
1533
_STVR_ON_1L EQU H'FF' ; Enabled
1535
_LVP_OFF_1L EQU H'EF' ; Disabled
1536
_LVP_ON_1L EQU H'FF' ; Enabled
1538
_WDT_OFF_1L EQU H'FE' ; Disabled
1539
_WDT_ON_1L EQU H'FF' ; Enabled
1541
;----- CONFIG1H Options --------------------------------------------------
1542
_SIGN_CLR_1H EQU H'F7' ; Clear
1543
_SIGN_SET_1H EQU H'FF' ; Set
1545
_CP0_ON_1H EQU H'FB' ; Enabled
1546
_CP0_OFF_1H EQU H'FF' ; Disabled
1548
;----- CONFIG2L Options --------------------------------------------------
1549
_FCMEM_OFF_2L EQU H'BF' ; Disabled
1550
_FCMEM_ON_2L EQU H'FF' ; Enabled
1552
_IESO_OFF_2L EQU H'7F' ; Disabled
1553
_IESO_ON_2L EQU H'FF' ; Enabled
1555
_FOSC_HS_2L EQU H'FC' ; HS oscillator
1556
_FOSC_HSPLL_2L EQU H'FD' ; HS oscillator, Software Controlled PLL
1557
_FOSC_EC_2L EQU H'FE' ; External Clock
1558
_FOSC_ECPLL_2L EQU H'FF' ; External Clock, Software Controlled PLL
1560
;----- CONFIG2H Options --------------------------------------------------
1561
_WDTPS_1_2H EQU H'E1' ; 1:1
1562
_WDTPS_2_2H EQU H'E3' ; 1:2
1563
_WDTPS_4_2H EQU H'E5' ; 1:4
1564
_WDTPS_8_2H EQU H'E7' ; 1:8
1565
_WDTPS_16_2H EQU H'E9' ; 1:16
1566
_WDTPS_32_2H EQU H'EB' ; 1:32
1567
_WDTPS_64_2H EQU H'ED' ; 1:64
1568
_WDTPS_128_2H EQU H'EF' ; 1:128
1569
_WDTPS_256_2H EQU H'F1' ; 1:256
1570
_WDTPS_512_2H EQU H'F3' ; 1:512
1571
_WDTPS_1024_2H EQU H'F5' ; 1:1024
1572
_WDTPS_2048_2H EQU H'F7' ; 1:2048
1573
_WDTPS_4096_2H EQU H'F9' ; 1:4096
1574
_WDTPS_8192_2H EQU H'FB' ; 1:8192
1575
_WDTPS_16384_2H EQU H'FD' ; 1:16384
1576
_WDTPS_32768_2H EQU H'FF' ; 1:32768
1578
;----- CONFIG3L Options --------------------------------------------------
1579
_WAIT_ON_3L EQU H'7F' ; Enabled
1580
_WAIT_OFF_3L EQU H'FF' ; Disabled
1582
_BW_8_3L EQU H'BF' ; 8-bit external bus
1583
_BW_16_3L EQU H'FF' ; 16-bit external bus
1585
_MODE_MM_3L EQU H'CF' ; Microcontroller Mode - External bus disabled
1586
_MODE_XM12_3L EQU H'DF' ; Extended Microcontroller Mode - 12-bit address mode
1587
_MODE_XM16_3L EQU H'EF' ; Extended Microcontroller Mode - 16-bit address mode
1588
_MODE_XM20_3L EQU H'FF' ; Extended Microcontroller Mode - 20-bit address mode
1590
_EASHIFT_OFF_3L EQU H'F7' ; External bus reflects PC value
1591
_EASHIFT_ON_3L EQU H'FF' ; External bus starts at 000000h
1593
;----- CONFIG3H Options --------------------------------------------------
1594
_CCP2MUX_OFF_3H EQU H'FE' ; Disabled
1595
_CCP2MUX_ON_3H EQU H'FF' ; Enabled
1598
_DEVID1 EQU H'3FFFFE'
1599
_DEVID2 EQU H'3FFFFF'