251
252
static const int IPS_ADJUST_PERIOD = 5000; /* ms */
252
253
static bool late_i915_load = false;
254
extern int i915_hsw_enabled;
254
256
/* For initial average collection */
255
257
static const int IPS_SAMPLE_PERIOD = 200; /* ms */
1424
1426
static bool ips_get_i915_syms(struct ips_driver *ips)
1426
ips->read_mch_val = symbol_get(i915_read_mch_val);
1427
if (!ips->read_mch_val)
1429
ips->gpu_raise = symbol_get(i915_gpu_raise);
1430
if (!ips->gpu_raise)
1432
ips->gpu_lower = symbol_get(i915_gpu_lower);
1433
if (!ips->gpu_lower)
1435
ips->gpu_busy = symbol_get(i915_gpu_busy);
1438
ips->gpu_turbo_disable = symbol_get(i915_gpu_turbo_disable);
1439
if (!ips->gpu_turbo_disable)
1428
if (i915_hsw_enabled) {
1429
ips->read_mch_val = symbol_get(i915_hsw_read_mch_val);
1430
if (!ips->read_mch_val)
1432
ips->gpu_raise = symbol_get(i915_hsw_gpu_raise);
1433
if (!ips->gpu_raise)
1435
ips->gpu_lower = symbol_get(i915_hsw_gpu_lower);
1436
if (!ips->gpu_lower)
1438
ips->gpu_busy = symbol_get(i915_hsw_gpu_busy);
1441
ips->gpu_turbo_disable = symbol_get(i915_hsw_gpu_turbo_disable);
1442
if (!ips->gpu_turbo_disable)
1445
ips->read_mch_val = symbol_get(i915_read_mch_val);
1446
if (!ips->read_mch_val)
1448
ips->gpu_raise = symbol_get(i915_gpu_raise);
1449
if (!ips->gpu_raise)
1451
ips->gpu_lower = symbol_get(i915_gpu_lower);
1452
if (!ips->gpu_lower)
1454
ips->gpu_busy = symbol_get(i915_gpu_busy);
1457
ips->gpu_turbo_disable = symbol_get(i915_gpu_turbo_disable);
1458
if (!ips->gpu_turbo_disable)
1445
symbol_put(i915_gpu_busy);
1465
if (i915_hsw_enabled)
1466
symbol_put(i915_hsw_gpu_busy);
1468
symbol_put(i915_gpu_busy);
1447
symbol_put(i915_gpu_lower);
1470
if (i915_hsw_enabled)
1471
symbol_put(i915_hsw_gpu_lower);
1473
symbol_put(i915_gpu_lower);
1449
symbol_put(i915_gpu_raise);
1475
if (i915_hsw_enabled)
1476
symbol_put(i915_hsw_gpu_raise);
1478
symbol_put(i915_gpu_raise);
1451
symbol_put(i915_read_mch_val);
1480
if (i915_hsw_enabled)
1481
symbol_put(i915_hsw_read_mch_val);
1483
symbol_put(i915_read_mch_val);