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Viewing changes to arch/sh/kernel/cpu/sh4/setup-sh4-202.c

  • Committer: Bazaar Package Importer
  • Author(s): Mathieu Poirier
  • Date: 2011-02-18 09:43:31 UTC
  • Revision ID: james.westby@ubuntu.com-20110218094331-eyubsja4f9k0yhmq
Tags: 2.6.35-1.1
Initial release.

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arch/sh/kernel/cpu/sh4/setup-sh4-202.c
 
1
/*
 
2
 * SH4-202 Setup
 
3
 *
 
4
 *  Copyright (C) 2006  Paul Mundt
 
5
 *  Copyright (C) 2009  Magnus Damm
 
6
 *
 
7
 * This file is subject to the terms and conditions of the GNU General Public
 
8
 * License.  See the file "COPYING" in the main directory of this archive
 
9
 * for more details.
 
10
 */
 
11
#include <linux/platform_device.h>
 
12
#include <linux/init.h>
 
13
#include <linux/serial.h>
 
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#include <linux/serial_sci.h>
 
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#include <linux/sh_timer.h>
 
16
#include <linux/io.h>
 
17
 
 
18
static struct plat_sci_port scif0_platform_data = {
 
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        .mapbase        = 0xffe80000,
 
20
        .flags          = UPF_BOOT_AUTOCONF,
 
21
        .type           = PORT_SCIF,
 
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        .irqs           = { 40, 41, 43, 42 },
 
23
};
 
24
 
 
25
static struct platform_device scif0_device = {
 
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        .name           = "sh-sci",
 
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        .id             = 0,
 
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        .dev            = {
 
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                .platform_data  = &scif0_platform_data,
 
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        },
 
31
};
 
32
 
 
33
static struct sh_timer_config tmu0_platform_data = {
 
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        .channel_offset = 0x04,
 
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        .timer_bit = 0,
 
36
        .clockevent_rating = 200,
 
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};
 
38
 
 
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static struct resource tmu0_resources[] = {
 
40
        [0] = {
 
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                .start  = 0xffd80008,
 
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                .end    = 0xffd80013,
 
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                .flags  = IORESOURCE_MEM,
 
44
        },
 
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        [1] = {
 
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                .start  = 16,
 
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                .flags  = IORESOURCE_IRQ,
 
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        },
 
49
};
 
50
 
 
51
static struct platform_device tmu0_device = {
 
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        .name           = "sh_tmu",
 
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        .id             = 0,
 
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        .dev = {
 
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                .platform_data  = &tmu0_platform_data,
 
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        },
 
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        .resource       = tmu0_resources,
 
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        .num_resources  = ARRAY_SIZE(tmu0_resources),
 
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};
 
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static struct sh_timer_config tmu1_platform_data = {
 
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        .channel_offset = 0x10,
 
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        .timer_bit = 1,
 
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        .clocksource_rating = 200,
 
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};
 
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static struct resource tmu1_resources[] = {
 
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        [0] = {
 
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                .start  = 0xffd80014,
 
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                .end    = 0xffd8001f,
 
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                .flags  = IORESOURCE_MEM,
 
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        },
 
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        [1] = {
 
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                .start  = 17,
 
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                .flags  = IORESOURCE_IRQ,
 
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        },
 
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};
 
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static struct platform_device tmu1_device = {
 
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        .name           = "sh_tmu",
 
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        .id             = 1,
 
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        .dev = {
 
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                .platform_data  = &tmu1_platform_data,
 
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        },
 
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        .resource       = tmu1_resources,
 
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        .num_resources  = ARRAY_SIZE(tmu1_resources),
 
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};
 
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static struct sh_timer_config tmu2_platform_data = {
 
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        .channel_offset = 0x1c,
 
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        .timer_bit = 2,
 
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};
 
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static struct resource tmu2_resources[] = {
 
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        [0] = {
 
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                .start  = 0xffd80020,
 
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                .end    = 0xffd8002f,
 
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                .flags  = IORESOURCE_MEM,
 
99
        },
 
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        [1] = {
 
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                .start  = 18,
 
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                .flags  = IORESOURCE_IRQ,
 
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        },
 
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};
 
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static struct platform_device tmu2_device = {
 
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        .name           = "sh_tmu",
 
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        .id             = 2,
 
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        .dev = {
 
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                .platform_data  = &tmu2_platform_data,
 
111
        },
 
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        .resource       = tmu2_resources,
 
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        .num_resources  = ARRAY_SIZE(tmu2_resources),
 
114
};
 
115
 
 
116
static struct platform_device *sh4202_devices[] __initdata = {
 
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        &scif0_device,
 
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        &tmu0_device,
 
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        &tmu1_device,
 
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        &tmu2_device,
 
121
};
 
122
 
 
123
static int __init sh4202_devices_setup(void)
 
124
{
 
125
        return platform_add_devices(sh4202_devices,
 
126
                                    ARRAY_SIZE(sh4202_devices));
 
127
}
 
128
arch_initcall(sh4202_devices_setup);
 
129
 
 
130
static struct platform_device *sh4202_early_devices[] __initdata = {
 
131
        &scif0_device,
 
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        &tmu0_device,
 
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        &tmu1_device,
 
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        &tmu2_device,
 
135
};
 
136
 
 
137
void __init plat_early_device_setup(void)
 
138
{
 
139
        early_platform_add_devices(sh4202_early_devices,
 
140
                                   ARRAY_SIZE(sh4202_early_devices));
 
141
}
 
142
 
 
143
enum {
 
144
        UNUSED = 0,
 
145
 
 
146
        /* interrupt sources */
 
147
        IRL0, IRL1, IRL2, IRL3, /* only IRLM mode supported */
 
148
        HUDI, TMU0, TMU1, TMU2, RTC, SCIF, WDT,
 
149
};
 
150
 
 
151
static struct intc_vect vectors[] __initdata = {
 
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        INTC_VECT(HUDI, 0x600),
 
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        INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
 
154
        INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
 
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        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
 
156
        INTC_VECT(RTC, 0x4c0),
 
157
        INTC_VECT(SCIF, 0x700), INTC_VECT(SCIF, 0x720),
 
158
        INTC_VECT(SCIF, 0x740), INTC_VECT(SCIF, 0x760),
 
159
        INTC_VECT(WDT, 0x560),
 
160
};
 
161
 
 
162
static struct intc_prio_reg prio_registers[] __initdata = {
 
163
        { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
 
164
        { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, 0, 0, 0 } },
 
165
        { 0xffd0000c, 0, 16, 4, /* IPRC */ { 0, 0, SCIF, HUDI } },
 
166
        { 0xffd00010, 0, 16, 4, /* IPRD */ { IRL0, IRL1, IRL2, IRL3 } },
 
167
};
 
168
 
 
169
static DECLARE_INTC_DESC(intc_desc, "sh4-202", vectors, NULL,
 
170
                         NULL, prio_registers, NULL);
 
171
 
 
172
static struct intc_vect vectors_irlm[] __initdata = {
 
173
        INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0),
 
174
        INTC_VECT(IRL2, 0x300), INTC_VECT(IRL3, 0x360),
 
175
};
 
176
 
 
177
static DECLARE_INTC_DESC(intc_desc_irlm, "sh4-202_irlm", vectors_irlm, NULL,
 
178
                         NULL, prio_registers, NULL);
 
179
 
 
180
void __init plat_irq_setup(void)
 
181
{
 
182
        register_intc_controller(&intc_desc);
 
183
}
 
184
 
 
185
#define INTC_ICR        0xffd00000UL
 
186
#define INTC_ICR_IRLM   (1<<7)
 
187
 
 
188
void __init plat_irq_setup_pins(int mode)
 
189
{
 
190
        switch (mode) {
 
191
        case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
 
192
                __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
 
193
                register_intc_controller(&intc_desc_irlm);
 
194
                break;
 
195
        default:
 
196
                BUG();
 
197
        }
 
198
}