2
* Support for the Broadcom BCM3510 ATSC demodulator (1st generation Air2PC)
4
* Copyright (C) 2001-5, B2C2 inc.
6
* GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@desy.de>
8
* This driver is "hard-coded" to be used with the 1st generation of
9
* Technisat/B2C2's Air2PC ATSC PCI/USB cards/boxes. The pll-programming
10
* (Panasonic CT10S) is located here, which is actually wrong. Unless there is
11
* another device with a BCM3510, this is no problem.
13
* The driver works also with QAM64 DVB-C, but had an unreasonable high
14
* UNC. (Tested with the Air2PC ATSC 1st generation)
16
* You'll need a firmware for this driver in order to get it running. It is
17
* called "dvb-fe-bcm3510-01.fw".
19
* This program is free software; you can redistribute it and/or modify it
20
* under the terms of the GNU General Public License as published by the Free
21
* Software Foundation; either version 2 of the License, or (at your option)
24
* This program is distributed in the hope that it will be useful, but WITHOUT
25
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
29
* You should have received a copy of the GNU General Public License along with
30
* this program; if not, write to the Free Software Foundation, Inc., 675 Mass
31
* Ave, Cambridge, MA 02139, USA.
34
#include <linux/init.h>
35
#include <linux/module.h>
36
#include <linux/device.h>
37
#include <linux/firmware.h>
38
#include <linux/jiffies.h>
39
#include <linux/string.h>
40
#include <linux/slab.h>
41
#include <linux/mutex.h>
43
#include "dvb_frontend.h"
45
#include "bcm3510_priv.h"
47
struct bcm3510_state {
49
struct i2c_adapter* i2c;
50
const struct bcm3510_config* config;
51
struct dvb_frontend frontend;
53
/* demodulator private data */
54
struct mutex hab_mutex;
57
unsigned long next_status_check;
58
unsigned long status_check_interval;
59
struct bcm3510_hab_cmd_status1 status1;
60
struct bcm3510_hab_cmd_status2 status2;
64
module_param(debug, int, 0644);
65
MODULE_PARM_DESC(debug, "set debugging level (1=info,2=i2c (|-able)).");
67
#define dprintk(level,x...) if (level & debug) printk(x)
68
#define dbufout(b,l,m) {\
70
for (i = 0; i < l; i++) \
73
#define deb_info(args...) dprintk(0x01,args)
74
#define deb_i2c(args...) dprintk(0x02,args)
75
#define deb_hab(args...) dprintk(0x04,args)
77
/* transfer functions */
78
static int bcm3510_writebytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
82
struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b, .len = len + 1 };
85
memcpy(&b[1],buf,len);
87
deb_i2c("i2c wr %02x: ",reg);
88
dbufout(buf,len,deb_i2c);
91
if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
93
deb_info("%s: i2c write error (addr %02x, reg %02x, err == %i)\n",
94
__func__, state->config->demod_address, reg, err);
101
static int bcm3510_readbytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
103
struct i2c_msg msg[] = {
104
{ .addr = state->config->demod_address, .flags = 0, .buf = ®, .len = 1 },
105
{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len }
111
if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
112
deb_info("%s: i2c read error (addr %02x, reg %02x, err == %i)\n",
113
__func__, state->config->demod_address, reg, err);
116
deb_i2c("i2c rd %02x: ",reg);
117
dbufout(buf,len,deb_i2c);
123
static int bcm3510_writeB(struct bcm3510_state *state, u8 reg, bcm3510_register_value v)
125
return bcm3510_writebytes(state,reg,&v.raw,1);
128
static int bcm3510_readB(struct bcm3510_state *state, u8 reg, bcm3510_register_value *v)
130
return bcm3510_readbytes(state,reg,&v->raw,1);
133
/* Host Access Buffer transfers */
134
static int bcm3510_hab_get_response(struct bcm3510_state *st, u8 *buf, int len)
136
bcm3510_register_value v;
139
v.HABADR_a6.HABADR = 0;
140
if ((ret = bcm3510_writeB(st,0xa6,v)) < 0)
143
for (i = 0; i < len; i++) {
144
if ((ret = bcm3510_readB(st,0xa7,&v)) < 0)
146
buf[i] = v.HABDATA_a7;
151
static int bcm3510_hab_send_request(struct bcm3510_state *st, u8 *buf, int len)
153
bcm3510_register_value v,hab;
157
/* Check if any previous HAB request still needs to be serviced by the
158
* Aquisition Processor before sending new request */
159
if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
161
if (v.HABSTAT_a8.HABR) {
162
deb_info("HAB is running already - clearing it.\n");
163
v.HABSTAT_a8.HABR = 0;
164
bcm3510_writeB(st,0xa8,v);
168
/* Send the start HAB Address (automatically incremented after write of
169
* HABDATA) and write the HAB Data */
170
hab.HABADR_a6.HABADR = 0;
171
if ((ret = bcm3510_writeB(st,0xa6,hab)) < 0)
174
for (i = 0; i < len; i++) {
175
hab.HABDATA_a7 = buf[i];
176
if ((ret = bcm3510_writeB(st,0xa7,hab)) < 0)
180
/* Set the HABR bit to indicate AP request in progress (LBHABR allows HABR to
182
v.raw = 0; v.HABSTAT_a8.HABR = 1; v.HABSTAT_a8.LDHABR = 1;
183
if ((ret = bcm3510_writeB(st,0xa8,v)) < 0)
186
/* Polling method: Wait until the AP finishes processing the HAB request */
188
while (time_before(jiffies, t)) {
189
deb_info("waiting for HAB to complete\n");
191
if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
194
if (!v.HABSTAT_a8.HABR)
198
deb_info("send_request execution timed out.\n");
202
static int bcm3510_do_hab_cmd(struct bcm3510_state *st, u8 cmd, u8 msgid, u8 *obuf, u8 olen, u8 *ibuf, u8 ilen)
204
u8 ob[olen+2],ib[ilen+2];
209
memcpy(&ob[2],obuf,olen);
211
deb_hab("hab snd: ");
212
dbufout(ob,olen+2,deb_hab);
215
if (mutex_lock_interruptible(&st->hab_mutex) < 0)
218
if ((ret = bcm3510_hab_send_request(st, ob, olen+2)) < 0 ||
219
(ret = bcm3510_hab_get_response(st, ib, ilen+2)) < 0)
222
deb_hab("hab get: ");
223
dbufout(ib,ilen+2,deb_hab);
226
memcpy(ibuf,&ib[2],ilen);
228
mutex_unlock(&st->hab_mutex);
233
/* not needed, we use a semaphore to prevent HAB races */
234
static int bcm3510_is_ap_ready(struct bcm3510_state *st)
236
bcm3510_register_value ap,hab;
239
if ((ret = bcm3510_readB(st,0xa8,&hab)) < 0 ||
240
(ret = bcm3510_readB(st,0xa2,&ap) < 0))
243
if (ap.APSTAT1_a2.RESET || ap.APSTAT1_a2.IDLE || ap.APSTAT1_a2.STOP || hab.HABSTAT_a8.HABR) {
244
deb_info("AP is busy\n");
252
static int bcm3510_bert_reset(struct bcm3510_state *st)
254
bcm3510_register_value b;
257
if ((ret = bcm3510_readB(st,0xfa,&b)) < 0)
260
b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
261
b.BERCTL_fa.RESYNC = 1; bcm3510_writeB(st,0xfa,b);
262
b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
263
b.BERCTL_fa.CNTCTL = 1; b.BERCTL_fa.BITCNT = 1; bcm3510_writeB(st,0xfa,b);
265
/* clear residual bit counter TODO */
269
static int bcm3510_refresh_state(struct bcm3510_state *st)
271
if (time_after(jiffies,st->next_status_check)) {
272
bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS1, NULL,0, (u8 *)&st->status1, sizeof(st->status1));
273
bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS2, NULL,0, (u8 *)&st->status2, sizeof(st->status2));
274
st->next_status_check = jiffies + (st->status_check_interval*HZ)/1000;
279
static int bcm3510_read_status(struct dvb_frontend *fe, fe_status_t *status)
281
struct bcm3510_state* st = fe->demodulator_priv;
282
bcm3510_refresh_state(st);
285
if (st->status1.STATUS1.RECEIVER_LOCK)
286
*status |= FE_HAS_LOCK | FE_HAS_SYNC;
288
if (st->status1.STATUS1.FEC_LOCK)
289
*status |= FE_HAS_VITERBI;
291
if (st->status1.STATUS1.OUT_PLL_LOCK)
292
*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
294
if (*status & FE_HAS_LOCK)
295
st->status_check_interval = 1500;
296
else /* more frequently checks if no lock has been achieved yet */
297
st->status_check_interval = 500;
299
deb_info("real_status: %02x\n",*status);
303
static int bcm3510_read_ber(struct dvb_frontend* fe, u32* ber)
305
struct bcm3510_state* st = fe->demodulator_priv;
306
bcm3510_refresh_state(st);
308
*ber = (st->status2.LDBER0 << 16) | (st->status2.LDBER1 << 8) | st->status2.LDBER2;
312
static int bcm3510_read_unc(struct dvb_frontend* fe, u32* unc)
314
struct bcm3510_state* st = fe->demodulator_priv;
315
bcm3510_refresh_state(st);
316
*unc = (st->status2.LDUERC0 << 8) | st->status2.LDUERC1;
320
static int bcm3510_read_signal_strength(struct dvb_frontend* fe, u16* strength)
322
struct bcm3510_state* st = fe->demodulator_priv;
325
bcm3510_refresh_state(st);
326
t = st->status2.SIGNAL;
335
/* normalize if necessary */
336
*strength = (t << 8) | t;
340
static int bcm3510_read_snr(struct dvb_frontend* fe, u16* snr)
342
struct bcm3510_state* st = fe->demodulator_priv;
343
bcm3510_refresh_state(st);
345
*snr = st->status1.SNR_EST0*1000 + ((st->status1.SNR_EST1*1000) >> 8);
349
/* tuner frontend programming */
350
static int bcm3510_tuner_cmd(struct bcm3510_state* st,u8 bc, u16 n, u8 a)
352
struct bcm3510_hab_cmd_tune c;
353
memset(&c,0,sizeof(struct bcm3510_hab_cmd_tune));
355
/* I2C Mode disabled, set 16 control / Data pairs */
358
/* CS1, CS0, DATA, CLK bits control the tuner RF_AGC_SEL pin is set to
359
* logic high (as Configuration) */
361
/* Set duration of the initial state of TUNCTL = 3.34 micro Sec */
362
c.TUNCTL_state = 0x40;
364
/* PRESCALER DEVIDE RATIO | BC1_2_3_4; (band switch), 1stosc REFERENCE COUNTER REF_S12 and REF_S11 */
365
c.ctl_dat[0].ctrl.size = BITS_8;
366
c.ctl_dat[0].data = 0x80 | bc;
368
/* Control DATA pin, 1stosc REFERENCE COUNTER REF_S10 to REF_S3 */
369
c.ctl_dat[1].ctrl.size = BITS_8;
370
c.ctl_dat[1].data = 4;
372
/* set CONTROL BIT 1 to 1, 1stosc REFERENCE COUNTER REF_S2 to REF_S1 */
373
c.ctl_dat[2].ctrl.size = BITS_3;
374
c.ctl_dat[2].data = 0x20;
376
/* control CS0 pin, pulse byte ? */
377
c.ctl_dat[3].ctrl.size = BITS_3;
378
c.ctl_dat[3].ctrl.clk_off = 1;
379
c.ctl_dat[3].ctrl.cs0 = 1;
380
c.ctl_dat[3].data = 0x40;
382
/* PGM_S18 to PGM_S11 */
383
c.ctl_dat[4].ctrl.size = BITS_8;
384
c.ctl_dat[4].data = n >> 3;
386
/* PGM_S10 to PGM_S8, SWL_S7 to SWL_S3 */
387
c.ctl_dat[5].ctrl.size = BITS_8;
388
c.ctl_dat[5].data = ((n & 0x7) << 5) | (a >> 2);
390
/* SWL_S2 and SWL_S1, set CONTROL BIT 2 to 0 */
391
c.ctl_dat[6].ctrl.size = BITS_3;
392
c.ctl_dat[6].data = (a << 6) & 0xdf;
394
/* control CS0 pin, pulse byte ? */
395
c.ctl_dat[7].ctrl.size = BITS_3;
396
c.ctl_dat[7].ctrl.clk_off = 1;
397
c.ctl_dat[7].ctrl.cs0 = 1;
398
c.ctl_dat[7].data = 0x40;
400
/* PRESCALER DEVIDE RATIO, 2ndosc REFERENCE COUNTER REF_S12 and REF_S11 */
401
c.ctl_dat[8].ctrl.size = BITS_8;
402
c.ctl_dat[8].data = 0x80;
404
/* 2ndosc REFERENCE COUNTER REF_S10 to REF_S3 */
405
c.ctl_dat[9].ctrl.size = BITS_8;
406
c.ctl_dat[9].data = 0x10;
408
/* set CONTROL BIT 1 to 1, 2ndosc REFERENCE COUNTER REF_S2 to REF_S1 */
409
c.ctl_dat[10].ctrl.size = BITS_3;
410
c.ctl_dat[10].data = 0x20;
413
c.ctl_dat[11].ctrl.size = BITS_3;
414
c.ctl_dat[11].ctrl.clk_off = 1;
415
c.ctl_dat[11].ctrl.cs1 = 1;
416
c.ctl_dat[11].data = 0x40;
418
/* PGM_S18 to PGM_S11 */
419
c.ctl_dat[12].ctrl.size = BITS_8;
420
c.ctl_dat[12].data = 0x2a;
422
/* PGM_S10 to PGM_S8 and SWL_S7 to SWL_S3 */
423
c.ctl_dat[13].ctrl.size = BITS_8;
424
c.ctl_dat[13].data = 0x8e;
426
/* SWL_S2 and SWL_S1 and set CONTROL BIT 2 to 0 */
427
c.ctl_dat[14].ctrl.size = BITS_3;
428
c.ctl_dat[14].data = 0;
431
c.ctl_dat[15].ctrl.size = BITS_3;
432
c.ctl_dat[15].ctrl.clk_off = 1;
433
c.ctl_dat[15].ctrl.cs1 = 1;
434
c.ctl_dat[15].data = 0x40;
436
return bcm3510_do_hab_cmd(st,CMD_TUNE, MSGID_TUNE,(u8 *) &c,sizeof(c), NULL, 0);
439
static int bcm3510_set_freq(struct bcm3510_state* st,u32 freq)
443
s32 YIntercept,Tfvco1;
447
deb_info("%dkHz:",freq);
448
/* set Band Switch */
451
else if (freq <= 378000)
456
if (freq >= 470000) {
459
} else if (freq >= 90000) {
462
} else if (freq >= 76000){
470
Tfvco1 = (((freq/6000)*60 + YIntercept)*4)/10;
475
deb_info(" BC1_2_3_4: %x, N: %x A: %x\n", bc, n, a);
476
if (n >= 16 && n <= 2047)
477
return bcm3510_tuner_cmd(st,bc,n,a);
482
static int bcm3510_set_frontend(struct dvb_frontend* fe,
483
struct dvb_frontend_parameters *p)
485
struct bcm3510_state* st = fe->demodulator_priv;
486
struct bcm3510_hab_cmd_ext_acquire cmd;
487
struct bcm3510_hab_cmd_bert_control bert;
490
memset(&cmd,0,sizeof(cmd));
491
switch (p->u.vsb.modulation) {
493
cmd.ACQUIRE0.MODE = 0x1;
494
cmd.ACQUIRE1.SYM_RATE = 0x1;
495
cmd.ACQUIRE1.IF_FREQ = 0x1;
498
cmd.ACQUIRE0.MODE = 0x2;
499
cmd.ACQUIRE1.SYM_RATE = 0x2;
500
cmd.ACQUIRE1.IF_FREQ = 0x1;
503
cmd.ACQUIRE0.MODE = 0x3;
506
cmd.ACQUIRE0.MODE = 0x4;
509
cmd.ACQUIRE0.MODE = 0x5;
512
cmd.ACQUIRE0.MODE = 0x6;
515
cmd.ACQUIRE0.MODE = 0x7;
518
cmd.ACQUIRE0.MODE = 0x8;
519
cmd.ACQUIRE1.SYM_RATE = 0x0;
520
cmd.ACQUIRE1.IF_FREQ = 0x0;
523
cmd.ACQUIRE0.MODE = 0x9;
524
cmd.ACQUIRE1.SYM_RATE = 0x0;
525
cmd.ACQUIRE1.IF_FREQ = 0x0;
529
cmd.ACQUIRE0.OFFSET = 0;
530
cmd.ACQUIRE0.NTSCSWEEP = 1;
534
/* if (enableOffset) {
538
cmd.SYM_OFFSET0 = xx;
539
cmd.SYM_OFFSET1 = xx;
540
if (enableNtscSweep) {
545
bcm3510_do_hab_cmd(st, CMD_ACQUIRE, MSGID_EXT_TUNER_ACQUIRE, (u8 *) &cmd, sizeof(cmd), NULL, 0);
547
/* doing it with different MSGIDs, data book and source differs */
550
bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_CONTROL, (u8 *) &bert, sizeof(bert), NULL, 0);
551
bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_SET, (u8 *) &bert, sizeof(bert), NULL, 0);
553
bcm3510_bert_reset(st);
555
if ((ret = bcm3510_set_freq(st,p->frequency)) < 0)
558
memset(&st->status1,0,sizeof(st->status1));
559
memset(&st->status2,0,sizeof(st->status2));
560
st->status_check_interval = 500;
562
/* Give the AP some time */
568
static int bcm3510_sleep(struct dvb_frontend* fe)
573
static int bcm3510_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings *s)
575
s->min_delay_ms = 1000;
581
static void bcm3510_release(struct dvb_frontend* fe)
583
struct bcm3510_state* state = fe->demodulator_priv;
587
/* firmware download:
588
* firmware file is build up like this:
589
* 16bit addr, 16bit length, 8byte of length
591
#define BCM3510_DEFAULT_FIRMWARE "dvb-fe-bcm3510-01.fw"
593
static int bcm3510_write_ram(struct bcm3510_state *st, u16 addr, const u8 *b,
597
bcm3510_register_value vH, vL,vD;
599
vH.MADRH_a9 = addr >> 8;
601
if ((ret = bcm3510_writeB(st,0xa9,vH)) < 0) return ret;
602
if ((ret = bcm3510_writeB(st,0xaa,vL)) < 0) return ret;
604
for (i = 0; i < len; i++) {
606
if ((ret = bcm3510_writeB(st,0xab,vD)) < 0)
613
static int bcm3510_download_firmware(struct dvb_frontend* fe)
615
struct bcm3510_state* st = fe->demodulator_priv;
616
const struct firmware *fw;
621
deb_info("requesting firmware\n");
622
if ((ret = st->config->request_firmware(fe, &fw, BCM3510_DEFAULT_FIRMWARE)) < 0) {
623
err("could not load firmware (%s): %d",BCM3510_DEFAULT_FIRMWARE,ret);
626
deb_info("got firmware: %zd\n",fw->size);
629
for (i = 0; i < fw->size;) {
630
addr = le16_to_cpu( *( (u16 *)&b[i] ) );
631
len = le16_to_cpu( *( (u16 *)&b[i+2] ) );
632
deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04zx\n",addr,len,fw->size);
633
if ((ret = bcm3510_write_ram(st,addr,&b[i+4],len)) < 0) {
634
err("firmware download failed: %d\n",ret);
639
release_firmware(fw);
640
deb_info("firmware download successfully completed\n");
644
static int bcm3510_check_firmware_version(struct bcm3510_state *st)
646
struct bcm3510_hab_cmd_get_version_info ver;
647
bcm3510_do_hab_cmd(st,CMD_GET_VERSION_INFO,MSGID_GET_VERSION_INFO,NULL,0,(u8*)&ver,sizeof(ver));
649
deb_info("Version information: 0x%02x 0x%02x 0x%02x 0x%02x\n",
650
ver.microcode_version, ver.script_version, ver.config_version, ver.demod_version);
652
if (ver.script_version == BCM3510_DEF_SCRIPT_VERSION &&
653
ver.config_version == BCM3510_DEF_CONFIG_VERSION &&
654
ver.demod_version == BCM3510_DEF_DEMOD_VERSION)
657
deb_info("version check failed\n");
661
/* (un)resetting the AP */
662
static int bcm3510_reset(struct bcm3510_state *st)
666
bcm3510_register_value v;
668
bcm3510_readB(st,0xa0,&v); v.HCTL1_a0.RESET = 1;
669
if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
673
while (time_before(jiffies, t)) {
675
if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
678
if (v.APSTAT1_a2.RESET)
681
deb_info("reset timed out\n");
685
static int bcm3510_clear_reset(struct bcm3510_state *st)
687
bcm3510_register_value v;
692
if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
696
while (time_before(jiffies, t)) {
698
if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
701
/* verify that reset is cleared */
702
if (!v.APSTAT1_a2.RESET)
705
deb_info("reset clear timed out\n");
709
static int bcm3510_init_cold(struct bcm3510_state *st)
712
bcm3510_register_value v;
714
/* read Acquisation Processor status register and check it is not in RUN mode */
715
if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
717
if (v.APSTAT1_a2.RUN) {
718
deb_info("AP is already running - firmware already loaded.\n");
722
deb_info("reset?\n");
723
if ((ret = bcm3510_reset(st)) < 0)
726
deb_info("tristate?\n");
729
if ((ret = bcm3510_writeB(st,0x2e,v)) < 0)
732
deb_info("firmware?\n");
733
if ((ret = bcm3510_download_firmware(&st->frontend)) < 0 ||
734
(ret = bcm3510_clear_reset(st)) < 0)
737
/* anything left here to Let the acquisition processor begin execution at program counter 0000 ??? */
742
static int bcm3510_init(struct dvb_frontend* fe)
744
struct bcm3510_state* st = fe->demodulator_priv;
745
bcm3510_register_value j;
746
struct bcm3510_hab_cmd_set_agc c;
749
if ((ret = bcm3510_readB(st,0xca,&j)) < 0)
752
deb_info("JDEC: %02x\n",j.raw);
754
switch (j.JDEC_ca.JDEC) {
755
case JDEC_WAIT_AT_RAM:
756
deb_info("attempting to download firmware\n");
757
if ((ret = bcm3510_init_cold(st)) < 0)
759
case JDEC_EEPROM_LOAD_WAIT: /* fall-through is wanted */
760
deb_info("firmware is loaded\n");
761
bcm3510_check_firmware_version(st);
769
bcm3510_do_hab_cmd(st,CMD_AUTO_PARAM,MSGID_SET_RF_AGC_SEL,(u8 *)&c,sizeof(c),NULL,0);
775
static struct dvb_frontend_ops bcm3510_ops;
777
struct dvb_frontend* bcm3510_attach(const struct bcm3510_config *config,
778
struct i2c_adapter *i2c)
780
struct bcm3510_state* state = NULL;
782
bcm3510_register_value v;
784
/* allocate memory for the internal state */
785
state = kzalloc(sizeof(struct bcm3510_state), GFP_KERNEL);
789
/* setup the state */
791
state->config = config;
794
/* create dvb_frontend */
795
memcpy(&state->frontend.ops, &bcm3510_ops, sizeof(struct dvb_frontend_ops));
796
state->frontend.demodulator_priv = state;
798
mutex_init(&state->hab_mutex);
800
if ((ret = bcm3510_readB(state,0xe0,&v)) < 0)
803
deb_info("Revision: 0x%1x, Layer: 0x%1x.\n",v.REVID_e0.REV,v.REVID_e0.LAYER);
805
if ((v.REVID_e0.REV != 0x1 && v.REVID_e0.LAYER != 0xb) && /* cold */
806
(v.REVID_e0.REV != 0x8 && v.REVID_e0.LAYER != 0x0)) /* warm */
809
info("Revision: 0x%1x, Layer: 0x%1x.",v.REVID_e0.REV,v.REVID_e0.LAYER);
811
bcm3510_reset(state);
813
return &state->frontend;
819
EXPORT_SYMBOL(bcm3510_attach);
821
static struct dvb_frontend_ops bcm3510_ops = {
824
.name = "Broadcom BCM3510 VSB/QAM frontend",
826
.frequency_min = 54000000,
827
.frequency_max = 803000000,
828
/* stepsize is just a guess */
829
.frequency_stepsize = 0,
831
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
832
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
833
FE_CAN_8VSB | FE_CAN_16VSB |
834
FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_128 | FE_CAN_QAM_256
837
.release = bcm3510_release,
839
.init = bcm3510_init,
840
.sleep = bcm3510_sleep,
842
.set_frontend = bcm3510_set_frontend,
843
.get_tune_settings = bcm3510_get_tune_settings,
845
.read_status = bcm3510_read_status,
846
.read_ber = bcm3510_read_ber,
847
.read_signal_strength = bcm3510_read_signal_strength,
848
.read_snr = bcm3510_read_snr,
849
.read_ucblocks = bcm3510_read_unc,
852
MODULE_DESCRIPTION("Broadcom BCM3510 ATSC (8VSB/16VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
853
MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>");
854
MODULE_LICENSE("GPL");