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Viewing changes to parts/contrib/RFM12B_Transceiver_DIP_Package.fzp

  • Committer: Package Import Robot
  • Author(s): Enrique Hernández Bello
  • Date: 2012-11-11 21:38:56 UTC
  • mfrom: (1.1.5)
  • Revision ID: package-import@ubuntu.com-20121111213856-0825ywdrtdcshl91
Tags: 0.7.10b-1
http://bugs.debian.org/661495
http://bugs.debian.org/692998
* New upstream version. Closes: #661495, #692998
* Removed useless patches.
* Removed SetupAPI.lib from sourceless files.
* Skip dfsg tarball creation if there are no sourceless files.
* Added libqt4-sql-sqlite to dependencies. Thanks to Tom Hummel <tom@bluespice.org>.

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parts/contrib/RFM12B_Transceiver_DIP_Package.fzp
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<?xml version="1.0" encoding="UTF-8"?>
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<module fritzingVersion="0.7.0b.02.01.5801" moduleId="2bbfed89356b4ec4a94ac6cee00e301f">
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    <author>gareth@halfacree.co.uk</author>
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    <title>RFM12B Transceiver DIP Package</title>
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    <label>RFM12B</label>
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    <date>2012-03-17</date>
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    <tags>
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        <tag>rf</tag>
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        <tag>radio</tag>
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        <tag>transceiver</tag>
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        <tag>rfm12</tag>
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        <tag>rfm12b</tag>
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    </tags>
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    <properties>
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        <property name="family">RFM12</property>
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        <property name="frequencies">315MHz/434MHz/868MHz/915MHz (see table on underside of board)</property>
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        <property name="type">RF transciever</property>
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        <property name="part number"></property>
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    </properties>
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    <description>RFM12B transceiver on DIP breakout board, 2mm pin spacing. Farnell part number 187-8284.</description>
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    <views>
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        <iconView>
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            <layers image="icon/RFM12B_Transceiver_DIP_Package__581e0231.svg">
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                <layer layerId="icon"/>
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            </layers>
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        </iconView>
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        <breadboardView>
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            <layers image="breadboard/RFM12B_Transceiver_DIP_Package__581e0231.svg">
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                <layer layerId="breadboard"/>
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            </layers>
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        </breadboardView>
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        <schematicView>
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            <layers image="schematic/RFM12B_Transceiver_DIP_Package__581e0231.svg">
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                <layer layerId="schematic"/>
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            </layers>
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        </schematicView>
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        <pcbView>
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            <layers image="pcb/RFM12B_Transceiver_DIP_Package__581e0231.svg">
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                <layer layerId="copper0"/>
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                <layer layerId="silkscreen"/>
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                <layer layerId="copper1"/>
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            </layers>
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        </pcbView>
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    </views>
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    <connectors>
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        <connector id="connector3" type="male" name="nIRQ">
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            <description>DO - Interrupt request output (active low)</description>
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            <views>
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                <breadboardView>
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                    <p layer="breadboard" svgId="connector3"/>
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                </breadboardView>
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                <schematicView>
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                    <p layer="schematic" svgId="connector3pin" terminalId="connector3terminal"/>
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                </schematicView>
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                <pcbView>
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                    <p layer="copper1" svgId="connector3"/>
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                    <p layer="copper0" svgId="connector3"/>
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                </pcbView>
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            </views>
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        </connector>
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        <connector id="connector4" type="male" name="DCLCK/CFIL/FFIT">
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            <description>DO/AIO/DO - Clock output (no FIFO )/external filter capacitor (analog mode)/FIFO interrupts (active high). When FIFO level set to 1, FIFO empty interruption can be achieved.
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</description>
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            <views>
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                <breadboardView>
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                    <p layer="breadboard" svgId="connector4"/>
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                </breadboardView>
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                <schematicView>
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                    <p layer="schematic" svgId="connector4pin" terminalId="connector4terminal"/>
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                </schematicView>
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                <pcbView>
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                    <p layer="copper1" svgId="connector4"/>
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                    <p layer="copper0" svgId="connector4"/>
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                </pcbView>
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            </views>
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        </connector>
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        <connector id="connector5" type="male" name="nRES">
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            <description>DIO - Reset output (active low)</description>
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            <views>
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                <breadboardView>
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                    <p layer="breadboard" svgId="connector5"/>
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                </breadboardView>
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                <schematicView>
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                    <p layer="schematic" svgId="connector5pin" terminalId="connector5terminal"/>
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                </schematicView>
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                <pcbView>
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                    <p layer="copper1" svgId="connector5"/>
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                    <p layer="copper0" svgId="connector5"/>
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                </pcbView>
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            </views>
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        </connector>
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        <connector id="connector6" type="male" name="GND">
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            <description>S - Power ground</description>
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            <views>
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                <breadboardView>
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                    <p layer="breadboard" svgId="connector6"/>
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                </breadboardView>
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                <schematicView>
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                    <p layer="schematic" svgId="connector6pin" terminalId="connector6terminal"/>
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                </schematicView>
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                <pcbView>
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                    <p layer="copper1" svgId="connector6"/>
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                    <p layer="copper0" svgId="connector6"/>
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                </pcbView>
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            </views>
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        </connector>
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        <connector id="connector7" type="male" name="CLK">
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            <description>DO - Clock output for external microcontroller</description>
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            <views>
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                <breadboardView>
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                    <p layer="breadboard" svgId="connector7"/>
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                </breadboardView>
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                <schematicView>
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                    <p layer="schematic" svgId="connector7pin" terminalId="connector7terminal"/>
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                </schematicView>
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                <pcbView>
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                    <p layer="copper1" svgId="connector7"/>
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                    <p layer="copper0" svgId="connector7"/>
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                </pcbView>
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            </views>
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        </connector>
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        <connector id="connector8" type="male" name="FSCK/DATA/nFFS">
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            <description>DI/DO/DI - Transmit FSK data input/received data output (FIFO not used)/FIFO select</description>
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            <views>
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                <breadboardView>
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                    <p layer="breadboard" svgId="connector8"/>
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                </breadboardView>
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                <schematicView>
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                    <p layer="schematic" svgId="connector8pin" terminalId="connector8terminal"/>
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                </schematicView>
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                <pcbView>
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                    <p layer="copper1" svgId="connector8"/>
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                    <p layer="copper0" svgId="connector8"/>
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                </pcbView>
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            </views>
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        </connector>
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        <connector id="connector9" type="male" name="SDO">
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            <description>DO - Serial data output with bus hold</description>
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            <views>
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                <breadboardView>
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                    <p layer="breadboard" svgId="connector9"/>
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                </breadboardView>
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                <schematicView>
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                    <p layer="schematic" svgId="connector9pin" terminalId="connector9terminal"/>
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                </schematicView>
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                <pcbView>
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                    <p layer="copper1" svgId="connector9"/>
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                    <p layer="copper0" svgId="connector9"/>
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                </pcbView>
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            </views>
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        </connector>
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        <connector id="connector10" type="male" name="SCK">
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            <description>DI - SPI clock input</description>
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            <views>
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                <breadboardView>
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                    <p layer="breadboard" svgId="connector10"/>
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                </breadboardView>
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                <schematicView>
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                    <p layer="schematic" svgId="connector10pin" terminalId="connector10terminal"/>
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                </schematicView>
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                <pcbView>
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                    <p layer="copper1" svgId="connector10"/>
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                    <p layer="copper0" svgId="connector10"/>
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                </pcbView>
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            </views>
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        </connector>
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        <connector id="connector11" type="male" name="VDD">
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            <description>S - Positive power supply</description>
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            <views>
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                <breadboardView>
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                    <p layer="breadboard" svgId="connector11"/>
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                </breadboardView>
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                <schematicView>
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                    <p layer="schematic" svgId="connector11pin" terminalId="connector11terminal"/>
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                </schematicView>
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                <pcbView>
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                    <p layer="copper1" svgId="connector11"/>
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                    <p layer="copper0" svgId="connector11"/>
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                </pcbView>
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            </views>
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        </connector>
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        <connector id="connector0" type="male" name="nINT/VDI">
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            <description>DI/DO - Interrupt input (active low)/valid data indicator</description>
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            <views>
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                <breadboardView>
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                    <p layer="breadboard" svgId="connector0"/>
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                </breadboardView>
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                <schematicView>
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                    <p layer="schematic" svgId="connector0pin" terminalId="connector0terminal"/>
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                </schematicView>
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                <pcbView>
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                    <p layer="copper1" svgId="connector0"/>
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                    <p layer="copper0" svgId="connector0"/>
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                </pcbView>
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            </views>
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        </connector>
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        <connector id="connector1" type="male" name="SDI">
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            <description>DI - SPI data input</description>
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            <views>
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                <breadboardView>
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                    <p layer="breadboard" svgId="connector1"/>
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                </breadboardView>
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                <schematicView>
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                    <p layer="schematic" svgId="connector1pin" terminalId="connector1terminal"/>
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                </schematicView>
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                <pcbView>
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                    <p layer="copper1" svgId="connector1"/>
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                    <p layer="copper0" svgId="connector1"/>
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                </pcbView>
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            </views>
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        </connector>
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        <connector id="connector2" type="male" name="nSEL">
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            <description>DI - Chip select (active low)</description>
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            <views>
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                <breadboardView>
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                    <p layer="breadboard" svgId="connector2"/>
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                </breadboardView>
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                <schematicView>
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                    <p layer="schematic" svgId="connector2pin" terminalId="connector2terminal"/>
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                </schematicView>
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                <pcbView>
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                    <p layer="copper1" svgId="connector2"/>
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                    <p layer="copper0" svgId="connector2"/>
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                </pcbView>
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            </views>
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        </connector>
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    </connectors>
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</module>