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// SPDX-License-Identifier: GPL-2.0
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// rt1308-sdw.c -- rt1308 ALSA SoC audio driver
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// Copyright(c) 2019 Realtek Semiconductor Corp.
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/pm_runtime.h>
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#include <linux/mod_devicetable.h>
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#include <dkms/linux/soundwire/sdw.h>
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#include <dkms/linux/soundwire/sdw_type.h>
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#include <dkms/linux/soundwire/sdw_registers.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <dkms/sound/core.h>
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#include <dkms/sound/pcm.h>
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#include <dkms/sound/pcm_params.h>
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#include <dkms/sound/soc.h>
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#include <dkms/sound/soc-dapm.h>
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#include <dkms/sound/initval.h>
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#include <dkms/sound/tlv.h>
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#include <dkms/sound/hda_verbs.h>
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#include "rt1308-sdw.h"
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static bool rt1308_readable_register(struct device *dev, unsigned int reg)
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case 0x2f01 ... 0x2f07:
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case 0x3000 ... 0x3001:
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case 0x3004 ... 0x3005:
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case 0xc000 ... 0xcff3:
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static bool rt1308_volatile_register(struct device *dev, unsigned int reg)
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case 0x2f01 ... 0x2f07:
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case 0x3000 ... 0x3001:
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case 0x3004 ... 0x3005:
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static const struct regmap_config rt1308_sdw_regmap = {
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.reg_bits = 32, /* Total register space for SDW */
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.val_bits = 8, /* Total number of bits in register */
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.readable_reg = rt1308_readable_register, /* Readable registers */
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.volatile_reg = rt1308_volatile_register, /* volatile register */
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.max_register = 0xcfff, /* Maximum number of register */
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.reg_defaults = rt1308_reg_defaults, /* Defaults */
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.num_reg_defaults = ARRAY_SIZE(rt1308_reg_defaults),
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.cache_type = REGCACHE_RBTREE,
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.use_single_read = true,
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.use_single_write = true,
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/* Bus clock frequency */
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#define RT1308_CLK_FREQ_9600000HZ 9600000
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#define RT1308_CLK_FREQ_12000000HZ 12000000
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#define RT1308_CLK_FREQ_6000000HZ 6000000
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#define RT1308_CLK_FREQ_4800000HZ 4800000
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#define RT1308_CLK_FREQ_2400000HZ 2400000
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#define RT1308_CLK_FREQ_12288000HZ 12288000
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static int rt1308_clock_config(struct device *dev)
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struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(dev);
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unsigned int clk_freq, value;
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clk_freq = (rt1308->params.curr_dr_freq >> 1);
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case RT1308_CLK_FREQ_12000000HZ:
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case RT1308_CLK_FREQ_6000000HZ:
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case RT1308_CLK_FREQ_9600000HZ:
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case RT1308_CLK_FREQ_4800000HZ:
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case RT1308_CLK_FREQ_2400000HZ:
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case RT1308_CLK_FREQ_12288000HZ:
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regmap_write(rt1308->regmap, 0xe0, value);
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regmap_write(rt1308->regmap, 0xf0, value);
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dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq);
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static int rt1308_read_prop(struct sdw_slave *slave)
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struct sdw_slave_prop *prop = &slave->prop;
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int nval, i, num_of_ports = 1;
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struct sdw_dpn_prop *dpn;
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prop->paging_support = true;
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/* first we need to allocate memory for set bits in port lists */
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prop->source_ports = 0x00; /* BITMAP: 00010100 (not enable yet) */
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prop->sink_ports = 0x2; /* BITMAP: 00000010 */
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nval = hweight32(prop->sink_ports);
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num_of_ports += nval;
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prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
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sizeof(*prop->sink_dpn_prop),
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if (!prop->sink_dpn_prop)
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dpn = prop->sink_dpn_prop;
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addr = prop->sink_ports;
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for_each_set_bit(bit, &addr, 32) {
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dpn[i].type = SDW_DPN_FULL;
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dpn[i].simple_ch_prep_sm = true;
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dpn[i].ch_prep_timeout = 10;
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/* Allocate port_ready based on num_of_ports */
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slave->port_ready = devm_kcalloc(&slave->dev, num_of_ports,
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sizeof(*slave->port_ready),
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if (!slave->port_ready)
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/* Initialize completion */
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for (i = 0; i < num_of_ports; i++)
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init_completion(&slave->port_ready[i]);
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/* set the timeout values */
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prop->clk_stop_timeout = 20;
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dev_dbg(&slave->dev, "%s\n", __func__);
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static int rt1308_io_init(struct device *dev, struct sdw_slave *slave)
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struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(dev);
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unsigned int efuse_m_btl_l, efuse_m_btl_r, tmp;
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unsigned int efuse_c_btl_l, efuse_c_btl_r;
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ret = rt1308_read_prop(slave);
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if (rt1308->first_init) {
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regcache_cache_only(rt1308->regmap, false);
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regcache_cache_bypass(rt1308->regmap, true);
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* PM runtime is only enabled when a Slave reports as Attached
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if (!rt1308->first_init) {
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/* set autosuspend parameters */
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pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
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pm_runtime_use_autosuspend(&slave->dev);
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/* update count of parent 'active' children */
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pm_runtime_set_active(&slave->dev);
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/* make sure the device does not suspend immediately */
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pm_runtime_mark_last_busy(&slave->dev);
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pm_runtime_enable(&slave->dev);
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pm_runtime_get_noresume(&slave->dev);
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regmap_write(rt1308->regmap, RT1308_SDW_RESET, 0);
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regmap_write(rt1308->regmap, 0xc360, 0x01);
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regmap_write(rt1308->regmap, 0xc361, 0x80);
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regmap_write(rt1308->regmap, 0xc7f0, 0x04);
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regmap_write(rt1308->regmap, 0xc7f1, 0xfe);
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regmap_write(rt1308->regmap, 0xc7f0, 0x44);
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regmap_write(rt1308->regmap, 0xc240, 0x10);
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regmap_read(rt1308->regmap, 0xc861, &tmp);
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regmap_read(rt1308->regmap, 0xc860, &tmp);
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efuse_m_btl_l = efuse_m_btl_l | (tmp << 8);
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regmap_read(rt1308->regmap, 0xc863, &tmp);
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regmap_read(rt1308->regmap, 0xc862, &tmp);
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efuse_c_btl_l = efuse_c_btl_l | (tmp << 8);
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regmap_read(rt1308->regmap, 0xc871, &tmp);
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regmap_read(rt1308->regmap, 0xc870, &tmp);
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efuse_m_btl_r = efuse_m_btl_r | (tmp << 8);
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regmap_read(rt1308->regmap, 0xc873, &tmp);
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regmap_read(rt1308->regmap, 0xc872, &tmp);
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efuse_c_btl_r = efuse_c_btl_r | (tmp << 8);
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dev_info(&slave->dev, "%s m_btl_l=0x%x, m_btl_r=0x%x\n", __func__,
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efuse_m_btl_l, efuse_m_btl_r);
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dev_info(&slave->dev, "%s c_btl_l=0x%x, c_btl_r=0x%x\n", __func__,
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efuse_c_btl_l, efuse_c_btl_r);
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/* initial settings */
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regmap_write(rt1308->regmap, 0xc103, 0xc0);
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regmap_write(rt1308->regmap, 0xc030, 0x17);
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regmap_write(rt1308->regmap, 0xc031, 0x81);
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regmap_write(rt1308->regmap, 0xc032, 0x26);
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regmap_write(rt1308->regmap, 0xc040, 0x80);
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regmap_write(rt1308->regmap, 0xc041, 0x80);
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regmap_write(rt1308->regmap, 0xc042, 0x06);
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regmap_write(rt1308->regmap, 0xc052, 0x0a);
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regmap_write(rt1308->regmap, 0xc080, 0x0a);
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regmap_write(rt1308->regmap, 0xc060, 0x02);
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regmap_write(rt1308->regmap, 0xc061, 0x75);
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regmap_write(rt1308->regmap, 0xc062, 0x05);
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regmap_write(rt1308->regmap, 0xc171, 0x07);
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regmap_write(rt1308->regmap, 0xc173, 0x0d);
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regmap_write(rt1308->regmap, 0xc311, 0x7f);
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regmap_write(rt1308->regmap, 0xc900, 0x90);
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regmap_write(rt1308->regmap, 0xc1a0, 0x84);
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regmap_write(rt1308->regmap, 0xc1a1, 0x01);
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regmap_write(rt1308->regmap, 0xc360, 0x78);
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regmap_write(rt1308->regmap, 0xc361, 0x87);
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regmap_write(rt1308->regmap, 0xc0a1, 0x71);
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regmap_write(rt1308->regmap, 0xc210, 0x00);
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regmap_write(rt1308->regmap, 0xc070, 0x00);
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regmap_write(rt1308->regmap, 0xc100, 0xd7);
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regmap_write(rt1308->regmap, 0xc101, 0xd7);
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regmap_write(rt1308->regmap, 0xc300, 0x09);
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if (rt1308->first_init)
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regcache_cache_bypass(rt1308->regmap, false);
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rt1308->first_init = true;
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/* Mark Slave initialization complete */
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rt1308->hw_init = true;
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pm_runtime_mark_last_busy(&slave->dev);
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pm_runtime_put_autosuspend(&slave->dev);
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dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
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static int rt1308_update_status(struct sdw_slave *slave,
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enum sdw_slave_status status)
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struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(&slave->dev);
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/* Update the status */
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rt1308->status = status;
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if (status == SDW_SLAVE_UNATTACHED)
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rt1308->hw_init = false;
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* Perform initialization only if slave status is present and
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* hw_init flag is false
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if (rt1308->hw_init || rt1308->status != SDW_SLAVE_ATTACHED)
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/* perform I/O transfers required for Slave initialization */
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return rt1308_io_init(&slave->dev, slave);
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static int rt1308_bus_config(struct sdw_slave *slave,
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struct sdw_bus_params *params)
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struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(&slave->dev);
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memcpy(&rt1308->params, params, sizeof(*params));
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ret = rt1308_clock_config(&slave->dev);
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dev_err(&slave->dev, "Invalid clk config");
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static int rt1308_interrupt_callback(struct sdw_slave *slave,
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struct sdw_slave_intr_status *status)
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"%s control_port_stat=%x", __func__, status->control_port);
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static int rt1308_classd_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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struct snd_soc_component *component =
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snd_soc_dapm_to_component(w->dapm);
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case SND_SOC_DAPM_POST_PMU:
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snd_soc_component_update_bits(component,
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RT1308_SDW_OFFSET | (RT1308_POWER_STATUS << 4),
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case SND_SOC_DAPM_PRE_PMD:
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snd_soc_component_update_bits(component,
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RT1308_SDW_OFFSET | (RT1308_POWER_STATUS << 4),
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usleep_range(150000, 200000);
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static const char * const rt1308_rx_data_ch_select[] = {
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static SOC_ENUM_SINGLE_DECL(rt1308_rx_data_ch_enum,
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RT1308_SDW_OFFSET | (RT1308_DATA_PATH << 4), 0,
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rt1308_rx_data_ch_select);
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static const struct snd_kcontrol_new rt1308_snd_controls[] = {
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/* I2S Data Channel Selection */
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SOC_ENUM("RX Channel Select", rt1308_rx_data_ch_enum),
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static const struct snd_kcontrol_new rt1308_sto_dac_l =
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SOC_DAPM_SINGLE_AUTODISABLE("Switch",
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RT1308_SDW_OFFSET_BYTE3 | (RT1308_DAC_SET << 4),
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RT1308_DVOL_MUTE_L_EN_SFT, 1, 1);
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static const struct snd_kcontrol_new rt1308_sto_dac_r =
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SOC_DAPM_SINGLE_AUTODISABLE("Switch",
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RT1308_SDW_OFFSET_BYTE3 | (RT1308_DAC_SET << 4),
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RT1308_DVOL_MUTE_R_EN_SFT, 1, 1);
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static const struct snd_soc_dapm_widget rt1308_dapm_widgets[] = {
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/* Audio Interface */
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SND_SOC_DAPM_AIF_IN("AIF1RX", "DP1 Playback", 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_SUPPLY("MBIAS20U",
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RT1308_SDW_OFFSET | (RT1308_POWER << 4), 7, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("ALDO",
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RT1308_SDW_OFFSET | (RT1308_POWER << 4), 6, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("DBG",
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RT1308_SDW_OFFSET | (RT1308_POWER << 4), 5, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("DACL",
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RT1308_SDW_OFFSET | (RT1308_POWER << 4), 4, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("CLK25M",
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RT1308_SDW_OFFSET | (RT1308_POWER << 4), 2, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("ADC_R",
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RT1308_SDW_OFFSET | (RT1308_POWER << 4), 1, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("ADC_L",
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RT1308_SDW_OFFSET | (RT1308_POWER << 4), 0, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("DAC Power",
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RT1308_SDW_OFFSET | (RT1308_POWER << 4), 3, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("DLDO",
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RT1308_SDW_OFFSET_BYTE1 | (RT1308_POWER << 4), 5, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("VREF",
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RT1308_SDW_OFFSET_BYTE1 | (RT1308_POWER << 4), 4, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("MIXER_R",
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RT1308_SDW_OFFSET_BYTE1 | (RT1308_POWER << 4), 2, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("MIXER_L",
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RT1308_SDW_OFFSET_BYTE1 | (RT1308_POWER << 4), 1, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("MBIAS4U",
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RT1308_SDW_OFFSET_BYTE1 | (RT1308_POWER << 4), 0, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("PLL2_LDO",
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RT1308_SDW_OFFSET_BYTE2 | (RT1308_POWER << 4), 4, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("PLL2B",
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RT1308_SDW_OFFSET_BYTE2 | (RT1308_POWER << 4), 3, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("PLL2F",
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RT1308_SDW_OFFSET_BYTE2 | (RT1308_POWER << 4), 2, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("PLL2F2",
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RT1308_SDW_OFFSET_BYTE2 | (RT1308_POWER << 4), 1, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("PLL2B2",
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RT1308_SDW_OFFSET_BYTE2 | (RT1308_POWER << 4), 0, 0, NULL, 0),
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/* Digital Interface */
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SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_SWITCH("DAC L", SND_SOC_NOPM, 0, 0, &rt1308_sto_dac_l),
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SND_SOC_DAPM_SWITCH("DAC R", SND_SOC_NOPM, 0, 0, &rt1308_sto_dac_r),
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SND_SOC_DAPM_PGA_E("CLASS D", SND_SOC_NOPM, 0, 0, NULL, 0,
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SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
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SND_SOC_DAPM_OUTPUT("SPOL"),
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SND_SOC_DAPM_OUTPUT("SPOR"),
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static const struct snd_soc_dapm_route rt1308_dapm_routes[] = {
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{ "DAC", NULL, "AIF1RX" },
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{ "DAC", NULL, "MBIAS20U" },
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{ "DAC", NULL, "ALDO" },
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{ "DAC", NULL, "DBG" },
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{ "DAC", NULL, "DACL" },
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{ "DAC", NULL, "CLK25M" },
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{ "DAC", NULL, "ADC_R" },
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{ "DAC", NULL, "ADC_L" },
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{ "DAC", NULL, "DLDO" },
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{ "DAC", NULL, "VREF" },
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{ "DAC", NULL, "MIXER_R" },
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{ "DAC", NULL, "MIXER_L" },
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{ "DAC", NULL, "MBIAS4U" },
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{ "DAC", NULL, "PLL2_LDO" },
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{ "DAC", NULL, "PLL2B" },
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{ "DAC", NULL, "PLL2F" },
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{ "DAC", NULL, "PLL2F2" },
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{ "DAC", NULL, "PLL2B2" },
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{ "DAC L", "Switch", "DAC" },
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{ "DAC R", "Switch", "DAC" },
473
{ "DAC L", NULL, "DAC Power" },
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{ "DAC R", NULL, "DAC Power" },
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{ "CLASS D", NULL, "DAC L" },
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{ "CLASS D", NULL, "DAC R" },
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{ "SPOL", NULL, "CLASS D" },
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{ "SPOR", NULL, "CLASS D" },
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static int rt1308_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
485
struct sdw_stream_data *stream;
487
stream = kzalloc(sizeof(*stream), GFP_KERNEL);
491
stream->sdw_stream = (struct sdw_stream_runtime *)sdw_stream;
493
/* Use tx_mask or rx_mask to configure stream tag and set dma_data */
494
if (direction == SNDRV_PCM_STREAM_PLAYBACK)
495
dai->playback_dma_data = stream;
497
dai->capture_dma_data = stream;
502
static void rt1308_sdw_shutdown(struct snd_pcm_substream *substream,
503
struct snd_soc_dai *dai)
505
struct sdw_stream_data *stream;
507
stream = snd_soc_dai_get_dma_data(dai, substream);
508
snd_soc_dai_set_dma_data(dai, substream, NULL);
512
static int rt1308_sdw_hw_params(struct snd_pcm_substream *substream,
513
struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
515
struct snd_soc_component *component = dai->component;
516
struct rt1308_sdw_priv *rt1308 =
517
snd_soc_component_get_drvdata(component);
518
struct sdw_stream_config stream_config;
519
struct sdw_port_config port_config;
520
enum sdw_data_direction direction;
521
struct sdw_stream_data *stream;
522
int retval, port, num_channels;
524
dev_dbg(dai->dev, "%s %s", __func__, dai->name);
525
stream = snd_soc_dai_get_dma_data(dai, substream);
530
if (!rt1308->sdw_slave)
533
/* SoundWire specific configuration */
534
/* port 1 for playback */
535
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
536
direction = SDW_DATA_DIR_RX;
542
stream_config.frame_rate = params_rate(params);
543
stream_config.ch_count = params_channels(params);
544
stream_config.bps = snd_pcm_format_width(params_format(params));
545
stream_config.direction = direction;
547
num_channels = params_channels(params);
548
port_config.ch_mask = (1 << (num_channels)) - 1;
549
port_config.num = port;
551
retval = sdw_stream_add_slave(rt1308->sdw_slave, &stream_config,
552
&port_config, 1, stream->sdw_stream);
554
dev_err(dai->dev, "Unable to configure port\n");
561
static int rt1308_sdw_pcm_hw_free(struct snd_pcm_substream *substream,
562
struct snd_soc_dai *dai)
564
struct snd_soc_component *component = dai->component;
565
struct rt1308_sdw_priv *rt1308 =
566
snd_soc_component_get_drvdata(component);
567
struct sdw_stream_data *stream =
568
snd_soc_dai_get_dma_data(dai, substream);
570
if (!rt1308->sdw_slave)
573
sdw_stream_remove_slave(rt1308->sdw_slave, stream->sdw_stream);
578
* slave_ops: callbacks for get_clock_stop_mode, clock_stop and
579
* port_prep are not defined for now
581
static struct sdw_slave_ops rt1308_slave_ops = {
582
.read_prop = rt1308_read_prop,
583
.interrupt_callback = rt1308_interrupt_callback,
584
.update_status = rt1308_update_status,
585
.bus_config = rt1308_bus_config,
588
static const struct snd_soc_component_driver soc_component_sdw_rt1308 = {
589
.controls = rt1308_snd_controls,
590
.num_controls = ARRAY_SIZE(rt1308_snd_controls),
591
.dapm_widgets = rt1308_dapm_widgets,
592
.num_dapm_widgets = ARRAY_SIZE(rt1308_dapm_widgets),
593
.dapm_routes = rt1308_dapm_routes,
594
.num_dapm_routes = ARRAY_SIZE(rt1308_dapm_routes),
597
static const struct snd_soc_dai_ops rt1308_aif_dai_ops = {
598
.hw_params = rt1308_sdw_hw_params,
599
.hw_free = rt1308_sdw_pcm_hw_free,
600
.set_sdw_stream = rt1308_set_sdw_stream,
601
.shutdown = rt1308_sdw_shutdown,
604
#define RT1308_STEREO_RATES SNDRV_PCM_RATE_48000
605
#define RT1308_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
606
SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S16_LE | \
607
SNDRV_PCM_FMTBIT_S24_LE)
609
static struct snd_soc_dai_driver rt1308_sdw_dai[] = {
611
.name = "rt1308-aif",
613
.stream_name = "DP1 Playback",
616
.rates = RT1308_STEREO_RATES,
617
.formats = RT1308_FORMATS,
619
.ops = &rt1308_aif_dai_ops,
623
static int rt1308_sdw_init(struct device *dev, struct regmap *regmap,
624
struct sdw_slave *slave)
626
struct rt1308_sdw_priv *rt1308;
629
rt1308 = devm_kzalloc(dev, sizeof(*rt1308), GFP_KERNEL);
633
dev_set_drvdata(dev, rt1308);
634
rt1308->sdw_slave = slave;
635
rt1308->regmap = regmap;
638
* Mark hw_init to false
639
* HW init will be performed when device reports present
641
rt1308->hw_init = false;
642
rt1308->first_init = false;
644
ret = devm_snd_soc_register_component(dev,
645
&soc_component_sdw_rt1308,
647
ARRAY_SIZE(rt1308_sdw_dai));
649
dev_dbg(&slave->dev, "%s\n", __func__);
654
static int rt1308_sdw_probe(struct sdw_slave *slave,
655
const struct sdw_device_id *id)
657
struct regmap *regmap;
660
slave->ops = &rt1308_slave_ops;
662
/* Regmap Initialization */
663
regmap = devm_regmap_init_sdw(slave, &rt1308_sdw_regmap);
667
rt1308_sdw_init(&slave->dev, regmap, slave);
672
static const struct sdw_device_id rt1308_id[] = {
673
SDW_SLAVE_ENTRY(0x025d, 0x1308, 0),
676
MODULE_DEVICE_TABLE(sdw, rt1308_id);
678
static int rt1308_dev_suspend(struct device *dev)
680
struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(dev);
682
if (!rt1308->hw_init)
685
regcache_cache_only(rt1308->regmap, true);
690
#define RT1308_PROBE_TIMEOUT 2000
692
static int rt1308_dev_resume(struct device *dev)
694
struct sdw_slave *slave = to_sdw_slave_device(dev);
695
struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(dev);
698
if (!rt1308->hw_init)
701
if (!slave->unattach_request)
704
time = wait_for_completion_timeout(&slave->initialization_complete,
705
msecs_to_jiffies(RT1308_PROBE_TIMEOUT));
707
dev_err(&slave->dev, "Initialization not complete, timed out\n");
712
slave->unattach_request = 0;
713
regcache_cache_only(rt1308->regmap, false);
714
regcache_sync_region(rt1308->regmap, 0xc000, 0xcfff);
719
static const struct dev_pm_ops rt1308_pm = {
720
SET_SYSTEM_SLEEP_PM_OPS(rt1308_dev_suspend, rt1308_dev_resume)
721
SET_RUNTIME_PM_OPS(rt1308_dev_suspend, rt1308_dev_resume, NULL)
724
static struct sdw_driver rt1308_sdw_driver = {
727
.owner = THIS_MODULE,
730
.probe = rt1308_sdw_probe,
731
.ops = &rt1308_slave_ops,
732
.id_table = rt1308_id,
734
module_sdw_driver(rt1308_sdw_driver);
736
MODULE_DESCRIPTION("ASoC RT1308 driver SDW");
737
MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
738
MODULE_LICENSE("GPL v2");