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Viewing changes to buildroot/src/oem-audiosdw-lp1836324-0.6ubuntu1.2/soc/codecs/rt715.c

  • Committer: Hui Wang
  • Date: 2019-12-13 02:41:40 UTC
  • Revision ID: hui.wang@canonical.com-20191213024140-1cprdcbl3122fn85
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// SPDX-License-Identifier: GPL-2.0
2
 
/*
3
 
 * rt715.c -- rt715 ALSA SoC audio driver
4
 
 *
5
 
 * Copyright(c) 2019 Realtek Semiconductor Corp.
6
 
 *
7
 
 * ALC715 ASoC Codec Driver based Intel Dummy SdW codec driver
8
 
 *
9
 
 */
10
 
 
11
 
#include <linux/module.h>
12
 
#include <linux/moduleparam.h>
13
 
#include <linux/version.h>
14
 
#include <linux/kernel.h>
15
 
#include <linux/init.h>
16
 
#include <linux/delay.h>
17
 
#include <linux/i2c.h>
18
 
#include <linux/pm_runtime.h>
19
 
#include <linux/pm.h>
20
 
#include <dkms/linux/soundwire/sdw.h>
21
 
#include <linux/gpio.h>
22
 
#include <linux/regmap.h>
23
 
#include <linux/slab.h>
24
 
#include <linux/platform_device.h>
25
 
#include <linux/regulator/consumer.h>
26
 
#include <linux/gpio/consumer.h>
27
 
#include <linux/of.h>
28
 
#include <linux/of_gpio.h>
29
 
#include <linux/of_device.h>
30
 
#include <dkms/sound/core.h>
31
 
#include <dkms/sound/pcm.h>
32
 
#include <dkms/sound/pcm_params.h>
33
 
#include <dkms/sound/soc.h>
34
 
#include <dkms/sound/soc-dapm.h>
35
 
#include <dkms/sound/initval.h>
36
 
#include <dkms/sound/tlv.h>
37
 
#include <dkms/sound/hda_verbs.h>
38
 
 
39
 
#include "rt715.h"
40
 
 
41
 
static int rt715_index_write(struct regmap *regmap, unsigned int reg,
42
 
                unsigned int value)
43
 
{
44
 
        int ret;
45
 
        unsigned int addr = ((RT715_PRIV_INDEX_W_H) << 8) | reg;
46
 
 
47
 
        ret = regmap_write(regmap, addr, value);
48
 
        if (ret < 0) {
49
 
                pr_err("Failed to set private value: %08x <= %04x %d\n", ret,
50
 
                        addr, value);
51
 
        }
52
 
 
53
 
        return ret;
54
 
}
55
 
 
56
 
static void rt715_get_gain(struct rt715_priv *rt715, unsigned int addr_h,
57
 
                                unsigned int addr_l, unsigned int val_h,
58
 
                                unsigned int *r_val, unsigned int *l_val)
59
 
{
60
 
        int ret;
61
 
        /* R Channel */
62
 
        *r_val = (val_h << 8);
63
 
        ret = regmap_read(rt715->regmap, addr_l, r_val);
64
 
        if (ret < 0)
65
 
                pr_err("Failed to get R channel gain.\n");
66
 
 
67
 
        /* L Channel */
68
 
        val_h |= 0x20;
69
 
        *l_val = (val_h << 8);
70
 
        ret = regmap_read(rt715->regmap, addr_h, l_val);
71
 
        if (ret < 0)
72
 
                pr_err("Failed to get L channel gain.\n");
73
 
}
74
 
 
75
 
/* For Verb-Set Amplifier Gain (Verb ID = 3h) */
76
 
static int rt715_set_amp_gain_put(struct snd_kcontrol *kcontrol,
77
 
                                        struct snd_ctl_elem_value *ucontrol)
78
 
{
79
 
        struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
80
 
        struct snd_soc_dapm_context *dapm =
81
 
                snd_soc_component_get_dapm(component);
82
 
        struct soc_mixer_control *mc =
83
 
                (struct soc_mixer_control *)kcontrol->private_value;
84
 
        struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
85
 
        unsigned int addr_h, addr_l, val_h, val_ll, val_lr;
86
 
        unsigned int read_ll, read_rl;
87
 
        int i;
88
 
 
89
 
        /* Can't use update bit function, so read the original value first */
90
 
        addr_h = mc->reg;
91
 
        addr_l = mc->rreg;
92
 
        if (mc->shift == RT715_DIR_OUT_SFT) /* output */
93
 
                val_h = 0x80;
94
 
        else /* input */
95
 
                val_h = 0x0;
96
 
 
97
 
        rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
98
 
 
99
 
        /* L Channel */
100
 
        if (mc->invert) {
101
 
                /* for mute */
102
 
                val_ll = (mc->max - ucontrol->value.integer.value[0]) << 7;
103
 
                /* keep gain */
104
 
                read_ll = read_ll & 0x7f;
105
 
                val_ll |= read_ll;
106
 
        } else {
107
 
                /* for gain */
108
 
                val_ll = ((ucontrol->value.integer.value[0]) & 0x7f);
109
 
                if (val_ll > mc->max)
110
 
                        val_ll = mc->max;
111
 
                /* keep mute status */
112
 
                read_ll = read_ll & 0x80;
113
 
                val_ll |= read_ll;
114
 
        }
115
 
 
116
 
        /* R Channel */
117
 
        if (mc->invert) {
118
 
                regmap_write(rt715->regmap,
119
 
                             RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
120
 
                /* for mute */
121
 
                val_lr = (mc->max - ucontrol->value.integer.value[1]) << 7;
122
 
                /* keep gain */
123
 
                read_rl = read_rl & 0x7f;
124
 
                val_lr |= read_rl;
125
 
        } else {
126
 
                /* for gain */
127
 
                val_lr = ((ucontrol->value.integer.value[1]) & 0x7f);
128
 
                if (val_lr > mc->max)
129
 
                        val_lr = mc->max;
130
 
                /* keep mute status */
131
 
                read_rl = read_rl & 0x80;
132
 
                val_lr |= read_rl;
133
 
        }
134
 
 
135
 
        for (i = 0; i < 3; i++) { /* retry 3 times at most */
136
 
 
137
 
                if (val_ll == val_lr) {
138
 
                        /* Set both L/R channels at the same time */
139
 
                        val_h = (1 << mc->shift) | (3 << 4);
140
 
                        regmap_write(rt715->regmap, addr_h,
141
 
                                (val_h << 8 | val_ll));
142
 
                        regmap_write(rt715->regmap, addr_l,
143
 
                                (val_h << 8 | val_ll));
144
 
                } else {
145
 
                        /* Lch*/
146
 
                        val_h = (1 << mc->shift) | (1 << 5);
147
 
                        regmap_write(rt715->regmap, addr_h,
148
 
                                (val_h << 8 | val_ll));
149
 
                        /* Rch */
150
 
                        val_h = (1 << mc->shift) | (1 << 4);
151
 
                        regmap_write(rt715->regmap, addr_l,
152
 
                                (val_h << 8 | val_lr));
153
 
                }
154
 
                /* check result */
155
 
                if (mc->shift == RT715_DIR_OUT_SFT) /* output */
156
 
                        val_h = 0x80;
157
 
                else /* input */
158
 
                        val_h = 0x0;
159
 
 
160
 
                rt715_get_gain(rt715, addr_h, addr_l, val_h,
161
 
                               &read_rl, &read_ll);
162
 
                if (read_rl == val_lr && read_ll == val_ll)
163
 
                        break;
164
 
        }
165
 
        /* D0:power on state, D3: power saving mode */
166
 
        if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
167
 
                regmap_write(rt715->regmap,
168
 
                                RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
169
 
        return 0;
170
 
}
171
 
 
172
 
static int rt715_set_amp_gain_get(struct snd_kcontrol *kcontrol,
173
 
                                  struct snd_ctl_elem_value *ucontrol)
174
 
{
175
 
        struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
176
 
        struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
177
 
        struct soc_mixer_control *mc =
178
 
                (struct soc_mixer_control *)kcontrol->private_value;
179
 
        unsigned int addr_h, addr_l, val_h;
180
 
        unsigned int read_ll, read_rl;
181
 
 
182
 
        addr_h = mc->reg;
183
 
        addr_l = mc->rreg;
184
 
        if (mc->shift == RT715_DIR_OUT_SFT) /* output */
185
 
                val_h = 0x80;
186
 
        else /* input */
187
 
                val_h = 0x0;
188
 
 
189
 
        rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
190
 
 
191
 
        if (mc->invert) {
192
 
                /* for mute status */
193
 
                read_ll = !((read_ll & 0x80) >> RT715_MUTE_SFT);
194
 
                read_rl = !((read_rl & 0x80) >> RT715_MUTE_SFT);
195
 
        } else {
196
 
                /* for gain */
197
 
                read_ll = read_ll & 0x7f;
198
 
                read_rl = read_rl & 0x7f;
199
 
        }
200
 
        ucontrol->value.integer.value[0] = read_ll;
201
 
        ucontrol->value.integer.value[1] = read_rl;
202
 
 
203
 
        return 0;
204
 
}
205
 
 
206
 
static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6525, 75, 0);
207
 
static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
208
 
static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
209
 
 
210
 
#define SOC_DOUBLE_R_EXT(xname, reg_left, reg_right, xshift, xmax, xinvert,\
211
 
         xhandler_get, xhandler_put) \
212
 
{       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
213
 
        .info = snd_soc_info_volsw, \
214
 
        .get = xhandler_get, .put = xhandler_put, \
215
 
        .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
216
 
                                            xmax, xinvert) }
217
 
 
218
 
static const struct snd_kcontrol_new rt715_snd_controls[] = {
219
 
        /* Capture switch */
220
 
        SOC_DOUBLE_R_EXT("ADC 07 Capture Switch", RT715_SET_GAIN_MIC_ADC_H,
221
 
                        RT715_SET_GAIN_MIC_ADC_L, RT715_DIR_IN_SFT, 1, 1,
222
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put),
223
 
        SOC_DOUBLE_R_EXT("ADC 08 Capture Switch", RT715_SET_GAIN_LINE_ADC_H,
224
 
                        RT715_SET_GAIN_LINE_ADC_L, RT715_DIR_IN_SFT, 1, 1,
225
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put),
226
 
        SOC_DOUBLE_R_EXT("ADC 09 Capture Switch", RT715_SET_GAIN_MIX_ADC_H,
227
 
                        RT715_SET_GAIN_MIX_ADC_L, RT715_DIR_IN_SFT, 1, 1,
228
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put),
229
 
        SOC_DOUBLE_R_EXT("ADC 27 Capture Switch", RT715_SET_GAIN_MIX_ADC2_H,
230
 
                        RT715_SET_GAIN_MIX_ADC2_L, RT715_DIR_IN_SFT, 1, 1,
231
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put),
232
 
        /* Volume Control */
233
 
        SOC_DOUBLE_R_EXT_TLV("ADC 07 Capture Volume", RT715_SET_GAIN_MIC_ADC_H,
234
 
                        RT715_SET_GAIN_MIC_ADC_L, RT715_DIR_IN_SFT, 0x3f, 0,
235
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put,
236
 
                        in_vol_tlv),
237
 
        SOC_DOUBLE_R_EXT_TLV("ADC 08 Capture Volume", RT715_SET_GAIN_LINE_ADC_H,
238
 
                        RT715_SET_GAIN_LINE_ADC_L, RT715_DIR_IN_SFT, 0x3f, 0,
239
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put,
240
 
                        in_vol_tlv),
241
 
        SOC_DOUBLE_R_EXT_TLV("ADC 09 Capture Volume", RT715_SET_GAIN_MIX_ADC_H,
242
 
                        RT715_SET_GAIN_MIX_ADC_L, RT715_DIR_IN_SFT, 0x3f, 0,
243
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put,
244
 
                        in_vol_tlv),
245
 
        SOC_DOUBLE_R_EXT_TLV("ADC 27 Capture Volume", RT715_SET_GAIN_MIX_ADC2_H,
246
 
                        RT715_SET_GAIN_MIX_ADC2_L, RT715_DIR_IN_SFT, 0x3f, 0,
247
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put,
248
 
                        in_vol_tlv),
249
 
        /* MIC Boost Control */
250
 
        SOC_DOUBLE_R_EXT_TLV("DMIC1 Boost", RT715_SET_GAIN_DMIC1_H,
251
 
                        RT715_SET_GAIN_DMIC1_L, RT715_DIR_IN_SFT, 3, 0,
252
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put,
253
 
                        mic_vol_tlv),
254
 
        SOC_DOUBLE_R_EXT_TLV("DMIC2 Boost", RT715_SET_GAIN_DMIC2_H,
255
 
                        RT715_SET_GAIN_DMIC2_L, RT715_DIR_IN_SFT, 3, 0,
256
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put,
257
 
                        mic_vol_tlv),
258
 
        SOC_DOUBLE_R_EXT_TLV("DMIC3 Boost", RT715_SET_GAIN_DMIC3_H,
259
 
                        RT715_SET_GAIN_DMIC3_L, RT715_DIR_IN_SFT, 3, 0,
260
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put,
261
 
                        mic_vol_tlv),
262
 
        SOC_DOUBLE_R_EXT_TLV("DMIC4 Boost", RT715_SET_GAIN_DMIC4_H,
263
 
                        RT715_SET_GAIN_DMIC4_L, RT715_DIR_IN_SFT, 3, 0,
264
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put,
265
 
                        mic_vol_tlv),
266
 
        SOC_DOUBLE_R_EXT_TLV("MIC1 Boost", RT715_SET_GAIN_MIC1_H,
267
 
                        RT715_SET_GAIN_MIC1_L, RT715_DIR_IN_SFT, 3, 0,
268
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put,
269
 
                        mic_vol_tlv),
270
 
        SOC_DOUBLE_R_EXT_TLV("MIC2 Boost", RT715_SET_GAIN_MIC2_H,
271
 
                        RT715_SET_GAIN_MIC2_L, RT715_DIR_IN_SFT, 3, 0,
272
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put,
273
 
                        mic_vol_tlv),
274
 
        SOC_DOUBLE_R_EXT_TLV("LINE1 Boost", RT715_SET_GAIN_LINE1_H,
275
 
                        RT715_SET_GAIN_LINE1_L, RT715_DIR_IN_SFT, 3, 0,
276
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put,
277
 
                        mic_vol_tlv),
278
 
        SOC_DOUBLE_R_EXT_TLV("LINE2 Boost", RT715_SET_GAIN_LINE2_H,
279
 
                        RT715_SET_GAIN_LINE2_L, RT715_DIR_IN_SFT, 3, 0,
280
 
                        rt715_set_amp_gain_get, rt715_set_amp_gain_put,
281
 
                        mic_vol_tlv),
282
 
};
283
 
 
284
 
static int rt715_mux_get(struct snd_kcontrol *kcontrol,
285
 
                        struct snd_ctl_elem_value *ucontrol)
286
 
{
287
 
        struct snd_soc_component *component =
288
 
                snd_soc_dapm_kcontrol_component(kcontrol);
289
 
        struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
290
 
        struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
291
 
        unsigned int reg, val;
292
 
        int ret;
293
 
 
294
 
        /* nid = e->reg, vid = 0xf01 */
295
 
        reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
296
 
        ret = regmap_read(rt715->regmap, reg, &val);
297
 
        if (ret < 0) {
298
 
                dev_err(component->dev, "%s: sdw read failed: %d\n",
299
 
                        __func__, ret);
300
 
                return ret;
301
 
        }
302
 
 
303
 
        /*
304
 
         * The first two indices of ADC Mux 24/25 are routed to the same
305
 
         * hardware source. ie, ADC Mux 24 0/1 will both connect to MIC2.
306
 
         * To have a unique set of inputs, we skip the index1 of the muxes.
307
 
         */
308
 
        if ((e->reg == RT715_MUX_IN3 || e->reg == RT715_MUX_IN4) && (val > 0))
309
 
                val -= 1;
310
 
        ucontrol->value.enumerated.item[0] = val;
311
 
 
312
 
        return 0;
313
 
}
314
 
 
315
 
static int rt715_mux_put(struct snd_kcontrol *kcontrol,
316
 
                        struct snd_ctl_elem_value *ucontrol)
317
 
{
318
 
        struct snd_soc_component *component =
319
 
                snd_soc_dapm_kcontrol_component(kcontrol);
320
 
        struct snd_soc_dapm_context *dapm =
321
 
                                snd_soc_dapm_kcontrol_dapm(kcontrol);
322
 
        struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
323
 
        struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
324
 
        unsigned int *item = ucontrol->value.enumerated.item;
325
 
        unsigned int val, val2 = 0, change, reg;
326
 
        int ret;
327
 
 
328
 
        if (item[0] >= e->items)
329
 
                return -EINVAL;
330
 
 
331
 
        /* Verb ID = 0x701h, nid = e->reg */
332
 
        val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
333
 
 
334
 
        reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
335
 
        ret = regmap_read(rt715->regmap, reg, &val2);
336
 
        if (ret < 0) {
337
 
                dev_err(component->dev, "%s: sdw read failed: %d\n",
338
 
                        __func__, ret);
339
 
                return ret;
340
 
        }
341
 
 
342
 
        if (val == val2)
343
 
                change = 0;
344
 
        else
345
 
                change = 1;
346
 
 
347
 
        if (change) {
348
 
                reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
349
 
                regmap_write(rt715->regmap, reg, val);
350
 
        }
351
 
 
352
 
        snd_soc_dapm_mux_update_power(dapm, kcontrol,
353
 
                                                item[0], e, NULL);
354
 
 
355
 
        return change;
356
 
}
357
 
 
358
 
static const char * const adc_22_23_mux_text[] = {
359
 
        "MIC1",
360
 
        "MIC2",
361
 
        "LINE1",
362
 
        "LINE2",
363
 
        "DMIC1",
364
 
        "DMIC2",
365
 
        "DMIC3",
366
 
        "DMIC4",
367
 
};
368
 
 
369
 
/**
370
 
 * Due to mux design for nid 24 (MUX_IN3)/25 (MUX_IN4), connection index 0 and
371
 
 * 1 will be connected to the same dmic source, therefore we skip index 1 to
372
 
 * avoid misunderstanding on usage of dapm routing.
373
 
 */
374
 
static const unsigned int rt715_adc_24_25_values[] = {
375
 
        0,
376
 
        2,
377
 
        3,
378
 
        4,
379
 
        5,
380
 
};
381
 
 
382
 
static const char * const adc_24_mux_text[] = {
383
 
        "MIC2",
384
 
        "DMIC1",
385
 
        "DMIC2",
386
 
        "DMIC3",
387
 
        "DMIC4",
388
 
};
389
 
 
390
 
static const char * const adc_25_mux_text[] = {
391
 
        "MIC1",
392
 
        "DMIC1",
393
 
        "DMIC2",
394
 
        "DMIC3",
395
 
        "DMIC4",
396
 
};
397
 
 
398
 
static SOC_ENUM_SINGLE_DECL(
399
 
        rt715_adc22_enum, RT715_MUX_IN1, 0, adc_22_23_mux_text);
400
 
 
401
 
static SOC_ENUM_SINGLE_DECL(
402
 
        rt715_adc23_enum, RT715_MUX_IN2, 0, adc_22_23_mux_text);
403
 
 
404
 
static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc24_enum,
405
 
        RT715_MUX_IN3, 0, 0xf,
406
 
        adc_24_mux_text, rt715_adc_24_25_values);
407
 
static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc25_enum,
408
 
        RT715_MUX_IN4, 0, 0xf,
409
 
        adc_25_mux_text, rt715_adc_24_25_values);
410
 
 
411
 
static const struct snd_kcontrol_new rt715_adc22_mux =
412
 
        SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt715_adc22_enum,
413
 
                        rt715_mux_get, rt715_mux_put);
414
 
 
415
 
static const struct snd_kcontrol_new rt715_adc23_mux =
416
 
        SOC_DAPM_ENUM_EXT("ADC 23 Mux", rt715_adc23_enum,
417
 
                        rt715_mux_get, rt715_mux_put);
418
 
 
419
 
static const struct snd_kcontrol_new rt715_adc24_mux =
420
 
        SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt715_adc24_enum,
421
 
                        rt715_mux_get, rt715_mux_put);
422
 
 
423
 
static const struct snd_kcontrol_new rt715_adc25_mux =
424
 
        SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt715_adc25_enum,
425
 
                        rt715_mux_get, rt715_mux_put);
426
 
 
427
 
static const struct snd_soc_dapm_widget rt715_dapm_widgets[] = {
428
 
        SND_SOC_DAPM_INPUT("DMIC1"),
429
 
        SND_SOC_DAPM_INPUT("DMIC2"),
430
 
        SND_SOC_DAPM_INPUT("DMIC3"),
431
 
        SND_SOC_DAPM_INPUT("DMIC4"),
432
 
        SND_SOC_DAPM_INPUT("MIC1"),
433
 
        SND_SOC_DAPM_INPUT("MIC2"),
434
 
        SND_SOC_DAPM_INPUT("LINE1"),
435
 
        SND_SOC_DAPM_INPUT("LINE2"),
436
 
        SND_SOC_DAPM_ADC("ADC 07", NULL, RT715_SET_STREAMID_MIC_ADC, 4, 0),
437
 
        SND_SOC_DAPM_ADC("ADC 08", NULL, RT715_SET_STREAMID_LINE_ADC, 4, 0),
438
 
        SND_SOC_DAPM_ADC("ADC 09", NULL, RT715_SET_STREAMID_MIX_ADC, 4, 0),
439
 
        SND_SOC_DAPM_ADC("ADC 27", NULL, RT715_SET_STREAMID_MIX_ADC2, 4, 0),
440
 
        SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
441
 
                &rt715_adc22_mux),
442
 
        SND_SOC_DAPM_MUX("ADC 23 Mux", SND_SOC_NOPM, 0, 0,
443
 
                &rt715_adc23_mux),
444
 
        SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
445
 
                &rt715_adc24_mux),
446
 
        SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
447
 
                &rt715_adc25_mux),
448
 
        SND_SOC_DAPM_AIF_OUT("DP4TX", "DP4 Capture", 0, SND_SOC_NOPM, 0, 0),
449
 
        SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 Capture", 0, SND_SOC_NOPM, 0, 0),
450
 
};
451
 
 
452
 
static const struct snd_soc_dapm_route rt715_audio_map[] = {
453
 
        {"DP6TX", NULL, "ADC 09"},
454
 
        {"DP6TX", NULL, "ADC 08"},
455
 
        {"DP4TX", NULL, "ADC 07"},
456
 
        {"DP4TX", NULL, "ADC 27"},
457
 
        {"ADC 09", NULL, "ADC 22 Mux"},
458
 
        {"ADC 08", NULL, "ADC 23 Mux"},
459
 
        {"ADC 07", NULL, "ADC 24 Mux"},
460
 
        {"ADC 27", NULL, "ADC 25 Mux"},
461
 
        {"ADC 22 Mux", "MIC1", "MIC1"},
462
 
        {"ADC 22 Mux", "MIC2", "MIC2"},
463
 
        {"ADC 22 Mux", "LINE1", "LINE1"},
464
 
        {"ADC 22 Mux", "LINE2", "LINE2"},
465
 
        {"ADC 22 Mux", "DMIC1", "DMIC1"},
466
 
        {"ADC 22 Mux", "DMIC2", "DMIC2"},
467
 
        {"ADC 22 Mux", "DMIC3", "DMIC3"},
468
 
        {"ADC 22 Mux", "DMIC4", "DMIC4"},
469
 
        {"ADC 23 Mux", "MIC1", "MIC1"},
470
 
        {"ADC 23 Mux", "MIC2", "MIC2"},
471
 
        {"ADC 23 Mux", "LINE1", "LINE1"},
472
 
        {"ADC 23 Mux", "LINE2", "LINE2"},
473
 
        {"ADC 23 Mux", "DMIC1", "DMIC1"},
474
 
        {"ADC 23 Mux", "DMIC2", "DMIC2"},
475
 
        {"ADC 23 Mux", "DMIC3", "DMIC3"},
476
 
        {"ADC 23 Mux", "DMIC4", "DMIC4"},
477
 
        {"ADC 24 Mux", "MIC2", "MIC2"},
478
 
        {"ADC 24 Mux", "DMIC1", "DMIC1"},
479
 
        {"ADC 24 Mux", "DMIC2", "DMIC2"},
480
 
        {"ADC 24 Mux", "DMIC3", "DMIC3"},
481
 
        {"ADC 24 Mux", "DMIC4", "DMIC4"},
482
 
        {"ADC 25 Mux", "MIC1", "MIC1"},
483
 
        {"ADC 25 Mux", "DMIC1", "DMIC1"},
484
 
        {"ADC 25 Mux", "DMIC2", "DMIC2"},
485
 
        {"ADC 25 Mux", "DMIC3", "DMIC3"},
486
 
        {"ADC 25 Mux", "DMIC4", "DMIC4"},
487
 
};
488
 
 
489
 
static int rt715_set_bias_level(struct snd_soc_component *component,
490
 
                                enum snd_soc_bias_level level)
491
 
{
492
 
        struct snd_soc_dapm_context *dapm =
493
 
                snd_soc_component_get_dapm(component);
494
 
        struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
495
 
 
496
 
        switch (level) {
497
 
        case SND_SOC_BIAS_PREPARE:
498
 
                if (dapm->bias_level == SND_SOC_BIAS_STANDBY) {
499
 
                        regmap_write(rt715->regmap,
500
 
                                                RT715_SET_AUDIO_POWER_STATE,
501
 
                                                AC_PWRST_D0);
502
 
                }
503
 
                break;
504
 
 
505
 
        case SND_SOC_BIAS_STANDBY:
506
 
                regmap_write(rt715->regmap,
507
 
                                        RT715_SET_AUDIO_POWER_STATE,
508
 
                                        AC_PWRST_D3);
509
 
                break;
510
 
 
511
 
        default:
512
 
                break;
513
 
        }
514
 
        dapm->bias_level = level;
515
 
        return 0;
516
 
}
517
 
 
518
 
static const struct snd_soc_component_driver soc_codec_dev_rt715 = {
519
 
        .set_bias_level = rt715_set_bias_level,
520
 
        .controls = rt715_snd_controls,
521
 
        .num_controls = ARRAY_SIZE(rt715_snd_controls),
522
 
        .dapm_widgets = rt715_dapm_widgets,
523
 
        .num_dapm_widgets = ARRAY_SIZE(rt715_dapm_widgets),
524
 
        .dapm_routes = rt715_audio_map,
525
 
        .num_dapm_routes = ARRAY_SIZE(rt715_audio_map),
526
 
};
527
 
 
528
 
static int rt715_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
529
 
                                int direction)
530
 
{
531
 
 
532
 
        struct sdw_stream_data *stream;
533
 
 
534
 
        stream = kzalloc(sizeof(*stream), GFP_KERNEL);
535
 
        if (!stream)
536
 
                return -ENOMEM;
537
 
 
538
 
        stream->sdw_stream = (struct sdw_stream_runtime *)sdw_stream;
539
 
 
540
 
        /* Use tx_mask or rx_mask to configure stream tag and set dma_data */
541
 
        if (direction == SNDRV_PCM_STREAM_PLAYBACK)
542
 
                dai->playback_dma_data = stream;
543
 
        else
544
 
                dai->capture_dma_data = stream;
545
 
 
546
 
        return 0;
547
 
}
548
 
 
549
 
static void rt715_shutdown(struct snd_pcm_substream *substream,
550
 
                                struct snd_soc_dai *dai)
551
 
 
552
 
{
553
 
        struct sdw_stream_data *stream;
554
 
 
555
 
        stream = snd_soc_dai_get_dma_data(dai, substream);
556
 
        snd_soc_dai_set_dma_data(dai, substream, NULL);
557
 
        kfree(stream);
558
 
}
559
 
 
560
 
static int rt715_pcm_hw_params(struct snd_pcm_substream *substream,
561
 
                                struct snd_pcm_hw_params *params,
562
 
                                struct snd_soc_dai *dai)
563
 
{
564
 
        struct snd_soc_component *component = dai->component;
565
 
        struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
566
 
        struct sdw_stream_config stream_config;
567
 
        struct sdw_port_config port_config;
568
 
        enum sdw_data_direction direction;
569
 
        struct sdw_stream_data *stream;
570
 
        int retval, port, num_channels;
571
 
        unsigned int val = 0;
572
 
 
573
 
        stream = snd_soc_dai_get_dma_data(dai, substream);
574
 
 
575
 
        if (!stream)
576
 
                return -EINVAL;
577
 
 
578
 
        if (!rt715->slave)
579
 
                return -EINVAL;
580
 
 
581
 
        switch (dai->id) {
582
 
        case RT715_AIF1:
583
 
                direction = SDW_DATA_DIR_TX;
584
 
                port = 6;
585
 
                rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa500);
586
 
                break;
587
 
        case RT715_AIF2:
588
 
                direction = SDW_DATA_DIR_TX;
589
 
                port = 4;
590
 
                rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa000);
591
 
                break;
592
 
        default:
593
 
                dev_err(component->dev, "Invalid DAI id %d\n", dai->id);
594
 
                return -EINVAL;
595
 
        }
596
 
 
597
 
        stream_config.frame_rate =  params_rate(params);
598
 
        stream_config.ch_count = params_channels(params);
599
 
        stream_config.bps = snd_pcm_format_width(params_format(params));
600
 
        stream_config.direction = direction;
601
 
 
602
 
        num_channels = params_channels(params);
603
 
        port_config.ch_mask = (1 << (num_channels)) - 1;
604
 
        port_config.num = port;
605
 
 
606
 
        retval = sdw_stream_add_slave(rt715->slave, &stream_config,
607
 
                                        &port_config, 1, stream->sdw_stream);
608
 
        if (retval) {
609
 
                dev_err(dai->dev, "Unable to configure port\n");
610
 
                return retval;
611
 
        }
612
 
 
613
 
        switch (params_rate(params)) {
614
 
        /* bit 14 0:48K 1:44.1K */
615
 
        /* bit 15 Stream Type 0:PCM 1:Non-PCM, should always be PCM */
616
 
        case 44100:
617
 
                val |= 0x40 << 8;
618
 
                break;
619
 
        case 48000:
620
 
                val |= 0x0 << 8;
621
 
                break;
622
 
        default:
623
 
                dev_err(component->dev, "Unsupported sample rate %d\n",
624
 
                        params_rate(params));
625
 
                return -EINVAL;
626
 
        }
627
 
 
628
 
        if (params_channels(params) <= 16) {
629
 
                /* bit 3:0 Number of Channel */
630
 
                val |= (params_channels(params) - 1);
631
 
        } else {
632
 
                dev_err(component->dev, "Unsupported channels %d\n",
633
 
                        params_channels(params));
634
 
                return -EINVAL;
635
 
        }
636
 
 
637
 
        switch (params_width(params)) {
638
 
        /* bit 6:4 Bits per Sample */
639
 
        case 8:
640
 
                break;
641
 
        case 16:
642
 
                val |= (0x1 << 4);
643
 
                break;
644
 
        case 20:
645
 
                val |= (0x2 << 4);
646
 
                break;
647
 
        case 24:
648
 
                val |= (0x3 << 4);
649
 
                break;
650
 
        case 32:
651
 
                val |= (0x4 << 4);
652
 
                break;
653
 
        default:
654
 
                return -EINVAL;
655
 
        }
656
 
 
657
 
        regmap_write(rt715->regmap, RT715_MIC_ADC_FORMAT_H, val);
658
 
        regmap_write(rt715->regmap, RT715_MIC_LINE_FORMAT_H, val);
659
 
        regmap_write(rt715->regmap, RT715_MIX_ADC_FORMAT_H, val);
660
 
        regmap_write(rt715->regmap, RT715_MIX_ADC2_FORMAT_H, val);
661
 
 
662
 
        return retval;
663
 
}
664
 
 
665
 
static int rt715_pcm_hw_free(struct snd_pcm_substream *substream,
666
 
                                struct snd_soc_dai *dai)
667
 
{
668
 
        struct snd_soc_component *component = dai->component;
669
 
        struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
670
 
        struct sdw_stream_data *stream =
671
 
                snd_soc_dai_get_dma_data(dai, substream);
672
 
 
673
 
        if (!rt715->slave)
674
 
                return -EINVAL;
675
 
 
676
 
        sdw_stream_remove_slave(rt715->slave, stream->sdw_stream);
677
 
        return 0;
678
 
}
679
 
 
680
 
#define RT715_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
681
 
#define RT715_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
682
 
                        SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
683
 
 
684
 
static struct snd_soc_dai_ops rt715_ops = {
685
 
        .hw_params      = rt715_pcm_hw_params,
686
 
        .hw_free        = rt715_pcm_hw_free,
687
 
        .set_sdw_stream = rt715_set_sdw_stream,
688
 
        .shutdown       = rt715_shutdown,
689
 
};
690
 
 
691
 
static struct snd_soc_dai_driver rt715_dai[] = {
692
 
        {
693
 
                .name = "rt715-aif1",
694
 
                .id = RT715_AIF1,
695
 
                .capture = {
696
 
                        .stream_name = "DP6 Capture",
697
 
                        .channels_min = 1,
698
 
                        .channels_max = 2,
699
 
                        .rates = RT715_STEREO_RATES,
700
 
                        .formats = RT715_FORMATS,
701
 
                },
702
 
                .ops = &rt715_ops,
703
 
        },
704
 
        {
705
 
                .name = "rt715-aif2",
706
 
                .id = RT715_AIF2,
707
 
                .capture = {
708
 
                        .stream_name = "DP4 Capture",
709
 
                        .channels_min = 1,
710
 
                        .channels_max = 2,
711
 
                        .rates = RT715_STEREO_RATES,
712
 
                        .formats = RT715_FORMATS,
713
 
                },
714
 
                .ops = &rt715_ops,
715
 
        },
716
 
};
717
 
 
718
 
/* Bus clock frequency */
719
 
#define RT715_CLK_FREQ_9600000HZ 9600000
720
 
#define RT715_CLK_FREQ_12000000HZ 12000000
721
 
#define RT715_CLK_FREQ_6000000HZ 6000000
722
 
#define RT715_CLK_FREQ_4800000HZ 4800000
723
 
#define RT715_CLK_FREQ_2400000HZ 2400000
724
 
#define RT715_CLK_FREQ_12288000HZ 12288000
725
 
 
726
 
int rt715_clock_config(struct device *dev)
727
 
{
728
 
        struct rt715_priv *rt715 = dev_get_drvdata(dev);
729
 
        unsigned int clk_freq, value;
730
 
 
731
 
        clk_freq = (rt715->params.curr_dr_freq >> 1);
732
 
 
733
 
        switch (clk_freq) {
734
 
        case RT715_CLK_FREQ_12000000HZ:
735
 
                value = 0x0;
736
 
                break;
737
 
        case RT715_CLK_FREQ_6000000HZ:
738
 
                value = 0x1;
739
 
                break;
740
 
        case RT715_CLK_FREQ_9600000HZ:
741
 
                value = 0x2;
742
 
                break;
743
 
        case RT715_CLK_FREQ_4800000HZ:
744
 
                value = 0x3;
745
 
                break;
746
 
        case RT715_CLK_FREQ_2400000HZ:
747
 
                value = 0x4;
748
 
                break;
749
 
        case RT715_CLK_FREQ_12288000HZ:
750
 
                value = 0x5;
751
 
                break;
752
 
        default:
753
 
                return -EINVAL;
754
 
        }
755
 
 
756
 
        regmap_write(rt715->regmap, 0xe0, value);
757
 
        regmap_write(rt715->regmap, 0xf0, value);
758
 
 
759
 
        return 0;
760
 
}
761
 
 
762
 
int rt715_init(struct device *dev, struct regmap *sdw_regmap,
763
 
        struct regmap *regmap, struct sdw_slave *slave)
764
 
{
765
 
        struct rt715_priv *rt715;
766
 
        int ret;
767
 
 
768
 
        rt715 = devm_kzalloc(dev, sizeof(*rt715), GFP_KERNEL);
769
 
        if (!rt715)
770
 
                return -ENOMEM;
771
 
 
772
 
        dev_set_drvdata(dev, rt715);
773
 
        rt715->slave = slave;
774
 
        rt715->regmap = regmap;
775
 
        rt715->sdw_regmap = sdw_regmap;
776
 
 
777
 
        /*
778
 
         * Mark hw_init to false
779
 
         * HW init will be performed when device reports present
780
 
         */
781
 
        rt715->hw_init = false;
782
 
        rt715->first_init = false;
783
 
 
784
 
        ret = devm_snd_soc_register_component(dev,
785
 
                                                &soc_codec_dev_rt715,
786
 
                                                rt715_dai,
787
 
                                                ARRAY_SIZE(rt715_dai));
788
 
 
789
 
        return ret;
790
 
}
791
 
 
792
 
int rt715_io_init(struct device *dev, struct sdw_slave *slave)
793
 
{
794
 
        struct rt715_priv *rt715 = dev_get_drvdata(dev);
795
 
 
796
 
        if (rt715->hw_init)
797
 
                return 0;
798
 
 
799
 
        /*
800
 
         * PM runtime is only enabled when a Slave reports as Attached
801
 
         */
802
 
        if (!rt715->first_init) {
803
 
                /* set autosuspend parameters */
804
 
                pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
805
 
                pm_runtime_use_autosuspend(&slave->dev);
806
 
 
807
 
                /* update count of parent 'active' children */
808
 
                pm_runtime_set_active(&slave->dev);
809
 
 
810
 
                /* make sure the device does not suspend immediately */
811
 
                pm_runtime_mark_last_busy(&slave->dev);
812
 
 
813
 
                pm_runtime_enable(&slave->dev);
814
 
 
815
 
                rt715->first_init = true;
816
 
        }
817
 
 
818
 
        pm_runtime_get_noresume(&slave->dev);
819
 
 
820
 
        /* Mute nid=08h/09h */
821
 
        regmap_write(rt715->regmap, RT715_SET_GAIN_LINE_ADC_H, 0xb080);
822
 
        regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC_H, 0xb080);
823
 
        /* Mute nid=07h/27h */
824
 
        regmap_write(rt715->regmap, RT715_SET_GAIN_MIC_ADC_H, 0xb080);
825
 
        regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC2_H, 0xb080);
826
 
 
827
 
        /* Set Pin Widget */
828
 
        regmap_write(rt715->regmap, RT715_SET_PIN_DMIC1, 0x20);
829
 
        regmap_write(rt715->regmap, RT715_SET_PIN_DMIC2, 0x20);
830
 
        regmap_write(rt715->regmap, RT715_SET_PIN_DMIC3, 0x20);
831
 
        regmap_write(rt715->regmap, RT715_SET_PIN_DMIC4, 0x20);
832
 
        /* Set Converter Stream */
833
 
        regmap_write(rt715->regmap, RT715_SET_STREAMID_LINE_ADC, 0x10);
834
 
        regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC, 0x10);
835
 
        regmap_write(rt715->regmap, RT715_SET_STREAMID_MIC_ADC, 0x10);
836
 
        regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC2, 0x10);
837
 
        /* Set Configuration Default */
838
 
        regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT1, 0xd0);
839
 
        regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT2, 0x11);
840
 
        regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT3, 0xa1);
841
 
        regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT4, 0x81);
842
 
        regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT1, 0xd1);
843
 
        regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT2, 0x11);
844
 
        regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT3, 0xa1);
845
 
        regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT4, 0x81);
846
 
        regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT1, 0xd0);
847
 
        regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT2, 0x11);
848
 
        regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT3, 0xa1);
849
 
        regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT4, 0x81);
850
 
        regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT1, 0xd1);
851
 
        regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT2, 0x11);
852
 
        regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT3, 0xa1);
853
 
        regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT4, 0x81);
854
 
 
855
 
        /* Finish Initial Settings, set power to D3 */
856
 
        regmap_write(rt715->regmap, RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
857
 
 
858
 
        /* Mark Slave initialization complete */
859
 
        rt715->hw_init = true;
860
 
 
861
 
        pm_runtime_mark_last_busy(&slave->dev);
862
 
        pm_runtime_put_autosuspend(&slave->dev);
863
 
 
864
 
        return 0;
865
 
}
866
 
 
867
 
MODULE_DESCRIPTION("ASoC rt715 driver");
868
 
MODULE_DESCRIPTION("ASoC rt715 driver SDW");
869
 
MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
870
 
MODULE_LICENSE("GPL v2");