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// Emisar 2-channel generic w/ tint ramping + DD FET
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// Copyright (C) 2021-2023 Selene ToyKeeper
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// SPDX-License-Identifier: GPL-3.0-or-later
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* Pin / Name / Function
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* 1 PA6 ch2 LED PWM (linear) (PWM1B)
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* 2 PA5 R: red aux LED (PWM0B)
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* 3 PA4 G: green aux LED
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* 4 PA3 B: blue aux LED
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* 6 PA1 Opamp 2 enable (channel 2 LEDs)
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* 7 PA0 Opamp 1 enable (channel 1 LEDs)
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* 15 PC0 ch1 LED PWM (FET) (PWM0A, 8-bit)
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* 16 PB3 ch1 LED PWM (linear) (PWM1A)
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* 18 PB1 MOSI / battery voltage (ADC6)
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* 20 PA7 e-switch (PCINT7)
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* ADC12 thermal sensor
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* Both sets of LEDs use one pin to turn the Opamp on/off,
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* and one pin to control the Opamp power level.
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* The first channel also has a direct-drive FET for turbo.
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#define HWDEF_C_FILE hwdef-emisar-2ch-fet.c
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// allow using aux LEDs as extra channel modes
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#include "chan-rgbaux.h"
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// * 0. channel 1 only (linear + DD FET)
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// * 1. channel 2 only (linear)
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// * 2. both channels, tied together, max "200%" power + DD FET at top of ramp
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// * 3. both channels, manual blend, max "100%" power + "200%" and DD FET at top of ramp
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// * 4. both channels, auto blend, reversible (linear only)
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#define NUM_CHANNEL_MODES (5 + NUM_RGB_AUX_CHANNEL_MODES)
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enum channel_modes_e {
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// right-most bit first, modes are in fedcba9876543210 order
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#define CHANNEL_MODES_ENABLED 0b0000000000011111
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#define USE_CHANNEL_MODE_ARGS
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// _, _, _, 128=middle CCT, 0=warm-to-cool
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#define CHANNEL_MODE_ARGS 0,0,0,128,0,RGB_AUX_CM_ARGS
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// can use some of the common handlers
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#define USE_CALC_2CH_BLEND
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#define PWM_CHANNELS 3 // old, remove this
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#define PWM_BITS 16 // 0 to 16383 at variable Hz, not 0 to 255 at 16 kHz
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#define PWM_GET PWM_GET8
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#define PWM_DATATYPE uint16_t
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#define PWM_DATATYPE2 uint16_t // only needs 32-bit if ramp values go over 255
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#define PWM1_DATATYPE uint8_t // linear part of linear+FET ramp
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#define PWM2_DATATYPE uint8_t // DD FET part of linear+FET ramp
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#define PWM3_DATATYPE uint16_t // linear+FET ramp tops
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#define PWM4_DATATYPE uint8_t // linear-only ramp
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#define PWM5_DATATYPE uint16_t // linear-only ramp tops
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// PWM parameters of both channels are tied together because they share a counter
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#define PWM_TOP ICR1 // holds the TOP value for for variable-resolution PWM
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#define PWM_TOP_INIT 255 // highest value used in top half of ramp
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#define PWM_CNT TCNT1 // for dynamic PWM, reset phase
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#define CH1_PIN PB3 // pin 16, Opamp reference
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#define CH1_PWM OCR1A // OCR1A is the output compare register for PB3
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#define CH1_ENABLE_PIN PA0 // pin 7, Opamp power
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#define CH1_ENABLE_PORT PORTA // control port for PA0
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#define CH2_PIN PA6 // pin 1, 2nd LED Opamp reference
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#define CH2_PWM OCR1B // OCR1B is the output compare register for PA6
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#define CH2_ENABLE_PIN PA1 // pin 6, Opamp power
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#define CH2_ENABLE_PORT PORTA // control port for PA1
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#define CH3_PIN PC0 // pin 15, DD FET PWM
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#define CH3_PWM OCR0A // OCR0A is the output compare register for PC0
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#define SWITCH_PIN PA7 // pin 20
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#define SWITCH_PCINT PCINT7 // pin 20 pin change interrupt
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#define SWITCH_PCIE PCIE0 // PCIE1 is for PCINT[7:0]
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#define SWITCH_PCMSK PCMSK0 // PCMSK1 is for PCINT[7:0]
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#define SWITCH_PORT PINA // PINA or PINB or PINC
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#define SWITCH_PUE PUEA // pullup group A
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#define PCINT_vect PCINT0_vect // ISR for PCINT[7:0]
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#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened
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#define VOLTAGE_PIN PB1 // Pin 18 / PB1 / ADC6
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// pin to ADC mappings are in DS table 19-4
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#define VOLTAGE_ADC ADC6D // digital input disable pin for PB1
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// DIDR0/DIDR1 mappings are in DS section 19.13.5, 19.13.6
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#define VOLTAGE_ADC_DIDR DIDR1 // DIDR channel for ADC6D
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// DS tables 19-3, 19-4
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// Bit 7 6 5 4 3 2 1 0
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// REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0
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// MUX[3:0] = 0, 1, 1, 0 for ADC6 / PB1
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// REFS[1:0] = 1, 0 for internal 1.1V reference
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// other bits reserved
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#define ADMUX_VOLTAGE_DIVIDER 0b10000110
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#define ADC_PRSCL 0x07 // clk/128
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// Raw ADC readings at 4.4V and 2.2V
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// calibrate the voltage readout here
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// estimated / calculated values are:
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// (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1)
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// D1, R1, R2 = 0, 330, 100
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//#define ADC_44 981 // raw value at 4.40V
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#define ADC_44 967 // manually tweaked so 4.16V will blink out 4.2
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//#define ADC_22 489 // raw value at 2.20V
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#define ADC_22 482 // manually tweaked so 4.16V will blink out 4.2
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// this light has aux LEDs under the optic
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#define AUXLED_R_PIN PA5 // pin 2
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#define AUXLED_G_PIN PA4 // pin 3
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#define AUXLED_B_PIN PA3 // pin 4
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#define AUXLED_RGB_PORT PORTA // PORTA or PORTB or PORTC
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#define AUXLED_RGB_DDR DDRA // DDRA or DDRB or DDRC
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#define AUXLED_RGB_PUE PUEA // PUEA or PUEB or PUEC
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#define BUTTON_LED_PIN PA2 // pin 5
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#define BUTTON_LED_PORT PORTA // for all "PA" pins
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#define BUTTON_LED_DDR DDRA // for all "PA" pins
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#define BUTTON_LED_PUE PUEA // for all "PA" pins
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inline void hwdef_setup() {
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// enable output ports
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DDRC = (1 << CH3_PIN);
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DDRB = (1 << CH1_PIN);
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DDRA = (1 << CH2_PIN)
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| (1 << AUXLED_R_PIN)
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| (1 << AUXLED_G_PIN)
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| (1 << AUXLED_B_PIN)
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| (1 << BUTTON_LED_PIN)
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| (1 << CH1_ENABLE_PIN)
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| (1 << CH2_ENABLE_PIN)
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// Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
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// pre-scale for timer: N = 1
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// Linear opamp PWM for both main and 2nd LEDs (10-bit)
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// WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5)
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// CS1[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 12-6)
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// COM1A[1:0]: 1,0: PWM OC1A in the normal direction (DS table 12-4)
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// COM1B[1:0]: 1,0: PWM OC1B in the normal direction (DS table 12-4)
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TCCR1A = (1<<WGM11) | (0<<WGM10) // adjustable PWM (TOP=ICR1) (DS table 12-5)
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| (1<<COM1A1) | (0<<COM1A0) // PWM 1A in normal direction (DS table 12-4)
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| (1<<COM1B1) | (0<<COM1B0) // PWM 1B in normal direction (DS table 12-4)
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TCCR1B = (0<<CS12) | (0<<CS11) | (1<<CS10) // clk/1 (no prescaling) (DS table 12-6)
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| (1<<WGM13) | (0<<WGM12) // phase-correct adjustable PWM (DS table 12-5)
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// FET PWM (8-bit; this channel can't do 10-bit)
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// WGM0[2:0]: 0,0,1: PWM, Phase Correct, 8-bit (DS table 11-8)
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// CS0[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 11-9)
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// COM0A[1:0]: 1,0: PWM OC0A in the normal direction (DS table 11-4)
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// COM0B[1:0]: 1,0: PWM OC0B in the normal direction (DS table 11-7)
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TCCR0A = (0<<WGM01) | (1<<WGM00) // 8-bit (TOP=0xFF) (DS table 11-8)
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| (1<<COM0A1) | (0<<COM0A0) // PWM 0A in normal direction (DS table 11-4)
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//| (1<<COM0B1) | (0<<COM0B0) // PWM 0B in normal direction (DS table 11-7)
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TCCR0B = (0<<CS02) | (0<<CS01) | (1<<CS00) // clk/1 (no prescaling) (DS table 11-9)
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| (0<<WGM02) // phase-correct PWM (DS table 11-8)
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// set PWM resolution
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PWM_TOP = PWM_TOP_INIT;
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SWITCH_PUE = (1 << SWITCH_PIN); // pull-up for e-switch
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SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt
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#define LAYOUT_DEFINED
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ToyKeeper/hwdef-emisar-2ch-fet.h
