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#ifndef HWDEF_NOCTIGON_K1_H
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#define HWDEF_NOCTIGON_K1_H
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// Noctigon K1 driver layout (attiny1634)
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// Copyright (C) 2019-2023 Selene ToyKeeper
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// SPDX-License-Identifier: GPL-3.0-or-later
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/* Noctigon K1 driver layout (attiny1634)
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* (originally known as Emisar D1S V2)
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* Pin / Name / Function
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* not to change brightness.
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#define ATTINY 1634
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#include <avr/io.h>
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#define PWM_CHANNELS 1
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#define PWM_BITS 10 // 0 to 1023 at 4 kHz, not 0 to 255 at 16 kHz
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#define HWDEF_C_FILE hwdef-noctigon-k1.c
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// allow using aux LEDs as extra channel modes
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#include "chan-rgbaux.h"
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#define NUM_CHANNEL_MODES (1 + NUM_RGB_AUX_CHANNEL_MODES)
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#define DEFAULT_CHANNEL_MODE CM_MAIN
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// right-most bit first, modes are in fedcba9876543210 order
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#define CHANNEL_MODES_ENABLED 0b0000000000000001
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//#define USE_CHANNEL_MODE_ARGS
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//#define CHANNEL_MODE_ARGS 0,0,0,0,0,0,0,0
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#define PWM_CHANNELS 1 // old, remove this
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#define PWM_BITS 10 // 0 to 1023 at 4 kHz, not 0 to 255 at 16 kHz
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#define PWM_GET PWM_GET16
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#define PWM_DATATYPE uint16_t // is used for PWM_TOPS (which goes way over 255)
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#define PWM_DATATYPE2 uint32_t // only needs 32-bit if ramp values go over 255
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#define PWM1_DATATYPE uint16_t // linear ramp
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#define PWM_TOP ICR1 // holds the TOP value for variable-resolution PWM
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#define PWM_TOP_INIT 1023 // highest value used in top half of ramp
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#define PWM_CNT TCNT1 // for dynamic PWM, reset phase
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#define CH1_PIN PB3 // pin 16, Opamp reference
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#define CH1_PWM OCR1A // OCR1A is the output compare register for PB3
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#define CH1_ENABLE_PIN PB0 // pin 19, Opamp power
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#define CH1_ENABLE_PORT PORTB // control port for PB0
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#define SWITCH_PIN PA7 // pin 20
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#define SWITCH_PCINT PCINT7 // pin 20 pin change interrupt
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#define SWITCH_PCIE PCIE0 // PCIE0 is for PCINT[7:0]
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#define SWITCH_PCMSK PCMSK0 // PCMSK0 is for PCINT[7:0]
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#define SWITCH_PORT PINA // PINA or PINB or PINC
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#define PWM1_PIN PB3 // pin 16, Opamp reference
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#define PWM1_LVL OCR1A // OCR1A is the output compare register for PB3
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#define LED_ENABLE_PIN PB0 // pin 19, Opamp power
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#define LED_ENABLE_PORT PORTB // control port for PB0
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#define SWITCH_PUE PUEA // pullup group A
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#define PCINT_vect PCINT0_vect // ISR for PCINT[7:0]
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#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened
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// Raw ADC readings at 4.4V and 2.2V
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// calibrate the voltage readout here
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// estimated / calculated values are:
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// (voltage - D1) * (R2/(R2+R1) * 256 / 1.1)
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// (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1)
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// D1, R1, R2 = 0, 330, 100
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//#define ADC_44 981 // raw value at 4.40V
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#define AUXLED_RGB_DDR DDRA // DDRA or DDRB or DDRC
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#define AUXLED_RGB_PUE PUEA // PUEA or PUEB or PUEC
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// with so many pins, doing this all with #ifdefs gets awkward...
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// ... so just hardcode it in each hwdef file instead
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inline void hwdef_setup() {
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// enable output ports
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// Opamp level and Opamp on/off
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DDRB = (1 << PWM1_PIN)
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| (1 << LED_ENABLE_PIN);
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DDRA = (1 << AUXLED_R_PIN)
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| (1 << AUXLED_G_PIN)
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| (1 << AUXLED_B_PIN)
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// Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
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// pre-scale for timer: N = 1
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// WGM1[3:0]: 0,0,1,1: PWM, Phase Correct, 10-bit (DS table 12-5)
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// CS1[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 12-6)
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// COM1A[1:0]: 1,0: PWM OC1A in the normal direction (DS table 12-4)
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// COM1B[1:0]: 0,0: PWM OC1B disabled (DS table 12-4)
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TCCR1A = (1<<WGM11) | (1<<WGM10) // 10-bit (TOP=0x03FF) (DS table 12-5)
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| (1<<COM1A1) | (0<<COM1A0) // PWM 1A in normal direction (DS table 12-4)
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| (0<<COM1B1) | (0<<COM1B0) // PWM 1B in normal direction (DS table 12-4)
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TCCR1B = (0<<CS12) | (0<<CS11) | (1<<CS10) // clk/1 (no prescaling) (DS table 12-6)
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| (0<<WGM13) | (0<<WGM12) // phase-correct PWM (DS table 12-5)
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//PORTA = (1 << SWITCH_PIN); // TODO: configure PORTA / PORTB / PORTC?
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PUEA = (1 << SWITCH_PIN); // pull-up for e-switch
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SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt
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// enable output ports
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// Opamp level and Opamp on/off
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DDRB = (1 << CH1_PIN)
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| (1 << CH1_ENABLE_PIN);
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DDRA = (1 << AUXLED_R_PIN)
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| (1 << AUXLED_G_PIN)
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| (1 << AUXLED_B_PIN)
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// Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
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// pre-scale for timer: N = 1
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// WGM1[3:0]: 0,0,1,1: PWM, Phase Correct, 10-bit (DS table 12-5)
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// CS1[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 12-6)
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// COM1A[1:0]: 1,0: PWM OC1A in the normal direction (DS table 12-4)
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// COM1B[1:0]: 0,0: PWM OC1B disabled (DS table 12-4)
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TCCR1A = (1<<WGM11) | (1<<WGM10) // 10-bit (TOP=0x03FF) (DS table 12-5)
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| (1<<COM1A1) | (0<<COM1A0) // PWM 1A in normal direction (DS table 12-4)
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| (0<<COM1B1) | (0<<COM1B0) // PWM 1B in normal direction (DS table 12-4)
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TCCR1B = (0<<CS12) | (0<<CS11) | (1<<CS10) // clk/1 (no prescaling) (DS table 12-6)
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| (0<<WGM13) | (0<<WGM12) // phase-correct PWM (DS table 12-5)
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// set PWM resolution
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//PWM_TOP = PWM_TOP_INIT;
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SWITCH_PUE = (1 << SWITCH_PIN); // pull-up for e-switch
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SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt
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#define LAYOUT_DEFINED