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// Sofirn SP10 Pro pinout
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// Copyright (C) 2022-2023 (original author TBD), Selene ToyKeeper
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// SPDX-License-Identifier: GPL-3.0-or-later
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* PB5 : PWM small channel (TCA0 - WO2 Alternate MUX)
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* PB0 : PWM big channel (TCA0 - WO0)
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* PB4 : Voltage divider (ADC0 - AIN9)
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#define HWDEF_C_FILE hwdef-sofirn-sp10-pro.c
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// * 0. low+high PWM stacked
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#define NUM_CHANNEL_MODES 1
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#define DEFAULT_CHANNEL_MODE CM_MAIN
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// right-most bit first, modes are in fedcba9876543210 order
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#define CHANNEL_MODES_ENABLED 0b00000001
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#define PWM_CHANNELS 2 // old, remove this
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#define PWM_BITS 16 // data type needs 16 bits, not 8
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#define PWM_GET PWM_GET16
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#define PWM_DATATYPE uint16_t // is used for PWM_TOPS (which goes way over 255)
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#define PWM_DATATYPE2 uint32_t // only needs 32-bit if ramp values go over 255
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#define PWM1_DATATYPE uint16_t // low PWM ramp
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#define PWM2_DATATYPE uint16_t // high PWM ramp
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// PWM parameters of both channels are tied together because they share a counter
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#define PWM_TOP TCA0.SINGLE.PERBUF // holds the TOP value for for variable-resolution PWM
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#define PWM_CNT TCA0.SINGLE.CNT // for resetting phase after each TOP adjustment
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#define PWM_TOP_INIT 255 // highest value used in top half of ramp (unused?)
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#define CH1_PWM TCA0.SINGLE.CMP2BUF // PB5 is Alternate MUX for TCA Compare 2
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#define CH2_PWM TCA0.SINGLE.CMP0BUF // PB0 is TCA Compare 0
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#define BST_ENABLE_PIN PIN1_bp
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#define BST_ENABLE_PORT PORTA_OUT
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#define SWITCH_PORT VPORTB.IN
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#define SWITCH_ISC_REG PORTB.PIN3CTRL
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#define SWITCH_VECT PORTB_PORT_vect
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#define SWITCH_INTFLG VPORTB.INTFLAGS
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#define SWITCH_PCINT PCINT0
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#define PCINT_vect PCINT0_vect // ISR for PCINT[7:0]
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// Voltage divider battLVL
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#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is regulated
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#define DUAL_VOLTAGE_FLOOR 21 // for AA/14500 boost drivers, don't indicate low voltage if below this level
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#define DUAL_VOLTAGE_LOW_LOW 7 // the lower voltage range's danger zone 0.7 volts (NiMH)
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#define ADMUX_VOLTAGE_DIVIDER ADC_MUXPOS_AIN9_gc // which ADC channel to read
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// Raw ADC readings at 4.4V and 2.2V
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// calibrate the voltage readout here
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// estimated / calculated values are:
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// (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1)
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// Resistors are 300,000 and 100,000
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#define ADC_44 1023 // raw value at 4.40V
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#define ADC_22 512 // raw value at 2.20V
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inline void hwdef_setup() {
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// set up the system clock to run at 10 MHz instead of the default 3.33 MHz
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_PROTECTED_WRITE( CLKCTRL.MCLKCTRLB,
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CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
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VPORTA.DIR = PIN1_bm; // Boost enable pin
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VPORTB.DIR = PIN0_bm // big PWM channel
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| PIN5_bm; // small PWM channel
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// enable pullups on the input pins to reduce power
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PORTA.PIN0CTRL = PORT_PULLUPEN_bm;
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//PORTA.PIN1CTRL = PORT_PULLUPEN_bm; // Boost enable pin
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PORTA.PIN2CTRL = PORT_PULLUPEN_bm;
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PORTA.PIN3CTRL = PORT_PULLUPEN_bm;
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PORTA.PIN4CTRL = PORT_PULLUPEN_bm;
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PORTA.PIN5CTRL = PORT_PULLUPEN_bm;
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PORTA.PIN6CTRL = PORT_PULLUPEN_bm;
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PORTA.PIN7CTRL = PORT_PULLUPEN_bm;
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//PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // Big PWM channel
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PORTB.PIN1CTRL = PORT_PULLUPEN_bm;
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PORTB.PIN2CTRL = PORT_PULLUPEN_bm;
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PORTB.PIN3CTRL = PORT_PULLUPEN_bm
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| PORT_ISC_BOTHEDGES_gc; // e-switch
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//PORTB.PIN4CTRL = PORT_PULLUPEN_bm; // Voltage divider
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//PORTB.PIN5CTRL = PORT_PULLUPEN_bm; // Small PWM channel
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PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
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PORTC.PIN1CTRL = PORT_PULLUPEN_bm;
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PORTC.PIN2CTRL = PORT_PULLUPEN_bm;
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PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
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// https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
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// PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm
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// PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm
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// PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm
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// For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc
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// For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc
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// See the manual for other pins, clocks, configs, portmux, etc
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PORTMUX.CTRLC = PORTMUX_TCA02_ALTERNATE_gc; // Use alternate pin for TCA0:WO2
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TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm
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| TCA_SINGLE_CMP2EN_bm
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| TCA_SINGLE_WGMODE_DSBOTTOM_gc;
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PWM_TOP = PWM_TOP_INIT;
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TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc
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| TCA_SINGLE_ENABLE_bm;
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// set fuses, these carry over to the ELF file
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// we need this for enabling BOD in Active Mode from the factory.
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// settings can be verified / dumped from the ELF file using this
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// command: avr-objdump -d -S -j .fuse anduril.elf
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.WDTCFG = FUSE_WDTCFG_DEFAULT, // Watchdog Configuration
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.BODCFG = FUSE_ACTIVE0, // BOD Configuration
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.OSCCFG = FUSE_OSCCFG_DEFAULT, // Oscillator Configuration
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.TCD0CFG = FUSE_TCD0CFG_DEFAULT, // TCD0 Configuration
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.SYSCFG0 = FUSE_SYSCFG0_DEFAULT, // System Configuration 0
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.SYSCFG1 = FUSE_SYSCFG1_DEFAULT, // System Configuration 1
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.APPEND = FUSE_APPEND_DEFAULT, // Application Code Section End
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.BOOTEND = FUSE_BOOTEND_DEFAULT, // Boot Section End
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#define LAYOUT_DEFINED