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// BLF LT1S Pro driver layout using the Attiny1616
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// Copyright (C) 2022-2023 (FIXME)
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// SPDX-License-Identifier: GPL-3.0-or-later
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* WW PWM: PB0 (TCA0 WO0)
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* CW PWM: PB1 (TCA0 WO1)
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* Red PWM: PB2 (TCA0 WO2)
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#define HWDEF_C_FILE hwdef-sofirn-lt1s-pro.c
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// * 0. warm/cool white blend
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// * 1. auto 2ch white blend (warm -> cool by ramp level)
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// * 2. auto 3ch blend (red -> warm -> cool by ramp level)
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// * 4. red + white blend
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#define NUM_CHANNEL_MODES 5
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enum channel_modes_e {
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#define CHANNEL_MODES_ENABLED 0b00011111
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#define USE_CHANNEL_MODE_ARGS
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// 128=middle CCT, _, _, _, 255=100% red
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#define CHANNEL_MODE_ARGS 128,0,0,0,255
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// can use some of the common handlers
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#define USE_CALC_2CH_BLEND
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//#define USE_CALC_AUTO_3CH_BLEND
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#define PWM_CHANNELS 1 // old, remove this
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// only using 16-bit PWM on this light
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#define PWM_GET PWM_GET16
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#define PWM_DATATYPE uint16_t
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#define PWM1_DATATYPE uint16_t
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#define PWM_DATATYPE2 uint32_t
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// PWM parameters of all channels are tied together because they share a counter
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#define PWM_TOP_INIT 511 // highest value used in the top half of the ramp
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#define PWM_TOP TCA0.SINGLE.PERBUF // holds the TOP value for for variable-resolution PWM
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#define PWM_CNT TCA0.SINGLE.CNT // for resetting phase after each TOP adjustment
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//#define WARM_PWM_PIN PB0
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#define WARM_PWM_LVL TCA0.SINGLE.CMP0BUF // CMP1 is the output compare register for PB0
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//#define COOL_PWM_PIN PB1
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#define COOL_PWM_LVL TCA0.SINGLE.CMP1BUF // CMP0 is the output compare register for PB1
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//#define RED_PWM_PIN PB2
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#define RED_PWM_LVL TCA0.SINGLE.CMP2BUF // CMP2 is the output compare register for PB2
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#define AUXLED_PIN PIN5_bp
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#define AUXLED_PORT PORTB
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// the button lights up
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#define USE_INDICATOR_LED
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// the button is visible while main LEDs are on
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#define USE_INDICATOR_LED_WHILE_RAMPING
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#define SWITCH_PIN PIN5_bp
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#define SWITCH_PORT VPORTA.IN
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#define SWITCH_ISC_REG PORTA.PIN2CTRL
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#define SWITCH_VECT PORTA_PORT_vect
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#define SWITCH_INTFLG VPORTA.INTFLAGS
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// average drop across diode on this hardware
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#ifndef VOLTAGE_FUDGE_FACTOR
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#define VOLTAGE_FUDGE_FACTOR 7 // add 0.35V
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inline void hwdef_setup() {
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// set up the system clock to run at 10 MHz instead of the default 3.33 MHz
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_PROTECTED_WRITE( CLKCTRL.MCLKCTRLB,
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CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
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VPORTB.DIR = PIN0_bm // warm white
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| PIN1_bm // cool white
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| PIN5_bm; // aux LED
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// enable pullups on the unused pins to reduce power
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PORTA.PIN0CTRL = PORT_PULLUPEN_bm;
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PORTA.PIN1CTRL = PORT_PULLUPEN_bm;
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PORTA.PIN2CTRL = PORT_PULLUPEN_bm;
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PORTA.PIN3CTRL = PORT_PULLUPEN_bm;
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PORTA.PIN4CTRL = PORT_PULLUPEN_bm;
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PORTA.PIN5CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc; // eSwitch
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PORTA.PIN6CTRL = PORT_PULLUPEN_bm;
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PORTA.PIN7CTRL = PORT_PULLUPEN_bm;
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//PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // warm tint channel
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//PORTB.PIN1CTRL = PORT_PULLUPEN_bm; // cold tint channel
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//PORTB.PIN2CTRL = PORT_PULLUPEN_bm; // red LEDs
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PORTB.PIN3CTRL = PORT_PULLUPEN_bm;
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PORTB.PIN4CTRL = PORT_PULLUPEN_bm;
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//PORTB.PIN5CTRL = PORT_PULLUPEN_bm; // Aux LED
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PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
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PORTC.PIN1CTRL = PORT_PULLUPEN_bm;
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PORTC.PIN2CTRL = PORT_PULLUPEN_bm;
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PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
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// https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
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// PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm
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// PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm
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// PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm
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// For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc
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// For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc
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// TODO: add references to MCU documentation
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TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm
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| TCA_SINGLE_CMP1EN_bm
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| TCA_SINGLE_CMP2EN_bm
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| TCA_SINGLE_WGMODE_DSBOTTOM_gc;
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PWM_TOP = PWM_TOP_INIT;
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TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc
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| TCA_SINGLE_ENABLE_bm;
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#define LAYOUT_DEFINED