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// Emisar D4K 3-channel hwdef
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// Copyright (C) 2023 Selene ToyKeeper
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// SPDX-License-Identifier: GPL-3.0-or-later
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* Pin / Name / Function
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* 1 PA6 LED 4 PWM (linear) (PWM1B)
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* 2 PA5 R: red aux LED (PWM0B)
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* 3 PA4 G: green aux LED
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* 4 PA3 B: blue aux LED
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* 6 PA1 3rd LED opamp enable
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* 7 PA0 4th LED opamp enable
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* 15 PC0 main 2 LEDs PWM (linear) (PWM0A) (8-bit only)
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* 16 PB3 3rd LED PWM (linear) (PWM1A)
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* 18 PB1 MOSI / battery voltage (ADC6)
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* 19 PB0 main 2 LEDs opamp enable
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* 20 PA7 e-switch (PCINT7)
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* ADC12 thermal sensor
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* PWM speed + resolution is dynamic on 2 channels,
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* and 8-bit 16 kHz on 1 channel.
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* Note: Some hardware might swap the wires at build time!
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* It might be wired 8/16/16 (8-bit LEDs 1+2) or 16/16/8 (8-bit LED 4).
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* So this code should support both wire layouts.
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#define HWDEF_C_FILE hwdef-emisar-d4k-3ch.c
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// allow using aux LEDs as extra channel modes
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#include "chan-rgbaux.h"
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// - 1. main 2 LEDs only (8/16/16 wiring) or LED 4 only (16/16/8)
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// - 3. 4th LED only (8/16/16 wiring) or main 2 LEDs only (16/16/8)
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// - 4. all 3 channels (equal amounts)
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// - 5. 2ch blend (3rd + 4th LEDs, 8/16/16 wiring)
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// - 6. 2ch blend (3rd + 4th LEDs, 16/16/8 wiring)
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// - 7. 3ch blend (HSV style)
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// - 8. 3ch auto blend (red-warm-cool style, led4-led3-main2)
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// - 9+. RGB aux (hidden)
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#define NUM_CHANNEL_MODES (8 + NUM_RGB_AUX_CHANNEL_MODES)
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enum channel_modes_e {
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CM_BLEND34A, // 8 / [16+16]
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CM_BLEND34B, // 16 / [16+8]
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#define CHANNEL_MODES_ENABLED 0b0000000000001111
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#define USE_CHANNEL_MODE_ARGS
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// _, _, _, _, 128=middle CCT, 128=middle CCT, 213=purple, _
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#define CHANNEL_MODE_ARGS 0,0,0,0,128,128,213,0,RGB_AUX_CM_ARGS
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#define USE_CUSTOM_CHANNEL_3H_MODES
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#define USE_CIRCULAR_TINT_3H
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// can use some of the common handlers
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#define USE_CALC_2CH_BLEND
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#define PWM_CHANNELS 1 // old, remove this
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#define PWM_BITS 16 // 0 to 16383 at variable Hz, not 0 to 255 at 16 kHz
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#define PWM_GET PWM_GET16
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#define PWM_DATATYPE uint16_t
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#define PWM_DATATYPE2 uint32_t // only needs 32-bit if ramp values go over 255
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#define PWM1_DATATYPE uint16_t // 15-bit PWM+DSM ramp
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#define PWM_TOP ICR1 // holds the TOP value for for variable-resolution PWM
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#define PWM_TOP_INIT 255 // highest value used in top half of ramp
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#define PWM_CNT TCNT1 // for checking / resetting phase
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#define PWM_CNT2 TCNT0 // for checking / resetting phase
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// (max is (255 << 7), because it's 8-bit PWM plus 7 bits of DSM)
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#define DSM_TOP (255<<7) // 15-bit resolution leaves 1 bit for carry
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// timer interrupt for DSM
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#define DSM_vect TIMER0_OVF_vect
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#define DSM_INTCTRL TIMSK
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#define DSM_OVF_bm (1<<TOIE0)
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#define DELAY_FACTOR 90 // less time in delay() because more time spent in interrupts
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// main 2 LEDs / 1st channel (2 LEDs)
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uint16_t main2_dsm_lvl;
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uint8_t main2_pwm, main2_dsm;
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#define MAIN2_PWM_PIN PC0
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#define MAIN2_PWM_LVL OCR0A // OCR0A is the output compare register for PC0
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#define MAIN2_ENABLE_PIN PB0 // Opamp power
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#define MAIN2_ENABLE_PORT PORTB // control port for PB0
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// LED 3 / 2nd channel (1 LED)
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uint16_t led3_dsm_lvl;
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uint8_t led3_pwm, led3_dsm;
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#define LED3_PWM_PIN PB3
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#define LED3_PWM_LVL OCR1A // OCR1A is the output compare register for PB3
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#define LED3_ENABLE_PIN PA1 // Opamp power
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#define LED3_ENABLE_PORT PORTA // control port for PA1
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// LED 4 / 3rd channel (1 LED)
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uint16_t led4_dsm_lvl;
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uint8_t led4_pwm, led4_dsm;
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#define LED4_PWM_PIN PA6
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#define LED4_PWM_LVL OCR1B // OCR1B is the output compare register for PA6
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#define LED4_ENABLE_PIN PA0 // Opamp power
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#define LED4_ENABLE_PORT PORTA // control port for PA0
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#define SWITCH_PIN PA7 // pin 20
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#define SWITCH_PCINT PCINT7 // pin 20 pin change interrupt
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#define SWITCH_PCIE PCIE0 // PCIE1 is for PCINT[7:0]
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#define SWITCH_PCMSK PCMSK0 // PCMSK1 is for PCINT[7:0]
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#define SWITCH_PORT PINA // PINA or PINB or PINC
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#define SWITCH_PUE PUEA // pullup group A
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#define PCINT_vect PCINT0_vect // ISR for PCINT[7:0]
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#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened
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#define VOLTAGE_PIN PB1 // Pin 18 / PB1 / ADC6
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// pin to ADC mappings are in DS table 19-4
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#define VOLTAGE_ADC ADC6D // digital input disable pin for PB1
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// DIDR0/DIDR1 mappings are in DS section 19.13.5, 19.13.6
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#define VOLTAGE_ADC_DIDR DIDR1 // DIDR channel for ADC6D
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// DS tables 19-3, 19-4
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// Bit 7 6 5 4 3 2 1 0
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// REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0
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// MUX[3:0] = 0, 1, 1, 0 for ADC6 / PB1
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// REFS[1:0] = 1, 0 for internal 1.1V reference
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// other bits reserved
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#define ADMUX_VOLTAGE_DIVIDER 0b10000110
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#define ADC_PRSCL 0x07 // clk/128
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// Raw ADC readings at 4.4V and 2.2V
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// calibrate the voltage readout here
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// estimated / calculated values are:
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// (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1)
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// D1, R1, R2 = 0, 330, 100
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//#define ADC_44 981 // raw value at 4.40V
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#define ADC_44 967 // manually tweaked so 4.16V will blink out 4.2
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//#define ADC_22 489 // raw value at 2.20V
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#define ADC_22 482 // manually tweaked so 4.16V will blink out 4.2
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// this light has aux LEDs under the optic
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#define AUXLED_R_PIN PA5 // pin 2
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#define AUXLED_G_PIN PA4 // pin 3
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#define AUXLED_B_PIN PA3 // pin 4
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#define AUXLED_RGB_PORT PORTA // PORTA or PORTB or PORTC
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#define AUXLED_RGB_DDR DDRA // DDRA or DDRB or DDRC
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#define AUXLED_RGB_PUE PUEA // PUEA or PUEB or PUEC
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#define BUTTON_LED_PIN PA2 // pin 5
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#define BUTTON_LED_PORT PORTA // for all "PA" pins
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#define BUTTON_LED_DDR DDRA // for all "PA" pins
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#define BUTTON_LED_PUE PUEA // for all "PA" pins
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// this light has three aux LED channels: R, G, B
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#define USE_AUX_RGB_LEDS
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// the aux LEDs are front-facing, so turn them off while main LEDs are on
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// it also has an independent LED in the button
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#define USE_BUTTON_LED
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inline void hwdef_setup() {
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// enable output ports
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DDRC = (1 << MAIN2_PWM_PIN);
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DDRB = (1 << LED3_PWM_PIN)
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| (1 << MAIN2_ENABLE_PIN)
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DDRA = (1 << LED4_PWM_PIN)
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| (1 << LED4_ENABLE_PIN)
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| (1 << LED3_ENABLE_PIN)
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| (1 << AUXLED_R_PIN)
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| (1 << AUXLED_G_PIN)
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| (1 << AUXLED_B_PIN)
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| (1 << BUTTON_LED_PIN)
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// Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
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// pre-scale for timer: N = 1
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// Linear opamp PWM for both 16-bit channels
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// WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5)
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// WGM1[3:0]: 1,1,1,0: PWM, Fast, adjustable (DS table 12-5)
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// CS1[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 12-6)
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// COM1A[1:0]: 1,0: PWM OC1A in the normal direction (DS table 12-4)
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// COM1B[1:0]: 1,0: PWM OC1B in the normal direction (DS table 12-4)
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TCCR1A = (1<<WGM11) | (0<<WGM10) // adjustable PWM (TOP=ICR1) (DS table 12-5)
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| (1<<COM1A1) | (0<<COM1A0) // PWM 1A in normal direction (DS table 12-4)
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| (1<<COM1B1) | (0<<COM1B0) // PWM 1B in normal direction (DS table 12-4)
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TCCR1B = (0<<CS12) | (0<<CS11) | (1<<CS10) // clk/1 (no prescaling) (DS table 12-6)
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//| (1<<WGM13) | (1<<WGM12) // fast adjustable PWM (DS table 12-5)
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| (1<<WGM13) | (0<<WGM12) // phase-correct adjustable PWM (DS table 12-5)
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// set PWM resolution
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PWM_TOP = PWM_TOP_INIT;
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// 8-bit PWM channel (LEDs 1+2 or LED 4)
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// WGM0[2:0]: 0,0,1: PWM, Phase Correct, 8-bit (DS table 11-8)
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// CS0[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 11-9)
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// COM0A[1:0]: 1,0: PWM OC0A in the normal direction (DS table 11-4)
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// COM0B[1:0]: 1,0: PWM OC0B in the normal direction (DS table 11-7)
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TCCR0A = (0<<WGM01) | (1<<WGM00) // 8-bit (TOP=0xFF) (DS table 11-8)
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| (1<<COM0A1) | (0<<COM0A0) // PWM 0A in normal direction (DS table 11-4)
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//| (1<<COM0B1) | (0<<COM0B0) // PWM 0B in normal direction (DS table 11-7)
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TCCR0B = (0<<CS02) | (0<<CS01) | (1<<CS00) // clk/1 (no prescaling) (DS table 11-9)
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| (0<<WGM02) // phase-correct PWM (DS table 11-8)
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// set up interrupt for delta-sigma modulation
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// (moved to hwdef.c functions so it can be enabled/disabled based on ramp level)
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//DSM_INTCTRL |= DSM_OVF_bm; // interrupt once for each timer cycle
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SWITCH_PUE = (1 << SWITCH_PIN); // pull-up for e-switch
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SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt
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#define LAYOUT_DEFINED