2
Copyright (c) 1998-2002 by Florian Klaempfl
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Member of the Free Pascal development team
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This unit implements the code generation for 64 bit int
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arithmethics on 32 bit processors
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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{# This unit implements the code generation for 64 bit int arithmethics on
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aasmbase,aasmtai,aasmdata,aasmcpu,
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cgbase,cgobj,parabase,cgutils,
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{# Defines all the methods required on 32-bit processors
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to handle 64-bit integers.
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tcg64f32 = class(tcg64)
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procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);override;
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procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);override;
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procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);override;
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procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);override;
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procedure a_load64_const_reg(list : TAsmList;value: int64;reg : tregister64);override;
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procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);override;
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procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);override;
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procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);override;
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procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);override;
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procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference);override;
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procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference);override;
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procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);override;
59
procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);override;
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procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);override;
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procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);override;
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procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);override;
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procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);override;
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procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);override;
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procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);override;
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procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);override;
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procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);override;
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procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);override;
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procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64; const ref: treference);override;
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procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);override;
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procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);override;
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procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg : tregister64);override;
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procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);override;
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procedure a_param64_reg(list : TAsmList;reg : tregister64;const paraloc : tcgpara);override;
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procedure a_param64_const(list : TAsmList;value : int64;const paraloc : tcgpara);override;
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procedure a_param64_ref(list : TAsmList;const r : treference;const paraloc : tcgpara);override;
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procedure a_param64_loc(list : TAsmList;const l : tlocation;const paraloc : tcgpara);override;
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{# This routine tries to optimize the a_op64_const_reg operation, by
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removing superfluous opcodes. Returns TRUE if normal processing
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must continue in op64_const_reg, otherwise, everything is processed
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entirely in this routine, by emitting the appropriate 32-bit opcodes.
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function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;override;
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procedure g_rangecheck64(list: TAsmList; const l:tlocation;fromdef,todef: tdef); override;
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{# Creates a tregister64 record from 2 32 Bit registers. }
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function joinreg64(reglo,reghi : tregister) : tregister64;
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symbase,symconst,symdef,symtable,defutil,paramgr;
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{****************************************************************************
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****************************************************************************}
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function joinreg64(reglo,reghi : tregister) : tregister64;
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procedure swap64(var q : int64);
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q:=(int64(lo(q)) shl 32) or hi(q);
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procedure splitparaloc64(const cgpara:tcgpara;var cgparalo,cgparahi:tcgpara);
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paralochi : pcgparalocation;
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if not(cgpara.size in [OS_64,OS_S64]) then
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internalerror(200408231);
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if not assigned(cgpara.location) then
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internalerror(200408201);
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if cgpara.size=OS_S64 then
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cgparahi.size:=OS_S32
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cgparahi.size:=OS_32;
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cgparahi.alignment:=cgpara.alignment;
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paralochi:=cgparahi.add_location;
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cgparalo.size:=OS_32;
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cgparalo.alignment:=cgpara.alignment;
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paraloclo:=cgparalo.add_location;
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{ 2 parameter fields? }
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if assigned(cgpara.location^.next) then
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{ Order for multiple locations is always
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paraloc^.next -> low }
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if (target_info.endian=ENDIAN_BIG) then
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paraloc^.next -> low }
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move(cgpara.location^,paralochi^,sizeof(paralochi^));
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move(cgpara.location^.next^,paraloclo^,sizeof(paraloclo^));
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paraloc^.next -> high }
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move(cgpara.location^,paraloclo^,sizeof(paraloclo^));
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move(cgpara.location^.next^,paralochi^,sizeof(paralochi^));
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{ single parameter, this can only be in memory }
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if cgpara.location^.loc<>LOC_REFERENCE then
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internalerror(200408282);
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move(cgpara.location^,paraloclo^,sizeof(paraloclo^));
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move(cgpara.location^,paralochi^,sizeof(paralochi^));
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{ for big endian low is at +4, for little endian high }
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if target_info.endian = endian_big then
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inc(cgparalo.location^.reference.offset,4)
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inc(cgparahi.location^.reference.offset,4);
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paraloclo^.size:=cgparalo.size;
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paraloclo^.next:=nil;
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paralochi^.size:=cgparahi.size;
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paralochi^.next:=nil;
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{****************************************************************************
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****************************************************************************}
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procedure tcg64f32.a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);
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if target_info.endian = endian_big then
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reg.reglo:=reg.reghi;
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cg.a_load_reg_ref(list,OS_32,OS_32,reg.reglo,ref);
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inc(tmpref.offset,4);
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cg.a_load_reg_ref(list,OS_32,OS_32,reg.reghi,tmpref);
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procedure tcg64f32.a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);
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if target_info.endian = endian_big then
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cg.a_load_const_ref(list,OS_32,aint(lo(value)),ref);
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inc(tmpref.offset,4);
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cg.a_load_const_ref(list,OS_32,aint(hi(value)),tmpref);
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procedure tcg64f32.a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);
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if target_info.endian = endian_big then
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reg.reglo := reg.reghi;
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if (tmpref.base=reg.reglo) then
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tmpreg:=cg.getaddressregister(list);
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cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,tmpref.base,tmpreg);
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{ this works only for the i386, thus the i386 needs to override }
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{ this method and this method must be replaced by a more generic }
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{ implementation FK }
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if (tmpref.index=reg.reglo) then
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tmpreg:=cg.getaddressregister(list);
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cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,tmpref.index,tmpreg);
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tmpref.index:=tmpreg;
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cg.a_load_ref_reg(list,OS_32,OS_32,tmpref,reg.reglo);
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inc(tmpref.offset,4);
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cg.a_load_ref_reg(list,OS_32,OS_32,tmpref,reg.reghi);
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procedure tcg64f32.a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);
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cg.a_load_reg_reg(list,OS_32,OS_32,regsrc.reglo,regdst.reglo);
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cg.a_load_reg_reg(list,OS_32,OS_32,regsrc.reghi,regdst.reghi);
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procedure tcg64f32.a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);
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cg.a_load_const_reg(list,OS_32,aint(lo(value)),reg.reglo);
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cg.a_load_const_reg(list,OS_32,aint(hi(value)),reg.reghi);
271
procedure tcg64f32.a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);
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tmpsref: tsubsetreference;
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if (sref.bitindexreg <> NR_NO) or
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(sref.bitlen <> 64) then
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internalerror(2006082310);
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if (sref.startbit = 0) then
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a_load64_ref_reg(list,sref.ref,destreg);
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if target_info.endian = endian_big then
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tmpreg := destreg.reglo;
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destreg.reglo := destreg.reghi;
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destreg.reghi := tmpreg;
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if (tmpsref.ref.base=destreg.reglo) then
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tmpreg:=cg.getaddressregister(list);
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cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,tmpsref.ref.base,tmpreg);
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tmpsref.ref.base:=tmpreg;
300
if (tmpsref.ref.index=destreg.reglo) then
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tmpreg:=cg.getaddressregister(list);
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cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,tmpsref.ref.index,tmpreg);
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tmpsref.ref.index:=tmpreg;
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cg.a_load_subsetref_reg(list,OS_32,OS_32,tmpsref,destreg.reglo);
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inc(tmpsref.ref.offset,4);
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cg.a_load_subsetref_reg(list,OS_32,OS_32,tmpsref,destreg.reghi);
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procedure tcg64f32.a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);
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tmpsref: tsubsetreference;
319
if (sref.bitindexreg <> NR_NO) or
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(sref.bitlen <> 64) then
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internalerror(2006082311);
322
if (sref.startbit = 0) then
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a_load64_reg_ref(list,fromreg,sref.ref);
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if target_info.endian = endian_big then
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tmpreg:=fromreg.reglo;
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fromreg.reglo:=fromreg.reghi;
332
fromreg.reghi:=tmpreg;
336
cg.a_load_reg_subsetref(list,OS_32,OS_32,fromreg.reglo,tmpsref);
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inc(tmpsref.ref.offset,4);
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cg.a_load_reg_subsetref(list,OS_32,OS_32,fromreg.reghi,tmpsref);
342
procedure tcg64f32.a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);
345
tmpsref: tsubsetreference;
347
if (sref.bitindexreg <> NR_NO) or
348
(sref.bitlen <> 64) then
349
internalerror(2006082312);
350
if target_info.endian = endian_big then
353
tmpsref.bitlen := 32;
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cg.a_load_const_subsetref(list,OS_32,aint(lo(a)),tmpsref);
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inc(tmpsref.ref.offset,4);
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cg.a_load_const_subsetref(list,OS_32,aint(hi(a)),tmpsref);
362
procedure tcg64f32.a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference);
365
tmpreg64 : tregister64;
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tmpreg64.reglo:=cg.getintregister(list,OS_32);
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tmpreg64.reghi:=cg.getintregister(list,OS_32);
369
a_load64_subsetref_reg(list,fromsref,tmpreg64);
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a_load64_reg_subsetref(list,tmpreg64,tosref);
374
procedure tcg64f32.a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference);
377
tmpreg64 : tregister64;
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tmpreg64.reglo:=cg.getintregister(list,OS_32);
380
tmpreg64.reghi:=cg.getintregister(list,OS_32);
381
a_load64_subsetref_reg(list,sref,tmpreg64);
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a_load64_reg_ref(list,tmpreg64,destref);
386
procedure tcg64f32.a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);
389
tmpreg64 : tregister64;
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tmpreg64.reglo:=cg.getintregister(list,OS_32);
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tmpreg64.reghi:=cg.getintregister(list,OS_32);
393
a_load64_ref_reg(list,fromref,tmpreg64);
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a_load64_reg_subsetref(list,tmpreg64,sref);
398
procedure tcg64f32.a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);
402
LOC_REFERENCE, LOC_CREFERENCE:
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a_load64_ref_reg(list,l.reference,reg);
404
LOC_REGISTER,LOC_CREGISTER:
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a_load64_reg_reg(list,l.register64,reg);
407
a_load64_const_reg(list,l.value64,reg);
408
LOC_SUBSETREF, LOC_CSUBSETREF:
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a_load64_subsetref_reg(list,l.sref,reg);
411
internalerror(200112292);
416
procedure tcg64f32.a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);
419
LOC_REGISTER,LOC_CREGISTER:
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a_load64_reg_ref(list,l.register64,ref);
422
a_load64_const_ref(list,l.value64,ref);
423
LOC_SUBSETREF, LOC_CSUBSETREF:
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a_load64_subsetref_ref(list,l.sref,ref);
426
internalerror(200203288);
431
procedure tcg64f32.a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);
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LOC_REFERENCE, LOC_CREFERENCE:
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a_load64_const_ref(list,value,l.reference);
437
LOC_REGISTER,LOC_CREGISTER:
438
a_load64_const_reg(list,value,l.register64);
439
LOC_SUBSETREF, LOC_CSUBSETREF:
440
a_load64_const_subsetref(list,value,l.sref);
442
internalerror(200112293);
447
procedure tcg64f32.a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);
451
LOC_REFERENCE, LOC_CREFERENCE:
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a_load64_reg_ref(list,reg,l.reference);
453
LOC_REGISTER,LOC_CREGISTER:
454
a_load64_reg_reg(list,reg,l.register64);
455
LOC_SUBSETREF, LOC_CSUBSETREF:
456
a_load64_reg_subsetref(list,reg,l.sref);
458
internalerror(200112293);
463
procedure tcg64f32.a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);
467
if target_info.endian = endian_big then
468
cg.a_load_reg_ref(list,OS_32,OS_32,reg,ref)
472
inc(tmpref.offset,4);
473
cg.a_load_reg_ref(list,OS_32,OS_32,reg,tmpref)
477
procedure tcg64f32.a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);
481
if target_info.endian = endian_little then
482
cg.a_load_reg_ref(list,OS_32,OS_32,reg,ref)
486
inc(tmpref.offset,4);
487
cg.a_load_reg_ref(list,OS_32,OS_32,reg,tmpref)
492
procedure tcg64f32.a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);
496
if target_info.endian = endian_big then
497
cg.a_load_ref_reg(list,OS_32,OS_32,ref,reg)
501
inc(tmpref.offset,4);
502
cg.a_load_ref_reg(list,OS_32,OS_32,tmpref,reg)
507
procedure tcg64f32.a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);
511
if target_info.endian = endian_little then
512
cg.a_load_ref_reg(list,OS_32,OS_32,ref,reg)
516
inc(tmpref.offset,4);
517
cg.a_load_ref_reg(list,OS_32,OS_32,tmpref,reg)
522
procedure tcg64f32.a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);
527
a_load64low_ref_reg(list,l.reference,reg);
530
cg.a_load_reg_reg(list,OS_32,OS_32,l.register64.reglo,reg);
532
cg.a_load_const_reg(list,OS_32,aint(lo(l.value64)),reg);
534
internalerror(200203244);
539
procedure tcg64f32.a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);
544
a_load64high_ref_reg(list,l.reference,reg);
547
cg.a_load_reg_reg(list,OS_32,OS_32,l.register64.reghi,reg);
549
cg.a_load_const_reg(list,OS_32,aint(hi(l.value64)),reg);
551
internalerror(200203244);
556
procedure tcg64f32.a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);
559
LOC_REFERENCE, LOC_CREFERENCE:
560
a_op64_const_ref(list,op,size,value,l.reference);
561
LOC_REGISTER,LOC_CREGISTER:
562
a_op64_const_reg(list,op,size,value,l.register64);
564
internalerror(200203292);
569
procedure tcg64f32.a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);
572
LOC_REFERENCE, LOC_CREFERENCE:
573
a_op64_reg_ref(list,op,size,reg,l.reference);
574
LOC_REGISTER,LOC_CREGISTER:
575
a_op64_reg_reg(list,op,size,reg,l.register64);
577
internalerror(2002032422);
583
procedure tcg64f32.a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg : tregister64);
586
LOC_REFERENCE, LOC_CREFERENCE:
587
a_op64_ref_reg(list,op,size,l.reference,reg);
588
LOC_REGISTER,LOC_CREGISTER:
589
a_op64_reg_reg(list,op,size,l.register64,reg);
591
a_op64_const_reg(list,op,size,l.value64,reg);
593
internalerror(200203242);
598
procedure tcg64f32.a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);
600
tempreg: tregister64;
602
tempreg.reghi:=cg.getintregister(list,OS_32);
603
tempreg.reglo:=cg.getintregister(list,OS_32);
604
a_load64_ref_reg(list,ref,tempreg);
605
a_op64_reg_reg(list,op,size,tempreg,reg);
609
procedure tcg64f32.a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64; const ref: treference);
611
tempreg: tregister64;
613
tempreg.reghi:=cg.getintregister(list,OS_32);
614
tempreg.reglo:=cg.getintregister(list,OS_32);
615
a_load64_ref_reg(list,ref,tempreg);
616
a_op64_reg_reg(list,op,size,reg,tempreg);
617
a_load64_reg_ref(list,tempreg,ref);
621
procedure tcg64f32.a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);
623
tempreg: tregister64;
625
tempreg.reghi:=cg.getintregister(list,OS_32);
626
tempreg.reglo:=cg.getintregister(list,OS_32);
627
a_load64_ref_reg(list,ref,tempreg);
628
a_op64_const_reg(list,op,size,value,tempreg);
629
a_load64_reg_ref(list,tempreg,ref);
633
procedure tcg64f32.a_param64_reg(list : TAsmList;reg : tregister64;const paraloc : tcgpara);
635
tmplochi,tmploclo: tcgpara;
639
splitparaloc64(paraloc,tmploclo,tmplochi);
640
{ Keep this order of first hi before lo to have
641
the correct push order for i386 }
642
cg.a_param_reg(list,OS_32,reg.reghi,tmplochi);
643
cg.a_param_reg(list,OS_32,reg.reglo,tmploclo);
649
procedure tcg64f32.a_param64_const(list : TAsmList;value : int64;const paraloc : tcgpara);
651
tmplochi,tmploclo: tcgpara;
655
splitparaloc64(paraloc,tmploclo,tmplochi);
656
{ Keep this order of first hi before lo to have
657
the correct push order for i386 }
658
cg.a_param_const(list,OS_32,aint(hi(value)),tmplochi);
659
cg.a_param_const(list,OS_32,aint(lo(value)),tmploclo);
665
procedure tcg64f32.a_param64_ref(list : TAsmList;const r : treference;const paraloc : tcgpara);
667
tmprefhi,tmpreflo : treference;
668
tmploclo,tmplochi : tcgpara;
672
splitparaloc64(paraloc,tmploclo,tmplochi);
675
if target_info.endian=endian_big then
676
inc(tmpreflo.offset,4)
678
inc(tmprefhi.offset,4);
679
{ Keep this order of first hi before lo to have
680
the correct push order for i386 }
681
cg.a_param_ref(list,OS_32,tmprefhi,tmplochi);
682
cg.a_param_ref(list,OS_32,tmpreflo,tmploclo);
688
procedure tcg64f32.a_param64_loc(list : TAsmList;const l:tlocation;const paraloc : tcgpara);
693
a_param64_reg(list,l.register64,paraloc);
695
a_param64_const(list,l.value64,paraloc);
698
a_param64_ref(list,l.reference,paraloc);
700
internalerror(200203287);
705
procedure tcg64f32.g_rangecheck64(list : TAsmList;const l:tlocation;fromdef,todef:tdef);
714
from_signed,to_signed: boolean;
718
from_signed := is_signed(fromdef);
719
to_signed := is_signed(todef);
721
if not is_64bit(todef) then
723
{ get the high dword in a register }
724
if l.loc in [LOC_REGISTER,LOC_CREGISTER] then
726
hreg := l.register64.reghi;
730
hreg:=cg.getintregister(list,OS_32);
731
a_load64high_ref_reg(list,l.reference,hreg);
733
current_asmdata.getjumplabel(poslabel);
735
{ check high dword, must be 0 (for positive numbers) }
736
cg.a_cmp_const_reg_label(list,OS_32,OC_EQ,0,hreg,poslabel);
738
{ It can also be $ffffffff, but only for negative numbers }
739
if from_signed and to_signed then
741
current_asmdata.getjumplabel(neglabel);
742
cg.a_cmp_const_reg_label(list,OS_32,OC_EQ,-1,hreg,neglabel);
744
{ For all other values we have a range check error }
745
cg.a_call_name(list,'FPC_RANGEERROR');
747
{ if the high dword = 0, the low dword can be considered a }
749
cg.a_label(list,poslabel);
750
hdef:=torddef.create(u32bit,0,$ffffffff);
752
location_copy(temploc,l);
755
if (temploc.loc in [LOC_REFERENCE,LOC_CREFERENCE]) and
756
(target_info.endian = endian_big) then
757
inc(temploc.reference.offset,4);
759
cg.g_rangecheck(list,temploc,hdef,todef);
760
hdef.owner.deletedef(hdef);
762
if from_signed and to_signed then
764
current_asmdata.getjumplabel(endlabel);
765
cg.a_jmp_always(list,endlabel);
766
{ if the high dword = $ffffffff, then the low dword (when }
767
{ considered as a longint) must be < 0 }
768
cg.a_label(list,neglabel);
769
if l.loc in [LOC_REGISTER,LOC_CREGISTER] then
771
hreg := l.register64.reglo;
775
hreg:=cg.getintregister(list,OS_32);
776
a_load64low_ref_reg(list,l.reference,hreg);
778
{ get a new neglabel (JM) }
779
current_asmdata.getjumplabel(neglabel);
780
cg.a_cmp_const_reg_label(list,OS_32,OC_LT,0,hreg,neglabel);
782
cg.a_call_name(list,'FPC_RANGEERROR');
784
{ if we get here, the 64bit value lies between }
785
{ longint($80000000) and -1 (JM) }
786
cg.a_label(list,neglabel);
787
hdef:=torddef.create(s32bit,longint($80000000),-1);
788
location_copy(temploc,l);
790
cg.g_rangecheck(list,temploc,hdef,todef);
791
hdef.owner.deletedef(hdef);
792
cg.a_label(list,endlabel);
796
{ todef = 64bit int }
797
{ no 64bit subranges supported, so only a small check is necessary }
799
{ if both are signed or both are unsigned, no problem! }
800
if (from_signed xor to_signed) and
801
{ also not if the fromdef is unsigned and < 64bit, since that will }
802
{ always fit in a 64bit int (todef is 64bit) }
804
(torddef(fromdef).ordtype = u64bit)) then
806
{ in all cases, there is only a problem if the higest bit is set }
807
if l.loc in [LOC_REGISTER,LOC_CREGISTER] then
809
if is_64bit(fromdef) then
811
hreg := l.register64.reghi;
817
opsize := def_cgsize(fromdef);
822
hreg:=cg.getintregister(list,OS_32);
825
if l.size in [OS_64,OS_S64] then
826
a_load64high_ref_reg(list,l.reference,hreg)
828
cg.a_load_ref_reg(list,l.size,OS_32,l.reference,hreg);
830
current_asmdata.getjumplabel(poslabel);
831
cg.a_cmp_const_reg_label(list,opsize,OC_GTE,0,hreg,poslabel);
833
cg.a_call_name(list,'FPC_RANGEERROR');
834
cg.a_label(list,poslabel);
839
function tcg64f32.optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;
841
lowvalue, highvalue : longint;
844
lowvalue := longint(a);
845
highvalue:= longint(a shr 32);
846
{ assume it will be optimized out }
847
optimize64_op_const_reg := true;
856
if lowvalue <> -1 then
857
cg.a_op_const_reg(list,op,OS_32,lowvalue,reg.reglo);
858
if highvalue <> -1 then
859
cg.a_op_const_reg(list,op,OS_32,highvalue,reg.reghi);
860
{ already emitted correctly }
865
if lowvalue <> 0 then
866
cg.a_op_const_reg(list,op,OS_32,lowvalue,reg.reglo);
867
if highvalue <> 0 then
868
cg.a_op_const_reg(list,op,OS_32,highvalue,reg.reghi);
869
{ already emitted correctly }
884
{ simply clear low-register
885
and shift the rest and swap
890
cg.a_load_const_reg(list,OS_32,0,reg.reglo);
891
cg.a_op_const_reg(list,OP_SHL,OS_32,a mod 32,reg.reghi);
892
{ swap the registers }
894
reg.reghi := reg.reglo;
902
{ simply clear high-register
903
and shift the rest and swap
908
cg.a_load_const_reg(list,OS_32,0,reg.reghi);
909
cg.a_op_const_reg(list,OP_SHL,OS_32,a mod 32,reg.reglo);
910
{ swap the registers }
912
reg.reghi := reg.reglo;
926
internalerror(20020817);
928
optimize64_op_const_reg := false;