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/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c,v 1.9 2002/09/24 16:14:16 tsi Exp $ */
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* Copyright 1998 by Concurrent Computer Corporation
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* Permission to use, copy, modify, distribute, and sell this software
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* and its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
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* both that copyright notice and this permission notice appear in
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* supporting documentation, and that the name of Concurrent Computer
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* Corporation not be used in advertising or publicity pertaining to
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* distribution of the software without specific, written prior
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* permission. Concurrent Computer Corporation makes no representations
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* about the suitability of this software for any purpose. It is
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* provided "as is" without express or implied warranty.
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* CONCURRENT COMPUTER CORPORATION DISCLAIMS ALL WARRANTIES WITH REGARD
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* TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS, IN NO EVENT SHALL CONCURRENT COMPUTER CORPORATION BE
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* LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY
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* DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
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* WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
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* ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
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* Copyright 1998 by Metro Link Incorporated
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* Permission to use, copy, modify, distribute, and sell this software
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* and its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
30
* both that copyright notice and this permission notice appear in
31
* supporting documentation, and that the name of Metro Link
32
* Incorporated not be used in advertising or publicity pertaining to
33
* distribution of the software without specific, written prior
34
* permission. Metro Link Incorporated makes no representations
35
* about the suitability of this software for any purpose. It is
36
* provided "as is" without express or implied warranty.
38
* METRO LINK INCORPORATED DISCLAIMS ALL WARRANTIES WITH REGARD
39
* TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
40
* AND FITNESS, IN NO EVENT SHALL METRO LINK INCORPORATED BE
41
* LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY
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* DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
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* WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
44
* ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
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#ifdef HAVE_XORG_CONFIG_H
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#include <xorg-config.h>
56
#include "xf86_OSlib.h"
60
* linux platform specific PCI access functions -- using /proc/bus/pci
61
* needs kernel version 2.2.x
63
static CARD32 linuxPciCfgRead(PCITAG tag, int off);
64
static void linuxPciCfgWrite(PCITAG, int off, CARD32 val);
65
static void linuxPciCfgSetBits(PCITAG tag, int off, CARD32 mask, CARD32 bits);
66
static ADDRESS linuxTransAddrBusToHost(PCITAG tag, PciAddrType type, ADDRESS addr);
67
#if defined(__powerpc__)
68
static ADDRESS linuxPpcBusAddrToHostAddr(PCITAG, PciAddrType, ADDRESS);
69
static ADDRESS linuxPpcHostAddrToBusAddr(PCITAG, PciAddrType, ADDRESS);
72
static CARD8 linuxPciCfgReadByte(PCITAG tag, int off);
73
static void linuxPciCfgWriteByte(PCITAG tag, int off, CARD8 val);
74
static CARD16 linuxPciCfgReadWord(PCITAG tag, int off);
75
static void linuxPciCfgWriteWord(PCITAG tag, int off, CARD16 val);
77
static pciBusFuncs_t linuxFuncs0 = {
78
/* pciReadLong */ linuxPciCfgRead,
79
/* pciWriteLong */ linuxPciCfgWrite,
80
/* pciSetBitsLong */ linuxPciCfgSetBits,
81
#if defined(__powerpc__)
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/* pciAddrHostToBus */ linuxPpcHostAddrToBusAddr,
83
/* pciAddrBusToHost */ linuxPpcBusAddrToHostAddr,
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/* pciAddrHostToBus */ pciAddrNOOP,
86
/* pciAddrBusToHost */ linuxTransAddrBusToHost,
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/* pciControlBridge */ NULL,
90
/* pciGetBridgeBuses */ NULL,
91
/* pciGetBridgeResources */ NULL,
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/* pciReadByte */ linuxPciCfgReadByte,
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/* pciWriteByte */ linuxPciCfgWriteByte,
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/* pciReadWord */ linuxPciCfgReadWord,
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/* pciWriteWord */ linuxPciCfgWriteWord,
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static pciBusInfo_t linuxPci0 = {
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/* configMech */ PCI_CFG_MECH_OTHER,
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/* secondary */ FALSE,
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/* funcs */ &linuxFuncs0,
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/* pciBusPriv */ NULL,
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if ((xf86Info.pciFlags == PCIForceNone) ||
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(-1 == stat("/proc/bus/pci", &st))) {
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/* when using this as default for all linux architectures,
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we'll need a fallback for 2.0 kernels here */
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pciBusInfo[0] = &linuxPci0;
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pciFindFirstFP = pciGenFindFirst;
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pciFindNextFP = pciGenFindNext;
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linuxPciOpenFile(PCITAG tag, Bool write)
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static int lbus,ldev,lfunc,fd = -1,is_write = 0;
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bus = PCI_BUS_FROM_TAG(tag);
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dev = PCI_DEV_FROM_TAG(tag);
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func = PCI_FUNC_FROM_TAG(tag);
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if (fd == -1 || (write && (!is_write))
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|| bus != lbus || dev != ldev || func != lfunc) {
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sprintf(file,"/proc/bus/pci/%02x",bus);
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if (stat(file, &ignored) < 0)
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sprintf(file, "/proc/bus/pci/0000:%02x/%02x.%1x",
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sprintf(file, "/proc/bus/pci/%02x/%02x.%1x",
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sprintf(file,"/proc/bus/pci/%04x",bus);
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if (stat(file, &ignored) < 0)
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sprintf(file, "/proc/bus/pci/0000:%04x/%02x.%1x",
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sprintf(file, "/proc/bus/pci/%04x/%02x.%1x",
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fd = open(file,O_RDWR);
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if (fd != -1) is_write = TRUE;
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} else switch (is_write) {
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fd = open(file,O_RDWR);
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fd = open(file,O_RDONLY);
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linuxPciCfgRead(PCITAG tag, int off)
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CARD32 val = 0xffffffff;
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if (-1 != (fd = linuxPciOpenFile(tag,FALSE))) {
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lseek(fd,off,SEEK_SET);
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linuxPciCfgWrite(PCITAG tag, int off, CARD32 val)
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if (-1 != (fd = linuxPciOpenFile(tag,TRUE))) {
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lseek(fd,off,SEEK_SET);
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linuxPciCfgSetBits(PCITAG tag, int off, CARD32 mask, CARD32 bits)
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CARD32 val = 0xffffffff;
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if (-1 != (fd = linuxPciOpenFile(tag,TRUE))) {
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lseek(fd,off,SEEK_SET);
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val = (val & ~mask) | (bits & mask);
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lseek(fd,off,SEEK_SET);
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* This function will convert a BAR address into a host address
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* suitable for passing into the mmap function of a /proc/bus
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ADDRESS linuxTransAddrBusToHost(PCITAG tag, PciAddrType type, ADDRESS addr)
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ADDRESS ret = xf86GetOSOffsetFromPCI(tag, PCI_MEM|PCI_IO, addr);
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* if it is not a BAR address, it must be legacy, (or wrong)
240
#if defined(__powerpc__)
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#ifndef __NR_pciconfig_iobase
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#define __NR_pciconfig_iobase 200
247
linuxPpcBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr)
251
ADDRESS membase = syscall(__NR_pciconfig_iobase, 1,
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PCI_BUS_FROM_TAG(tag), PCI_DFN_FROM_TAG(tag));
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return (addr + membase);
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else if (type == PCI_IO)
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ADDRESS iobase = syscall(__NR_pciconfig_iobase, 2,
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PCI_BUS_FROM_TAG(tag), PCI_DFN_FROM_TAG(tag));
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return (addr + iobase);
265
linuxPpcHostAddrToBusAddr(PCITAG tag, PciAddrType type, ADDRESS addr)
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ADDRESS membase = syscall(__NR_pciconfig_iobase, 1,
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PCI_BUS_FROM_TAG(tag), PCI_DFN_FROM_TAG(tag));
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return (addr - membase);
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else if (type == PCI_IO)
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ADDRESS iobase = syscall(__NR_pciconfig_iobase, 2,
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PCI_BUS_FROM_TAG(tag), PCI_DFN_FROM_TAG(tag));
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return (addr - iobase);
282
#endif /* __powerpc__ */
285
linuxPciCfgReadByte(PCITAG tag, int off)
290
if (-1 != (fd = linuxPciOpenFile(tag,FALSE))) {
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lseek(fd,off,SEEK_SET);
299
linuxPciCfgWriteByte(PCITAG tag, int off, CARD8 val)
303
if (-1 != (fd = linuxPciOpenFile(tag,TRUE))) {
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lseek(fd,off,SEEK_SET);
310
linuxPciCfgReadWord(PCITAG tag, int off)
315
if (-1 != (fd = linuxPciOpenFile(tag,FALSE))) {
316
lseek(fd, off, SEEK_SET);
320
return PCI_CPU16(val);
324
linuxPciCfgWriteWord(PCITAG tag, int off, CARD16 val)
328
if (-1 != (fd = linuxPciOpenFile(tag,TRUE))) {
329
lseek(fd, off, SEEK_SET);
330
val = PCI_CPU16(val);
335
#ifndef INCLUDE_XF86_NO_DOMAIN
338
* Compiling the following simply requires the presence of <linux/pci.c>.
339
* Actually running this is another matter altogether...
341
* This scheme requires that the kernel allow mmap()'ing of a host bridge's I/O
342
* and memory spaces through its /proc/bus/pci/BUS/DFN entry. Which one is
343
* determined by a prior ioctl().
345
* For the sparc64 port, this means 2.4.12 or later. For ppc, this
346
* functionality is almost, but not quite there yet. Alpha and other kernel
347
* ports to multi-domain architectures still need to implement this.
349
* This scheme is also predicated on the use of an IOADDRESS compatible type to
350
* designate I/O addresses. Although IOADDRESS is defined as an unsigned
351
* integral type, it is actually the virtual address of, i.e. a pointer to, the
352
* I/O port to access. And so, the inX/outX macros in "compiler.h" need to be
353
* #define'd appropriately (as is done on SPARC's).
355
* Another requirement to port this scheme to another multi-domain architecture
356
* is to add the appropriate entries in the pciControllerSizes array below.
358
* TO DO: Address the deleterious reaction some host bridges have to master
359
* aborts. This is already done for secondary PCI buses, but not yet
360
* for accesses to primary buses (except for the SPARC port, where
361
* master aborts are avoided during PCI scans).
364
#include <linux/pci.h>
366
#ifndef PCIIOC_BASE /* Ioctls for /proc/bus/pci/X/Y nodes. */
367
#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
369
/* Get controller for PCI device. */
370
#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00)
371
/* Set mmap state to I/O space. */
372
#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01)
373
/* Set mmap state to MEM space. */
374
#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02)
375
/* Enable/disable write-combining. */
376
#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03)
380
/* This probably shouldn't be Linux-specific */
382
xf86GetPciHostConfigFromTag(PCITAG Tag)
384
int bus = PCI_BUS_FROM_TAG(Tag);
385
pciBusInfo_t *pBusInfo;
387
while ((bus < pciNumBuses) && (pBusInfo = pciBusInfo[bus])) {
388
if (bus == pBusInfo->primary_bus)
389
return pBusInfo->bridge;
390
bus = pBusInfo->primary_bus;
393
return NULL; /* Bad data */
397
* This is ugly, but until I can extract this information from the kernel,
398
* it'll have to do. The default I/O space size is 64K, and 4G for memory.
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* Anything else needs to go in this table. (PowerPC folk take note.)
401
* Note that Linux/SPARC userland is 32-bit, so 4G overflows to zero here.
403
* Please keep this table in ascending vendor/device order.
405
static struct pciSizes {
406
unsigned short vendor, device;
407
unsigned long io_size, mem_size;
408
} pciControllerSizes[] = {
410
PCI_VENDOR_SUN, PCI_CHIP_PSYCHO,
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PCI_VENDOR_SUN, PCI_CHIP_SCHIZO,
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1U << 24, 1U << 31 /* ??? */
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PCI_VENDOR_SUN, PCI_CHIP_SABRE,
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1U << 24, (unsigned long)(1ULL << 32)
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PCI_VENDOR_SUN, PCI_CHIP_HUMMINGBIRD,
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1U << 24, (unsigned long)(1ULL << 32)
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#define NUM_SIZES (sizeof(pciControllerSizes) / sizeof(pciControllerSizes[0]))
429
linuxGetIOSize(PCITAG Tag)
434
/* Find host bridge */
435
if ((pPCI = xf86GetPciHostConfigFromTag(Tag))) {
436
/* Look up vendor/device */
437
for (i = 0; i < NUM_SIZES; i++) {
438
if (pPCI->pci_vendor > pciControllerSizes[i].vendor)
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if (pPCI->pci_vendor < pciControllerSizes[i].vendor)
442
if (pPCI->pci_device > pciControllerSizes[i].device)
444
if (pPCI->pci_device < pciControllerSizes[i].device)
446
return pciControllerSizes[i].io_size;
450
return 1U << 16; /* Default to 64K */
454
linuxGetSizes(PCITAG Tag, unsigned long *io_size, unsigned long *mem_size)
459
*io_size = (1U << 16); /* Default to 64K */
460
*mem_size = (unsigned long)(1ULL << 32); /* Default to 4G */
462
/* Find host bridge */
463
if ((pPCI = xf86GetPciHostConfigFromTag(Tag))) {
464
/* Look up vendor/device */
465
for (i = 0; i < NUM_SIZES; i++) {
466
if (pPCI->pci_vendor > pciControllerSizes[i].vendor)
468
if (pPCI->pci_vendor < pciControllerSizes[i].vendor)
470
if (pPCI->pci_device > pciControllerSizes[i].device)
472
if (pPCI->pci_device < pciControllerSizes[i].device)
474
*io_size = pciControllerSizes[i].io_size;
475
*mem_size = pciControllerSizes[i].mem_size;
482
xf86GetPciDomain(PCITAG Tag)
487
pPCI = xf86GetPciHostConfigFromTag(Tag);
489
if (pPCI && (result = PCI_DOM_FROM_BUS(pPCI->busnum)))
492
if (!pPCI || pPCI->fakeDevice)
493
return 1; /* Domain 0 is reserved */
495
if ((fd = linuxPciOpenFile(pPCI ? pPCI->tag : 0,FALSE)) < 0)
498
if ((result = ioctl(fd, PCIIOC_CONTROLLER, 0)) < 0)
501
return result + 1; /* Domain 0 is reserved */
505
linuxMapPci(int ScreenNum, int Flags, PCITAG Tag,
506
ADDRESS Base, unsigned long Size, int mmap_ioctl)
510
unsigned char *result;
511
ADDRESS realBase, Offset;
512
int fd, mmapflags, prot;
516
pPCI = xf86GetPciHostConfigFromTag(Tag);
518
if (((fd = linuxPciOpenFile(pPCI ? pPCI->tag : 0,FALSE)) < 0) ||
519
(ioctl(fd, mmap_ioctl, 0) < 0))
522
/* Note: IA-64 doesn't compile this and doesn't need to */
525
# ifndef MAP_WRITECOMBINED
526
# define MAP_WRITECOMBINED 0x00010000
528
# ifndef MAP_NONCACHED
529
# define MAP_NONCACHED 0x00020000
532
if (Flags & VIDMEM_FRAMEBUFFER)
533
mmapflags = MAP_SHARED | MAP_WRITECOMBINED;
535
mmapflags = MAP_SHARED | MAP_NONCACHED;
537
#else /* !__ia64__ */
539
mmapflags = (Flags & VIDMEM_FRAMEBUFFER) / VIDMEM_FRAMEBUFFER;
541
if (ioctl(fd, PCIIOC_WRITE_COMBINE, mmapflags) < 0)
544
mmapflags = MAP_SHARED;
546
#endif /* ?__ia64__ */
548
/* Align to page boundary */
549
realBase = Base & ~(getpagesize() - 1);
550
Offset = Base - realBase;
552
if (Flags & VIDMEM_READONLY)
555
prot = PROT_READ | PROT_WRITE;
557
result = mmap(NULL, Size + Offset, prot, mmapflags, fd, realBase);
559
if (!result || ((pointer)result == MAP_FAILED))
562
xf86MakeNewMapping(ScreenNum, Flags, realBase, Size + Offset, result);
564
return result + Offset;
567
if (mmap_ioctl == PCIIOC_MMAP_IS_MEM)
568
return xf86MapVidMem(ScreenNum, Flags, Base, Size);
573
#define MAX_DOMAINS 257
574
static pointer DomainMmappedIO[MAX_DOMAINS];
575
static pointer DomainMmappedMem[MAX_DOMAINS];
578
linuxOpenLegacy(PCITAG Tag, char *name)
580
#define PREFIX "/sys/class/pci_bus/%04x:%02x/%s"
583
pciBusInfo_t *pBusInfo;
584
pciConfigPtr bridge = NULL;
587
path = xalloc(strlen(PREFIX) + strlen(name));
592
domain = xf86GetPciDomain(Tag);
593
bus = PCI_BUS_NO_DOMAIN(PCI_BUS_FROM_TAG(Tag));
595
/* Domain 0 is reserved -- see xf86GetPciDomain() */
596
if ((domain <= 0) || (domain >= MAX_DOMAINS))
597
FatalError("linuxOpenLegacy(): domain out of range\n");
599
sprintf(path, PREFIX, domain - 1, bus, name);
600
fd = open(path, O_RDWR);
606
pBusInfo = pciBusInfo[bus];
607
if (!pBusInfo || (bridge == pBusInfo->bridge) ||
608
!(bridge = pBusInfo->bridge)) {
621
* xf86MapDomainMemory - memory map PCI domain memory
623
* This routine maps the memory region in the domain specified by Tag and
624
* returns a pointer to it. The pointer is saved for future use if it's in
625
* the legacy ISA memory space (memory in a domain between 0 and 1MB).
628
xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag,
629
ADDRESS Base, unsigned long Size)
631
int domain = xf86GetPciDomain(Tag);
635
* We use /proc/bus/pci on non-legacy addresses or if the Linux sysfs
636
* legacy_mem interface is unavailable.
638
if (Base > 1024*1024)
639
return linuxMapPci(ScreenNum, Flags, Tag, Base, Size,
642
if ((fd = linuxOpenLegacy(Tag, "legacy_mem")) < 0)
643
return linuxMapPci(ScreenNum, Flags, Tag, Base, Size,
647
/* If we haven't already mapped this legacy space, try to. */
648
if (!DomainMmappedMem[domain]) {
649
DomainMmappedMem[domain] = mmap(NULL, 1024*1024, PROT_READ|PROT_WRITE,
651
if (DomainMmappedMem[domain] == MAP_FAILED) {
653
perror("mmap failure");
654
FatalError("xf86MapDomainMem(): mmap() failure\n");
659
return (pointer)((char *)DomainMmappedMem[domain] + Base);
663
* xf86MapDomainIO - map I/O space in this domain
665
* Each domain has a legacy ISA I/O space. This routine will try to
666
* map it using the Linux sysfs legacy_io interface. If that fails,
667
* it'll fall back to using /proc/bus/pci.
669
* If the legacy_io interface *does* exist, the file descriptor (fd below)
670
* will be saved in the DomainMmappedIO array in the upper bits of the
671
* pointer. Callers will do I/O with small port numbers (<64k values), so
672
* the platform I/O code can extract the port number and the fd, lseek to
673
* the port number in the legacy_io file, and issue the read or write.
675
* This has no means of returning failure, so all errors are fatal
678
xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag,
679
IOADDRESS Base, unsigned long Size)
681
int domain = xf86GetPciDomain(Tag);
684
if ((domain <= 0) || (domain >= MAX_DOMAINS))
685
FatalError("xf86MapDomainIO(): domain out of range\n");
687
if (DomainMmappedIO[domain])
688
return (IOADDRESS)DomainMmappedIO[domain] + Base;
690
/* Permanently map all of I/O space */
691
if ((fd = linuxOpenLegacy(Tag, "legacy_io")) < 0) {
692
DomainMmappedIO[domain] = linuxMapPci(ScreenNum, Flags, Tag,
693
0, linuxGetIOSize(Tag),
695
/* ia64 can't mmap legacy IO port space */
696
if (!DomainMmappedIO[domain])
699
else { /* legacy_io file exists, encode fd */
700
DomainMmappedIO[domain] = (pointer)(fd << 24);
703
return (IOADDRESS)DomainMmappedIO[domain] + Base;
707
* xf86ReadDomainMemory - copy from domain memory into a caller supplied buffer
710
xf86ReadDomainMemory(PCITAG Tag, ADDRESS Base, int Len, unsigned char *Buf)
712
unsigned char *ptr, *src;
715
int len, pagemask = getpagesize() - 1;
717
unsigned int i, dom, bus, dev, func;
722
dom = PCI_DOM_FROM_TAG(Tag);
723
bus = PCI_BUS_FROM_TAG(Tag);
724
dev = PCI_DEV_FROM_TAG(Tag);
725
func = PCI_FUNC_FROM_TAG(Tag);
726
sprintf(file, "/sys/devices/pci%04x:%02x/%04x:%02x:%02x.%1x/rom",
727
dom, bus, dom, bus, dev, func);
730
* If the caller wants the ROM and the sysfs rom interface exists,
731
* try to use it instead of reading it from /proc/bus/pci.
733
if (((Base & 0xfffff) == 0xC0000) && (stat(file, &st) == 0)) {
734
if ((fd = open(file, O_RDWR)))
737
/* enable the ROM first */
739
lseek(fd, 0, SEEK_SET);
741
/* copy the ROM until we hit Len, EOF or read error */
742
for (i = 0; i < Len && read(fd, Buf, 1) > 0; Buf++, i++)
751
/* Ensure page boundaries */
752
offset = Base & ~pagemask;
753
size = ((Base + Len + pagemask) & ~pagemask) - offset;
755
ptr = xf86MapDomainMemory(-1, VIDMEM_READONLY, Tag, offset, size);
760
/* Using memcpy() here can hang the system */
761
src = ptr + (Base - offset);
762
for (len = Len; len-- > 0;)
765
xf86UnMapVidMem(-1, ptr, size);
771
xf86BusAccWindowsFromOS(void)
773
pciConfigPtr *ppPCI, pPCI;
776
unsigned long io_size, mem_size;
779
if ((ppPCI = xf86scanpci(0))) {
780
for (; (pPCI = *ppPCI); ppPCI++) {
781
if ((pPCI->pci_base_class != PCI_CLASS_BRIDGE) ||
782
(pPCI->pci_sub_class != PCI_SUBCLASS_BRIDGE_HOST))
785
domain = xf86GetPciDomain(pPCI->tag);
786
linuxGetSizes(pPCI->tag, &io_size, &mem_size);
788
RANGE(range, 0, (ADDRESS)(mem_size - 1),
789
RANGE_TYPE(ResExcMemBlock, domain));
790
pRes = xf86AddResToList(pRes, &range, -1);
792
RANGE(range, 0, (IOADDRESS)(io_size - 1),
793
RANGE_TYPE(ResExcIoBlock, domain));
794
pRes = xf86AddResToList(pRes, &range, -1);
805
xf86PciBusAccWindowsFromOS(void)
807
pciConfigPtr *ppPCI, pPCI;
810
unsigned long io_size, mem_size;
813
if ((ppPCI = xf86scanpci(0))) {
814
for (; (pPCI = *ppPCI); ppPCI++) {
815
if ((pPCI->pci_base_class != PCI_CLASS_BRIDGE) ||
816
(pPCI->pci_sub_class != PCI_SUBCLASS_BRIDGE_HOST))
819
domain = xf86GetPciDomain(pPCI->tag);
820
linuxGetSizes(pPCI->tag, &io_size, &mem_size);
822
RANGE(range, 0, (ADDRESS)(mem_size - 1),
823
RANGE_TYPE(ResExcMemBlock, domain));
824
pRes = xf86AddResToList(pRes, &range, -1);
826
RANGE(range, 0, (IOADDRESS)(io_size - 1),
827
RANGE_TYPE(ResExcIoBlock, domain));
828
pRes = xf86AddResToList(pRes, &range, -1);
840
xf86AccResFromOS(resPtr pRes)
842
pciConfigPtr *ppPCI, pPCI;
844
unsigned long io_size, mem_size;
847
if ((ppPCI = xf86scanpci(0))) {
848
for (; (pPCI = *ppPCI); ppPCI++) {
849
if ((pPCI->pci_base_class != PCI_CLASS_BRIDGE) ||
850
(pPCI->pci_sub_class != PCI_SUBCLASS_BRIDGE_HOST))
853
domain = xf86GetPciDomain(pPCI->tag);
854
linuxGetSizes(pPCI->tag, &io_size, &mem_size);
857
* At minimum, the top and bottom resources must be claimed, so
858
* that resources that are (or appear to be) unallocated can be
861
RANGE(range, 0x00000000u, 0x0009ffffu,
862
RANGE_TYPE(ResExcMemBlock, domain));
863
pRes = xf86AddResToList(pRes, &range, -1);
864
RANGE(range, 0x000c0000u, 0x000effffu,
865
RANGE_TYPE(ResExcMemBlock, domain));
866
pRes = xf86AddResToList(pRes, &range, -1);
867
RANGE(range, 0x000f0000u, 0x000fffffu,
868
RANGE_TYPE(ResExcMemBlock, domain));
869
pRes = xf86AddResToList(pRes, &range, -1);
871
RANGE(range, (ADDRESS)(mem_size - 1), (ADDRESS)(mem_size - 1),
872
RANGE_TYPE(ResExcMemBlock, domain));
873
pRes = xf86AddResToList(pRes, &range, -1);
875
RANGE(range, 0x00000000u, 0x00000000u,
876
RANGE_TYPE(ResExcIoBlock, domain));
877
pRes = xf86AddResToList(pRes, &range, -1);
878
RANGE(range, (IOADDRESS)(io_size - 1), (IOADDRESS)(io_size - 1),
879
RANGE_TYPE(ResExcIoBlock, domain));
880
pRes = xf86AddResToList(pRes, &range, -1);
890
#endif /* !INCLUDE_XF86_NO_DOMAIN */