2
* Copyright 1998 by Alan Hourihane, Wigan, England.
4
* Permission to use, copy, modify, distribute, and sell this software and its
5
* documentation for any purpose is hereby granted without fee, provided that
6
* the above copyright notice appear in all copies and that both that
7
* copyright notice and this permission notice appear in supporting
8
* documentation, and that the name of Alan Hourihane not be used in
9
* advertising or publicity pertaining to distribution of the software without
10
* specific, written prior permission. Alan Hourihane makes no representations
11
* about the suitability of this software for any purpose. It is provided
12
* "as is" without express or implied warranty.
14
* ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16
* EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18
* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
20
* PERFORMANCE OF THIS SOFTWARE.
22
* Authors: Alan Hourihane, <alanh@fairlite.demon.co.uk>
24
* IBM RAMDAC routines.
26
/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/IBM.c,v 1.12 2003/02/17 16:08:29 dawes Exp $ */
28
#ifdef HAVE_XORG_CONFIG_H
29
#include <xorg-config.h>
33
#include "xf86_OSproc.h"
34
#include "xf86_ansic.h"
36
#include "xf86Cursor.h"
38
#define INIT_IBM_RAMDAC_INFO
40
#include "xf86RamDacPriv.h"
42
#define INITIALFREQERR 100000
45
IBMramdac640CalculateMNPCForClock(
46
unsigned long RefClock, /* In 100Hz units */
47
unsigned long ReqClock, /* In 100Hz units */
48
char IsPixClock, /* boolean, is this the pixel or the sys clock */
49
unsigned long MinClock, /* Min VCO rating */
50
unsigned long MaxClock, /* Max VCO rating */
51
unsigned long *rM, /* M Out */
52
unsigned long *rN, /* N Out */
53
unsigned long *rP, /* Min P In, P Out */
54
unsigned long *rC /* C Out */
57
unsigned long M, N, P, iP = *rP;
58
unsigned long IntRef, VCO, Clock;
59
long freqErr, lowestFreqErr = INITIALFREQERR;
60
unsigned long ActualClock = 0;
62
for (N = 0; N <= 63; N++)
64
IntRef = RefClock / (N + 1);
66
break; /* IntRef needs to be >= 1MHz */
67
for (M = 2; M <= 127; M++)
69
VCO = IntRef * (M + 1);
70
if ((VCO < MinClock) || (VCO > MaxClock))
72
for (P = iP; P <= 4; P++)
75
Clock = (RefClock * (M + 1)) / ((N + 1) * 2 * P);
77
Clock = (RefClock * (M + 1)) / (N + 1);
79
freqErr = (Clock - ReqClock);
83
/* PixelClock gets rounded up always so monitor reports
90
if (freqErr < lowestFreqErr)
95
*rC = (VCO <= 1280000 ? 1 : 2);
98
lowestFreqErr = freqErr;
99
/* Return if we found an exact match */
101
return (ActualClock);
107
return (ActualClock);
111
IBMramdac526CalculateMNPCForClock(
112
unsigned long RefClock, /* In 100Hz units */
113
unsigned long ReqClock, /* In 100Hz units */
114
char IsPixClock, /* boolean, is this the pixel or the sys clock */
115
unsigned long MinClock, /* Min VCO rating */
116
unsigned long MaxClock, /* Max VCO rating */
117
unsigned long *rM, /* M Out */
118
unsigned long *rN, /* N Out */
119
unsigned long *rP, /* Min P In, P Out */
120
unsigned long *rC /* C Out */
123
unsigned long M, N, P, iP = *rP;
124
unsigned long IntRef, VCO, Clock;
125
long freqErr, lowestFreqErr = INITIALFREQERR;
126
unsigned long ActualClock = 0;
128
for (N = 0; N <= 63; N++)
130
IntRef = RefClock / (N + 1);
132
break; /* IntRef needs to be >= 1MHz */
133
for (M = 0; M <= 63; M++)
135
VCO = IntRef * (M + 1);
136
if ((VCO < MinClock) || (VCO > MaxClock))
138
for (P = iP; P <= 4; P++)
141
Clock = (RefClock * (M + 1)) / ((N + 1) * 2 * P);
145
freqErr = (Clock - ReqClock);
149
/* PixelClock gets rounded up always so monitor reports
150
correct frequency. */
156
if (freqErr < lowestFreqErr)
161
*rC = (VCO <= 1280000 ? 1 : 2);
164
lowestFreqErr = freqErr;
165
/* Return if we found an exact match */
167
return (ActualClock);
173
return (ActualClock);
177
IBMramdacRestore(ScrnInfoPtr pScrn, RamDacRecPtr ramdacPtr,
178
RamDacRegRecPtr ramdacReg)
180
int i, maxreg, dacreg;
182
switch (ramdacPtr->RamDacType) {
193
/* Here we pass a short, so that we can evaluate a mask too */
194
/* So that the mask is the high byte and the data the low byte */
195
for (i=0;i<maxreg;i++)
196
(*ramdacPtr->WriteDAC)
197
(pScrn, i, (ramdacReg->DacRegs[i] & 0xFF00) >> 8,
198
ramdacReg->DacRegs[i]);
200
(*ramdacPtr->WriteAddress)(pScrn, 0);
201
for (i=0;i<dacreg;i++)
202
(*ramdacPtr->WriteData)(pScrn, ramdacReg->DAC[i]);
206
IBMramdacSave(ScrnInfoPtr pScrn, RamDacRecPtr ramdacPtr,
207
RamDacRegRecPtr ramdacReg)
209
int i, maxreg, dacreg;
211
switch (ramdacPtr->RamDacType) {
222
(*ramdacPtr->ReadAddress)(pScrn, 0);
223
for (i=0;i<dacreg;i++)
224
ramdacReg->DAC[i] = (*ramdacPtr->ReadData)(pScrn);
226
for (i=0;i<maxreg;i++)
227
ramdacReg->DacRegs[i] = (*ramdacPtr->ReadDAC)(pScrn, i);
231
IBMramdacProbe(ScrnInfoPtr pScrn, RamDacSupportedInfoRecPtr ramdacs/* , RamDacRecPtr ramdacPtr*/)
233
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
234
RamDacHelperRecPtr ramdacHelperPtr = NULL;
235
Bool RamDacIsSupported = FALSE;
236
int IBMramdac_ID = -1;
238
unsigned char id, rev, id2, rev2;
240
/* read ID and revision */
241
rev = (*ramdacPtr->ReadDAC)(pScrn, IBMRGB_rev);
242
id = (*ramdacPtr->ReadDAC)(pScrn, IBMRGB_id);
244
/* check if ID and revision are read only */
245
(*ramdacPtr->WriteDAC)(pScrn, ~rev, 0, IBMRGB_rev);
246
(*ramdacPtr->WriteDAC)(pScrn, ~id, 0, IBMRGB_id);
247
rev2 = (*ramdacPtr->ReadDAC)(pScrn, IBMRGB_rev);
248
id2 = (*ramdacPtr->ReadDAC)(pScrn, IBMRGB_id);
252
if (rev == 0xc0) IBMramdac_ID = IBM624_RAMDAC;
253
if (rev == 0x80) IBMramdac_ID = IBM624DB_RAMDAC;
256
if (rev == 0x1c) IBMramdac_ID = IBM640_RAMDAC;
259
IBMramdac_ID = IBM525_RAMDAC;
262
if (rev == 0xf0) IBMramdac_ID = IBM524_RAMDAC;
263
if (rev == 0xe0) IBMramdac_ID = IBM524A_RAMDAC;
264
if (rev == 0xc0) IBMramdac_ID = IBM526_RAMDAC;
265
if (rev == 0x80) IBMramdac_ID = IBM526DB_RAMDAC;
269
if (id == 1 || id == 2) {
270
if (id == id2 && rev == rev2) { /* IBM RGB52x found */
271
/* check for 128bit VRAM -> RGB528 */
272
if (((*ramdacPtr->ReadDAC)(pScrn, IBMRGB_misc1) & 0x03) == 0x03) {
273
IBMramdac_ID = IBM528_RAMDAC; /* 128bit DAC found */
275
IBMramdac_ID = IBM528A_RAMDAC;
280
(*ramdacPtr->WriteDAC)(pScrn, rev, 0, IBMRGB_rev);
281
(*ramdacPtr->WriteDAC)(pScrn, id, 0, IBMRGB_id);
283
if (IBMramdac_ID == -1) {
284
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
285
"Cannot determine IBM RAMDAC type, aborting\n");
288
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
289
"Attached RAMDAC is %s\n", IBMramdacDeviceInfo[IBMramdac_ID&0xFFFF].DeviceName);
292
for (i=0;ramdacs[i].token != -1;i++) {
293
if (ramdacs[i].token == IBMramdac_ID)
294
RamDacIsSupported = TRUE;
297
if (!RamDacIsSupported) {
298
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
299
"This IBM RAMDAC is NOT supported by this driver, aborting\n");
303
ramdacHelperPtr = RamDacHelperCreateInfoRec();
304
switch (IBMramdac_ID) {
306
case IBM526DB_RAMDAC:
307
ramdacHelperPtr->SetBpp = IBMramdac526SetBpp;
308
ramdacHelperPtr->HWCursorInit = IBMramdac526HWCursorInit;
311
ramdacHelperPtr->SetBpp = IBMramdac640SetBpp;
312
ramdacHelperPtr->HWCursorInit = IBMramdac640HWCursorInit;
315
ramdacPtr->RamDacType = IBMramdac_ID;
316
ramdacHelperPtr->RamDacType = IBMramdac_ID;
317
ramdacHelperPtr->Save = IBMramdacSave;
318
ramdacHelperPtr->Restore = IBMramdacRestore;
320
return ramdacHelperPtr;
324
IBMramdac526SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr ramdacReg)
326
ramdacReg->DacRegs[IBMRGB_key_control] = 0x00; /* Disable Chroma Key */
328
switch (pScrn->bitsPerPixel) {
330
ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_32BPP;
331
ramdacReg->DacRegs[IBMRGB_32bpp] = B32_DCOL_DIRECT;
332
ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
333
ramdacReg->DacRegs[IBMRGB_16bpp] = 0;
334
ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
335
if (pScrn->overlayFlags & OVERLAY_8_32_PLANAR) {
336
ramdacReg->DacRegs[IBMRGB_key_control] = 0x01; /* Enable Key */
337
ramdacReg->DacRegs[IBMRGB_key] = 0xFF;
338
ramdacReg->DacRegs[IBMRGB_key_mask] = 0xFF;
342
ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_24BPP;
343
ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
344
ramdacReg->DacRegs[IBMRGB_24bpp] = B24_DCOL_DIRECT;
345
ramdacReg->DacRegs[IBMRGB_16bpp] = 0;
346
ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
349
if (pScrn->depth == 16) {
350
ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_16BPP;
351
ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
352
ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
353
ramdacReg->DacRegs[IBMRGB_16bpp] = B16_DCOL_DIRECT|B16_LINEAR |
354
B16_CONTIGUOUS | B16_565;
355
ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
357
ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_16BPP;
358
ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
359
ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
360
ramdacReg->DacRegs[IBMRGB_16bpp] = B16_DCOL_DIRECT|B16_LINEAR |
361
B16_CONTIGUOUS | B16_555;
362
ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
366
ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_8BPP;
367
ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
368
ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
369
ramdacReg->DacRegs[IBMRGB_16bpp] = 0;
370
ramdacReg->DacRegs[IBMRGB_8bpp] = B8_DCOL_INDIRECT;
373
ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_4BPP;
374
ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
375
ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
376
ramdacReg->DacRegs[IBMRGB_16bpp] = 0;
377
ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
381
IBMramdac526SetBppProc *IBMramdac526SetBppWeak(void) {
382
return IBMramdac526SetBpp;
386
IBMramdac640SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr ramdacReg)
388
unsigned char bpp = 0x00;
389
unsigned char overlaybpp = 0x00;
390
unsigned char offset = 0x00;
391
unsigned char dispcont = 0x44;
393
ramdacReg->DacRegs[RGB640_SER_WID_03_00] = 0x00;
394
ramdacReg->DacRegs[RGB640_SER_WID_07_04] = 0x00;
395
ramdacReg->DacRegs[RGB640_DIAGS] = 0x07;
397
switch (pScrn->depth) {
399
ramdacReg->DacRegs[RGB640_SER_07_00] = 0x00;
400
ramdacReg->DacRegs[RGB640_SER_15_08] = 0x00;
401
ramdacReg->DacRegs[RGB640_SER_23_16] = 0x00;
402
ramdacReg->DacRegs[RGB640_SER_31_24] = 0x00;
403
ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_16_1; /*16:1 Mux*/
404
ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PCLK_8; /* pll / 8 */
408
ramdacReg->DacRegs[RGB640_SER_07_00] = 0x10;
409
ramdacReg->DacRegs[RGB640_SER_15_08] = 0x11;
410
ramdacReg->DacRegs[RGB640_SER_23_16] = 0x00;
411
ramdacReg->DacRegs[RGB640_SER_31_24] = 0x00;
412
ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_8_1; /* 8:1 Mux*/
413
ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PCLK_8; /* pll / 8 */
417
ramdacReg->DacRegs[RGB640_SER_07_00] = 0x10;
418
ramdacReg->DacRegs[RGB640_SER_15_08] = 0x11;
419
ramdacReg->DacRegs[RGB640_SER_23_16] = 0x00;
420
ramdacReg->DacRegs[RGB640_SER_31_24] = 0x00;
421
ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_8_1; /* 8:1 Mux*/
422
ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PCLK_8; /* pll / 8 */
426
ramdacReg->DacRegs[RGB640_SER_07_00] = 0x30;
427
ramdacReg->DacRegs[RGB640_SER_15_08] = 0x31;
428
ramdacReg->DacRegs[RGB640_SER_23_16] = 0x32;
429
ramdacReg->DacRegs[RGB640_SER_31_24] = 0x33;
430
ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_4_1; /* 4:1 Mux*/
431
ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PCLK_8; /* pll / 8 */
433
if (pScrn->overlayFlags & OVERLAY_8_32_PLANAR) {
434
ramdacReg->DacRegs[RGB640_SER_WID_07_04] = 0x04;
435
ramdacReg->DacRegs[RGB640_CHROMA_KEY0] = 0xFF;
436
ramdacReg->DacRegs[RGB640_CHROMA_MASK0] = 0xFF;
442
case 30: /* 10 bit dac */
443
ramdacReg->DacRegs[RGB640_SER_07_00] = 0x30;
444
ramdacReg->DacRegs[RGB640_SER_15_08] = 0x31;
445
ramdacReg->DacRegs[RGB640_SER_23_16] = 0x32;
446
ramdacReg->DacRegs[RGB640_SER_31_24] = 0x33;
447
ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_4_1; /* 4:1 Mux*/
448
ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PSIZE10 |
449
IBM640_PCLK_8; /* pll / 8 */
456
for (i=0x100;i<0x140;i+=4) {
457
/* Initialize FrameBuffer Window Attribute Table */
458
ramdacReg->DacRegs[i+0] = bpp;
459
ramdacReg->DacRegs[i+1] = offset;
460
ramdacReg->DacRegs[i+2] = 0x00;
461
ramdacReg->DacRegs[i+3] = 0x00;
462
/* Initialize Overlay Window Attribute Table */
463
ramdacReg->DacRegs[i+0x100] = overlaybpp;
464
ramdacReg->DacRegs[i+0x101] = 0x00;
465
ramdacReg->DacRegs[i+0x102] = 0x00;
466
ramdacReg->DacRegs[i+0x103] = dispcont;
472
IBMramdac526ShowCursor(ScrnInfoPtr pScrn)
474
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
476
/* Enable cursor - X11 mode */
477
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs, 0x00, 0x07);
481
IBMramdac640ShowCursor(ScrnInfoPtr pScrn)
483
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
485
/* Enable cursor - mode2 (x11 mode) */
486
(*ramdacPtr->WriteDAC)(pScrn, RGB640_CURSOR_CONTROL, 0x00, 0x0B);
487
(*ramdacPtr->WriteDAC)(pScrn, RGB640_CROSSHAIR_CONTROL, 0x00, 0x00);
491
IBMramdac526HideCursor(ScrnInfoPtr pScrn)
493
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
495
/* Disable cursor - X11 mode */
496
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs, 0x00, 0x24);
500
IBMramdac640HideCursor(ScrnInfoPtr pScrn)
502
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
504
/* Disable cursor - mode2 (x11 mode) */
505
(*ramdacPtr->WriteDAC)(pScrn, RGB640_CURSOR_CONTROL, 0x00, 0x08);
509
IBMramdac526SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
511
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
516
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_hot_x, 0x00, 0x3f);
517
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_hot_y, 0x00, 0x3f);
518
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_xl, 0x00, x & 0xff);
519
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_xh, 0x00, (x>>8) & 0xf);
520
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_yl, 0x00, y & 0xff);
521
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_yh, 0x00, (y>>8) & 0xf);
525
IBMramdac640SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
527
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
532
(*ramdacPtr->WriteDAC)(pScrn, RGB640_CURS_OFFSETX, 0x00, 0x3f);
533
(*ramdacPtr->WriteDAC)(pScrn, RGB640_CURS_OFFSETY, 0x00, 0x3f);
534
(*ramdacPtr->WriteDAC)(pScrn, RGB640_CURS_X_LOW, 0x00, x & 0xff);
535
(*ramdacPtr->WriteDAC)(pScrn, RGB640_CURS_X_HIGH, 0x00, (x>>8) & 0xf);
536
(*ramdacPtr->WriteDAC)(pScrn, RGB640_CURS_Y_LOW, 0x00, y & 0xff);
537
(*ramdacPtr->WriteDAC)(pScrn, RGB640_CURS_Y_HIGH, 0x00, (y>>8) & 0xf);
541
IBMramdac526SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
543
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
545
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_col1_r, 0x00, bg >> 16);
546
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_col1_g, 0x00, bg >> 8);
547
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_col1_b, 0x00, bg);
548
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_col2_r, 0x00, fg >> 16);
549
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_col2_g, 0x00, fg >> 8);
550
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_col2_b, 0x00, fg);
554
IBMramdac640SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
556
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
558
(*ramdacPtr->WriteDAC)(pScrn, RGB640_CURS_COL0, 0x00, 0);
559
(*ramdacPtr->WriteData)(pScrn, fg>>16);
560
(*ramdacPtr->WriteData)(pScrn, fg>>8);
561
(*ramdacPtr->WriteData)(pScrn, fg);
562
(*ramdacPtr->WriteData)(pScrn, bg>>16);
563
(*ramdacPtr->WriteData)(pScrn, bg>>8);
564
(*ramdacPtr->WriteData)(pScrn, bg);
565
(*ramdacPtr->WriteData)(pScrn, fg>>16);
566
(*ramdacPtr->WriteData)(pScrn, fg>>8);
567
(*ramdacPtr->WriteData)(pScrn, fg);
568
(*ramdacPtr->WriteData)(pScrn, bg>>16);
569
(*ramdacPtr->WriteData)(pScrn, bg>>8);
570
(*ramdacPtr->WriteData)(pScrn, bg);
574
IBMramdac526LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
576
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
579
* Output the cursor data. The realize function has put the planes into
580
* their correct order, so we can just blast this out.
582
for (i = 0; i < 1024; i++)
583
(*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_array + i, 0x00, (*src++));
587
IBMramdac640LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
589
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
592
* Output the cursor data. The realize function has put the planes into
593
* their correct order, so we can just blast this out.
595
for (i = 0; i < 1024; i++)
596
(*ramdacPtr->WriteDAC)(pScrn, RGB640_CURS_WRITE + i, 0x00, (*src++));
600
IBMramdac526UseHWCursor(ScreenPtr pScr, CursorPtr pCurs)
606
IBMramdac640UseHWCursor(ScreenPtr pScr, CursorPtr pCurs)
612
IBMramdac526HWCursorInit(xf86CursorInfoPtr infoPtr)
614
infoPtr->MaxWidth = 64;
615
infoPtr->MaxHeight = 64;
616
infoPtr->Flags = HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
617
HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
618
HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1;
619
infoPtr->SetCursorColors = IBMramdac526SetCursorColors;
620
infoPtr->SetCursorPosition = IBMramdac526SetCursorPosition;
621
infoPtr->LoadCursorImage = IBMramdac526LoadCursorImage;
622
infoPtr->HideCursor = IBMramdac526HideCursor;
623
infoPtr->ShowCursor = IBMramdac526ShowCursor;
624
infoPtr->UseHWCursor = IBMramdac526UseHWCursor;
628
IBMramdac640HWCursorInit(xf86CursorInfoPtr infoPtr)
630
infoPtr->MaxWidth = 64;
631
infoPtr->MaxHeight = 64;
632
infoPtr->Flags = HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
633
HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
634
HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1;
635
infoPtr->SetCursorColors = IBMramdac640SetCursorColors;
636
infoPtr->SetCursorPosition = IBMramdac640SetCursorPosition;
637
infoPtr->LoadCursorImage = IBMramdac640LoadCursorImage;
638
infoPtr->HideCursor = IBMramdac640HideCursor;
639
infoPtr->ShowCursor = IBMramdac640ShowCursor;
640
infoPtr->UseHWCursor = IBMramdac640UseHWCursor;