1
/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/vgaReg.h,v 1.3 1999/06/06 08:49:07 dawes Exp $ */
3
* Copyright IBM Corporation 1987,1988,1989
7
* Permission to use, copy, modify, and distribute this software and its
8
* documentation for any purpose and without fee is hereby granted,
9
* provided that the above copyright notice appear in all copies and that
10
* both that copyright notice and this permission notice appear in
11
* supporting documentation, and that the name of IBM not be
12
* used in advertising or publicity pertaining to distribution of the
13
* software without specific, written prior permission.
15
* IBM DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING
16
* ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL
17
* IBM BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR
18
* ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
19
* WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
20
* ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
25
/* $XConsortium: vgaReg.h /main/4 1996/02/21 17:59:02 kaleb $ */
27
#define SET_BYTE_REGISTER( ioport, value ) outb( ioport, value )
28
#define SET_INDEX_REGISTER( ioport, value ) SET_BYTE_REGISTER( ioport, value )
29
#define SET_DATA_REGISTER( ioport, value ) SET_BYTE_REGISTER( ioport, value )
30
/* GJA -- deleted RTIO and ATRIO case here, so that a PCIO #define became
33
#define SET_INDEXED_REGISTER(RegGroup, Index, Value) \
34
(SET_BYTE_REGISTER(RegGroup, Index), \
35
SET_BYTE_REGISTER((RegGroup) + 1, Value))
37
/* There is a jumper on the ega to change this to 0x200 instead !! */
38
#ifdef HAVE_XORG_CONFIG_H
39
#include <xorg-config.h>
42
#if 0 /* This is now a stack variable, as needed */
46
#define AttributeIndexRegister REGBASE + 0xC0
47
#define AttributeDataWriteRegister REGBASE + 0xC0
48
#define AttributeDataReadRegister REGBASE + 0xC1
49
#define AttributeRegister AttributeIndexRegister
50
#define AttributeModeIndex 0x30
51
#define OverScanColorIndex 0x31
52
#define ColorPlaneEnableIndex 0x32
53
#define HorizPelPanIndex 0x33
54
#define ColorSelectIndex 0x34
56
#define SetVideoAttributeIndex( index ) \
57
SET_INDEX_REGISTER( AttributeIndexRegister, index )
58
#define SetVideoAttribute( index, value ) \
59
SetVideoAttributeIndex( index ) ; \
60
SET_BYTE_REGISTER( AttributeDataWriteRegister, value )
63
/* Graphics Registers 03CE & 03CF */
64
#define GraphicsIndexRegister REGBASE + 0xCE
65
#define GraphicsDataRegister REGBASE + 0xCF
66
#define GraphicsRegister GraphicsIndexRegister
67
#define Set_ResetIndex 0x00
68
#define Enb_Set_ResetIndex 0x01
69
#define Color_CompareIndex 0x02
70
#define Data_RotateIndex 0x03
71
#define Read_Map_SelectIndex 0x04
72
#define Graphics_ModeIndex 0x05
73
#define MiscellaneousIndex 0x06
74
#define Color_Dont_CareIndex 0x07
75
#define Bit_MaskIndex 0x08
77
#define SetVideoGraphicsIndex( index ) \
78
SET_INDEX_REGISTER( GraphicsIndexRegister, index )
79
#define SetVideoGraphicsData( value ) \
80
SET_INDEX_REGISTER( GraphicsDataRegister, value )
81
#define SetVideoGraphics( index, value ) \
82
SET_INDEXED_REGISTER( GraphicsRegister, index, value )
85
/* Sequencer Registers 03C4 & 03C5 */
86
#define SequencerIndexRegister REGBASE + 0xC4
87
#define SequencerDataRegister REGBASE + 0xC5
88
#define SequencerRegister SequencerIndexRegister
89
#define Seq_ResetIndex 00
90
#define Clock_ModeIndex 01
91
#define Mask_MapIndex 02
92
#define Char_Map_SelectIndex 03
93
#define Memory_ModeIndex 04
95
#define SetVideoSequencerIndex( index ) \
96
SET_INDEX_REGISTER( SequencerIndexRegister, index )
97
#define SetVideoSequencer( index, value ) \
98
SET_INDEXED_REGISTER( SequencerRegister, index, value )
101
/* BIT CONSTANTS FOR THE VGA/EGA HARDWARE */
102
/* for the Graphics' Data_Rotate Register */
103
#define VGA_ROTATE_FUNC_SHIFT 3
104
#define VGA_COPY_MODE ( 0 << VGA_ROTATE_FUNC_SHIFT ) /* 0x00 */
105
#define VGA_AND_MODE ( 1 << VGA_ROTATE_FUNC_SHIFT ) /* 0x08 */
106
#define VGA_OR_MODE ( 2 << VGA_ROTATE_FUNC_SHIFT ) /* 0x10 */
107
#define VGA_XOR_MODE ( 3 << VGA_ROTATE_FUNC_SHIFT ) /* 0x18 */
108
/* for the Graphics' Graphics_Mode Register */
109
#define VGA_READ_MODE_SHIFT 3
110
#define VGA_WRITE_MODE_0 0
111
#define VGA_WRITE_MODE_1 1
112
#define VGA_WRITE_MODE_2 2
113
#define VGA_WRITE_MODE_3 3
114
#define VGA_READ_MODE_0 ( 0 << VGA_READ_MODE_SHIFT )
115
#define VGA_READ_MODE_1 ( 1 << VGA_READ_MODE_SHIFT )
118
/* I/O port address define for extended EGC */
119
#define EGC_PLANE 0x4a0 /* EGC active plane select */
120
#define EGC_READ 0x4a2 /* EGC FGC,EGC,Read Plane */
121
#define EGC_MODE 0x4a4 /* EGC Mode register & ROP */
122
#define EGC_FGC 0x4a6 /* EGC Forground color */
123
#define EGC_MASK 0x4a8 /* EGC Mask register */
124
#define EGC_BGC 0x4aa /* EGC Background color */
125
#define EGC_ADD 0x4ac /* EGC Dest/Source address */
126
#define EGC_LENGTH 0x4ae /* EGC Bit length */
128
#define PALETTE_ADD 0xa8 /* Palette address */
129
#define PALETTE_GRE 0xaa /* Palette Green */
130
#define PALETTE_RED 0xac /* Palette Red */
131
#define PALETTE_BLU 0xae /* Palette Blue */
133
#define EGC_AND_MODE 0x2c8c /* (S&P&D)|(~S&D) */
134
#define EGC_AND_INV_MODE 0x2c2c /* (S&P&~D)|(~S&D) */
135
#define EGC_OR_MODE 0x2cec /* S&(P|D)|(~S&D) */
136
#define EGC_OR_INV_MODE 0x2cbc /* S&(P|~D)|(~S&D) */
137
#define EGC_XOR_MODE 0x2c6c /* (S&(P&~D|~P&D))|(~S&D) */
138
#define EGC_XOR_INV_MODE 0x2c9c /* (S&(P&D)|(~P&~D))|(~S&D) */
139
#define EGC_COPY_MODE 0x2cac /* (S&P)|(~S&D) */