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* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
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* Routines for control of EMU10K1 chips
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* Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
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* Added support for Audigy 2 Value.
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* Added EMU 1010 support.
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* General bug fixes and enhancements.
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#include <linux/sched.h>
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#include <linux/kthread.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include <linux/mutex.h>
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#include <sound/core.h>
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#include <sound/emu10k1.h>
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#include <linux/firmware.h>
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#define HANA_FILENAME "emu/hana.fw"
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#define DOCK_FILENAME "emu/audio_dock.fw"
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#define EMU1010B_FILENAME "emu/emu1010b.fw"
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#define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
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#define EMU0404_FILENAME "emu/emu0404.fw"
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#define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
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MODULE_FIRMWARE(HANA_FILENAME);
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MODULE_FIRMWARE(DOCK_FILENAME);
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MODULE_FIRMWARE(EMU1010B_FILENAME);
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MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
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MODULE_FIRMWARE(EMU0404_FILENAME);
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MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
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/*************************************************************************
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*************************************************************************/
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void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
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snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
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snd_emu10k1_ptr_write(emu, IP, ch, 0);
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snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
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snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
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snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
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snd_emu10k1_ptr_write(emu, CPF, ch, 0);
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snd_emu10k1_ptr_write(emu, CCR, ch, 0);
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snd_emu10k1_ptr_write(emu, PSST, ch, 0);
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snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
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snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
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snd_emu10k1_ptr_write(emu, Z1, ch, 0);
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snd_emu10k1_ptr_write(emu, Z2, ch, 0);
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snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
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snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
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snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
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snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
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snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
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snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
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snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
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snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
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snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
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/*** these are last so OFF prevents writing ***/
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snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
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snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
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snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
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snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
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snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
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/* Audigy extra stuffs */
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snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
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snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
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snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
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snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
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snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
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snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
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snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
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static unsigned int spi_dac_init[] = {
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static unsigned int i2c_adc_init[][2] = {
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{ 0x17, 0x00 }, /* Reset */
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{ 0x07, 0x00 }, /* Timeout */
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{ 0x0b, 0x22 }, /* Interface control */
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{ 0x0c, 0x22 }, /* Master mode control */
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{ 0x0d, 0x08 }, /* Powerdown control */
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{ 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
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{ 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
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{ 0x10, 0x7b }, /* ALC Control 1 */
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{ 0x11, 0x00 }, /* ALC Control 2 */
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{ 0x12, 0x32 }, /* ALC Control 3 */
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{ 0x13, 0x00 }, /* Noise gate control */
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{ 0x14, 0xa6 }, /* Limiter control */
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{ 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */
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static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
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unsigned int silent_page;
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/* disable audio and lock cache */
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outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
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HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
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/* reset recording buffers */
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snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
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snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
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snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
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snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
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snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
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snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
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/* disable channel interrupt */
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outl(0, emu->port + INTE);
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snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
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snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
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snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
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snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
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/* set SPDIF bypass mode */
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snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
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/* enable rear left + rear right AC97 slots */
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snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
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/* init envelope engine */
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for (ch = 0; ch < NUM_G; ch++)
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snd_emu10k1_voice_init(emu, ch);
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snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
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snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
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snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
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if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
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/* Hacks for Alice3 to work independent of haP16V driver */
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/* Setup SRCMulti_I2S SamplingRate */
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tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
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snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
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/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
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snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
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/* Setup SRCMulti Input Audio Enable */
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/* Use 0xFFFFFFFF to enable P16V sounds. */
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snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
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/* Enabled Phased (8-channel) P16V playback */
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outl(0x0201, emu->port + HCFG2);
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/* Set playback routing. */
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snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
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if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
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/* Hacks for Alice3 to work independent of haP16V driver */
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snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
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/* Setup SRCMulti_I2S SamplingRate */
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tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
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snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
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/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
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outl(0x600000, emu->port + 0x20);
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outl(0x14, emu->port + 0x24);
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/* Setup SRCMulti Input Audio Enable */
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outl(0x7b0000, emu->port + 0x20);
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outl(0xFF000000, emu->port + 0x24);
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/* Setup SPDIF Out Audio Enable */
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/* The Audigy 2 Value has a separate SPDIF out,
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* so no need for a mixer switch
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outl(0x7a0000, emu->port + 0x20);
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outl(0xFF000000, emu->port + 0x24);
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tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
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outl(tmp, emu->port + A_IOCFG);
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if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
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size = ARRAY_SIZE(spi_dac_init);
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for (n = 0; n < size; n++)
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snd_emu10k1_spi_write(emu, spi_dac_init[n]);
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snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
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* GPIO1: Speakers-enabled.
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* GPIO4: IEC958 Output on.
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outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
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if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
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snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
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tmp = inl(emu->port + A_IOCFG);
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outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
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tmp = inl(emu->port + A_IOCFG);
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size = ARRAY_SIZE(i2c_adc_init);
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for (n = 0; n < size; n++)
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snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
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for (n = 0; n < 4; n++) {
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emu->i2c_capture_volume[n][0] = 0xcf;
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emu->i2c_capture_volume[n][1] = 0xcf;
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snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
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snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
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snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
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silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
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for (ch = 0; ch < NUM_G; ch++) {
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snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
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snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
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if (emu->card_capabilities->emu_model) {
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outl(HCFG_AUTOMUTE_ASYNC |
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HCFG_AUDIOENABLE, emu->port + HCFG);
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* Mute Disable Audio = 0
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* Lock Tank Memory = 1
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* Lock Sound Memory = 0
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} else if (emu->audigy) {
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if (emu->revision == 4) /* audigy2 */
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outl(HCFG_AUDIOENABLE |
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HCFG_AC3ENABLE_CDSPDIF |
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HCFG_AC3ENABLE_GPSPDIF |
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HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
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outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
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/* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
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* e.g. card_capabilities->joystick */
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} else if (emu->model == 0x20 ||
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emu->model == 0xc400 ||
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(emu->model == 0x21 && emu->revision < 6))
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outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
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/* With on-chip joystick */
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outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
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if (enable_ir) { /* enable IR for SB Live */
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if (emu->card_capabilities->emu_model) {
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; /* Disable all access to A_IOCFG for the emu1010 */
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} else if (emu->card_capabilities->i2c_adc) {
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; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
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} else if (emu->audigy) {
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unsigned int reg = inl(emu->port + A_IOCFG);
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outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
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outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
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outl(reg, emu->port + A_IOCFG);
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unsigned int reg = inl(emu->port + HCFG);
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outl(reg | HCFG_GPOUT2, emu->port + HCFG);
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outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
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outl(reg, emu->port + HCFG);
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if (emu->card_capabilities->emu_model) {
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; /* Disable all access to A_IOCFG for the emu1010 */
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} else if (emu->card_capabilities->i2c_adc) {
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; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
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} else if (emu->audigy) { /* enable analog output */
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unsigned int reg = inl(emu->port + A_IOCFG);
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outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
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static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
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* Enable the audio bit
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outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
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/* Enable analog/digital outs on audigy */
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if (emu->card_capabilities->emu_model) {
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; /* Disable all access to A_IOCFG for the emu1010 */
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} else if (emu->card_capabilities->i2c_adc) {
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; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
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} else if (emu->audigy) {
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outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
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if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
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/* Unmute Analog now. Set GPO6 to 1 for Apollo.
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* This has to be done after init ALice3 I2SOut beyond 48KHz.
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* So, sequence is important. */
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outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
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} else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
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/* Unmute Analog now. */
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outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
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/* Disable routing from AC97 line out to Front speakers */
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outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
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/* FIXME: the following routine disables LiveDrive-II !! */
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/* TOSLink detection */
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tmp = inl(emu->port + HCFG);
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if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
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outl(tmp|0x800, emu->port + HCFG);
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if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
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outl(tmp, emu->port + HCFG);
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snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
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int snd_emu10k1_done(struct snd_emu10k1 *emu)
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outl(0, emu->port + INTE);
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for (ch = 0; ch < NUM_G; ch++)
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snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
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for (ch = 0; ch < NUM_G; ch++) {
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snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
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snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
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snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
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snd_emu10k1_ptr_write(emu, CPF, ch, 0);
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/* reset recording buffers */
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snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
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snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
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snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
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snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
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snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
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snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
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snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
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snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
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snd_emu10k1_ptr_write(emu, TCB, 0, 0);
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snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
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snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
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/* disable channel interrupt */
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snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
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snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
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snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
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snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
442
/* disable audio and lock cache */
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outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
444
snd_emu10k1_ptr_write(emu, PTB, 0, 0);
449
/*************************************************************************
450
* ECARD functional implementation
451
*************************************************************************/
453
/* In A1 Silicon, these bits are in the HC register */
454
#define HOOKN_BIT (1L << 12)
455
#define HANDN_BIT (1L << 11)
456
#define PULSEN_BIT (1L << 10)
458
#define EC_GDI1 (1 << 13)
459
#define EC_GDI0 (1 << 14)
461
#define EC_NUM_CONTROL_BITS 20
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#define EC_AC3_DATA_SELN 0x0001L
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#define EC_EE_DATA_SEL 0x0002L
465
#define EC_EE_CNTRL_SELN 0x0004L
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#define EC_EECLK 0x0008L
467
#define EC_EECS 0x0010L
468
#define EC_EESDO 0x0020L
469
#define EC_TRIM_CSN 0x0040L
470
#define EC_TRIM_SCLK 0x0080L
471
#define EC_TRIM_SDATA 0x0100L
472
#define EC_TRIM_MUTEN 0x0200L
473
#define EC_ADCCAL 0x0400L
474
#define EC_ADCRSTN 0x0800L
475
#define EC_DACCAL 0x1000L
476
#define EC_DACMUTEN 0x2000L
477
#define EC_LEDN 0x4000L
479
#define EC_SPDIF0_SEL_SHIFT 15
480
#define EC_SPDIF1_SEL_SHIFT 17
481
#define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
482
#define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
483
#define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
484
#define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
485
#define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
486
* be incremented any time the EEPROM's
487
* format is changed. */
489
#define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
491
/* Addresses for special values stored in to EEPROM */
492
#define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
493
#define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
494
#define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
496
#define EC_LAST_PROMFILE_ADDR 0x2f
498
#define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
499
* can be up to 30 characters in length
500
* and is stored as a NULL-terminated
501
* ASCII string. Any unused bytes must be
502
* filled with zeros */
503
#define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
506
/* Most of this stuff is pretty self-evident. According to the hardware
507
* dudes, we need to leave the ADCCAL bit low in order to avoid a DC
508
* offset problem. Weird.
510
#define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
514
#define EC_DEFAULT_ADC_GAIN 0xC4C4
515
#define EC_DEFAULT_SPDIF0_SEL 0x0
516
#define EC_DEFAULT_SPDIF1_SEL 0x4
518
/**************************************************************************
519
* @func Clock bits into the Ecard's control latch. The Ecard uses a
520
* control latch will is loaded bit-serially by toggling the Modem control
521
* lines from function 2 on the E8010. This function hides these details
522
* and presents the illusion that we are actually writing to a distinct
526
static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
528
unsigned short count;
530
unsigned long hc_port;
531
unsigned int hc_value;
533
hc_port = emu->port + HCFG;
534
hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
535
outl(hc_value, hc_port);
537
for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
539
/* Set up the value */
540
data = ((value & 0x1) ? PULSEN_BIT : 0);
543
outl(hc_value | data, hc_port);
545
/* Clock the shift register */
546
outl(hc_value | data | HANDN_BIT, hc_port);
547
outl(hc_value | data, hc_port);
551
outl(hc_value | HOOKN_BIT, hc_port);
552
outl(hc_value, hc_port);
555
/**************************************************************************
556
* @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
557
* trim value consists of a 16bit value which is composed of two
558
* 8 bit gain/trim values, one for the left channel and one for the
559
* right channel. The following table maps from the Gain/Attenuation
560
* value in decibels into the corresponding bit pattern for a single
564
static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
569
/* Enable writing to the TRIM registers */
570
snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
572
/* Do it again to insure that we meet hold time requirements */
573
snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
575
for (bit = (1 << 15); bit; bit >>= 1) {
578
value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
581
value |= EC_TRIM_SDATA;
584
snd_emu10k1_ecard_write(emu, value);
585
snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
586
snd_emu10k1_ecard_write(emu, value);
589
snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
592
static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
594
unsigned int hc_value;
596
/* Set up the initial settings */
597
emu->ecard_ctrl = EC_RAW_RUN_MODE |
598
EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
599
EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
601
/* Step 0: Set the codec type in the hardware control register
602
* and enable audio output */
603
hc_value = inl(emu->port + HCFG);
604
outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
605
inl(emu->port + HCFG);
607
/* Step 1: Turn off the led and deassert TRIM_CS */
608
snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
610
/* Step 2: Calibrate the ADC and DAC */
611
snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
613
/* Step 3: Wait for awhile; XXX We can't get away with this
614
* under a real operating system; we'll need to block and wait that
616
snd_emu10k1_wait(emu, 48000);
618
/* Step 4: Switch off the DAC and ADC calibration. Note
619
* That ADC_CAL is actually an inverted signal, so we assert
620
* it here to stop calibration. */
621
snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
623
/* Step 4: Switch into run mode */
624
snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
626
/* Step 5: Set the analog input gain */
627
snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
632
static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
634
unsigned long special_port;
637
/* Special initialisation routine
638
* before the rest of the IO-Ports become active.
640
special_port = emu->port + 0x38;
641
value = inl(special_port);
642
outl(0x00d00000, special_port);
643
value = inl(special_port);
644
outl(0x00d00001, special_port);
645
value = inl(special_port);
646
outl(0x00d0005f, special_port);
647
value = inl(special_port);
648
outl(0x00d0007f, special_port);
649
value = inl(special_port);
650
outl(0x0090007f, special_port);
651
value = inl(special_port);
653
snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
654
/* Delay to give time for ADC chip to switch on. It needs 113ms */
659
static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, const char *filename)
665
unsigned int write_post;
667
const struct firmware *fw_entry;
669
err = request_firmware(&fw_entry, filename, &emu->pci->dev);
671
snd_printk(KERN_ERR "firmware: %s not found. Err = %d\n", filename, err);
674
snd_printk(KERN_INFO "firmware size = 0x%zx\n", fw_entry->size);
676
/* The FPGA is a Xilinx Spartan IIE XC2S50E */
677
/* GPIO7 -> FPGA PGMN
680
* FPGA CONFIG OFF -> FPGA PGMN
682
spin_lock_irqsave(&emu->emu_lock, flags);
683
outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
684
write_post = inl(emu->port + A_IOCFG);
686
outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
687
write_post = inl(emu->port + A_IOCFG);
688
udelay(100); /* Allow FPGA memory to clean */
689
for (n = 0; n < fw_entry->size; n++) {
690
value = fw_entry->data[n];
691
for (i = 0; i < 8; i++) {
696
outl(reg, emu->port + A_IOCFG);
697
write_post = inl(emu->port + A_IOCFG);
698
outl(reg | 0x40, emu->port + A_IOCFG);
699
write_post = inl(emu->port + A_IOCFG);
702
/* After programming, set GPIO bit 4 high again. */
703
outl(0x10, emu->port + A_IOCFG);
704
write_post = inl(emu->port + A_IOCFG);
705
spin_unlock_irqrestore(&emu->emu_lock, flags);
707
release_firmware(fw_entry);
711
static int emu1010_firmware_thread(void *data)
713
struct snd_emu10k1 *emu = data;
718
/* Delay to allow Audio Dock to settle */
719
msleep_interruptible(1000);
720
if (kthread_should_stop())
722
snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
723
snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */
724
if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
725
/* Audio Dock attached */
726
/* Return to Audio Dock programming mode */
727
snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
728
snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
729
if (emu->card_capabilities->emu_model ==
731
err = snd_emu1010_load_firmware(emu, DOCK_FILENAME);
734
} else if (emu->card_capabilities->emu_model ==
735
EMU_MODEL_EMU1010B) {
736
err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME);
739
} else if (emu->card_capabilities->emu_model ==
741
err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME);
746
snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
747
snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ®);
748
snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", reg);
749
/* ID, should read & 0x7f = 0x55 when FPGA programmed. */
750
snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
751
snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
752
if ((reg & 0x1f) != 0x15) {
753
/* FPGA failed to be programmed */
754
snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", reg);
757
snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
758
snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
759
snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
760
snd_printk(KERN_INFO "Audio Dock ver: %u.%u\n",
762
/* Sync clocking between 1010 and Dock */
763
/* Allow DLL to settle */
765
/* Unmute all. Default is muted after a firmware load */
766
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
769
snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
774
* EMU-1010 - details found out from this driver, official MS Win drivers,
777
* Audigy2 (aka Alice2):
778
* ---------------------
779
* * communication over PCI
780
* * conversion of 32-bit data coming over EMU32 links from HANA FPGA
781
* to 2 x 16-bit, using internal DSP instructions
782
* * slave mode, clock supplied by HANA
783
* * linked to HANA using:
784
* 32 x 32-bit serial EMU32 output channels
785
* 16 x EMU32 input channels
786
* (?) x I2S I/O channels (?)
790
* * provides all (?) physical inputs and outputs of the card
791
* (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
792
* * provides clock signal for the card and Alice2
793
* * two crystals - for 44.1kHz and 48kHz multiples
794
* * provides internal routing of signal sources to signal destinations
795
* * inputs/outputs to Alice2 - see above
797
* Current status of the driver:
798
* ----------------------------
799
* * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
800
* * PCM device nb. 2:
801
* 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
802
* 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
804
static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
809
const char *filename = NULL;
811
snd_printk(KERN_INFO "emu1010: Special config.\n");
812
/* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
813
* Lock Sound Memory Cache, Lock Tank Memory Cache,
816
outl(0x0005a00c, emu->port + HCFG);
817
/* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
818
* Lock Tank Memory Cache,
821
outl(0x0005a004, emu->port + HCFG);
822
/* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
825
outl(0x0005a000, emu->port + HCFG);
826
/* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
829
outl(0x0005a000, emu->port + HCFG);
831
/* Disable 48Volt power to Audio Dock */
832
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
834
/* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
835
snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
836
snd_printdd("reg1 = 0x%x\n", reg);
837
if ((reg & 0x3f) == 0x15) {
838
/* FPGA netlist already present so clear it */
839
/* Return to programming mode */
841
snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
843
snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
844
snd_printdd("reg2 = 0x%x\n", reg);
845
if ((reg & 0x3f) == 0x15) {
846
/* FPGA failed to return to programming mode */
847
snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
850
snd_printk(KERN_INFO "emu1010: EMU_HANA_ID = 0x%x\n", reg);
851
switch (emu->card_capabilities->emu_model) {
852
case EMU_MODEL_EMU1010:
853
filename = HANA_FILENAME;
855
case EMU_MODEL_EMU1010B:
856
filename = EMU1010B_FILENAME;
858
case EMU_MODEL_EMU1616:
859
filename = EMU1010_NOTEBOOK_FILENAME;
861
case EMU_MODEL_EMU0404:
862
filename = EMU0404_FILENAME;
869
snd_printk(KERN_INFO "emu1010: filename %s testing\n", filename);
870
err = snd_emu1010_load_firmware(emu, filename);
873
KERN_INFO "emu1010: Loading Firmware file %s failed\n",
878
/* ID, should read & 0x7f = 0x55 when FPGA programmed. */
879
snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
880
if ((reg & 0x3f) != 0x15) {
881
/* FPGA failed to be programmed */
882
snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", reg);
886
snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
887
snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
888
snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
889
snd_printk(KERN_INFO "emu1010: Hana version: %u.%u\n", tmp, tmp2);
890
/* Enable 48Volt power to Audio Dock */
891
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
893
snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
894
snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
895
snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
896
snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
897
snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
898
/* Optical -> ADAT I/O */
902
emu->emu1010.optical_in = 1; /* IN_ADAT */
903
emu->emu1010.optical_out = 1; /* IN_ADAT */
905
tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
906
(emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
907
snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
908
snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
909
/* Set no attenuation on Audio Dock pads. */
910
snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
911
emu->emu1010.adc_pads = 0x00;
912
snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
913
/* Unmute Audio dock DACs, Headphone source DAC-4. */
914
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
915
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
916
snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
918
snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
919
emu->emu1010.dac_pads = 0x0f;
920
snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
921
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
922
snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
923
/* SPDIF Format. Set Consumer mode, 24bit, copy enable */
924
snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
926
snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
928
snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
929
/* IRQ Enable: Alll on */
930
/* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
931
/* IRQ Enable: All off */
932
snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
934
snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
935
snd_printk(KERN_INFO "emu1010: Card options3 = 0x%x\n", reg);
936
/* Default WCLK set to 48kHz. */
937
snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
938
/* Word Clock source, Internal 48kHz x1 */
939
snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
940
/* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
941
/* Audio Dock LEDs. */
942
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
946
snd_emu1010_fpga_link_dst_src_write(emu,
947
EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
948
snd_emu1010_fpga_link_dst_src_write(emu,
949
EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
950
snd_emu1010_fpga_link_dst_src_write(emu,
951
EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
952
snd_emu1010_fpga_link_dst_src_write(emu,
953
EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
957
snd_emu1010_fpga_link_dst_src_write(emu,
958
EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
959
snd_emu1010_fpga_link_dst_src_write(emu,
960
EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
961
snd_emu1010_fpga_link_dst_src_write(emu,
962
EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
963
snd_emu1010_fpga_link_dst_src_write(emu,
964
EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
965
snd_emu1010_fpga_link_dst_src_write(emu,
966
EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
967
snd_emu1010_fpga_link_dst_src_write(emu,
968
EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
969
snd_emu1010_fpga_link_dst_src_write(emu,
970
EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
971
snd_emu1010_fpga_link_dst_src_write(emu,
972
EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
976
snd_emu1010_fpga_link_dst_src_write(emu,
977
EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
978
snd_emu1010_fpga_link_dst_src_write(emu,
979
EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
980
snd_emu1010_fpga_link_dst_src_write(emu,
981
EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
982
snd_emu1010_fpga_link_dst_src_write(emu,
983
EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
984
snd_emu1010_fpga_link_dst_src_write(emu,
985
EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
986
snd_emu1010_fpga_link_dst_src_write(emu,
987
EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
988
snd_emu1010_fpga_link_dst_src_write(emu,
989
EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
990
snd_emu1010_fpga_link_dst_src_write(emu,
991
EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
992
/* Pavel Hofman - setting defaults for 8 more capture channels
993
* Defaults only, users will set their own values anyways, let's
997
snd_emu1010_fpga_link_dst_src_write(emu,
998
EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
999
snd_emu1010_fpga_link_dst_src_write(emu,
1000
EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1001
snd_emu1010_fpga_link_dst_src_write(emu,
1002
EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1003
snd_emu1010_fpga_link_dst_src_write(emu,
1004
EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1005
snd_emu1010_fpga_link_dst_src_write(emu,
1006
EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1007
snd_emu1010_fpga_link_dst_src_write(emu,
1008
EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1009
snd_emu1010_fpga_link_dst_src_write(emu,
1010
EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1011
snd_emu1010_fpga_link_dst_src_write(emu,
1012
EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1016
snd_emu1010_fpga_link_dst_src_write(emu,
1017
EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1018
snd_emu1010_fpga_link_dst_src_write(emu,
1019
EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1020
snd_emu1010_fpga_link_dst_src_write(emu,
1021
EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1022
snd_emu1010_fpga_link_dst_src_write(emu,
1023
EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1024
snd_emu1010_fpga_link_dst_src_write(emu,
1025
EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1026
snd_emu1010_fpga_link_dst_src_write(emu,
1027
EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1028
snd_emu1010_fpga_link_dst_src_write(emu,
1029
EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1030
snd_emu1010_fpga_link_dst_src_write(emu,
1031
EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1032
snd_emu1010_fpga_link_dst_src_write(emu,
1033
EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1034
snd_emu1010_fpga_link_dst_src_write(emu,
1035
EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1036
snd_emu1010_fpga_link_dst_src_write(emu,
1037
EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1038
snd_emu1010_fpga_link_dst_src_write(emu,
1039
EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1041
for (i = 0; i < 0x20; i++) {
1042
/* AudioDock Elink <- Silence */
1043
snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1045
for (i = 0; i < 4; i++) {
1046
/* Hana SPDIF Out <- Silence */
1047
snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1049
for (i = 0; i < 7; i++) {
1050
/* Hamoa DAC <- Silence */
1051
snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1053
for (i = 0; i < 7; i++) {
1054
/* Hana ADAT Out <- Silence */
1055
snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1057
snd_emu1010_fpga_link_dst_src_write(emu,
1058
EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1059
snd_emu1010_fpga_link_dst_src_write(emu,
1060
EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1061
snd_emu1010_fpga_link_dst_src_write(emu,
1062
EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1063
snd_emu1010_fpga_link_dst_src_write(emu,
1064
EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1065
snd_emu1010_fpga_link_dst_src_write(emu,
1066
EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1067
snd_emu1010_fpga_link_dst_src_write(emu,
1068
EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1069
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1071
snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1073
/* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1074
* Lock Sound Memory Cache, Lock Tank Memory Cache,
1077
outl(0x0000a000, emu->port + HCFG);
1078
/* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1079
* Lock Sound Memory Cache, Lock Tank Memory Cache,
1080
* Un-Mute all codecs.
1082
outl(0x0000a001, emu->port + HCFG);
1084
/* Initial boot complete. Now patches */
1086
snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1087
snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1088
snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1089
snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1090
snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1091
snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1092
snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1094
/* Start Micro/Audio Dock firmware loader thread */
1095
if (!emu->emu1010.firmware_thread) {
1096
emu->emu1010.firmware_thread =
1097
kthread_create(emu1010_firmware_thread, emu,
1098
"emu1010_firmware");
1099
wake_up_process(emu->emu1010.firmware_thread);
1103
snd_emu1010_fpga_link_dst_src_write(emu,
1104
EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1105
snd_emu1010_fpga_link_dst_src_write(emu,
1106
EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1107
snd_emu1010_fpga_link_dst_src_write(emu,
1108
EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1109
snd_emu1010_fpga_link_dst_src_write(emu,
1110
EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1112
/* Default outputs */
1113
if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1114
/* 1616(M) cardbus default outputs */
1115
/* ALICE2 bus 0xa0 */
1116
snd_emu1010_fpga_link_dst_src_write(emu,
1117
EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1118
emu->emu1010.output_source[0] = 17;
1119
snd_emu1010_fpga_link_dst_src_write(emu,
1120
EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1121
emu->emu1010.output_source[1] = 18;
1122
snd_emu1010_fpga_link_dst_src_write(emu,
1123
EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1124
emu->emu1010.output_source[2] = 19;
1125
snd_emu1010_fpga_link_dst_src_write(emu,
1126
EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1127
emu->emu1010.output_source[3] = 20;
1128
snd_emu1010_fpga_link_dst_src_write(emu,
1129
EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1130
emu->emu1010.output_source[4] = 21;
1131
snd_emu1010_fpga_link_dst_src_write(emu,
1132
EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1133
emu->emu1010.output_source[5] = 22;
1134
/* ALICE2 bus 0xa0 */
1135
snd_emu1010_fpga_link_dst_src_write(emu,
1136
EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1137
emu->emu1010.output_source[16] = 17;
1138
snd_emu1010_fpga_link_dst_src_write(emu,
1139
EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1140
emu->emu1010.output_source[17] = 18;
1142
/* ALICE2 bus 0xa0 */
1143
snd_emu1010_fpga_link_dst_src_write(emu,
1144
EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1145
emu->emu1010.output_source[0] = 21;
1146
snd_emu1010_fpga_link_dst_src_write(emu,
1147
EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1148
emu->emu1010.output_source[1] = 22;
1149
snd_emu1010_fpga_link_dst_src_write(emu,
1150
EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1151
emu->emu1010.output_source[2] = 23;
1152
snd_emu1010_fpga_link_dst_src_write(emu,
1153
EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1154
emu->emu1010.output_source[3] = 24;
1155
snd_emu1010_fpga_link_dst_src_write(emu,
1156
EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1157
emu->emu1010.output_source[4] = 25;
1158
snd_emu1010_fpga_link_dst_src_write(emu,
1159
EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1160
emu->emu1010.output_source[5] = 26;
1161
snd_emu1010_fpga_link_dst_src_write(emu,
1162
EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1163
emu->emu1010.output_source[6] = 27;
1164
snd_emu1010_fpga_link_dst_src_write(emu,
1165
EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1166
emu->emu1010.output_source[7] = 28;
1167
/* ALICE2 bus 0xa0 */
1168
snd_emu1010_fpga_link_dst_src_write(emu,
1169
EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1170
emu->emu1010.output_source[8] = 21;
1171
snd_emu1010_fpga_link_dst_src_write(emu,
1172
EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1173
emu->emu1010.output_source[9] = 22;
1174
/* ALICE2 bus 0xa0 */
1175
snd_emu1010_fpga_link_dst_src_write(emu,
1176
EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1177
emu->emu1010.output_source[10] = 21;
1178
snd_emu1010_fpga_link_dst_src_write(emu,
1179
EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1180
emu->emu1010.output_source[11] = 22;
1181
/* ALICE2 bus 0xa0 */
1182
snd_emu1010_fpga_link_dst_src_write(emu,
1183
EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1184
emu->emu1010.output_source[12] = 21;
1185
snd_emu1010_fpga_link_dst_src_write(emu,
1186
EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1187
emu->emu1010.output_source[13] = 22;
1188
/* ALICE2 bus 0xa0 */
1189
snd_emu1010_fpga_link_dst_src_write(emu,
1190
EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1191
emu->emu1010.output_source[14] = 21;
1192
snd_emu1010_fpga_link_dst_src_write(emu,
1193
EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1194
emu->emu1010.output_source[15] = 22;
1195
/* ALICE2 bus 0xa0 */
1196
snd_emu1010_fpga_link_dst_src_write(emu,
1197
EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1198
emu->emu1010.output_source[16] = 21;
1199
snd_emu1010_fpga_link_dst_src_write(emu,
1200
EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1201
emu->emu1010.output_source[17] = 22;
1202
snd_emu1010_fpga_link_dst_src_write(emu,
1203
EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1204
emu->emu1010.output_source[18] = 23;
1205
snd_emu1010_fpga_link_dst_src_write(emu,
1206
EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1207
emu->emu1010.output_source[19] = 24;
1208
snd_emu1010_fpga_link_dst_src_write(emu,
1209
EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1210
emu->emu1010.output_source[20] = 25;
1211
snd_emu1010_fpga_link_dst_src_write(emu,
1212
EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1213
emu->emu1010.output_source[21] = 26;
1214
snd_emu1010_fpga_link_dst_src_write(emu,
1215
EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1216
emu->emu1010.output_source[22] = 27;
1217
snd_emu1010_fpga_link_dst_src_write(emu,
1218
EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1219
emu->emu1010.output_source[23] = 28;
1221
/* TEMP: Select SPDIF in/out */
1222
/* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1224
/* TEMP: Select 48kHz SPDIF out */
1225
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1226
snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1227
/* Word Clock source, Internal 48kHz x1 */
1228
snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1229
/* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1230
emu->emu1010.internal_clock = 1; /* 48000 */
1231
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1232
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1233
/* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1234
/* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1235
/* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1240
* Create the EMU10K1 instance
1244
static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1245
static void free_pm_buffer(struct snd_emu10k1 *emu);
1248
static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1250
if (emu->port) { /* avoid access to already used hardware */
1251
snd_emu10k1_fx8010_tram_setup(emu, 0);
1252
snd_emu10k1_done(emu);
1253
snd_emu10k1_free_efx(emu);
1255
if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1256
/* Disable 48Volt power to Audio Dock */
1257
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1259
if (emu->emu1010.firmware_thread)
1260
kthread_stop(emu->emu1010.firmware_thread);
1262
free_irq(emu->irq, emu);
1263
/* remove reserved page */
1264
if (emu->reserved_page) {
1265
snd_emu10k1_synth_free(emu,
1266
(struct snd_util_memblk *)emu->reserved_page);
1267
emu->reserved_page = NULL;
1270
snd_util_memhdr_free(emu->memhdr);
1271
if (emu->silent_page.area)
1272
snd_dma_free_pages(&emu->silent_page);
1273
if (emu->ptb_pages.area)
1274
snd_dma_free_pages(&emu->ptb_pages);
1275
vfree(emu->page_ptr_table);
1276
vfree(emu->page_addr_table);
1278
free_pm_buffer(emu);
1281
pci_release_regions(emu->pci);
1282
if (emu->card_capabilities->ca0151_chip) /* P16V */
1284
pci_disable_device(emu->pci);
1289
static int snd_emu10k1_dev_free(struct snd_device *device)
1291
struct snd_emu10k1 *emu = device->device_data;
1292
return snd_emu10k1_free(emu);
1295
static struct snd_emu_chip_details emu_chip_details[] = {
1296
/* Audigy4 (Not PRO) SB0610 */
1297
/* Tested by James@superbug.co.uk 4th April 2006 */
1303
* 3: 0 - Digital Out, 1 - Line in
1311
* A: Green jack sense (Front)
1313
* C: Black jack sense (Rear/Side Right)
1314
* D: Yellow jack sense (Center/LFE/Side Left)
1318
* Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1322
/* Mic input not tested.
1323
* Analog CD input not tested
1324
* Digital Out not tested.
1326
* Audio output 5.1 working. Side outputs not working.
1328
/* DSP: CA10300-IAT LF
1329
* DAC: Cirrus Logic CS4382-KQZ
1330
* ADC: Philips 1361T
1331
* AC97: Sigmatel STAC9750
1334
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1335
.driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1340
.adc_1361t = 1, /* 24 bit capture instead of 16bit */
1342
/* Audigy 2 Value AC3 out does not work yet.
1343
* Need to find out how to turn off interpolators.
1345
/* Tested by James@superbug.co.uk 3rd July 2005 */
1348
* ADC: Philips 1361T
1352
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1353
.driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1359
/* Audigy 2 ZS Notebook Cardbus card.*/
1360
/* Tested by James@superbug.co.uk 6th November 2006 */
1361
/* Audio output 7.1/Headphones working.
1362
* Digital output working. (AC3 not checked, only PCM)
1363
* Audio Mic/Line inputs working.
1364
* Digital input not tested.
1367
* DAC: Wolfson WM8768/WM8568
1368
* ADC: Wolfson WM8775
1372
/* Tested by James@superbug.co.uk 4th April 2006 */
1376
* 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1377
* 2: Analog input 0 = line in, 1 = mic in
1379
* 4: Digital output 0 = off, 1 = on.
1384
* All bits 1 (0x3fxx) means nothing plugged in.
1385
* 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1386
* A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1387
* C-D: 2 = Front/Rear/etc, 3 = nothing.
1391
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1392
.driver = "Audigy2", .name = "SB Audigy 2 ZS Notebook [SB0530]",
1396
.ca_cardbus_chip = 1,
1400
/* Tested by James@superbug.co.uk 4th Nov 2007. */
1401
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1402
.driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1406
.ca_cardbus_chip = 1,
1408
.emu_model = EMU_MODEL_EMU1616},
1409
/* Tested by James@superbug.co.uk 4th Nov 2007. */
1410
/* This is MAEM8960, 0202 is MAEM 8980 */
1411
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1412
.driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1417
.emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1418
/* Tested by James@superbug.co.uk 8th July 2005. */
1419
/* This is MAEM8810, 0202 is MAEM8820 */
1420
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1421
.driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1426
.emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1428
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1429
.driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1434
.emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1435
/* Tested by James@superbug.co.uk 20-3-2007. */
1436
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1437
.driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1442
.emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1443
/* Note that all E-mu cards require kernel 2.6 or newer. */
1444
{.vendor = 0x1102, .device = 0x0008,
1445
.driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1450
/* Tested by James@superbug.co.uk 3rd July 2005 */
1451
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1452
.driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1460
/* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1461
/* The 0x20061102 does have SB0350 written on it
1462
* Just like 0x20021102
1464
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1465
.driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1472
.invert_shared_spdif = 1, /* digital/analog switch swapped */
1474
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1475
.driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1482
.invert_shared_spdif = 1, /* digital/analog switch swapped */
1484
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1485
.driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1492
.invert_shared_spdif = 1, /* digital/analog switch swapped */
1495
/* Tested by James@superbug.co.uk 3rd July 2005 */
1498
* ADC: Philips 1361T
1502
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1503
.driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1510
.adc_1361t = 1, /* 24 bit capture instead of 16bit */
1512
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1513
.driver = "Audigy2", .name = "SB Audigy 2 Platinum EX [SB0280]",
1520
/* Dell OEM/Creative Labs Audigy 2 ZS */
1521
/* See ALSA bug#1365 */
1522
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1523
.driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1530
.invert_shared_spdif = 1, /* digital/analog switch swapped */
1532
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1533
.driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1540
.invert_shared_spdif = 1, /* digital/analog switch swapped */
1541
.adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1543
{.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1544
.driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1551
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1552
.driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1557
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1558
.driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1564
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1565
.driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1570
{.vendor = 0x1102, .device = 0x0004,
1571
.driver = "Audigy", .name = "Audigy 1 [Unknown]",
1576
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1577
.driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1582
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1583
.driver = "EMU10K1", .name = "SB Live! [SB0105]",
1588
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1589
.driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1594
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1595
.driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1600
/* Tested by ALSA bug#1680 26th December 2005 */
1601
/* note: It really has SB0220 written on the card, */
1602
/* but it's SB0228 according to kx.inf */
1603
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1604
.driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1609
/* Tested by Thomas Zehetbauer 27th Aug 2005 */
1610
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1611
.driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1616
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1617
.driver = "EMU10K1", .name = "SB Live! 5.1",
1622
/* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1623
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1624
.driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1627
.ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1628
* share the same IDs!
1631
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1632
.driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1637
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1638
.driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1642
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1643
.driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1648
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1649
.driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1654
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1655
.driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1660
/* Tested by James@superbug.co.uk 3rd July 2005 */
1661
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1662
.driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1667
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1668
.driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1673
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1674
.driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1679
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1680
.driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1685
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1686
.driver = "EMU10K1", .name = "E-mu APS [PC545]",
1690
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1691
.driver = "EMU10K1", .name = "SB Live! [CT4620]",
1696
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1697
.driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1702
{.vendor = 0x1102, .device = 0x0002,
1703
.driver = "EMU10K1", .name = "SB Live! [Unknown]",
1708
{ } /* terminator */
1711
int __devinit snd_emu10k1_create(struct snd_card *card,
1712
struct pci_dev *pci,
1713
unsigned short extin_mask,
1714
unsigned short extout_mask,
1715
long max_cache_bytes,
1718
struct snd_emu10k1 **remu)
1720
struct snd_emu10k1 *emu;
1723
unsigned int silent_page;
1724
const struct snd_emu_chip_details *c;
1725
static struct snd_device_ops ops = {
1726
.dev_free = snd_emu10k1_dev_free,
1731
/* enable PCI device */
1732
err = pci_enable_device(pci);
1736
emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1738
pci_disable_device(pci);
1742
spin_lock_init(&emu->reg_lock);
1743
spin_lock_init(&emu->emu_lock);
1744
spin_lock_init(&emu->spi_lock);
1745
spin_lock_init(&emu->i2c_lock);
1746
spin_lock_init(&emu->voice_lock);
1747
spin_lock_init(&emu->synth_lock);
1748
spin_lock_init(&emu->memblk_lock);
1749
mutex_init(&emu->fx8010.lock);
1750
INIT_LIST_HEAD(&emu->mapped_link_head);
1751
INIT_LIST_HEAD(&emu->mapped_order_link_head);
1755
emu->get_synth_voice = NULL;
1756
/* read revision & serial */
1757
emu->revision = pci->revision;
1758
pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1759
pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1760
snd_printdd("vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", pci->vendor, pci->device, emu->serial, emu->model);
1762
for (c = emu_chip_details; c->vendor; c++) {
1763
if (c->vendor == pci->vendor && c->device == pci->device) {
1765
if (c->subsystem && (c->subsystem == subsystem))
1770
if (c->subsystem && (c->subsystem != emu->serial))
1772
if (c->revision && c->revision != emu->revision)
1778
if (c->vendor == 0) {
1779
snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1781
pci_disable_device(pci);
1784
emu->card_capabilities = c;
1785
if (c->subsystem && !subsystem)
1786
snd_printdd("Sound card name = %s\n", c->name);
1788
snd_printdd("Sound card name = %s, "
1789
"vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1790
"Forced to subsytem = 0x%x\n", c->name,
1791
pci->vendor, pci->device, emu->serial, c->subsystem);
1793
snd_printdd("Sound card name = %s, "
1794
"vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1795
c->name, pci->vendor, pci->device,
1798
if (!*card->id && c->id) {
1800
strlcpy(card->id, c->id, sizeof(card->id));
1802
for (i = 0; i < snd_ecards_limit; i++) {
1803
if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1806
if (i >= snd_ecards_limit)
1809
if (n >= SNDRV_CARDS)
1811
snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1815
is_audigy = emu->audigy = c->emu10k2_chip;
1817
/* set the DMA transfer mask */
1818
emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1819
if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1820
pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1821
snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1823
pci_disable_device(pci);
1827
emu->gpr_base = A_FXGPREGBASE;
1829
emu->gpr_base = FXGPREGBASE;
1831
err = pci_request_regions(pci, "EMU10K1");
1834
pci_disable_device(pci);
1837
emu->port = pci_resource_start(pci, 0);
1839
emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1840
if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1841
32 * 1024, &emu->ptb_pages) < 0) {
1846
emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1847
emu->page_addr_table = vmalloc(emu->max_cache_pages *
1848
sizeof(unsigned long));
1849
if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1854
if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1855
EMUPAGESIZE, &emu->silent_page) < 0) {
1859
emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1860
if (emu->memhdr == NULL) {
1864
emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1865
sizeof(struct snd_util_memblk);
1867
pci_set_master(pci);
1869
emu->fx8010.fxbus_mask = 0x303f;
1870
if (extin_mask == 0)
1871
extin_mask = 0x3fcf;
1872
if (extout_mask == 0)
1873
extout_mask = 0x7fff;
1874
emu->fx8010.extin_mask = extin_mask;
1875
emu->fx8010.extout_mask = extout_mask;
1876
emu->enable_ir = enable_ir;
1878
if (emu->card_capabilities->ca_cardbus_chip) {
1879
err = snd_emu10k1_cardbus_init(emu);
1883
if (emu->card_capabilities->ecard) {
1884
err = snd_emu10k1_ecard_init(emu);
1887
} else if (emu->card_capabilities->emu_model) {
1888
err = snd_emu10k1_emu1010_init(emu);
1890
snd_emu10k1_free(emu);
1894
/* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1895
does not support this, it shouldn't do any harm */
1896
snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1897
AC97SLOT_CNTR|AC97SLOT_LFE);
1900
/* initialize TRAM setup */
1901
emu->fx8010.itram_size = (16 * 1024)/2;
1902
emu->fx8010.etram_pages.area = NULL;
1903
emu->fx8010.etram_pages.bytes = 0;
1905
/* irq handler must be registered after I/O ports are activated */
1906
if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1911
emu->irq = pci->irq;
1914
* Init to 0x02109204 :
1915
* Clock accuracy = 0 (1000ppm)
1916
* Sample Rate = 2 (48kHz)
1917
* Audio Channel = 1 (Left of 2)
1918
* Source Number = 0 (Unspecified)
1919
* Generation Status = 1 (Original for Cat Code 12)
1920
* Cat Code = 12 (Digital Signal Mixer)
1922
* Emphasis = 0 (None)
1923
* CP = 1 (Copyright unasserted)
1924
* AN = 0 (Audio data)
1927
emu->spdif_bits[0] = emu->spdif_bits[1] =
1928
emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1929
SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1930
SPCS_GENERATIONSTATUS | 0x00001200 |
1931
0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1933
emu->reserved_page = (struct snd_emu10k1_memblk *)
1934
snd_emu10k1_synth_alloc(emu, 4096);
1935
if (emu->reserved_page)
1936
emu->reserved_page->map_locked = 1;
1938
/* Clear silent pages and set up pointers */
1939
memset(emu->silent_page.area, 0, PAGE_SIZE);
1940
silent_page = emu->silent_page.addr << 1;
1941
for (idx = 0; idx < MAXPAGES; idx++)
1942
((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1944
/* set up voice indices */
1945
for (idx = 0; idx < NUM_G; idx++) {
1946
emu->voices[idx].emu = emu;
1947
emu->voices[idx].number = idx;
1950
err = snd_emu10k1_init(emu, enable_ir, 0);
1954
err = alloc_pm_buffer(emu);
1959
/* Initialize the effect engine */
1960
err = snd_emu10k1_init_efx(emu);
1963
snd_emu10k1_audio_enable(emu);
1965
err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
1969
#ifdef CONFIG_PROC_FS
1970
snd_emu10k1_proc_init(emu);
1973
snd_card_set_dev(card, &pci->dev);
1978
snd_emu10k1_free(emu);
1983
static unsigned char saved_regs[] = {
1984
CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1985
FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1986
ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1987
TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1988
MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1989
SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1992
static unsigned char saved_regs_audigy[] = {
1993
A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1994
A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1998
static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
2002
size = ARRAY_SIZE(saved_regs);
2004
size += ARRAY_SIZE(saved_regs_audigy);
2005
emu->saved_ptr = vmalloc(4 * NUM_G * size);
2006
if (!emu->saved_ptr)
2008
if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2010
if (emu->card_capabilities->ca0151_chip &&
2011
snd_p16v_alloc_pm_buffer(emu) < 0)
2016
static void free_pm_buffer(struct snd_emu10k1 *emu)
2018
vfree(emu->saved_ptr);
2019
snd_emu10k1_efx_free_pm_buffer(emu);
2020
if (emu->card_capabilities->ca0151_chip)
2021
snd_p16v_free_pm_buffer(emu);
2024
void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2030
val = emu->saved_ptr;
2031
for (reg = saved_regs; *reg != 0xff; reg++)
2032
for (i = 0; i < NUM_G; i++, val++)
2033
*val = snd_emu10k1_ptr_read(emu, *reg, i);
2035
for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2036
for (i = 0; i < NUM_G; i++, val++)
2037
*val = snd_emu10k1_ptr_read(emu, *reg, i);
2040
emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2041
emu->saved_hcfg = inl(emu->port + HCFG);
2044
void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2046
if (emu->card_capabilities->ca_cardbus_chip)
2047
snd_emu10k1_cardbus_init(emu);
2048
if (emu->card_capabilities->ecard)
2049
snd_emu10k1_ecard_init(emu);
2050
else if (emu->card_capabilities->emu_model)
2051
snd_emu10k1_emu1010_init(emu);
2053
snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2054
snd_emu10k1_init(emu, emu->enable_ir, 1);
2057
void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2063
snd_emu10k1_audio_enable(emu);
2065
/* resore for spdif */
2067
outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2068
outl(emu->saved_hcfg, emu->port + HCFG);
2070
val = emu->saved_ptr;
2071
for (reg = saved_regs; *reg != 0xff; reg++)
2072
for (i = 0; i < NUM_G; i++, val++)
2073
snd_emu10k1_ptr_write(emu, *reg, i, *val);
2075
for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2076
for (i = 0; i < NUM_G; i++, val++)
2077
snd_emu10k1_ptr_write(emu, *reg, i, *val);