2
* Copyright(c) 2006 - 2007 Atheros Corporation. All rights reserved.
3
* Copyright(c) 2007 - 2008 Chris Snook <csnook@redhat.com>
5
* Derived from Intel e1000 driver
6
* Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
8
* This program is free software; you can redistribute it and/or modify it
9
* under the terms of the GNU General Public License as published by the Free
10
* Software Foundation; either version 2 of the License, or (at your option)
13
* This program is distributed in the hope that it will be useful, but WITHOUT
14
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18
* You should have received a copy of the GNU General Public License along with
19
* this program; if not, write to the Free Software Foundation, Inc., 59
20
* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23
#include <asm/atomic.h>
24
#include <linux/crc32.h>
25
#include <linux/dma-mapping.h>
26
#include <linux/etherdevice.h>
27
#include <linux/ethtool.h>
28
#include <linux/hardirq.h>
29
#include <linux/if_vlan.h>
31
#include <linux/interrupt.h>
33
#include <linux/irqflags.h>
34
#include <linux/irqreturn.h>
35
#include <linux/mii.h>
36
#include <linux/net.h>
37
#include <linux/netdevice.h>
38
#include <linux/pci.h>
39
#include <linux/pci_ids.h>
41
#include <linux/skbuff.h>
42
#include <linux/spinlock.h>
43
#include <linux/string.h>
44
#include <linux/tcp.h>
45
#include <linux/timer.h>
46
#include <linux/types.h>
47
#include <linux/workqueue.h>
51
#define ATL2_DRV_VERSION "2.2.3"
53
static char atl2_driver_name[] = "atl2";
54
static const char atl2_driver_string[] = "Atheros(R) L2 Ethernet Driver";
55
static char atl2_copyright[] = "Copyright (c) 2007 Atheros Corporation.";
56
static char atl2_driver_version[] = ATL2_DRV_VERSION;
58
MODULE_AUTHOR("Atheros Corporation <xiong.huang@atheros.com>, Chris Snook <csnook@redhat.com>");
59
MODULE_DESCRIPTION("Atheros Fast Ethernet Network Driver");
60
MODULE_LICENSE("GPL");
61
MODULE_VERSION(ATL2_DRV_VERSION);
64
* atl2_pci_tbl - PCI Device ID Table
66
static struct pci_device_id atl2_pci_tbl[] = {
67
{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2)},
68
/* required last entry */
71
MODULE_DEVICE_TABLE(pci, atl2_pci_tbl);
73
static void atl2_set_ethtool_ops(struct net_device *netdev);
75
static void atl2_check_options(struct atl2_adapter *adapter);
78
* atl2_sw_init - Initialize general software structures (struct atl2_adapter)
79
* @adapter: board private structure to initialize
81
* atl2_sw_init initializes the Adapter private data structure.
82
* Fields are initialized based on PCI device information and
83
* OS network device settings (MTU size).
85
static int __devinit atl2_sw_init(struct atl2_adapter *adapter)
87
struct atl2_hw *hw = &adapter->hw;
88
struct pci_dev *pdev = adapter->pdev;
90
/* PCI config space info */
91
hw->vendor_id = pdev->vendor;
92
hw->device_id = pdev->device;
93
hw->subsystem_vendor_id = pdev->subsystem_vendor;
94
hw->subsystem_id = pdev->subsystem_device;
96
pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
97
pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
100
adapter->ict = 50000; /* ~100ms */
101
adapter->link_speed = SPEED_0; /* hardware init */
102
adapter->link_duplex = FULL_DUPLEX;
104
hw->phy_configured = false;
105
hw->preamble_len = 7;
116
hw->max_frame_size = adapter->netdev->mtu;
118
spin_lock_init(&adapter->stats_lock);
120
set_bit(__ATL2_DOWN, &adapter->flags);
126
* atl2_set_multi - Multicast and Promiscuous mode set
127
* @netdev: network interface device structure
129
* The set_multi entry point is called whenever the multicast address
130
* list or the network interface flags are updated. This routine is
131
* responsible for configuring the hardware for proper multicast,
132
* promiscuous mode, and all-multi behavior.
134
static void atl2_set_multi(struct net_device *netdev)
136
struct atl2_adapter *adapter = netdev_priv(netdev);
137
struct atl2_hw *hw = &adapter->hw;
138
struct dev_mc_list *mc_ptr;
142
/* Check for Promiscuous and All Multicast modes */
143
rctl = ATL2_READ_REG(hw, REG_MAC_CTRL);
145
if (netdev->flags & IFF_PROMISC) {
146
rctl |= MAC_CTRL_PROMIS_EN;
147
} else if (netdev->flags & IFF_ALLMULTI) {
148
rctl |= MAC_CTRL_MC_ALL_EN;
149
rctl &= ~MAC_CTRL_PROMIS_EN;
151
rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
153
ATL2_WRITE_REG(hw, REG_MAC_CTRL, rctl);
155
/* clear the old settings from the multicast hash table */
156
ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
157
ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
159
/* comoute mc addresses' hash value ,and put it into hash table */
160
for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
161
hash_value = atl2_hash_mc_addr(hw, mc_ptr->dmi_addr);
162
atl2_hash_set(hw, hash_value);
166
static void init_ring_ptrs(struct atl2_adapter *adapter)
168
/* Read / Write Ptr Initialize: */
169
adapter->txd_write_ptr = 0;
170
atomic_set(&adapter->txd_read_ptr, 0);
172
adapter->rxd_read_ptr = 0;
173
adapter->rxd_write_ptr = 0;
175
atomic_set(&adapter->txs_write_ptr, 0);
176
adapter->txs_next_clear = 0;
180
* atl2_configure - Configure Transmit&Receive Unit after Reset
181
* @adapter: board private structure
183
* Configure the Tx /Rx unit of the MAC after a reset.
185
static int atl2_configure(struct atl2_adapter *adapter)
187
struct atl2_hw *hw = &adapter->hw;
190
/* clear interrupt status */
191
ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0xffffffff);
193
/* set MAC Address */
194
value = (((u32)hw->mac_addr[2]) << 24) |
195
(((u32)hw->mac_addr[3]) << 16) |
196
(((u32)hw->mac_addr[4]) << 8) |
197
(((u32)hw->mac_addr[5]));
198
ATL2_WRITE_REG(hw, REG_MAC_STA_ADDR, value);
199
value = (((u32)hw->mac_addr[0]) << 8) |
200
(((u32)hw->mac_addr[1]));
201
ATL2_WRITE_REG(hw, (REG_MAC_STA_ADDR+4), value);
203
/* HI base address */
204
ATL2_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
205
(u32)((adapter->ring_dma & 0xffffffff00000000ULL) >> 32));
207
/* LO base address */
208
ATL2_WRITE_REG(hw, REG_TXD_BASE_ADDR_LO,
209
(u32)(adapter->txd_dma & 0x00000000ffffffffULL));
210
ATL2_WRITE_REG(hw, REG_TXS_BASE_ADDR_LO,
211
(u32)(adapter->txs_dma & 0x00000000ffffffffULL));
212
ATL2_WRITE_REG(hw, REG_RXD_BASE_ADDR_LO,
213
(u32)(adapter->rxd_dma & 0x00000000ffffffffULL));
216
ATL2_WRITE_REGW(hw, REG_TXD_MEM_SIZE, (u16)(adapter->txd_ring_size/4));
217
ATL2_WRITE_REGW(hw, REG_TXS_MEM_SIZE, (u16)adapter->txs_ring_size);
218
ATL2_WRITE_REGW(hw, REG_RXD_BUF_NUM, (u16)adapter->rxd_ring_size);
220
/* config Internal SRAM */
222
ATL2_WRITE_REGW(hw, REG_SRAM_TXRAM_END, sram_tx_end);
223
ATL2_WRITE_REGW(hw, REG_SRAM_TXRAM_END, sram_rx_end);
227
value = (((u32)hw->ipgt & MAC_IPG_IFG_IPGT_MASK) <<
228
MAC_IPG_IFG_IPGT_SHIFT) |
229
(((u32)hw->min_ifg & MAC_IPG_IFG_MIFG_MASK) <<
230
MAC_IPG_IFG_MIFG_SHIFT) |
231
(((u32)hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK) <<
232
MAC_IPG_IFG_IPGR1_SHIFT)|
233
(((u32)hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK) <<
234
MAC_IPG_IFG_IPGR2_SHIFT);
235
ATL2_WRITE_REG(hw, REG_MAC_IPG_IFG, value);
237
/* config Half-Duplex Control */
238
value = ((u32)hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
239
(((u32)hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK) <<
240
MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
241
MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
242
(0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
243
(((u32)hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK) <<
244
MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
245
ATL2_WRITE_REG(hw, REG_MAC_HALF_DUPLX_CTRL, value);
247
/* set Interrupt Moderator Timer */
248
ATL2_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, adapter->imt);
249
ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_ITIMER_EN);
251
/* set Interrupt Clear Timer */
252
ATL2_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, adapter->ict);
255
ATL2_WRITE_REG(hw, REG_MTU, adapter->netdev->mtu +
256
ENET_HEADER_SIZE + VLAN_SIZE + ETHERNET_FCS_SIZE);
259
ATL2_WRITE_REG(hw, REG_TX_CUT_THRESH, 0x177);
262
ATL2_WRITE_REGW(hw, REG_PAUSE_ON_TH, hw->fc_rxd_hi);
263
ATL2_WRITE_REGW(hw, REG_PAUSE_OFF_TH, hw->fc_rxd_lo);
266
ATL2_WRITE_REGW(hw, REG_MB_TXD_WR_IDX, (u16)adapter->txd_write_ptr);
267
ATL2_WRITE_REGW(hw, REG_MB_RXD_RD_IDX, (u16)adapter->rxd_read_ptr);
269
/* enable DMA read/write */
270
ATL2_WRITE_REGB(hw, REG_DMAR, DMAR_EN);
271
ATL2_WRITE_REGB(hw, REG_DMAW, DMAW_EN);
273
value = ATL2_READ_REG(&adapter->hw, REG_ISR);
274
if ((value & ISR_PHY_LINKDOWN) != 0)
275
value = 1; /* config failed */
279
/* clear all interrupt status */
280
ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0x3fffffff);
281
ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0);
286
* atl2_setup_ring_resources - allocate Tx / RX descriptor resources
287
* @adapter: board private structure
289
* Return 0 on success, negative on failure
291
static s32 atl2_setup_ring_resources(struct atl2_adapter *adapter)
293
struct pci_dev *pdev = adapter->pdev;
297
/* real ring DMA buffer */
298
adapter->ring_size = size =
299
adapter->txd_ring_size * 1 + 7 + /* dword align */
300
adapter->txs_ring_size * 4 + 7 + /* dword align */
301
adapter->rxd_ring_size * 1536 + 127; /* 128bytes align */
303
adapter->ring_vir_addr = pci_alloc_consistent(pdev, size,
305
if (!adapter->ring_vir_addr)
307
memset(adapter->ring_vir_addr, 0, adapter->ring_size);
310
adapter->txd_dma = adapter->ring_dma ;
311
offset = (adapter->txd_dma & 0x7) ? (8 - (adapter->txd_dma & 0x7)) : 0;
312
adapter->txd_dma += offset;
313
adapter->txd_ring = (struct tx_pkt_header *) (adapter->ring_vir_addr +
317
adapter->txs_dma = adapter->txd_dma + adapter->txd_ring_size;
318
offset = (adapter->txs_dma & 0x7) ? (8 - (adapter->txs_dma & 0x7)) : 0;
319
adapter->txs_dma += offset;
320
adapter->txs_ring = (struct tx_pkt_status *)
321
(((u8 *)adapter->txd_ring) + (adapter->txd_ring_size + offset));
324
adapter->rxd_dma = adapter->txs_dma + adapter->txs_ring_size * 4;
325
offset = (adapter->rxd_dma & 127) ?
326
(128 - (adapter->rxd_dma & 127)) : 0;
332
adapter->rxd_dma += offset;
333
adapter->rxd_ring = (struct rx_desc *) (((u8 *)adapter->txs_ring) +
334
(adapter->txs_ring_size * 4 + offset));
337
* Read / Write Ptr Initialize:
338
* init_ring_ptrs(adapter);
344
* atl2_irq_enable - Enable default interrupt generation settings
345
* @adapter: board private structure
347
static inline void atl2_irq_enable(struct atl2_adapter *adapter)
349
ATL2_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
350
ATL2_WRITE_FLUSH(&adapter->hw);
354
* atl2_irq_disable - Mask off interrupt generation on the NIC
355
* @adapter: board private structure
357
static inline void atl2_irq_disable(struct atl2_adapter *adapter)
359
ATL2_WRITE_REG(&adapter->hw, REG_IMR, 0);
360
ATL2_WRITE_FLUSH(&adapter->hw);
361
synchronize_irq(adapter->pdev->irq);
364
#ifdef NETIF_F_HW_VLAN_TX
365
static void atl2_vlan_rx_register(struct net_device *netdev,
366
struct vlan_group *grp)
368
struct atl2_adapter *adapter = netdev_priv(netdev);
371
atl2_irq_disable(adapter);
372
adapter->vlgrp = grp;
375
/* enable VLAN tag insert/strip */
376
ctrl = ATL2_READ_REG(&adapter->hw, REG_MAC_CTRL);
377
ctrl |= MAC_CTRL_RMV_VLAN;
378
ATL2_WRITE_REG(&adapter->hw, REG_MAC_CTRL, ctrl);
380
/* disable VLAN tag insert/strip */
381
ctrl = ATL2_READ_REG(&adapter->hw, REG_MAC_CTRL);
382
ctrl &= ~MAC_CTRL_RMV_VLAN;
383
ATL2_WRITE_REG(&adapter->hw, REG_MAC_CTRL, ctrl);
386
atl2_irq_enable(adapter);
389
static void atl2_restore_vlan(struct atl2_adapter *adapter)
391
atl2_vlan_rx_register(adapter->netdev, adapter->vlgrp);
395
static void atl2_intr_rx(struct atl2_adapter *adapter)
397
struct net_device *netdev = adapter->netdev;
402
rxd = adapter->rxd_ring+adapter->rxd_write_ptr;
403
if (!rxd->status.update)
404
break; /* end of tx */
406
/* clear this flag at once */
407
rxd->status.update = 0;
409
if (rxd->status.ok && rxd->status.pkt_size >= 60) {
410
int rx_size = (int)(rxd->status.pkt_size - 4);
411
/* alloc new buffer */
412
skb = netdev_alloc_skb_ip_align(netdev, rx_size);
415
"%s: Mem squeeze, deferring packet.\n",
418
* Check that some rx space is free. If not,
419
* free one and mark stats->rx_dropped++.
421
netdev->stats.rx_dropped++;
425
memcpy(skb->data, rxd->packet, rx_size);
426
skb_put(skb, rx_size);
427
skb->protocol = eth_type_trans(skb, netdev);
428
#ifdef NETIF_F_HW_VLAN_TX
429
if (adapter->vlgrp && (rxd->status.vlan)) {
430
u16 vlan_tag = (rxd->status.vtag>>4) |
431
((rxd->status.vtag&7) << 13) |
432
((rxd->status.vtag&8) << 9);
433
vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
437
netdev->stats.rx_bytes += rx_size;
438
netdev->stats.rx_packets++;
440
netdev->stats.rx_errors++;
442
if (rxd->status.ok && rxd->status.pkt_size <= 60)
443
netdev->stats.rx_length_errors++;
444
if (rxd->status.mcast)
445
netdev->stats.multicast++;
447
netdev->stats.rx_crc_errors++;
448
if (rxd->status.align)
449
netdev->stats.rx_frame_errors++;
452
/* advance write ptr */
453
if (++adapter->rxd_write_ptr == adapter->rxd_ring_size)
454
adapter->rxd_write_ptr = 0;
457
/* update mailbox? */
458
adapter->rxd_read_ptr = adapter->rxd_write_ptr;
459
ATL2_WRITE_REGW(&adapter->hw, REG_MB_RXD_RD_IDX, adapter->rxd_read_ptr);
462
static void atl2_intr_tx(struct atl2_adapter *adapter)
464
struct net_device *netdev = adapter->netdev;
467
struct tx_pkt_status *txs;
468
struct tx_pkt_header *txph;
472
txs_write_ptr = (u32) atomic_read(&adapter->txs_write_ptr);
473
txs = adapter->txs_ring + txs_write_ptr;
475
break; /* tx stop here */
480
if (++txs_write_ptr == adapter->txs_ring_size)
482
atomic_set(&adapter->txs_write_ptr, (int)txs_write_ptr);
484
txd_read_ptr = (u32) atomic_read(&adapter->txd_read_ptr);
485
txph = (struct tx_pkt_header *)
486
(((u8 *)adapter->txd_ring) + txd_read_ptr);
488
if (txph->pkt_size != txs->pkt_size) {
489
struct tx_pkt_status *old_txs = txs;
491
"%s: txs packet size not consistent with txd"
492
" txd_:0x%08x, txs_:0x%08x!\n",
493
adapter->netdev->name,
494
*(u32 *)txph, *(u32 *)txs);
496
"txd read ptr: 0x%x\n",
498
txs = adapter->txs_ring + txs_write_ptr;
500
"txs-behind:0x%08x\n",
502
if (txs_write_ptr < 2) {
503
txs = adapter->txs_ring +
504
(adapter->txs_ring_size +
507
txs = adapter->txs_ring + (txs_write_ptr - 2);
510
"txs-before:0x%08x\n",
516
txd_read_ptr += (((u32)(txph->pkt_size) + 7) & ~3);
517
if (txd_read_ptr >= adapter->txd_ring_size)
518
txd_read_ptr -= adapter->txd_ring_size;
520
atomic_set(&adapter->txd_read_ptr, (int)txd_read_ptr);
524
netdev->stats.tx_bytes += txs->pkt_size;
525
netdev->stats.tx_packets++;
528
netdev->stats.tx_errors++;
531
netdev->stats.collisions++;
533
netdev->stats.tx_aborted_errors++;
535
netdev->stats.tx_window_errors++;
537
netdev->stats.tx_fifo_errors++;
541
if (netif_queue_stopped(adapter->netdev) &&
542
netif_carrier_ok(adapter->netdev))
543
netif_wake_queue(adapter->netdev);
547
static void atl2_check_for_link(struct atl2_adapter *adapter)
549
struct net_device *netdev = adapter->netdev;
552
spin_lock(&adapter->stats_lock);
553
atl2_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
554
atl2_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
555
spin_unlock(&adapter->stats_lock);
557
/* notify upper layer link down ASAP */
558
if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
559
if (netif_carrier_ok(netdev)) { /* old link state: Up */
560
printk(KERN_INFO "%s: %s NIC Link is Down\n",
561
atl2_driver_name, netdev->name);
562
adapter->link_speed = SPEED_0;
563
netif_carrier_off(netdev);
564
netif_stop_queue(netdev);
567
schedule_work(&adapter->link_chg_task);
570
static inline void atl2_clear_phy_int(struct atl2_adapter *adapter)
573
spin_lock(&adapter->stats_lock);
574
atl2_read_phy_reg(&adapter->hw, 19, &phy_data);
575
spin_unlock(&adapter->stats_lock);
579
* atl2_intr - Interrupt Handler
580
* @irq: interrupt number
581
* @data: pointer to a network interface device structure
582
* @pt_regs: CPU registers structure
584
static irqreturn_t atl2_intr(int irq, void *data)
586
struct atl2_adapter *adapter = netdev_priv(data);
587
struct atl2_hw *hw = &adapter->hw;
590
status = ATL2_READ_REG(hw, REG_ISR);
595
if (status & ISR_PHY)
596
atl2_clear_phy_int(adapter);
598
/* clear ISR status, and Enable CMB DMA/Disable Interrupt */
599
ATL2_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
601
/* check if PCIE PHY Link down */
602
if (status & ISR_PHY_LINKDOWN) {
603
if (netif_running(adapter->netdev)) { /* reset MAC */
604
ATL2_WRITE_REG(hw, REG_ISR, 0);
605
ATL2_WRITE_REG(hw, REG_IMR, 0);
606
ATL2_WRITE_FLUSH(hw);
607
schedule_work(&adapter->reset_task);
612
/* check if DMA read/write error? */
613
if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
614
ATL2_WRITE_REG(hw, REG_ISR, 0);
615
ATL2_WRITE_REG(hw, REG_IMR, 0);
616
ATL2_WRITE_FLUSH(hw);
617
schedule_work(&adapter->reset_task);
622
if (status & (ISR_PHY | ISR_MANUAL)) {
623
adapter->netdev->stats.tx_carrier_errors++;
624
atl2_check_for_link(adapter);
628
if (status & ISR_TX_EVENT)
629
atl2_intr_tx(adapter);
632
if (status & ISR_RX_EVENT)
633
atl2_intr_rx(adapter);
635
/* re-enable Interrupt */
636
ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0);
640
static int atl2_request_irq(struct atl2_adapter *adapter)
642
struct net_device *netdev = adapter->netdev;
646
adapter->have_msi = true;
647
err = pci_enable_msi(adapter->pdev);
649
adapter->have_msi = false;
651
if (adapter->have_msi)
652
flags &= ~IRQF_SHARED;
654
return request_irq(adapter->pdev->irq, atl2_intr, flags, netdev->name,
659
* atl2_free_ring_resources - Free Tx / RX descriptor Resources
660
* @adapter: board private structure
662
* Free all transmit software resources
664
static void atl2_free_ring_resources(struct atl2_adapter *adapter)
666
struct pci_dev *pdev = adapter->pdev;
667
pci_free_consistent(pdev, adapter->ring_size, adapter->ring_vir_addr,
672
* atl2_open - Called when a network interface is made active
673
* @netdev: network interface device structure
675
* Returns 0 on success, negative value on failure
677
* The open entry point is called when a network interface is made
678
* active by the system (IFF_UP). At this point all resources needed
679
* for transmit and receive operations are allocated, the interrupt
680
* handler is registered with the OS, the watchdog timer is started,
681
* and the stack is notified that the interface is ready.
683
static int atl2_open(struct net_device *netdev)
685
struct atl2_adapter *adapter = netdev_priv(netdev);
689
/* disallow open during test */
690
if (test_bit(__ATL2_TESTING, &adapter->flags))
693
/* allocate transmit descriptors */
694
err = atl2_setup_ring_resources(adapter);
698
err = atl2_init_hw(&adapter->hw);
704
/* hardware has been reset, we need to reload some things */
705
atl2_set_multi(netdev);
706
init_ring_ptrs(adapter);
708
#ifdef NETIF_F_HW_VLAN_TX
709
atl2_restore_vlan(adapter);
712
if (atl2_configure(adapter)) {
717
err = atl2_request_irq(adapter);
721
clear_bit(__ATL2_DOWN, &adapter->flags);
723
mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 4*HZ));
725
val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL);
726
ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
727
val | MASTER_CTRL_MANUAL_INT);
729
atl2_irq_enable(adapter);
736
atl2_free_ring_resources(adapter);
737
atl2_reset_hw(&adapter->hw);
742
static void atl2_down(struct atl2_adapter *adapter)
744
struct net_device *netdev = adapter->netdev;
746
/* signal that we're down so the interrupt handler does not
747
* reschedule our watchdog timer */
748
set_bit(__ATL2_DOWN, &adapter->flags);
750
netif_tx_disable(netdev);
752
/* reset MAC to disable all RX/TX */
753
atl2_reset_hw(&adapter->hw);
756
atl2_irq_disable(adapter);
758
del_timer_sync(&adapter->watchdog_timer);
759
del_timer_sync(&adapter->phy_config_timer);
760
clear_bit(0, &adapter->cfg_phy);
762
netif_carrier_off(netdev);
763
adapter->link_speed = SPEED_0;
764
adapter->link_duplex = -1;
767
static void atl2_free_irq(struct atl2_adapter *adapter)
769
struct net_device *netdev = adapter->netdev;
771
free_irq(adapter->pdev->irq, netdev);
773
#ifdef CONFIG_PCI_MSI
774
if (adapter->have_msi)
775
pci_disable_msi(adapter->pdev);
780
* atl2_close - Disables a network interface
781
* @netdev: network interface device structure
783
* Returns 0, this is not allowed to fail
785
* The close entry point is called when an interface is de-activated
786
* by the OS. The hardware is still under the drivers control, but
787
* needs to be disabled. A global MAC reset is issued to stop the
788
* hardware, and all transmit and receive resources are freed.
790
static int atl2_close(struct net_device *netdev)
792
struct atl2_adapter *adapter = netdev_priv(netdev);
794
WARN_ON(test_bit(__ATL2_RESETTING, &adapter->flags));
797
atl2_free_irq(adapter);
798
atl2_free_ring_resources(adapter);
803
static inline int TxsFreeUnit(struct atl2_adapter *adapter)
805
u32 txs_write_ptr = (u32) atomic_read(&adapter->txs_write_ptr);
807
return (adapter->txs_next_clear >= txs_write_ptr) ?
808
(int) (adapter->txs_ring_size - adapter->txs_next_clear +
810
(int) (txs_write_ptr - adapter->txs_next_clear - 1);
813
static inline int TxdFreeBytes(struct atl2_adapter *adapter)
815
u32 txd_read_ptr = (u32)atomic_read(&adapter->txd_read_ptr);
817
return (adapter->txd_write_ptr >= txd_read_ptr) ?
818
(int) (adapter->txd_ring_size - adapter->txd_write_ptr +
820
(int) (txd_read_ptr - adapter->txd_write_ptr - 1);
823
static netdev_tx_t atl2_xmit_frame(struct sk_buff *skb,
824
struct net_device *netdev)
826
struct atl2_adapter *adapter = netdev_priv(netdev);
827
struct tx_pkt_header *txph;
828
u32 offset, copy_len;
832
if (test_bit(__ATL2_DOWN, &adapter->flags)) {
833
dev_kfree_skb_any(skb);
837
if (unlikely(skb->len <= 0)) {
838
dev_kfree_skb_any(skb);
842
txs_unused = TxsFreeUnit(adapter);
843
txbuf_unused = TxdFreeBytes(adapter);
845
if (skb->len + sizeof(struct tx_pkt_header) + 4 > txbuf_unused ||
847
/* not enough resources */
848
netif_stop_queue(netdev);
849
return NETDEV_TX_BUSY;
852
offset = adapter->txd_write_ptr;
854
txph = (struct tx_pkt_header *) (((u8 *)adapter->txd_ring) + offset);
857
txph->pkt_size = skb->len;
860
if (offset >= adapter->txd_ring_size)
861
offset -= adapter->txd_ring_size;
862
copy_len = adapter->txd_ring_size - offset;
863
if (copy_len >= skb->len) {
864
memcpy(((u8 *)adapter->txd_ring) + offset, skb->data, skb->len);
865
offset += ((u32)(skb->len + 3) & ~3);
867
memcpy(((u8 *)adapter->txd_ring)+offset, skb->data, copy_len);
868
memcpy((u8 *)adapter->txd_ring, skb->data+copy_len,
870
offset = ((u32)(skb->len-copy_len + 3) & ~3);
872
#ifdef NETIF_F_HW_VLAN_TX
873
if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
874
u16 vlan_tag = vlan_tx_tag_get(skb);
875
vlan_tag = (vlan_tag << 4) |
877
((vlan_tag >> 9) & 0x8);
879
txph->vlan = vlan_tag;
882
if (offset >= adapter->txd_ring_size)
883
offset -= adapter->txd_ring_size;
884
adapter->txd_write_ptr = offset;
886
/* clear txs before send */
887
adapter->txs_ring[adapter->txs_next_clear].update = 0;
888
if (++adapter->txs_next_clear == adapter->txs_ring_size)
889
adapter->txs_next_clear = 0;
891
ATL2_WRITE_REGW(&adapter->hw, REG_MB_TXD_WR_IDX,
892
(adapter->txd_write_ptr >> 2));
895
netdev->trans_start = jiffies;
896
dev_kfree_skb_any(skb);
901
* atl2_change_mtu - Change the Maximum Transfer Unit
902
* @netdev: network interface device structure
903
* @new_mtu: new value for maximum frame size
905
* Returns 0 on success, negative on failure
907
static int atl2_change_mtu(struct net_device *netdev, int new_mtu)
909
struct atl2_adapter *adapter = netdev_priv(netdev);
910
struct atl2_hw *hw = &adapter->hw;
912
if ((new_mtu < 40) || (new_mtu > (ETH_DATA_LEN + VLAN_SIZE)))
916
if (hw->max_frame_size != new_mtu) {
917
netdev->mtu = new_mtu;
918
ATL2_WRITE_REG(hw, REG_MTU, new_mtu + ENET_HEADER_SIZE +
919
VLAN_SIZE + ETHERNET_FCS_SIZE);
926
* atl2_set_mac - Change the Ethernet Address of the NIC
927
* @netdev: network interface device structure
928
* @p: pointer to an address structure
930
* Returns 0 on success, negative on failure
932
static int atl2_set_mac(struct net_device *netdev, void *p)
934
struct atl2_adapter *adapter = netdev_priv(netdev);
935
struct sockaddr *addr = p;
937
if (!is_valid_ether_addr(addr->sa_data))
938
return -EADDRNOTAVAIL;
940
if (netif_running(netdev))
943
memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
944
memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
946
atl2_set_mac_addr(&adapter->hw);
957
static int atl2_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
959
struct atl2_adapter *adapter = netdev_priv(netdev);
960
struct mii_ioctl_data *data = if_mii(ifr);
968
spin_lock_irqsave(&adapter->stats_lock, flags);
969
if (atl2_read_phy_reg(&adapter->hw,
970
data->reg_num & 0x1F, &data->val_out)) {
971
spin_unlock_irqrestore(&adapter->stats_lock, flags);
974
spin_unlock_irqrestore(&adapter->stats_lock, flags);
977
if (data->reg_num & ~(0x1F))
979
spin_lock_irqsave(&adapter->stats_lock, flags);
980
if (atl2_write_phy_reg(&adapter->hw, data->reg_num,
982
spin_unlock_irqrestore(&adapter->stats_lock, flags);
985
spin_unlock_irqrestore(&adapter->stats_lock, flags);
999
static int atl2_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1005
return atl2_mii_ioctl(netdev, ifr, cmd);
1006
#ifdef ETHTOOL_OPS_COMPAT
1008
return ethtool_ioctl(ifr);
1016
* atl2_tx_timeout - Respond to a Tx Hang
1017
* @netdev: network interface device structure
1019
static void atl2_tx_timeout(struct net_device *netdev)
1021
struct atl2_adapter *adapter = netdev_priv(netdev);
1023
/* Do the reset outside of interrupt context */
1024
schedule_work(&adapter->reset_task);
1028
* atl2_watchdog - Timer Call-back
1029
* @data: pointer to netdev cast into an unsigned long
1031
static void atl2_watchdog(unsigned long data)
1033
struct atl2_adapter *adapter = (struct atl2_adapter *) data;
1035
if (!test_bit(__ATL2_DOWN, &adapter->flags)) {
1036
u32 drop_rxd, drop_rxs;
1037
unsigned long flags;
1039
spin_lock_irqsave(&adapter->stats_lock, flags);
1040
drop_rxd = ATL2_READ_REG(&adapter->hw, REG_STS_RXD_OV);
1041
drop_rxs = ATL2_READ_REG(&adapter->hw, REG_STS_RXS_OV);
1042
spin_unlock_irqrestore(&adapter->stats_lock, flags);
1044
adapter->netdev->stats.rx_over_errors += drop_rxd + drop_rxs;
1046
/* Reset the timer */
1047
mod_timer(&adapter->watchdog_timer,
1048
round_jiffies(jiffies + 4 * HZ));
1053
* atl2_phy_config - Timer Call-back
1054
* @data: pointer to netdev cast into an unsigned long
1056
static void atl2_phy_config(unsigned long data)
1058
struct atl2_adapter *adapter = (struct atl2_adapter *) data;
1059
struct atl2_hw *hw = &adapter->hw;
1060
unsigned long flags;
1062
spin_lock_irqsave(&adapter->stats_lock, flags);
1063
atl2_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
1064
atl2_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN |
1065
MII_CR_RESTART_AUTO_NEG);
1066
spin_unlock_irqrestore(&adapter->stats_lock, flags);
1067
clear_bit(0, &adapter->cfg_phy);
1070
static int atl2_up(struct atl2_adapter *adapter)
1072
struct net_device *netdev = adapter->netdev;
1076
/* hardware has been reset, we need to reload some things */
1078
err = atl2_init_hw(&adapter->hw);
1084
atl2_set_multi(netdev);
1085
init_ring_ptrs(adapter);
1087
#ifdef NETIF_F_HW_VLAN_TX
1088
atl2_restore_vlan(adapter);
1091
if (atl2_configure(adapter)) {
1096
clear_bit(__ATL2_DOWN, &adapter->flags);
1098
val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1099
ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, val |
1100
MASTER_CTRL_MANUAL_INT);
1102
atl2_irq_enable(adapter);
1108
static void atl2_reinit_locked(struct atl2_adapter *adapter)
1110
WARN_ON(in_interrupt());
1111
while (test_and_set_bit(__ATL2_RESETTING, &adapter->flags))
1115
clear_bit(__ATL2_RESETTING, &adapter->flags);
1118
static void atl2_reset_task(struct work_struct *work)
1120
struct atl2_adapter *adapter;
1121
adapter = container_of(work, struct atl2_adapter, reset_task);
1123
atl2_reinit_locked(adapter);
1126
static void atl2_setup_mac_ctrl(struct atl2_adapter *adapter)
1129
struct atl2_hw *hw = &adapter->hw;
1130
struct net_device *netdev = adapter->netdev;
1132
/* Config MAC CTRL Register */
1133
value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN | MAC_CTRL_MACLP_CLK_PHY;
1136
if (FULL_DUPLEX == adapter->link_duplex)
1137
value |= MAC_CTRL_DUPLX;
1140
value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1143
value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1145
/* preamble length */
1146
value |= (((u32)adapter->hw.preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1147
MAC_CTRL_PRMLEN_SHIFT);
1151
value |= MAC_CTRL_RMV_VLAN;
1154
value |= MAC_CTRL_BC_EN;
1155
if (netdev->flags & IFF_PROMISC)
1156
value |= MAC_CTRL_PROMIS_EN;
1157
else if (netdev->flags & IFF_ALLMULTI)
1158
value |= MAC_CTRL_MC_ALL_EN;
1160
/* half retry buffer */
1161
value |= (((u32)(adapter->hw.retry_buf &
1162
MAC_CTRL_HALF_LEFT_BUF_MASK)) << MAC_CTRL_HALF_LEFT_BUF_SHIFT);
1164
ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
1167
static int atl2_check_link(struct atl2_adapter *adapter)
1169
struct atl2_hw *hw = &adapter->hw;
1170
struct net_device *netdev = adapter->netdev;
1172
u16 speed, duplex, phy_data;
1175
/* MII_BMSR must read twise */
1176
atl2_read_phy_reg(hw, MII_BMSR, &phy_data);
1177
atl2_read_phy_reg(hw, MII_BMSR, &phy_data);
1178
if (!(phy_data&BMSR_LSTATUS)) { /* link down */
1179
if (netif_carrier_ok(netdev)) { /* old link state: Up */
1182
value = ATL2_READ_REG(hw, REG_MAC_CTRL);
1183
value &= ~MAC_CTRL_RX_EN;
1184
ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
1185
adapter->link_speed = SPEED_0;
1186
netif_carrier_off(netdev);
1187
netif_stop_queue(netdev);
1193
ret_val = atl2_get_speed_and_duplex(hw, &speed, &duplex);
1196
switch (hw->MediaType) {
1197
case MEDIA_TYPE_100M_FULL:
1198
if (speed != SPEED_100 || duplex != FULL_DUPLEX)
1201
case MEDIA_TYPE_100M_HALF:
1202
if (speed != SPEED_100 || duplex != HALF_DUPLEX)
1205
case MEDIA_TYPE_10M_FULL:
1206
if (speed != SPEED_10 || duplex != FULL_DUPLEX)
1209
case MEDIA_TYPE_10M_HALF:
1210
if (speed != SPEED_10 || duplex != HALF_DUPLEX)
1214
/* link result is our setting */
1215
if (reconfig == 0) {
1216
if (adapter->link_speed != speed ||
1217
adapter->link_duplex != duplex) {
1218
adapter->link_speed = speed;
1219
adapter->link_duplex = duplex;
1220
atl2_setup_mac_ctrl(adapter);
1221
printk(KERN_INFO "%s: %s NIC Link is Up<%d Mbps %s>\n",
1222
atl2_driver_name, netdev->name,
1223
adapter->link_speed,
1224
adapter->link_duplex == FULL_DUPLEX ?
1225
"Full Duplex" : "Half Duplex");
1228
if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
1229
netif_carrier_on(netdev);
1230
netif_wake_queue(netdev);
1235
/* change original link status */
1236
if (netif_carrier_ok(netdev)) {
1239
value = ATL2_READ_REG(hw, REG_MAC_CTRL);
1240
value &= ~MAC_CTRL_RX_EN;
1241
ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
1243
adapter->link_speed = SPEED_0;
1244
netif_carrier_off(netdev);
1245
netif_stop_queue(netdev);
1248
/* auto-neg, insert timer to re-config phy
1249
* (if interval smaller than 5 seconds, something strange) */
1250
if (!test_bit(__ATL2_DOWN, &adapter->flags)) {
1251
if (!test_and_set_bit(0, &adapter->cfg_phy))
1252
mod_timer(&adapter->phy_config_timer,
1253
round_jiffies(jiffies + 5 * HZ));
1260
* atl2_link_chg_task - deal with link change event Out of interrupt context
1261
* @netdev: network interface device structure
1263
static void atl2_link_chg_task(struct work_struct *work)
1265
struct atl2_adapter *adapter;
1266
unsigned long flags;
1268
adapter = container_of(work, struct atl2_adapter, link_chg_task);
1270
spin_lock_irqsave(&adapter->stats_lock, flags);
1271
atl2_check_link(adapter);
1272
spin_unlock_irqrestore(&adapter->stats_lock, flags);
1275
static void atl2_setup_pcicmd(struct pci_dev *pdev)
1279
pci_read_config_word(pdev, PCI_COMMAND, &cmd);
1281
if (cmd & PCI_COMMAND_INTX_DISABLE)
1282
cmd &= ~PCI_COMMAND_INTX_DISABLE;
1283
if (cmd & PCI_COMMAND_IO)
1284
cmd &= ~PCI_COMMAND_IO;
1285
if (0 == (cmd & PCI_COMMAND_MEMORY))
1286
cmd |= PCI_COMMAND_MEMORY;
1287
if (0 == (cmd & PCI_COMMAND_MASTER))
1288
cmd |= PCI_COMMAND_MASTER;
1289
pci_write_config_word(pdev, PCI_COMMAND, cmd);
1292
* some motherboards BIOS(PXE/EFI) driver may set PME
1293
* while they transfer control to OS (Windows/Linux)
1294
* so we should clear this bit before NIC work normally
1296
pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
1299
#ifdef CONFIG_NET_POLL_CONTROLLER
1300
static void atl2_poll_controller(struct net_device *netdev)
1302
disable_irq(netdev->irq);
1303
atl2_intr(netdev->irq, netdev);
1304
enable_irq(netdev->irq);
1309
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29))
1310
static const struct net_device_ops atl2_netdev_ops = {
1311
.ndo_open = atl2_open,
1312
.ndo_stop = atl2_close,
1313
.ndo_start_xmit = atl2_xmit_frame,
1314
.ndo_set_multicast_list = atl2_set_multi,
1315
.ndo_validate_addr = eth_validate_addr,
1316
.ndo_set_mac_address = atl2_set_mac,
1317
.ndo_change_mtu = atl2_change_mtu,
1318
.ndo_do_ioctl = atl2_ioctl,
1319
.ndo_tx_timeout = atl2_tx_timeout,
1320
.ndo_vlan_rx_register = atl2_vlan_rx_register,
1321
#ifdef CONFIG_NET_POLL_CONTROLLER
1322
.ndo_poll_controller = atl2_poll_controller,
1328
* atl2_probe - Device Initialization Routine
1329
* @pdev: PCI device information struct
1330
* @ent: entry in atl2_pci_tbl
1332
* Returns 0 on success, negative on failure
1334
* atl2_probe initializes an adapter identified by a pci_dev structure.
1335
* The OS initialization, configuring of the adapter private structure,
1336
* and a hardware reset occur.
1338
static int __devinit atl2_probe(struct pci_dev *pdev,
1339
const struct pci_device_id *ent)
1341
struct net_device *netdev;
1342
struct atl2_adapter *adapter;
1343
static int cards_found;
1344
unsigned long mmio_start;
1350
err = pci_enable_device(pdev);
1355
* atl2 is a shared-high-32-bit device, so we're stuck with 32-bit DMA
1356
* until the kernel has the proper infrastructure to support 64-bit DMA
1359
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) &&
1360
pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1361
printk(KERN_ERR "atl2: No usable DMA configuration, aborting\n");
1365
/* Mark all PCI regions associated with PCI device
1366
* pdev as being reserved by owner atl2_driver_name */
1367
err = pci_request_regions(pdev, atl2_driver_name);
1371
/* Enables bus-mastering on the device and calls
1372
* pcibios_set_master to do the needed arch specific settings */
1373
pci_set_master(pdev);
1376
netdev = alloc_etherdev(sizeof(struct atl2_adapter));
1378
goto err_alloc_etherdev;
1380
SET_NETDEV_DEV(netdev, &pdev->dev);
1382
pci_set_drvdata(pdev, netdev);
1383
adapter = netdev_priv(netdev);
1384
adapter->netdev = netdev;
1385
adapter->pdev = pdev;
1386
adapter->hw.back = adapter;
1388
mmio_start = pci_resource_start(pdev, 0x0);
1389
mmio_len = pci_resource_len(pdev, 0x0);
1391
adapter->hw.mem_rang = (u32)mmio_len;
1392
adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1393
if (!adapter->hw.hw_addr) {
1398
atl2_setup_pcicmd(pdev);
1400
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29))
1401
netdev->netdev_ops = &atl2_netdev_ops;
1403
netdev->change_mtu = atl2_change_mtu;
1404
netdev->hard_start_xmit = atl2_xmit_frame;
1405
netdev->open = atl2_open;
1406
netdev->stop = atl2_close;
1407
netdev->tx_timeout = atl2_tx_timeout;
1408
netdev->set_mac_address = atl2_set_mac;
1409
netdev->do_ioctl = atl2_ioctl;
1411
atl2_set_ethtool_ops(netdev);
1412
netdev->watchdog_timeo = 5 * HZ;
1413
strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1415
netdev->mem_start = mmio_start;
1416
netdev->mem_end = mmio_start + mmio_len;
1417
adapter->bd_number = cards_found;
1418
adapter->pci_using_64 = false;
1420
/* setup the private structure */
1421
err = atl2_sw_init(adapter);
1427
#ifdef NETIF_F_HW_VLAN_TX
1428
netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
1431
/* Init PHY as early as possible due to power saving issue */
1432
atl2_phy_init(&adapter->hw);
1434
/* reset the controller to
1435
* put the device in a known good starting state */
1437
if (atl2_reset_hw(&adapter->hw)) {
1442
/* copy the MAC address out of the EEPROM */
1443
atl2_read_mac_addr(&adapter->hw);
1444
memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1445
/* FIXME: do we still need this? */
1446
#ifdef ETHTOOL_GPERMADDR
1447
memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1449
if (!is_valid_ether_addr(netdev->perm_addr)) {
1451
if (!is_valid_ether_addr(netdev->dev_addr)) {
1457
atl2_check_options(adapter);
1459
init_timer(&adapter->watchdog_timer);
1460
adapter->watchdog_timer.function = &atl2_watchdog;
1461
adapter->watchdog_timer.data = (unsigned long) adapter;
1463
init_timer(&adapter->phy_config_timer);
1464
adapter->phy_config_timer.function = &atl2_phy_config;
1465
adapter->phy_config_timer.data = (unsigned long) adapter;
1467
INIT_WORK(&adapter->reset_task, atl2_reset_task);
1468
INIT_WORK(&adapter->link_chg_task, atl2_link_chg_task);
1470
strcpy(netdev->name, "eth%d"); /* ?? */
1471
err = register_netdev(netdev);
1475
/* assume we have no link for now */
1476
netif_carrier_off(netdev);
1477
netif_stop_queue(netdev);
1487
iounmap(adapter->hw.hw_addr);
1489
free_netdev(netdev);
1491
pci_release_regions(pdev);
1494
pci_disable_device(pdev);
1499
* atl2_remove - Device Removal Routine
1500
* @pdev: PCI device information struct
1502
* atl2_remove is called by the PCI subsystem to alert the driver
1503
* that it should release a PCI device. The could be caused by a
1504
* Hot-Plug event, or because the driver is going to be removed from
1507
/* FIXME: write the original MAC address back in case it was changed from a
1508
* BIOS-set value, as in atl1 -- CHS */
1509
static void __devexit atl2_remove(struct pci_dev *pdev)
1511
struct net_device *netdev = pci_get_drvdata(pdev);
1512
struct atl2_adapter *adapter = netdev_priv(netdev);
1514
/* flush_scheduled work may reschedule our watchdog task, so
1515
* explicitly disable watchdog tasks from being rescheduled */
1516
set_bit(__ATL2_DOWN, &adapter->flags);
1518
del_timer_sync(&adapter->watchdog_timer);
1519
del_timer_sync(&adapter->phy_config_timer);
1521
flush_scheduled_work();
1523
unregister_netdev(netdev);
1525
atl2_force_ps(&adapter->hw);
1527
iounmap(adapter->hw.hw_addr);
1528
pci_release_regions(pdev);
1530
free_netdev(netdev);
1532
pci_disable_device(pdev);
1535
static int atl2_suspend(struct pci_dev *pdev, pm_message_t state)
1537
struct net_device *netdev = pci_get_drvdata(pdev);
1538
struct atl2_adapter *adapter = netdev_priv(netdev);
1539
struct atl2_hw *hw = &adapter->hw;
1542
u32 wufc = adapter->wol;
1548
netif_device_detach(netdev);
1550
if (netif_running(netdev)) {
1551
WARN_ON(test_bit(__ATL2_RESETTING, &adapter->flags));
1556
retval = pci_save_state(pdev);
1561
atl2_read_phy_reg(hw, MII_BMSR, (u16 *)&ctrl);
1562
atl2_read_phy_reg(hw, MII_BMSR, (u16 *)&ctrl);
1563
if (ctrl & BMSR_LSTATUS)
1564
wufc &= ~ATLX_WUFC_LNKC;
1566
if (0 != (ctrl & BMSR_LSTATUS) && 0 != wufc) {
1568
/* get current link speed & duplex */
1569
ret_val = atl2_get_speed_and_duplex(hw, &speed, &duplex);
1572
"%s: get speed&duplex error while suspend\n",
1579
/* turn on magic packet wol */
1580
if (wufc & ATLX_WUFC_MAG)
1581
ctrl |= (WOL_MAGIC_EN | WOL_MAGIC_PME_EN);
1583
/* ignore Link Chg event when Link is up */
1584
ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl);
1586
/* Config MAC CTRL Register */
1587
ctrl = MAC_CTRL_RX_EN | MAC_CTRL_MACLP_CLK_PHY;
1588
if (FULL_DUPLEX == adapter->link_duplex)
1589
ctrl |= MAC_CTRL_DUPLX;
1590
ctrl |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1591
ctrl |= (((u32)adapter->hw.preamble_len &
1592
MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1593
ctrl |= (((u32)(adapter->hw.retry_buf &
1594
MAC_CTRL_HALF_LEFT_BUF_MASK)) <<
1595
MAC_CTRL_HALF_LEFT_BUF_SHIFT);
1596
if (wufc & ATLX_WUFC_MAG) {
1597
/* magic packet maybe Broadcast&multicast&Unicast */
1598
ctrl |= MAC_CTRL_BC_EN;
1601
ATL2_WRITE_REG(hw, REG_MAC_CTRL, ctrl);
1604
ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);
1605
ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
1606
ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
1607
ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);
1608
ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK;
1609
ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);
1611
pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
1615
if (0 == (ctrl&BMSR_LSTATUS) && 0 != (wufc&ATLX_WUFC_LNKC)) {
1616
/* link is down, so only LINK CHG WOL event enable */
1617
ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
1618
ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl);
1619
ATL2_WRITE_REG(hw, REG_MAC_CTRL, 0);
1622
ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);
1623
ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
1624
ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
1625
ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);
1626
ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK;
1627
ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);
1629
hw->phy_configured = false; /* re-init PHY when resume */
1631
pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
1638
ATL2_WRITE_REG(hw, REG_WOL_CTRL, 0);
1641
ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);
1642
ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
1643
ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
1644
ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);
1645
ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK;
1646
ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);
1649
hw->phy_configured = false; /* re-init PHY when resume */
1651
pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1654
if (netif_running(netdev))
1655
atl2_free_irq(adapter);
1657
pci_disable_device(pdev);
1659
pci_set_power_state(pdev, pci_choose_state(pdev, state));
1665
static int atl2_resume(struct pci_dev *pdev)
1667
struct net_device *netdev = pci_get_drvdata(pdev);
1668
struct atl2_adapter *adapter = netdev_priv(netdev);
1671
pci_set_power_state(pdev, PCI_D0);
1672
pci_restore_state(pdev);
1674
err = pci_enable_device(pdev);
1677
"atl2: Cannot enable PCI device from suspend\n");
1681
pci_set_master(pdev);
1683
ATL2_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
1685
pci_enable_wake(pdev, PCI_D3hot, 0);
1686
pci_enable_wake(pdev, PCI_D3cold, 0);
1688
ATL2_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
1690
if (netif_running(netdev)) {
1691
err = atl2_request_irq(adapter);
1696
atl2_reset_hw(&adapter->hw);
1698
if (netif_running(netdev))
1701
netif_device_attach(netdev);
1707
static void atl2_shutdown(struct pci_dev *pdev)
1709
atl2_suspend(pdev, PMSG_SUSPEND);
1712
static struct pci_driver atl2_driver = {
1713
.name = atl2_driver_name,
1714
.id_table = atl2_pci_tbl,
1715
.probe = atl2_probe,
1716
.remove = __devexit_p(atl2_remove),
1717
/* Power Managment Hooks */
1718
.suspend = atl2_suspend,
1720
.resume = atl2_resume,
1722
.shutdown = atl2_shutdown,
1726
* atl2_init_module - Driver Registration Routine
1728
* atl2_init_module is the first routine called when the driver is
1729
* loaded. All it does is register with the PCI subsystem.
1731
static int __init atl2_init_module(void)
1733
printk(KERN_INFO "%s - version %s\n", atl2_driver_string,
1734
atl2_driver_version);
1735
printk(KERN_INFO "%s\n", atl2_copyright);
1736
return pci_register_driver(&atl2_driver);
1738
module_init(atl2_init_module);
1741
* atl2_exit_module - Driver Exit Cleanup Routine
1743
* atl2_exit_module is called just before the driver is removed
1746
static void __exit atl2_exit_module(void)
1748
pci_unregister_driver(&atl2_driver);
1750
module_exit(atl2_exit_module);
1752
static void atl2_read_pci_cfg(struct atl2_hw *hw, u32 reg, u16 *value)
1754
struct atl2_adapter *adapter = hw->back;
1755
pci_read_config_word(adapter->pdev, reg, value);
1758
static void atl2_write_pci_cfg(struct atl2_hw *hw, u32 reg, u16 *value)
1760
struct atl2_adapter *adapter = hw->back;
1761
pci_write_config_word(adapter->pdev, reg, *value);
1764
static int atl2_get_settings(struct net_device *netdev,
1765
struct ethtool_cmd *ecmd)
1767
struct atl2_adapter *adapter = netdev_priv(netdev);
1768
struct atl2_hw *hw = &adapter->hw;
1770
ecmd->supported = (SUPPORTED_10baseT_Half |
1771
SUPPORTED_10baseT_Full |
1772
SUPPORTED_100baseT_Half |
1773
SUPPORTED_100baseT_Full |
1776
ecmd->advertising = ADVERTISED_TP;
1778
ecmd->advertising |= ADVERTISED_Autoneg;
1779
ecmd->advertising |= hw->autoneg_advertised;
1781
ecmd->port = PORT_TP;
1782
ecmd->phy_address = 0;
1783
ecmd->transceiver = XCVR_INTERNAL;
1785
if (adapter->link_speed != SPEED_0) {
1786
ecmd->speed = adapter->link_speed;
1787
if (adapter->link_duplex == FULL_DUPLEX)
1788
ecmd->duplex = DUPLEX_FULL;
1790
ecmd->duplex = DUPLEX_HALF;
1796
ecmd->autoneg = AUTONEG_ENABLE;
1800
static int atl2_set_settings(struct net_device *netdev,
1801
struct ethtool_cmd *ecmd)
1803
struct atl2_adapter *adapter = netdev_priv(netdev);
1804
struct atl2_hw *hw = &adapter->hw;
1806
while (test_and_set_bit(__ATL2_RESETTING, &adapter->flags))
1809
if (ecmd->autoneg == AUTONEG_ENABLE) {
1810
#define MY_ADV_MASK (ADVERTISE_10_HALF | \
1811
ADVERTISE_10_FULL | \
1812
ADVERTISE_100_HALF| \
1815
if ((ecmd->advertising & MY_ADV_MASK) == MY_ADV_MASK) {
1816
hw->MediaType = MEDIA_TYPE_AUTO_SENSOR;
1817
hw->autoneg_advertised = MY_ADV_MASK;
1818
} else if ((ecmd->advertising & MY_ADV_MASK) ==
1819
ADVERTISE_100_FULL) {
1820
hw->MediaType = MEDIA_TYPE_100M_FULL;
1821
hw->autoneg_advertised = ADVERTISE_100_FULL;
1822
} else if ((ecmd->advertising & MY_ADV_MASK) ==
1823
ADVERTISE_100_HALF) {
1824
hw->MediaType = MEDIA_TYPE_100M_HALF;
1825
hw->autoneg_advertised = ADVERTISE_100_HALF;
1826
} else if ((ecmd->advertising & MY_ADV_MASK) ==
1827
ADVERTISE_10_FULL) {
1828
hw->MediaType = MEDIA_TYPE_10M_FULL;
1829
hw->autoneg_advertised = ADVERTISE_10_FULL;
1830
} else if ((ecmd->advertising & MY_ADV_MASK) ==
1831
ADVERTISE_10_HALF) {
1832
hw->MediaType = MEDIA_TYPE_10M_HALF;
1833
hw->autoneg_advertised = ADVERTISE_10_HALF;
1835
clear_bit(__ATL2_RESETTING, &adapter->flags);
1838
ecmd->advertising = hw->autoneg_advertised |
1839
ADVERTISED_TP | ADVERTISED_Autoneg;
1841
clear_bit(__ATL2_RESETTING, &adapter->flags);
1845
/* reset the link */
1846
if (netif_running(adapter->netdev)) {
1850
atl2_reset_hw(&adapter->hw);
1852
clear_bit(__ATL2_RESETTING, &adapter->flags);
1856
static u32 atl2_get_tx_csum(struct net_device *netdev)
1858
return (netdev->features & NETIF_F_HW_CSUM) != 0;
1861
static u32 atl2_get_msglevel(struct net_device *netdev)
1867
* It's sane for this to be empty, but we might want to take advantage of this.
1869
static void atl2_set_msglevel(struct net_device *netdev, u32 data)
1873
static int atl2_get_regs_len(struct net_device *netdev)
1875
#define ATL2_REGS_LEN 42
1876
return sizeof(u32) * ATL2_REGS_LEN;
1879
static void atl2_get_regs(struct net_device *netdev,
1880
struct ethtool_regs *regs, void *p)
1882
struct atl2_adapter *adapter = netdev_priv(netdev);
1883
struct atl2_hw *hw = &adapter->hw;
1887
memset(p, 0, sizeof(u32) * ATL2_REGS_LEN);
1889
regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
1891
regs_buff[0] = ATL2_READ_REG(hw, REG_VPD_CAP);
1892
regs_buff[1] = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);
1893
regs_buff[2] = ATL2_READ_REG(hw, REG_SPI_FLASH_CONFIG);
1894
regs_buff[3] = ATL2_READ_REG(hw, REG_TWSI_CTRL);
1895
regs_buff[4] = ATL2_READ_REG(hw, REG_PCIE_DEV_MISC_CTRL);
1896
regs_buff[5] = ATL2_READ_REG(hw, REG_MASTER_CTRL);
1897
regs_buff[6] = ATL2_READ_REG(hw, REG_MANUAL_TIMER_INIT);
1898
regs_buff[7] = ATL2_READ_REG(hw, REG_IRQ_MODU_TIMER_INIT);
1899
regs_buff[8] = ATL2_READ_REG(hw, REG_PHY_ENABLE);
1900
regs_buff[9] = ATL2_READ_REG(hw, REG_CMBDISDMA_TIMER);
1901
regs_buff[10] = ATL2_READ_REG(hw, REG_IDLE_STATUS);
1902
regs_buff[11] = ATL2_READ_REG(hw, REG_MDIO_CTRL);
1903
regs_buff[12] = ATL2_READ_REG(hw, REG_SERDES_LOCK);
1904
regs_buff[13] = ATL2_READ_REG(hw, REG_MAC_CTRL);
1905
regs_buff[14] = ATL2_READ_REG(hw, REG_MAC_IPG_IFG);
1906
regs_buff[15] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR);
1907
regs_buff[16] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR+4);
1908
regs_buff[17] = ATL2_READ_REG(hw, REG_RX_HASH_TABLE);
1909
regs_buff[18] = ATL2_READ_REG(hw, REG_RX_HASH_TABLE+4);
1910
regs_buff[19] = ATL2_READ_REG(hw, REG_MAC_HALF_DUPLX_CTRL);
1911
regs_buff[20] = ATL2_READ_REG(hw, REG_MTU);
1912
regs_buff[21] = ATL2_READ_REG(hw, REG_WOL_CTRL);
1913
regs_buff[22] = ATL2_READ_REG(hw, REG_SRAM_TXRAM_END);
1914
regs_buff[23] = ATL2_READ_REG(hw, REG_DESC_BASE_ADDR_HI);
1915
regs_buff[24] = ATL2_READ_REG(hw, REG_TXD_BASE_ADDR_LO);
1916
regs_buff[25] = ATL2_READ_REG(hw, REG_TXD_MEM_SIZE);
1917
regs_buff[26] = ATL2_READ_REG(hw, REG_TXS_BASE_ADDR_LO);
1918
regs_buff[27] = ATL2_READ_REG(hw, REG_TXS_MEM_SIZE);
1919
regs_buff[28] = ATL2_READ_REG(hw, REG_RXD_BASE_ADDR_LO);
1920
regs_buff[29] = ATL2_READ_REG(hw, REG_RXD_BUF_NUM);
1921
regs_buff[30] = ATL2_READ_REG(hw, REG_DMAR);
1922
regs_buff[31] = ATL2_READ_REG(hw, REG_TX_CUT_THRESH);
1923
regs_buff[32] = ATL2_READ_REG(hw, REG_DMAW);
1924
regs_buff[33] = ATL2_READ_REG(hw, REG_PAUSE_ON_TH);
1925
regs_buff[34] = ATL2_READ_REG(hw, REG_PAUSE_OFF_TH);
1926
regs_buff[35] = ATL2_READ_REG(hw, REG_MB_TXD_WR_IDX);
1927
regs_buff[36] = ATL2_READ_REG(hw, REG_MB_RXD_RD_IDX);
1928
regs_buff[38] = ATL2_READ_REG(hw, REG_ISR);
1929
regs_buff[39] = ATL2_READ_REG(hw, REG_IMR);
1931
atl2_read_phy_reg(hw, MII_BMCR, &phy_data);
1932
regs_buff[40] = (u32)phy_data;
1933
atl2_read_phy_reg(hw, MII_BMSR, &phy_data);
1934
regs_buff[41] = (u32)phy_data;
1937
static int atl2_get_eeprom_len(struct net_device *netdev)
1939
struct atl2_adapter *adapter = netdev_priv(netdev);
1941
if (!atl2_check_eeprom_exist(&adapter->hw))
1947
static int atl2_get_eeprom(struct net_device *netdev,
1948
struct ethtool_eeprom *eeprom, u8 *bytes)
1950
struct atl2_adapter *adapter = netdev_priv(netdev);
1951
struct atl2_hw *hw = &adapter->hw;
1953
int first_dword, last_dword;
1957
if (eeprom->len == 0)
1960
if (atl2_check_eeprom_exist(hw))
1963
eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1965
first_dword = eeprom->offset >> 2;
1966
last_dword = (eeprom->offset + eeprom->len - 1) >> 2;
1968
eeprom_buff = kmalloc(sizeof(u32) * (last_dword - first_dword + 1),
1973
for (i = first_dword; i < last_dword; i++) {
1974
if (!atl2_read_eeprom(hw, i*4, &(eeprom_buff[i-first_dword]))) {
1980
memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 3),
1988
static int atl2_set_eeprom(struct net_device *netdev,
1989
struct ethtool_eeprom *eeprom, u8 *bytes)
1991
struct atl2_adapter *adapter = netdev_priv(netdev);
1992
struct atl2_hw *hw = &adapter->hw;
1995
int max_len, first_dword, last_dword, ret_val = 0;
1998
if (eeprom->len == 0)
2001
if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
2006
first_dword = eeprom->offset >> 2;
2007
last_dword = (eeprom->offset + eeprom->len - 1) >> 2;
2008
eeprom_buff = kmalloc(max_len, GFP_KERNEL);
2012
ptr = (u32 *)eeprom_buff;
2014
if (eeprom->offset & 3) {
2015
/* need read/modify/write of first changed EEPROM word */
2016
/* only the second byte of the word is being modified */
2017
if (!atl2_read_eeprom(hw, first_dword*4, &(eeprom_buff[0])))
2021
if (((eeprom->offset + eeprom->len) & 3)) {
2023
* need read/modify/write of last changed EEPROM word
2024
* only the first byte of the word is being modified
2026
if (!atl2_read_eeprom(hw, last_dword * 4,
2027
&(eeprom_buff[last_dword - first_dword])))
2031
/* Device's eeprom is always little-endian, word addressable */
2032
memcpy(ptr, bytes, eeprom->len);
2034
for (i = 0; i < last_dword - first_dword + 1; i++) {
2035
if (!atl2_write_eeprom(hw, ((first_dword+i)*4), eeprom_buff[i]))
2043
static void atl2_get_drvinfo(struct net_device *netdev,
2044
struct ethtool_drvinfo *drvinfo)
2046
struct atl2_adapter *adapter = netdev_priv(netdev);
2048
strncpy(drvinfo->driver, atl2_driver_name, 32);
2049
strncpy(drvinfo->version, atl2_driver_version, 32);
2050
strncpy(drvinfo->fw_version, "L2", 32);
2051
strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
2052
drvinfo->n_stats = 0;
2053
drvinfo->testinfo_len = 0;
2054
drvinfo->regdump_len = atl2_get_regs_len(netdev);
2055
drvinfo->eedump_len = atl2_get_eeprom_len(netdev);
2058
static void atl2_get_wol(struct net_device *netdev,
2059
struct ethtool_wolinfo *wol)
2061
struct atl2_adapter *adapter = netdev_priv(netdev);
2063
wol->supported = WAKE_MAGIC;
2066
if (adapter->wol & ATLX_WUFC_EX)
2067
wol->wolopts |= WAKE_UCAST;
2068
if (adapter->wol & ATLX_WUFC_MC)
2069
wol->wolopts |= WAKE_MCAST;
2070
if (adapter->wol & ATLX_WUFC_BC)
2071
wol->wolopts |= WAKE_BCAST;
2072
if (adapter->wol & ATLX_WUFC_MAG)
2073
wol->wolopts |= WAKE_MAGIC;
2074
if (adapter->wol & ATLX_WUFC_LNKC)
2075
wol->wolopts |= WAKE_PHY;
2078
static int atl2_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2080
struct atl2_adapter *adapter = netdev_priv(netdev);
2082
if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
2085
if (wol->wolopts & (WAKE_UCAST | WAKE_BCAST | WAKE_MCAST))
2088
/* these settings will always override what we currently have */
2091
if (wol->wolopts & WAKE_MAGIC)
2092
adapter->wol |= ATLX_WUFC_MAG;
2093
if (wol->wolopts & WAKE_PHY)
2094
adapter->wol |= ATLX_WUFC_LNKC;
2099
static int atl2_nway_reset(struct net_device *netdev)
2101
struct atl2_adapter *adapter = netdev_priv(netdev);
2102
if (netif_running(netdev))
2103
atl2_reinit_locked(adapter);
2107
static const struct ethtool_ops atl2_ethtool_ops = {
2108
.get_settings = atl2_get_settings,
2109
.set_settings = atl2_set_settings,
2110
.get_drvinfo = atl2_get_drvinfo,
2111
.get_regs_len = atl2_get_regs_len,
2112
.get_regs = atl2_get_regs,
2113
.get_wol = atl2_get_wol,
2114
.set_wol = atl2_set_wol,
2115
.get_msglevel = atl2_get_msglevel,
2116
.set_msglevel = atl2_set_msglevel,
2117
.nway_reset = atl2_nway_reset,
2118
.get_link = ethtool_op_get_link,
2119
.get_eeprom_len = atl2_get_eeprom_len,
2120
.get_eeprom = atl2_get_eeprom,
2121
.set_eeprom = atl2_set_eeprom,
2122
.get_tx_csum = atl2_get_tx_csum,
2123
.get_sg = ethtool_op_get_sg,
2124
.set_sg = ethtool_op_set_sg,
2126
.get_tso = ethtool_op_get_tso,
2130
static void atl2_set_ethtool_ops(struct net_device *netdev)
2132
SET_ETHTOOL_OPS(netdev, &atl2_ethtool_ops);
2135
#define LBYTESWAP(a) ((((a) & 0x00ff00ff) << 8) | \
2136
(((a) & 0xff00ff00) >> 8))
2137
#define LONGSWAP(a) ((LBYTESWAP(a) << 16) | (LBYTESWAP(a) >> 16))
2138
#define SHORTSWAP(a) (((a) << 8) | ((a) >> 8))
2141
* Reset the transmit and receive units; mask and clear all interrupts.
2143
* hw - Struct containing variables accessed by shared code
2144
* return : 0 or idle status (if error)
2146
static s32 atl2_reset_hw(struct atl2_hw *hw)
2149
u16 pci_cfg_cmd_word;
2152
/* Workaround for PCI problem when BIOS sets MMRBC incorrectly. */
2153
atl2_read_pci_cfg(hw, PCI_REG_COMMAND, &pci_cfg_cmd_word);
2154
if ((pci_cfg_cmd_word &
2155
(CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER)) !=
2156
(CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER)) {
2158
(CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER);
2159
atl2_write_pci_cfg(hw, PCI_REG_COMMAND, &pci_cfg_cmd_word);
2162
/* Clear Interrupt mask to stop board from generating
2163
* interrupts & Clear any pending interrupt events
2166
/* ATL2_WRITE_REG(hw, REG_IMR, 0); */
2167
/* ATL2_WRITE_REG(hw, REG_ISR, 0xffffffff); */
2169
/* Issue Soft Reset to the MAC. This will reset the chip's
2170
* transmit, receive, DMA. It will not effect
2171
* the current PCI configuration. The global reset bit is self-
2172
* clearing, and should clear within a microsecond.
2174
ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
2176
msleep(1); /* delay about 1ms */
2178
/* Wait at least 10ms for All module to be Idle */
2179
for (i = 0; i < 10; i++) {
2180
icr = ATL2_READ_REG(hw, REG_IDLE_STATUS);
2183
msleep(1); /* delay 1 ms */
2193
#define CUSTOM_SPI_CS_SETUP 2
2194
#define CUSTOM_SPI_CLK_HI 2
2195
#define CUSTOM_SPI_CLK_LO 2
2196
#define CUSTOM_SPI_CS_HOLD 2
2197
#define CUSTOM_SPI_CS_HI 3
2199
static struct atl2_spi_flash_dev flash_table[] =
2201
/* MFR WRSR READ PROGRAM WREN WRDI RDSR RDID SECTOR_ERASE CHIP_ERASE */
2202
{"Atmel", 0x0, 0x03, 0x02, 0x06, 0x04, 0x05, 0x15, 0x52, 0x62 },
2203
{"SST", 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0x90, 0x20, 0x60 },
2204
{"ST", 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0xAB, 0xD8, 0xC7 },
2207
static bool atl2_spi_read(struct atl2_hw *hw, u32 addr, u32 *buf)
2212
ATL2_WRITE_REG(hw, REG_SPI_DATA, 0);
2213
ATL2_WRITE_REG(hw, REG_SPI_ADDR, addr);
2215
value = SPI_FLASH_CTRL_WAIT_READY |
2216
(CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
2217
SPI_FLASH_CTRL_CS_SETUP_SHIFT |
2218
(CUSTOM_SPI_CLK_HI & SPI_FLASH_CTRL_CLK_HI_MASK) <<
2219
SPI_FLASH_CTRL_CLK_HI_SHIFT |
2220
(CUSTOM_SPI_CLK_LO & SPI_FLASH_CTRL_CLK_LO_MASK) <<
2221
SPI_FLASH_CTRL_CLK_LO_SHIFT |
2222
(CUSTOM_SPI_CS_HOLD & SPI_FLASH_CTRL_CS_HOLD_MASK) <<
2223
SPI_FLASH_CTRL_CS_HOLD_SHIFT |
2224
(CUSTOM_SPI_CS_HI & SPI_FLASH_CTRL_CS_HI_MASK) <<
2225
SPI_FLASH_CTRL_CS_HI_SHIFT |
2226
(0x1 & SPI_FLASH_CTRL_INS_MASK) << SPI_FLASH_CTRL_INS_SHIFT;
2228
ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);
2230
value |= SPI_FLASH_CTRL_START;
2232
ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);
2234
for (i = 0; i < 10; i++) {
2236
value = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);
2237
if (!(value & SPI_FLASH_CTRL_START))
2241
if (value & SPI_FLASH_CTRL_START)
2244
*buf = ATL2_READ_REG(hw, REG_SPI_DATA);
2250
* get_permanent_address
2251
* return 0 if get valid mac address,
2253
static int get_permanent_address(struct atl2_hw *hw)
2258
u8 EthAddr[NODE_ADDRESS_SIZE];
2261
if (is_valid_ether_addr(hw->perm_mac_addr))
2267
if (!atl2_check_eeprom_exist(hw)) { /* eeprom exists */
2271
/* Read out all EEPROM content */
2274
if (atl2_read_eeprom(hw, i + 0x100, &Control)) {
2276
if (Register == REG_MAC_STA_ADDR)
2278
else if (Register ==
2279
(REG_MAC_STA_ADDR + 4))
2282
} else if ((Control & 0xff) == 0x5A) {
2284
Register = (u16) (Control >> 16);
2286
/* assume data end while encount an invalid KEYWORD */
2290
break; /* read error */
2295
*(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]);
2296
*(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *) &Addr[1]);
2298
if (is_valid_ether_addr(EthAddr)) {
2299
memcpy(hw->perm_mac_addr, EthAddr, NODE_ADDRESS_SIZE);
2305
/* see if SPI flash exists? */
2312
if (atl2_spi_read(hw, i + 0x1f000, &Control)) {
2314
if (Register == REG_MAC_STA_ADDR)
2316
else if (Register == (REG_MAC_STA_ADDR + 4))
2319
} else if ((Control & 0xff) == 0x5A) {
2321
Register = (u16) (Control >> 16);
2323
break; /* data end */
2326
break; /* read error */
2331
*(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]);
2332
*(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *)&Addr[1]);
2333
if (is_valid_ether_addr(EthAddr)) {
2334
memcpy(hw->perm_mac_addr, EthAddr, NODE_ADDRESS_SIZE);
2337
/* maybe MAC-address is from BIOS */
2338
Addr[0] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR);
2339
Addr[1] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR + 4);
2340
*(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]);
2341
*(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *) &Addr[1]);
2343
if (is_valid_ether_addr(EthAddr)) {
2344
memcpy(hw->perm_mac_addr, EthAddr, NODE_ADDRESS_SIZE);
2352
* Reads the adapter's MAC address from the EEPROM
2354
* hw - Struct containing variables accessed by shared code
2356
static s32 atl2_read_mac_addr(struct atl2_hw *hw)
2360
if (get_permanent_address(hw)) {
2362
/* FIXME: shouldn't we use random_ether_addr() here? */
2363
hw->perm_mac_addr[0] = 0x00;
2364
hw->perm_mac_addr[1] = 0x13;
2365
hw->perm_mac_addr[2] = 0x74;
2366
hw->perm_mac_addr[3] = 0x00;
2367
hw->perm_mac_addr[4] = 0x5c;
2368
hw->perm_mac_addr[5] = 0x38;
2371
for (i = 0; i < NODE_ADDRESS_SIZE; i++)
2372
hw->mac_addr[i] = hw->perm_mac_addr[i];
2378
* Hashes an address to determine its location in the multicast table
2380
* hw - Struct containing variables accessed by shared code
2381
* mc_addr - the multicast address to hash
2385
* set hash value for a multicast address
2386
* hash calcu processing :
2387
* 1. calcu 32bit CRC for multicast address
2388
* 2. reverse crc with MSB to LSB
2390
static u32 atl2_hash_mc_addr(struct atl2_hw *hw, u8 *mc_addr)
2396
crc32 = ether_crc_le(6, mc_addr);
2398
for (i = 0; i < 32; i++)
2399
value |= (((crc32 >> i) & 1) << (31 - i));
2405
* Sets the bit in the multicast table corresponding to the hash value.
2407
* hw - Struct containing variables accessed by shared code
2408
* hash_value - Multicast address hash value
2410
static void atl2_hash_set(struct atl2_hw *hw, u32 hash_value)
2412
u32 hash_bit, hash_reg;
2415
/* The HASH Table is a register array of 2 32-bit registers.
2416
* It is treated like an array of 64 bits. We want to set
2417
* bit BitArray[hash_value]. So we figure out what register
2418
* the bit is in, read it, OR in the new bit, then write
2419
* back the new value. The register is determined by the
2420
* upper 7 bits of the hash value and the bit within that
2421
* register are determined by the lower 5 bits of the value.
2423
hash_reg = (hash_value >> 31) & 0x1;
2424
hash_bit = (hash_value >> 26) & 0x1F;
2426
mta = ATL2_READ_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg);
2428
mta |= (1 << hash_bit);
2430
ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg, mta);
2434
* atl2_init_pcie - init PCIE module
2436
static void atl2_init_pcie(struct atl2_hw *hw)
2439
value = LTSSM_TEST_MODE_DEF;
2440
ATL2_WRITE_REG(hw, REG_LTSSM_TEST_MODE, value);
2442
value = PCIE_DLL_TX_CTRL1_DEF;
2443
ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, value);
2446
static void atl2_init_flash_opcode(struct atl2_hw *hw)
2448
if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
2449
hw->flash_vendor = 0; /* ATMEL */
2452
ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_PROGRAM,
2453
flash_table[hw->flash_vendor].cmdPROGRAM);
2454
ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_SC_ERASE,
2455
flash_table[hw->flash_vendor].cmdSECTOR_ERASE);
2456
ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_CHIP_ERASE,
2457
flash_table[hw->flash_vendor].cmdCHIP_ERASE);
2458
ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_RDID,
2459
flash_table[hw->flash_vendor].cmdRDID);
2460
ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_WREN,
2461
flash_table[hw->flash_vendor].cmdWREN);
2462
ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_RDSR,
2463
flash_table[hw->flash_vendor].cmdRDSR);
2464
ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_WRSR,
2465
flash_table[hw->flash_vendor].cmdWRSR);
2466
ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_READ,
2467
flash_table[hw->flash_vendor].cmdREAD);
2470
/********************************************************************
2471
* Performs basic configuration of the adapter.
2473
* hw - Struct containing variables accessed by shared code
2474
* Assumes that the controller has previously been reset and is in a
2475
* post-reset uninitialized state. Initializes multicast table,
2476
* and Calls routines to setup link
2477
* Leaves the transmit and receive units disabled and uninitialized.
2478
********************************************************************/
2479
static s32 atl2_init_hw(struct atl2_hw *hw)
2485
/* Zero out the Multicast HASH table */
2486
/* clear the old settings from the multicast hash table */
2487
ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
2488
ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
2490
atl2_init_flash_opcode(hw);
2492
ret_val = atl2_phy_init(hw);
2498
* Detects the current speed and duplex settings of the hardware.
2500
* hw - Struct containing variables accessed by shared code
2501
* speed - Speed of the connection
2502
* duplex - Duplex setting of the connection
2504
static s32 atl2_get_speed_and_duplex(struct atl2_hw *hw, u16 *speed,
2510
/* Read PHY Specific Status Register (17) */
2511
ret_val = atl2_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data);
2515
if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED))
2516
return ATLX_ERR_PHY_RES;
2518
switch (phy_data & MII_ATLX_PSSR_SPEED) {
2519
case MII_ATLX_PSSR_100MBS:
2522
case MII_ATLX_PSSR_10MBS:
2526
return ATLX_ERR_PHY_SPEED;
2530
if (phy_data & MII_ATLX_PSSR_DPLX)
2531
*duplex = FULL_DUPLEX;
2533
*duplex = HALF_DUPLEX;
2539
* Reads the value from a PHY register
2540
* hw - Struct containing variables accessed by shared code
2541
* reg_addr - address of the PHY register to read
2543
static s32 atl2_read_phy_reg(struct atl2_hw *hw, u16 reg_addr, u16 *phy_data)
2548
val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
2552
MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
2553
ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val);
2557
for (i = 0; i < MDIO_WAIT_TIMES; i++) {
2559
val = ATL2_READ_REG(hw, REG_MDIO_CTRL);
2560
if (!(val & (MDIO_START | MDIO_BUSY)))
2564
if (!(val & (MDIO_START | MDIO_BUSY))) {
2565
*phy_data = (u16)val;
2569
return ATLX_ERR_PHY;
2573
* Writes a value to a PHY register
2574
* hw - Struct containing variables accessed by shared code
2575
* reg_addr - address of the PHY register to write
2576
* data - data to write to the PHY
2578
static s32 atl2_write_phy_reg(struct atl2_hw *hw, u32 reg_addr, u16 phy_data)
2583
val = ((u32)(phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
2584
(reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
2587
MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
2588
ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val);
2592
for (i = 0; i < MDIO_WAIT_TIMES; i++) {
2594
val = ATL2_READ_REG(hw, REG_MDIO_CTRL);
2595
if (!(val & (MDIO_START | MDIO_BUSY)))
2601
if (!(val & (MDIO_START | MDIO_BUSY)))
2604
return ATLX_ERR_PHY;
2608
* Configures PHY autoneg and flow control advertisement settings
2610
* hw - Struct containing variables accessed by shared code
2612
static s32 atl2_phy_setup_autoneg_adv(struct atl2_hw *hw)
2615
s16 mii_autoneg_adv_reg;
2617
/* Read the MII Auto-Neg Advertisement Register (Address 4). */
2618
mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
2620
/* Need to parse autoneg_advertised and set up
2621
* the appropriate PHY registers. First we will parse for
2622
* autoneg_advertised software override. Since we can advertise
2623
* a plethora of combinations, we need to check each bit
2627
/* First we clear all the 10/100 mb speed bits in the Auto-Neg
2628
* Advertisement Register (Address 4) and the 1000 mb speed bits in
2629
* the 1000Base-T Control Register (Address 9). */
2630
mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
2632
/* Need to parse MediaType and setup the
2633
* appropriate PHY registers. */
2634
switch (hw->MediaType) {
2635
case MEDIA_TYPE_AUTO_SENSOR:
2636
mii_autoneg_adv_reg |=
2637
(MII_AR_10T_HD_CAPS |
2638
MII_AR_10T_FD_CAPS |
2639
MII_AR_100TX_HD_CAPS|
2640
MII_AR_100TX_FD_CAPS);
2641
hw->autoneg_advertised =
2647
case MEDIA_TYPE_100M_FULL:
2648
mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
2649
hw->autoneg_advertised = ADVERTISE_100_FULL;
2651
case MEDIA_TYPE_100M_HALF:
2652
mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
2653
hw->autoneg_advertised = ADVERTISE_100_HALF;
2655
case MEDIA_TYPE_10M_FULL:
2656
mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
2657
hw->autoneg_advertised = ADVERTISE_10_FULL;
2660
mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
2661
hw->autoneg_advertised = ADVERTISE_10_HALF;
2665
/* flow control fixed to enable all */
2666
mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
2668
hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
2670
ret_val = atl2_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
2679
* Resets the PHY and make all config validate
2681
* hw - Struct containing variables accessed by shared code
2683
* Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
2685
static s32 atl2_phy_commit(struct atl2_hw *hw)
2690
phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2691
ret_val = atl2_write_phy_reg(hw, MII_BMCR, phy_data);
2695
/* pcie serdes link may be down ! */
2696
for (i = 0; i < 25; i++) {
2698
val = ATL2_READ_REG(hw, REG_MDIO_CTRL);
2699
if (!(val & (MDIO_START | MDIO_BUSY)))
2703
if (0 != (val & (MDIO_START | MDIO_BUSY))) {
2704
printk(KERN_ERR "atl2: PCIe link down for at least 25ms !\n");
2711
static s32 atl2_phy_init(struct atl2_hw *hw)
2716
if (hw->phy_configured)
2720
ATL2_WRITE_REGW(hw, REG_PHY_ENABLE, 1);
2721
ATL2_WRITE_FLUSH(hw);
2724
/* check if the PHY is in powersaving mode */
2725
atl2_write_phy_reg(hw, MII_DBG_ADDR, 0);
2726
atl2_read_phy_reg(hw, MII_DBG_DATA, &phy_val);
2728
/* 024E / 124E 0r 0274 / 1274 ? */
2729
if (phy_val & 0x1000) {
2731
atl2_write_phy_reg(hw, MII_DBG_DATA, phy_val);
2736
/*Enable PHY LinkChange Interrupt */
2737
ret_val = atl2_write_phy_reg(hw, 18, 0xC00);
2741
/* setup AutoNeg parameters */
2742
ret_val = atl2_phy_setup_autoneg_adv(hw);
2746
/* SW.Reset & En-Auto-Neg to restart Auto-Neg */
2747
ret_val = atl2_phy_commit(hw);
2751
hw->phy_configured = true;
2756
static void atl2_set_mac_addr(struct atl2_hw *hw)
2759
/* 00-0B-6A-F6-00-DC
2760
* 0: 6AF600DC 1: 000B
2762
value = (((u32)hw->mac_addr[2]) << 24) |
2763
(((u32)hw->mac_addr[3]) << 16) |
2764
(((u32)hw->mac_addr[4]) << 8) |
2765
(((u32)hw->mac_addr[5]));
2766
ATL2_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value);
2768
value = (((u32)hw->mac_addr[0]) << 8) |
2769
(((u32)hw->mac_addr[1]));
2770
ATL2_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 1, value);
2774
* check_eeprom_exist
2775
* return 0 if eeprom exist
2777
static int atl2_check_eeprom_exist(struct atl2_hw *hw)
2781
value = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);
2782
if (value & SPI_FLASH_CTRL_EN_VPD) {
2783
value &= ~SPI_FLASH_CTRL_EN_VPD;
2784
ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);
2786
value = ATL2_READ_REGW(hw, REG_PCIE_CAP_LIST);
2787
return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
2790
/* FIXME: This doesn't look right. -- CHS */
2791
static bool atl2_write_eeprom(struct atl2_hw *hw, u32 offset, u32 value)
2796
static bool atl2_read_eeprom(struct atl2_hw *hw, u32 Offset, u32 *pValue)
2802
return false; /* address do not align */
2804
ATL2_WRITE_REG(hw, REG_VPD_DATA, 0);
2805
Control = (Offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
2806
ATL2_WRITE_REG(hw, REG_VPD_CAP, Control);
2808
for (i = 0; i < 10; i++) {
2810
Control = ATL2_READ_REG(hw, REG_VPD_CAP);
2811
if (Control & VPD_CAP_VPD_FLAG)
2815
if (Control & VPD_CAP_VPD_FLAG) {
2816
*pValue = ATL2_READ_REG(hw, REG_VPD_DATA);
2819
return false; /* timeout */
2822
static void atl2_force_ps(struct atl2_hw *hw)
2826
atl2_write_phy_reg(hw, MII_DBG_ADDR, 0);
2827
atl2_read_phy_reg(hw, MII_DBG_DATA, &phy_val);
2828
atl2_write_phy_reg(hw, MII_DBG_DATA, phy_val | 0x1000);
2830
atl2_write_phy_reg(hw, MII_DBG_ADDR, 2);
2831
atl2_write_phy_reg(hw, MII_DBG_DATA, 0x3000);
2832
atl2_write_phy_reg(hw, MII_DBG_ADDR, 3);
2833
atl2_write_phy_reg(hw, MII_DBG_DATA, 0);
2836
/* This is the only thing that needs to be changed to adjust the
2837
* maximum number of ports that the driver can manage.
2839
#define ATL2_MAX_NIC 4
2841
#define OPTION_UNSET -1
2842
#define OPTION_DISABLED 0
2843
#define OPTION_ENABLED 1
2845
/* All parameters are treated the same, as an integer array of values.
2846
* This macro just reduces the need to repeat the same declaration code
2847
* over and over (plus this helps to avoid typo bugs).
2849
#define ATL2_PARAM_INIT {[0 ... ATL2_MAX_NIC] = OPTION_UNSET}
2850
#ifndef module_param_array
2851
/* Module Parameters are always initialized to -1, so that the driver
2852
* can tell the difference between no user specified value or the
2853
* user asking for the default value.
2854
* The true default values are loaded in when atl2_check_options is called.
2856
* This is a GCC extension to ANSI C.
2857
* See the item "Labeled Elements in Initializers" in the section
2858
* "Extensions to the C Language Family" of the GCC documentation.
2861
#define ATL2_PARAM(X, desc) \
2862
static const int __devinitdata X[ATL2_MAX_NIC + 1] = ATL2_PARAM_INIT; \
2863
MODULE_PARM(X, "1-" __MODULE_STRING(ATL2_MAX_NIC) "i"); \
2864
MODULE_PARM_DESC(X, desc);
2866
#define ATL2_PARAM(X, desc) \
2867
static int __devinitdata X[ATL2_MAX_NIC+1] = ATL2_PARAM_INIT; \
2868
static unsigned int num_##X; \
2869
module_param_array_named(X, X, int, &num_##X, 0); \
2870
MODULE_PARM_DESC(X, desc);
2874
* Transmit Memory Size
2875
* Valid Range: 64-2048
2876
* Default Value: 128
2878
#define ATL2_MIN_TX_MEMSIZE 4 /* 4KB */
2879
#define ATL2_MAX_TX_MEMSIZE 64 /* 64KB */
2880
#define ATL2_DEFAULT_TX_MEMSIZE 8 /* 8KB */
2881
ATL2_PARAM(TxMemSize, "Bytes of Transmit Memory");
2884
* Receive Memory Block Count
2885
* Valid Range: 16-512
2886
* Default Value: 128
2888
#define ATL2_MIN_RXD_COUNT 16
2889
#define ATL2_MAX_RXD_COUNT 512
2890
#define ATL2_DEFAULT_RXD_COUNT 64
2891
ATL2_PARAM(RxMemBlock, "Number of receive memory block");
2894
* User Specified MediaType Override
2897
* - 0 - auto-negotiate at all supported speeds
2898
* - 1 - only link at 1000Mbps Full Duplex
2899
* - 2 - only link at 100Mbps Full Duplex
2900
* - 3 - only link at 100Mbps Half Duplex
2901
* - 4 - only link at 10Mbps Full Duplex
2902
* - 5 - only link at 10Mbps Half Duplex
2905
ATL2_PARAM(MediaType, "MediaType Select");
2908
* Interrupt Moderate Timer in units of 2048 ns (~2 us)
2909
* Valid Range: 10-65535
2910
* Default Value: 45000(90ms)
2912
#define INT_MOD_DEFAULT_CNT 100 /* 200us */
2913
#define INT_MOD_MAX_CNT 65000
2914
#define INT_MOD_MIN_CNT 50
2915
ATL2_PARAM(IntModTimer, "Interrupt Moderator Timer");
2924
ATL2_PARAM(FlashVendor, "SPI Flash Vendor");
2926
#define AUTONEG_ADV_DEFAULT 0x2F
2927
#define AUTONEG_ADV_MASK 0x2F
2928
#define FLOW_CONTROL_DEFAULT FLOW_CONTROL_FULL
2930
#define FLASH_VENDOR_DEFAULT 0
2931
#define FLASH_VENDOR_MIN 0
2932
#define FLASH_VENDOR_MAX 2
2934
struct atl2_option {
2935
enum { enable_option, range_option, list_option } type;
2940
struct { /* range_option info */
2944
struct { /* list_option info */
2946
struct atl2_opt_list { int i; char *str; } *p;
2951
static int __devinit atl2_validate_option(int *value, struct atl2_option *opt)
2954
struct atl2_opt_list *ent;
2956
if (*value == OPTION_UNSET) {
2961
switch (opt->type) {
2964
case OPTION_ENABLED:
2965
printk(KERN_INFO "%s Enabled\n", opt->name);
2968
case OPTION_DISABLED:
2969
printk(KERN_INFO "%s Disabled\n", opt->name);
2975
if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
2976
printk(KERN_INFO "%s set to %i\n", opt->name, *value);
2981
for (i = 0; i < opt->arg.l.nr; i++) {
2982
ent = &opt->arg.l.p[i];
2983
if (*value == ent->i) {
2984
if (ent->str[0] != '\0')
2985
printk(KERN_INFO "%s\n", ent->str);
2994
printk(KERN_INFO "Invalid %s specified (%i) %s\n",
2995
opt->name, *value, opt->err);
3001
* atl2_check_options - Range Checking for Command Line Parameters
3002
* @adapter: board private structure
3004
* This routine checks all command line parameters for valid user
3005
* input. If an invalid value is given, or if no user specified
3006
* value exists, a default value is used. The final value is stored
3007
* in a variable in the adapter structure.
3009
static void __devinit atl2_check_options(struct atl2_adapter *adapter)
3012
struct atl2_option opt;
3013
int bd = adapter->bd_number;
3014
if (bd >= ATL2_MAX_NIC) {
3015
printk(KERN_NOTICE "Warning: no configuration for board #%i\n",
3017
printk(KERN_NOTICE "Using defaults for all values\n");
3018
#ifndef module_param_array
3023
/* Bytes of Transmit Memory */
3024
opt.type = range_option;
3025
opt.name = "Bytes of Transmit Memory";
3026
opt.err = "using default of " __MODULE_STRING(ATL2_DEFAULT_TX_MEMSIZE);
3027
opt.def = ATL2_DEFAULT_TX_MEMSIZE;
3028
opt.arg.r.min = ATL2_MIN_TX_MEMSIZE;
3029
opt.arg.r.max = ATL2_MAX_TX_MEMSIZE;
3030
#ifdef module_param_array
3031
if (num_TxMemSize > bd) {
3033
val = TxMemSize[bd];
3034
atl2_validate_option(&val, &opt);
3035
adapter->txd_ring_size = ((u32) val) * 1024;
3036
#ifdef module_param_array
3038
adapter->txd_ring_size = ((u32)opt.def) * 1024;
3040
/* txs ring size: */
3041
adapter->txs_ring_size = adapter->txd_ring_size / 128;
3042
if (adapter->txs_ring_size > 160)
3043
adapter->txs_ring_size = 160;
3045
/* Receive Memory Block Count */
3046
opt.type = range_option;
3047
opt.name = "Number of receive memory block";
3048
opt.err = "using default of " __MODULE_STRING(ATL2_DEFAULT_RXD_COUNT);
3049
opt.def = ATL2_DEFAULT_RXD_COUNT;
3050
opt.arg.r.min = ATL2_MIN_RXD_COUNT;
3051
opt.arg.r.max = ATL2_MAX_RXD_COUNT;
3052
#ifdef module_param_array
3053
if (num_RxMemBlock > bd) {
3055
val = RxMemBlock[bd];
3056
atl2_validate_option(&val, &opt);
3057
adapter->rxd_ring_size = (u32)val;
3059
/* ((u16)val)&~1; */ /* even number */
3060
#ifdef module_param_array
3062
adapter->rxd_ring_size = (u32)opt.def;
3064
/* init RXD Flow control value */
3065
adapter->hw.fc_rxd_hi = (adapter->rxd_ring_size / 8) * 7;
3066
adapter->hw.fc_rxd_lo = (ATL2_MIN_RXD_COUNT / 8) >
3067
(adapter->rxd_ring_size / 12) ? (ATL2_MIN_RXD_COUNT / 8) :
3068
(adapter->rxd_ring_size / 12);
3070
/* Interrupt Moderate Timer */
3071
opt.type = range_option;
3072
opt.name = "Interrupt Moderate Timer";
3073
opt.err = "using default of " __MODULE_STRING(INT_MOD_DEFAULT_CNT);
3074
opt.def = INT_MOD_DEFAULT_CNT;
3075
opt.arg.r.min = INT_MOD_MIN_CNT;
3076
opt.arg.r.max = INT_MOD_MAX_CNT;
3077
#ifdef module_param_array
3078
if (num_IntModTimer > bd) {
3080
val = IntModTimer[bd];
3081
atl2_validate_option(&val, &opt);
3082
adapter->imt = (u16) val;
3083
#ifdef module_param_array
3085
adapter->imt = (u16)(opt.def);
3088
opt.type = range_option;
3089
opt.name = "SPI Flash Vendor";
3090
opt.err = "using default of " __MODULE_STRING(FLASH_VENDOR_DEFAULT);
3091
opt.def = FLASH_VENDOR_DEFAULT;
3092
opt.arg.r.min = FLASH_VENDOR_MIN;
3093
opt.arg.r.max = FLASH_VENDOR_MAX;
3094
#ifdef module_param_array
3095
if (num_FlashVendor > bd) {
3097
val = FlashVendor[bd];
3098
atl2_validate_option(&val, &opt);
3099
adapter->hw.flash_vendor = (u8) val;
3100
#ifdef module_param_array
3102
adapter->hw.flash_vendor = (u8)(opt.def);
3105
opt.type = range_option;
3106
opt.name = "Speed/Duplex Selection";
3107
opt.err = "using default of " __MODULE_STRING(MEDIA_TYPE_AUTO_SENSOR);
3108
opt.def = MEDIA_TYPE_AUTO_SENSOR;
3109
opt.arg.r.min = MEDIA_TYPE_AUTO_SENSOR;
3110
opt.arg.r.max = MEDIA_TYPE_10M_HALF;
3111
#ifdef module_param_array
3112
if (num_MediaType > bd) {
3114
val = MediaType[bd];
3115
atl2_validate_option(&val, &opt);
3116
adapter->hw.MediaType = (u16) val;
3117
#ifdef module_param_array
3119
adapter->hw.MediaType = (u16)(opt.def);
added
removed
updates/compat-wireless-2.6/drivers/net/atlx/atl2.c
