134
135
return supersnapshot_v5_io1_read(addr);
135
136
case CARTRIDGE_EXPERT:
136
137
return expert_io1_read(addr);
138
case CARTRIDGE_MAGIC_FORMEL:
139
return magicformel_io1_read(addr);
138
141
return vicii_read_phi1();
212
215
export.exrom = 1; /* turn off cart ROM */
213
216
mem_pla_config_changed();
218
case CARTRIDGE_MAGIC_FORMEL:
219
magicformel_io1_store(addr, value);
230
236
return retroreplay_io2_read(addr);
231
237
case CARTRIDGE_SUPER_SNAPSHOT:
232
238
return supersnapshot_v4_io2_read(addr);
233
case CARTRIDGE_SUPER_SNAPSHOT_V5:
234
return supersnapshot_v5_io2_read(addr);
235
239
case CARTRIDGE_FINAL_III:
236
240
return final_v3_io2_read(addr);
237
241
case CARTRIDGE_FINAL_I:
254
258
case CARTRIDGE_WARPSPEED:
255
259
return roml_banks[0x1f00 + (addr & 0xff)];
256
case CARTRIDGE_EXPERT:
257
return expert_io2_read(addr);
260
case CARTRIDGE_MAGIC_FORMEL:
261
return magicformel_io2_read(addr);
259
263
return vicii_read_phi1();
286
290
case CARTRIDGE_SUPER_SNAPSHOT:
287
291
supersnapshot_v4_io2_store(addr, value);
289
case CARTRIDGE_SUPER_SNAPSHOT_V5:
290
supersnapshot_v5_io2_store(addr, value);
292
293
case CARTRIDGE_FINAL_III:
293
294
final_v3_io2_store(addr, value);
298
299
case CARTRIDGE_IEEE488:
299
300
tpi_store((WORD)(addr & 0x07), value);
301
case CARTRIDGE_EXPERT:
302
expert_io2_store(addr, value);
302
case CARTRIDGE_MAGIC_FORMEL:
303
magicformel_io2_store(addr, value);
308
308
BYTE REGPARM1 roml_read(WORD addr)
328
328
return final_v1_roml_read(addr);
329
329
case CARTRIDGE_FINAL_III:
330
330
return final_v3_roml_read(addr);
331
case CARTRIDGE_MAGIC_FORMEL:
332
return magicformel_roml_read(addr);
336
338
return roml_banks[(addr & 0x1fff) + (roml_bank << 13)];
339
BYTE REGPARM1 romh_read(WORD addr)
341
switch (mem_cartridge_type) {
342
case CARTRIDGE_ATOMIC_POWER:
343
return atomicpower_romh_read(addr);
344
case CARTRIDGE_EXPERT:
345
return expert_romh_read(addr);
346
case CARTRIDGE_OCEAN:
347
/* 256 kB OCEAN carts may access memory either at $8000 or $a000 */
348
return roml_banks[(addr & 0x1fff) + (romh_bank << 13)];
349
case CARTRIDGE_IDE64:
350
return romh_banks[(addr & 0x3fff) | (romh_bank << 14)];
352
return romh_banks[(addr & 0x1fff) + (romh_bank << 13)];
355
341
void REGPARM2 roml_store(WORD addr, BYTE value)
357
343
switch (mem_cartridge_type) {
379
365
case CARTRIDGE_FINAL_III:
380
366
final_v3_roml_store(addr, value);
368
case CARTRIDGE_MAGIC_FORMEL:
369
magicformel_roml_store(addr, value);
385
374
export_ram0[addr & 0x1fff] = value;
377
BYTE REGPARM1 romh_read(WORD addr)
379
switch (mem_cartridge_type) {
380
case CARTRIDGE_ATOMIC_POWER:
381
return atomicpower_romh_read(addr);
382
case CARTRIDGE_EXPERT:
383
return expert_romh_read(addr);
384
case CARTRIDGE_OCEAN:
385
/* 256 kB OCEAN carts may access memory either at $8000 or $a000 */
386
return roml_banks[(addr & 0x1fff) + (romh_bank << 13)];
387
case CARTRIDGE_IDE64:
388
return romh_banks[(addr & 0x3fff) | (romh_bank << 14)];
390
return romh_banks[(addr & 0x1fff) + (romh_bank << 13)];
393
void REGPARM2 romh_store(WORD addr, BYTE value)
395
switch (mem_cartridge_type) {
396
case CARTRIDGE_MAGIC_FORMEL:
397
magicformel_romh_store(addr, value);
402
BYTE REGPARM1 ultimax_1000_7fff_read(WORD addr)
404
switch (mem_cartridge_type) {
405
case CARTRIDGE_IDE64:
406
return export_ram0[addr & 0x7fff];
407
case CARTRIDGE_MAGIC_FORMEL:
408
return magicformel_1000_7fff_read(addr);
410
return vicii_read_phi1();
413
void REGPARM2 ultimax_1000_7fff_store(WORD addr, BYTE value)
415
switch (mem_cartridge_type) {
416
case CARTRIDGE_IDE64:
417
export_ram0[addr & 0x7fff] = value;
419
case CARTRIDGE_MAGIC_FORMEL:
420
magicformel_1000_7fff_store(addr, value);
390
425
BYTE REGPARM1 ultimax_a000_bfff_read(WORD addr)
394
429
return atomicpower_a000_bfff_read(addr);
395
430
case CARTRIDGE_IDE64:
396
431
return romh_banks[(addr & 0x3fff) | (romh_bank << 14)];
398
return vicii_read_phi1();
401
BYTE REGPARM1 ultimax_1000_7fff_read(WORD addr)
403
switch (mem_cartridge_type) {
404
case CARTRIDGE_IDE64:
405
return export_ram0[addr & 0x7fff];
407
return vicii_read_phi1();
410
BYTE REGPARM1 ultimax_c000_cfff_read(WORD addr)
412
switch (mem_cartridge_type) {
413
case CARTRIDGE_IDE64:
414
return export_ram0[addr & 0x7fff];
432
case CARTRIDGE_MAGIC_FORMEL:
433
return magicformel_a000_bfff_read(addr);
416
435
return vicii_read_phi1();
421
440
switch (mem_cartridge_type) {
422
441
case CARTRIDGE_ATOMIC_POWER:
423
442
atomicpower_a000_bfff_store(addr, value);
444
case CARTRIDGE_MAGIC_FORMEL:
445
magicformel_a000_bfff_store(addr, value);
428
void REGPARM2 ultimax_1000_7fff_store(WORD addr, BYTE value)
450
BYTE REGPARM1 ultimax_c000_cfff_read(WORD addr)
430
452
switch (mem_cartridge_type) {
431
453
case CARTRIDGE_IDE64:
432
export_ram0[addr & 0x7fff]=value;
454
return export_ram0[addr & 0x7fff];
455
case CARTRIDGE_MAGIC_FORMEL:
456
return magicformel_c000_cfff_read(addr);
458
return vicii_read_phi1();
437
461
void REGPARM2 ultimax_c000_cfff_store(WORD addr, BYTE value)
439
463
switch (mem_cartridge_type) {
440
464
case CARTRIDGE_IDE64:
441
export_ram0[addr & 0x7fff]=value;
465
export_ram0[addr & 0x7fff] = value;
467
case CARTRIDGE_MAGIC_FORMEL:
468
magicformel_c000_cfff_store(addr, value);
473
BYTE REGPARM1 ultimax_d000_dfff_read(WORD addr)
475
switch (mem_cartridge_type) {
476
case CARTRIDGE_MAGIC_FORMEL:
477
return magicformel_d000_dfff_read(addr);
479
return read_bank_io(addr);
482
void REGPARM2 ultimax_d000_dfff_store(WORD addr, BYTE value)
484
switch (mem_cartridge_type) {
485
case CARTRIDGE_MAGIC_FORMEL:
486
magicformel_d000_dfff_store(addr, value);
489
store_bank_io(addr, value);
446
492
void REGPARM1 cartridge_decode_address(WORD addr)
525
571
cartridge_config_changed(0, 0, CMODE_READ);
526
572
cartridge_store_io1((WORD)0xde00, 0);
574
case CARTRIDGE_MAGIC_FORMEL:
575
magicformel_config_init();
529
578
cartridge_config_changed(2, 2, CMODE_READ);
616
665
memcpy(roml_banks, rawcart, 0x2000 * 64);
617
666
cartridge_config_changed(0, 0, CMODE_READ);
668
case CARTRIDGE_MAGIC_FORMEL:
669
magicformel_config_setup(rawcart);
620
672
mem_cartridge_type = CARTRIDGE_NONE;
635
687
int cartridge_reset;
638
case CARTRIDGE_IEEE488:
639
/* FIXME: Insert interface removal here. */
690
case CARTRIDGE_ACTION_REPLAY:
691
actionreplay_detach();
693
case CARTRIDGE_ATOMIC_POWER:
694
atomicpower_detach();
696
case CARTRIDGE_EPYX_FASTLOAD:
697
epyxfastload_detach();
699
case CARTRIDGE_EXPERT:
702
case CARTRIDGE_FINAL_I:
705
case CARTRIDGE_FINAL_III:
708
case CARTRIDGE_GENERIC_16KB:
709
generic_16kb_detach();
711
case CARTRIDGE_GENERIC_8KB:
712
generic_8kb_detach();
641
714
case CARTRIDGE_IDE64:
717
case CARTRIDGE_IEEE488:
718
/* FIXME: Insert interface removal here. */
720
case CARTRIDGE_KCS_POWER:
723
case CARTRIDGE_MAGIC_FORMEL:
724
magicformel_detach();
726
case CARTRIDGE_RETRO_REPLAY:
727
retroreplay_detach();
729
case CARTRIDGE_SUPER_GAMES:
732
case CARTRIDGE_SUPER_SNAPSHOT:
733
supersnapshot_v4_detach();
735
case CARTRIDGE_SUPER_SNAPSHOT_V5:
736
supersnapshot_v5_detach();
738
case CARTRIDGE_ULTIMAX:
739
generic_ultimax_detach();
741
case CARTRIDGE_ZAXXON:
645
745
cartridge_config_changed(6, 6, CMODE_READ);
646
746
mem_cartridge_type = CARTRIDGE_NONE;