2
* Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved.
3
* Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved.
4
* Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved.
7
* THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
8
* OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
10
* Permission is hereby granted to use or copy this program
11
* for any purpose, provided the above notices are retained on all copies.
12
* Permission to modify the code and to distribute modified code is granted,
13
* provided the above notices are retained, and a notice that the code was
14
* modified is included with the above copyright notice.
16
* Some of the machine specific code was borrowed from our GC distribution.
19
/* The following really assume we have a 486 or better. Unfortunately */
20
/* gcc doesn't define a suitable feature test macro based on command */
22
/* We should perhaps test dynamically. */
24
#include "../all_aligned_atomic_load_store.h"
26
/* Real X86 implementations, except for some old WinChips, appear */
27
/* to enforce ordering between memory operations, EXCEPT that a later */
28
/* read can pass earlier writes, presumably due to the visible */
29
/* presence of store buffers. */
30
/* We ignore both the WinChips, and the fact that the official specs */
31
/* seem to be much weaker (and arguably too weak to be usable). */
33
#include "../ordered_except_wr.h"
35
#include "../test_and_set_t_is_char.h"
37
#include "../standard_ao_double_t.h"
39
#if defined(AO_USE_PENTIUM4_INSTRS)
43
__asm__ __volatile__("mfence" : : : "memory");
46
#define AO_HAVE_nop_full
50
/* We could use the cpuid instruction. But that seems to be slower */
51
/* than the default implementation based on test_and_set_full. Thus */
52
/* we omit that bit of misinformation here. */
56
/* As far as we can tell, the lfence and sfence instructions are not */
57
/* currently needed or useful for cached memory accesses. */
59
/* Really only works for 486 and later */
61
AO_fetch_and_add_full (volatile AO_t *p, AO_t incr)
65
__asm__ __volatile__ ("lock; xaddl %0, %1" :
66
"=r" (result), "=m" (*p) : "0" (incr), "m" (*p)
71
#define AO_HAVE_fetch_and_add_full
73
AO_INLINE unsigned char
74
AO_char_fetch_and_add_full (volatile unsigned char *p, unsigned char incr)
78
__asm__ __volatile__ ("lock; xaddb %0, %1" :
79
"=q" (result), "=m" (*p) : "0" (incr), "m" (*p)
84
#define AO_HAVE_char_fetch_and_add_full
86
AO_INLINE unsigned short
87
AO_short_fetch_and_add_full (volatile unsigned short *p, unsigned short incr)
89
unsigned short result;
91
__asm__ __volatile__ ("lock; xaddw %0, %1" :
92
"=r" (result), "=m" (*p) : "0" (incr), "m" (*p)
97
#define AO_HAVE_short_fetch_and_add_full
99
/* Really only works for 486 and later */
101
AO_or_full (volatile AO_t *p, AO_t incr)
103
__asm__ __volatile__ ("lock; orl %1, %0" :
104
"=m" (*p) : "r" (incr), "m" (*p) : "memory");
107
#define AO_HAVE_or_full
109
AO_INLINE AO_TS_VAL_t
110
AO_test_and_set_full(volatile AO_TS_t *addr)
112
unsigned char oldval;
113
/* Note: the "xchg" instruction does not need a "lock" prefix */
114
__asm__ __volatile__("xchgb %0, %1"
115
: "=q"(oldval), "=m"(*addr)
116
: "0"(0xff), "m"(*addr) : "memory");
117
return (AO_TS_VAL_t)oldval;
120
#define AO_HAVE_test_and_set_full
122
/* Returns nonzero if the comparison succeeded. */
124
AO_compare_and_swap_full(volatile AO_t *addr,
125
AO_t old, AO_t new_val)
128
__asm__ __volatile__("lock; cmpxchgl %3, %0; setz %1"
129
: "=m"(*addr), "=q"(result)
130
: "m"(*addr), "r" (new_val), "a"(old) : "memory");
134
#define AO_HAVE_compare_and_swap_full
136
/* Returns nonzero if the comparison succeeded. */
137
/* Really requires at least a Pentium. */
139
AO_compare_double_and_swap_double_full(volatile AO_double_t *addr,
140
AO_t old_val1, AO_t old_val2,
141
AO_t new_val1, AO_t new_val2)
145
/* If PIC is turned on, we can't use %ebx as it is reserved for the
146
GOT poiner. We can save and restore %ebx because GCC won't be
147
using it for anything else (such as any of the m operands) */
148
__asm__ __volatile__("pushl %%ebx;" /* save ebx used for PIC GOT ptr */
149
"movl %6,%%ebx;" /* move new_val2 to %ebx */
150
"lock; cmpxchg8b %0; setz %1;"
151
"pop %%ebx;" /* restore %ebx */
152
: "=m"(*addr), "=q"(result)
153
: "m"(*addr), "d" (old_val2), "a" (old_val1),
154
"c" (new_val2), "m" (new_val1) : "memory");
156
/* We can't just do the same thing in non-PIC mode, because GCC
157
* might be using %ebx as the memory operand. We could have ifdef'd
158
* in a clobber, but there's no point doing the push/pop if we don't
160
__asm__ __volatile__("lock; cmpxchg8b %0; setz %1;"
161
: "=m"(*addr), "=q"(result)
162
: "m"(*addr), "d" (old_val2), "a" (old_val1),
163
"c" (new_val2), "b" (new_val1) : "memory");
168
#define AO_HAVE_compare_double_and_swap_double_full
170
#include "../ao_t_is_int.h"