2
* qozap.c - Zaptel driver for the quadBRI PCI ISDN card
3
* and the octoBRI PCI ISDN card!
5
* Copyright (C) 2003, 2004, 2005, 2006, 2007 Junghanns.NET GmbH
7
* Klaus-Peter Junghanns <kpj@junghanns.net>
9
* This program is free software and may be modified and
10
* distributed under the terms of the GNU Public License.
13
#include <linux/kernel.h>
14
#include <linux/module.h>
15
#include <linux/pci.h>
16
#include <linux/init.h>
17
#include <linux/interrupt.h>
22
#include <linux/moduleparam.h>
27
static int doubleclock=0;
28
static int ports=-1; /* autodetect */
29
static int pcmslave=0;
32
static int dacs=1; /* 0 = no dacs, 1 = oncard dacs */
33
static struct qoz_card *qoz_dev_list = NULL;
34
static int qoz_dev_count = 0;
35
static int totalBRIs = 0;
36
static struct pci_dev *multi_qoz = NULL;
37
static spinlock_t registerlock = SPIN_LOCK_UNLOCKED;
40
static int ztqoz_shutdown(struct zt_span *span);
42
int qoz_waitbusy(struct qoz_card *qoztmp) {
44
while (x-- && (qoz_inb(qoztmp,qoz_R_STATUS) & 1));
52
void qoz_shutdownCard(struct qoz_card *qoztmp) {
58
printk(KERN_INFO "qozap: shutting down NULL card!\n");
62
if ((qoztmp->pci_io == NULL) || (qoztmp->ioport == 0)) {
67
printk(KERN_INFO "qozap: shutting down card %d (cardID %d) at io port %#x.\n",qoztmp->cardno,qoztmp->cardID,(u_int) qoztmp->ioport);
70
spin_lock_irqsave(&qoztmp->lock,flags);
73
qoz_outb(qoztmp,qoz_R_IRQMSK_MISC, 0);
74
qoz_outb(qoztmp,qoz_R_SCI_MSK, 0);
75
qoz_outb(qoztmp,qoz_R_IRQ_CTRL, 0);
77
spin_unlock_irqrestore(&qoztmp->lock,flags);
79
stports = qoztmp->stports;
80
for (s=0; s < stports; s++) {
81
if(qoztmp->spans[s].flags & ZT_FLAG_REGISTERED) {
82
zt_unregister(&(qoztmp->spans[s]));
84
printk(KERN_INFO "qozap: unregistered card %d span %d.\n",qoztmp->cardno,s+1);
89
release_region(qoztmp->ioport, 8);
90
iounmap((void *) qoztmp->pci_io);
91
release_mem_region((unsigned long) qoztmp->pci_io_phys, 256);
93
spin_lock_irqsave(&qoztmp->lock,flags);
95
qoztmp->pci_io = NULL;
98
if (qoztmp->pcidev != NULL) {
99
pci_disable_device(qoztmp->pcidev);
101
pci_write_config_word(qoztmp->pcidev, PCI_COMMAND, 0);
103
free_irq(qoztmp->irq,qoztmp);
104
spin_unlock_irqrestore(&qoztmp->lock,flags);
109
void qoz_doLEDs(struct qoz_card *qoztmp) {
110
unsigned char leds = 0x0;
113
spin_lock_irqsave(&qoztmp->lock,flags);
115
if ((qoztmp->type == 0xb520) && (qoztmp->stports == 4)){
116
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0x20 | 0x10);
117
qoz_outb(qoztmp,qoz_R_GPIO_EN1,0xf);
118
qoz_outb(qoztmp,qoz_R_GPIO_OUT1,(qoztmp->leds[0] | (qoztmp->leds[1] << 1) | (qoztmp->leds[2] << 2) | (qoztmp->leds[3] << 3)));
119
} else if (((qoztmp->type == 0xb550) || (qoztmp->type == 0xb556) || (qoztmp->type == 0xb752)) && (qoztmp->stports == 4)){
120
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0x80 | 0x40 | 0x20 | 0x10);
121
qoz_outb(qoztmp,qoz_R_GPIO_EN1,0xff);
123
if (qoztmp->leds[0] == 1) {
126
if (qoztmp->leds[1] == 1) {
129
if (qoztmp->leds[2] == 1) {
132
if (qoztmp->leds[3] == 1) {
148
qoz_outb(qoztmp,qoz_R_GPIO_OUT1, leds);
150
} else if (((qoztmp->type == 0xb556) || (qoztmp->type == 0xb751)) && (qoztmp->stports == 2)){
151
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0x80 | 0x40 | 0x20 | 0x10);
152
qoz_outb(qoztmp,qoz_R_GPIO_EN1,0xff);
154
if (qoztmp->leds[0] == 1) {
157
if (qoztmp->leds[1] == 1) {
160
qoz_outb(qoztmp,qoz_R_GPIO_OUT1, leds);
162
} else if (qoztmp->type == 0xb558) {
163
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0x80 | 0x40 | 0x20);
164
qoz_outb(qoztmp,qoz_R_GPIO_EN1,0x80 | 0x40 | 0x20 | 0x4);
165
if (qoztmp->leds[0] == 1) {
168
if (qoztmp->leds[1] == 1) {
171
if (qoztmp->leds[2] == 1) {
174
if (qoztmp->leds[3] == 1) {
178
qoz_outb(qoztmp,qoz_R_GPIO_OUT1, leds);
185
} else if (qoztmp->type == 0xb55b) {
186
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x21);
196
if (qoztmp->leds[0] == 0) {
199
if (qoztmp->leds[1] == 0) {
202
if (qoztmp->leds[2] == 0) {
205
if (qoztmp->leds[3] == 0) {
208
if (qoztmp->leds[4] == 0) {
211
if (qoztmp->leds[5] == 0) {
214
if (qoztmp->leds[6] == 0) {
217
if (qoztmp->leds[7] == 0) {
221
ledw = leds << 24 | leds << 16 | leds << 8 | leds;
223
qoz_outdw_io(qoztmp,0x4000, ledw);
225
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x20);
228
spin_unlock_irqrestore(&qoztmp->lock,flags);
231
void qoz_doWD(struct qoz_card *qoztmp) {
236
spin_lock_irqsave(&qoztmp->lock,flags);
237
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x21);
238
if (qoztmp->wdp == 1) {
239
qoz_outdw_io(qoztmp,0x4000, qoz_WD_P2);
242
qoz_outdw_io(qoztmp,0x4000, qoz_WD_P1);
245
qoz_inb_io(qoztmp,qoz_R_CHIP_ID);
246
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x20);
247
spin_unlock_irqrestore(&qoztmp->lock,flags);
250
void qoz_undoWD(struct qoz_card *qoztmp) {
254
printk(KERN_INFO "qozap: Stopping hardware watchdog.\n");
255
spin_lock_irqsave(&qoztmp->lock,flags);
256
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x21);
257
qoz_outdw_io(qoztmp,0x4000, qoz_WD_P0);
259
qoz_inb_io(qoztmp,qoz_R_CHIP_ID);
260
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x20);
261
spin_unlock_irqrestore(&qoztmp->lock,flags);
265
void qoz_reset_pcm(struct qoz_card *qoztmp) {
266
qoz_outb(qoztmp,qoz_R_CIRM,0x20);
267
qoz_outb(qoztmp,qoz_R_CIRM,0x0);
268
qoz_waitbusy(qoztmp);
271
qoz_outb(qoztmp,qoz_R_PCM_MD0, 0x90);
272
qoz_outb(qoztmp,qoz_R_PCM_MD1, 0x20);
273
qoz_outb(qoztmp,qoz_R_PCM_MD0, 0xA0);
274
qoz_outb(qoztmp,qoz_R_PCM_MD2, 0x4 | 0x8);
276
qoz_outb(qoztmp,qoz_R_PCM_MD0, 0x91);
277
qoz_outb(qoztmp,qoz_R_PCM_MD1, 0x20);
281
void qoz_resetCard(struct qoz_card *qoztmp) {
283
spin_lock_irqsave(&(qoztmp->lock),flags);
284
pci_write_config_word(qoztmp->pcidev, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
287
qoz_outb(qoztmp,qoz_R_CIRM,0x8);
288
qoz_outb(qoztmp,qoz_R_CIRM,0x0);
289
qoz_waitbusy(qoztmp);
291
qoz_reset_pcm(qoztmp);
294
qoz_outb(qoztmp,qoz_R_CIRM,0x10);
295
qoz_outb(qoztmp,qoz_R_CIRM,0x0);
296
qoz_waitbusy(qoztmp);
299
qoz_outb(qoztmp,qoz_R_CIRM,0x40);
300
qoz_outb(qoztmp,qoz_R_CIRM,0x0);
301
qoz_waitbusy(qoztmp);
303
/* set S0 amplitude */
304
qoz_outb(qoztmp,qoz_R_PWM_MD,0xa0);
305
if (qoztmp->type == 0xb552) {
306
qoz_outb(qoztmp,qoz_R_PWM0,0x19);
307
} else if (qoztmp->type == 0xb55b) {
308
qoz_outb(qoztmp,qoz_R_PWM0,0x19);
310
qoz_outb(qoztmp,qoz_R_PWM0,0x1E);
313
/* set up the timer */
314
qoz_outb(qoztmp,qoz_R_TI_WD, 0x2);
315
qoz_outb(qoztmp,qoz_R_IRQMSK_MISC, 0x2);
318
/* all state changes */
319
qoz_outb(qoztmp,qoz_R_SCI_MSK, 0xff);
321
if (qoztmp->type == 0xb552) {
322
qoz_outb(qoztmp,qoz_R_FIFO_MD,0x16);
323
} else if (qoztmp->type == 0xb55b) {
324
qoz_outb(qoztmp,qoz_R_FIFO_MD,0x16);
326
qoz_outb(qoztmp,qoz_R_FIFO_MD,0x26);
330
if (doubleclock == 1) {
331
// hopefully you have set CLK_MODE correctly!
332
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x20);
334
if (qoztmp->type == 0x08b4) {
335
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x0);
336
} else if (qoztmp->type == 0xb550) {
337
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x20);
338
} else if (qoztmp->type == 0xb556) {
339
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x20);
340
} else if (qoztmp->type == 0xb559) {
341
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x20);
342
} else if (qoztmp->type == 0xb558) {
343
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x20);
344
} else if (qoztmp->type == 0xb520) {
345
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x20);
346
} else if (qoztmp->type == 0xb752) {
347
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x20);
348
} else if (qoztmp->type == 0xb751) {
349
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x20);
351
/* you are on your own here! */
352
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x20);
355
qoz_outb(qoztmp,qoz_R_CTRL,0x0);
358
qoztmp->leds[0] = 0x0;
359
qoztmp->leds[1] = 0x0;
360
qoztmp->leds[2] = 0x0;
361
qoztmp->leds[3] = 0x0;
362
qoztmp->leds[4] = 0x0;
363
qoztmp->leds[5] = 0x0;
364
qoztmp->leds[6] = 0x0;
365
qoztmp->leds[7] = 0x0;
367
if (qoztmp->type == 0xb552) {
369
} else if (qoztmp->type == 0xb55b) {
371
} else if (qoztmp->type == 0xb556) {
373
} else if (qoztmp->type == 0xb559) {
375
} else if (qoztmp->type == 0xb751) {
382
if ((qoztmp->type == 0xb550) || (qoztmp->type == 0xb556)) {
383
printk(KERN_INFO "qozap: Starting hardware watchdog.\n");
389
qoz_outb(qoztmp,qoz_R_ST_SYNC,0x0);
392
qoz_outb(qoztmp,qoz_R_IRQ_CTRL, 0);
394
spin_unlock_irqrestore(&(qoztmp->lock),flags);
397
void qoz_registerCard(struct qoz_card *qozcard) {
398
struct qoz_card *tmpcard = NULL;
399
spin_lock(®isterlock);
401
if (qozcard != NULL) {
403
tmpcard = qoz_dev_list;
405
while (tmpcard->next) {
406
tmpcard = tmpcard->next;
408
tmpcard->next = qozcard;
409
qozcard->prev = tmpcard;
411
qoz_dev_list = qozcard;
414
qozcard->prev = NULL;
415
qozcard->next = qoz_dev_list;
417
qoz_dev_list->prev = qozcard;
419
qoz_dev_list = qozcard;
421
qozcard->cardno = ++qoz_dev_count;
423
printk(KERN_INFO "qozap: trying to register NULL card.\n");
425
spin_unlock(®isterlock);
428
static int qoz_dfifo_tx(struct qoz_card *qoztmp, int stport) {
436
if (qoztmp->type == 0xb552) {
438
} else if (qoztmp->type == 0xb55b) {
444
fifo = stport + offset;
446
if (qoztmp->chans[stport][chan].bytes2transmit < 1) {
449
spin_lock_irqsave(&qoztmp->lock,flags);
451
qoz_outb(qoztmp,qoz_R_FIFO,fifo << 1);
452
qoz_waitbusy(qoztmp);
455
printk(KERN_INFO "qozap: card %d stport %d TX [ ", qoztmp->cardno, stport + 1);
456
/* copy frame to fifo */
457
for (x=0;x<qoztmp->chans[stport][chan].bytes2transmit;x++) {
459
printk("%#x ",qoztmp->dtxbuf[stport][x]);
460
qoz_outb(qoztmp,qoz_A_FIFO_DATA0,qoztmp->dtxbuf[stport][x]);
463
printk("] %d bytes\n",qoztmp->chans[stport][chan].bytes2transmit);
465
if (qoztmp->chans[stport][chan].eoftx == 1) {
466
/* transmit HDLC frame */
467
qoz_outb(qoztmp,qoz_R_INC_RES_FIFO,0x1);
468
qoz_waitbusy(qoztmp);
470
spin_unlock_irqrestore(&qoztmp->lock,flags);
475
static int qoz_fifo_tx(struct qoz_card *qoztmp, char fifo) {
476
int stport = fifo / 2;
480
spin_lock_irqsave(&qoztmp->lock,flags);
482
qoz_outb(qoztmp,qoz_R_FIFO,0x80 | (fifo << 1));
483
qoz_waitbusy(qoztmp);
484
/* transmit 8 bytes of transparent data */
485
qoz_outdw(qoztmp,qoz_A_FIFO_DATA0,*((unsigned int *) &qoztmp->txbuf[stport][chan][0]));
486
qoz_outdw(qoztmp,qoz_A_FIFO_DATA0,*((unsigned int *) &qoztmp->txbuf[stport][chan][4]));
488
spin_unlock_irqrestore(&qoztmp->lock,flags);
492
static int qoz_dfifo_rx(struct qoz_card *qoztmp, int stport) {
493
unsigned char f1=1,f2=1,data,stat;
494
unsigned char of1=0,of2=0;
496
unsigned short z1=1,z2=1;
497
unsigned short oz1=0,oz2=0;
502
if (qoztmp->type == 0xb552) {
504
} else if (qoztmp->type == 0xb55b) {
510
fifo = stport + offset;
512
spin_lock_irqsave(&qoztmp->lock,flags);
514
qoz_outb(qoztmp,qoz_R_FIFO,(fifo << 1) | 1);
515
qoz_waitbusy(qoztmp);
517
while ((of1 != f1) && (of2 != f2)) {
520
f1 = qoz_inb(qoztmp,qoz_A_F1) & 0xf;
521
f2 = qoz_inb(qoztmp,qoz_A_F2) & 0xf;
526
qoztmp->st[stport].drx--;
527
qoztmp->chans[stport][2].bytes2receive = 0;
528
spin_unlock_irqrestore(&qoztmp->lock,flags);
532
while ((oz1 != z1) && (oz2 != z2)) {
535
if ((qoztmp->type != 0xb552) && (qoztmp->type != 0xb55b)){
536
z1 = qoz_inw(qoztmp,qoz_A_Z1) & 0x7ff;
537
z2 = qoz_inw(qoztmp,qoz_A_Z2) & 0x7ff;
539
z1 = qoz_inw(qoztmp,qoz_A_Z1) & 0x3ff;
540
z2 = qoz_inw(qoztmp,qoz_A_Z2) & 0x3ff;
544
if ((qoztmp->type == 0xb552)|| (qoztmp->type == 0xb55b)) {
547
len += qoz_DFIFO_SIZE8;
552
len += qoz_DFIFO_SIZE4;
556
if (len > qoz_DFIFO_SIZE4) {
557
printk(KERN_INFO "\nqozap: buffer overflow in D channel RX!\n");
558
qoztmp->chans[stport][2].bytes2receive = 0;
559
qoztmp->chans[stport][2].eofrx = 0;
561
if (debug > 1) printk(KERN_INFO "qozap: card %d span %d RX [ ", qoztmp->cardno, stport + 1);
562
for (i=0; i<len; i++) {
563
data = qoz_inb(qoztmp,qoz_A_FIFO_DATA0);
564
qoztmp->drxbuf[stport][i] = data;
565
if (debug > 1) printk("%#x ",data);
567
if (debug > 1) printk("] %d bytes\n", len);
568
qoztmp->chans[stport][2].bytes2receive = i;
569
qoztmp->chans[stport][2].eofrx = 1;
572
stat = qoz_inb(qoztmp,qoz_A_FIFO_DATA0);
575
printk(KERN_INFO "qozap: CRC error for HDLC frame on card %d (cardID %d) S/T port %d\n",qoztmp->cardno, qoztmp->cardID, stport+1);
576
qoztmp->chans[stport][2].bytes2receive = 0;
577
qoztmp->chans[stport][2].eofrx = 0;
578
// zt_qevent_nolock(&qoztmp->chans[stport][2], ZT_EVENT_BADFCS);
580
qoz_outb(qoztmp,qoz_R_INC_RES_FIFO,0x1);
581
qoz_waitbusy(qoztmp);
583
/* frame recevived */
584
if (qoztmp->st[stport].drx > 0) {
585
qoztmp->st[stport].drx--;
587
printk(KERN_INFO "qozap: trying to receive too much (card %d span %d drx %d)\n", qoztmp->cardno, stport+1, qoztmp->st[stport].drx);
588
qoztmp->st[stport].drx = 0;
590
spin_unlock_irqrestore(&qoztmp->lock,flags);
595
static int qoz_fifo_rx(struct qoz_card *qoztmp, char fifo) {
596
int stport = fifo / 2;
600
unsigned short z1=1,z2=1;
601
unsigned short oz1=0,oz2=0;
605
spin_lock_irqsave(&qoztmp->lock,flags);
608
qoz_outb(qoztmp,qoz_R_FIFO,0x80 | (fifo << 1) | 1);
609
qoz_waitbusy(qoztmp);
611
while ((oz1 != z1) && (oz2 != z2)) {
614
z1 = qoz_inw(qoztmp,qoz_A_Z1) & 0x7f;
615
z2 = qoz_inw(qoztmp,qoz_A_Z2) & 0x7f;
619
len += qoz_FIFO_SIZE;
621
if (len > 2 * ZT_CHUNKSIZE) {
622
mumbojumbo = len - (2 * ZT_CHUNKSIZE);
624
for (i=0;i<mumbojumbo;i++) {
625
data = qoz_inb(qoztmp,qoz_A_FIFO_DATA0);
628
if (((qoztmp->clicks > 50) || (debug > 5)) && (mumbojumbo > 0)) {
629
printk(KERN_CRIT "qozap: dropped audio card %d cardid %d bytes %d z1 %d z2 %d fifo %d\n", qoztmp->cardno, qoztmp->cardID, mumbojumbo, z1, z2, fifo);
635
if (len < ZT_CHUNKSIZE) {
636
// printk(KERN_INFO "qozap: not enough to receive (%d bytes)\n",len);
637
spin_unlock_irqrestore(&qoztmp->lock,flags);
641
*((unsigned int *) &qoztmp->txbuf[stport][chan][0]) = qoz_indw(qoztmp,qoz_A_FIFO_DATA0);
642
*((unsigned int *) &qoztmp->txbuf[stport][chan][4]) = qoz_indw(qoztmp,qoz_A_FIFO_DATA0);
644
*((unsigned int *) &qoztmp->rxbuf[stport][chan][0]) = qoz_indw(qoztmp,qoz_A_FIFO_DATA0);
645
*((unsigned int *) &qoztmp->rxbuf[stport][chan][4]) = qoz_indw(qoztmp,qoz_A_FIFO_DATA0);
649
spin_unlock_irqrestore(&qoztmp->lock,flags);
651
zt_ec_chunk(&qoztmp->spans[stport].chans[chan], qoztmp->spans[stport].chans[chan].readchunk, qoztmp->spans[stport].chans[chan].writechunk);
653
// printk(KERN_INFO "s/t port %d, channel %d, dbufi=%d, f1=%d, f2=%d, z1=%d, z2=%d => len = %d stat=%#x, hdlc=%d\n",stport,chan,qoztmp->st[stport].dbufi,f1,f2,z1,z2,len,stat,hdlc);
657
static void qoz_assign(struct qoz_card *qoztmp, int src_span, int src_chan, int dst_span, int dst_chan, int timeslot, int use_pcm_bus) {
659
int dst_fifo = dst_span * 2 + (dst_chan - 1);
660
int src_fifo = src_span * 2 + (src_chan - 1);
661
int src_hfc_chan = src_span * 4 + (src_chan - 1);
662
int dst_hfc_chan = dst_span * 4 + (dst_chan - 1);
664
spin_lock_irqsave(&qoztmp->lock, flags);
666
qoz_outb(qoztmp,qoz_R_FIFO,(src_fifo << 1) | 1);
667
qoz_waitbusy(qoztmp);
668
qoz_outb(qoztmp,qoz_R_INC_RES_FIFO,0x2);
669
qoz_waitbusy(qoztmp);
670
qoz_outb(qoztmp,qoz_A_CHANNEL,(src_hfc_chan << 1) | 1);
671
qoz_outb(qoztmp,qoz_A_CON_HDLC,0xDE); // was c2
673
qoz_outb(qoztmp,qoz_R_SLOT,timeslot << 1);
674
qoz_outb(qoztmp,qoz_A_SL_CFG, (src_hfc_chan << 1) | 0 | 0x40);
676
qoz_outb(qoztmp,qoz_R_FIFO, dst_fifo << 1);
677
qoz_waitbusy(qoztmp);
678
qoz_outb(qoztmp,qoz_R_INC_RES_FIFO,0x2);
679
qoz_waitbusy(qoztmp);
680
qoz_outb(qoztmp,qoz_A_CHANNEL,dst_hfc_chan << 1);
681
qoz_outb(qoztmp,qoz_A_CON_HDLC,0xDE); // was c2
683
qoz_outb(qoztmp,qoz_R_SLOT,(timeslot << 1) | 1);
684
qoz_outb(qoztmp,qoz_A_SL_CFG, (dst_hfc_chan << 1) | 1 | 0x40);
686
spin_unlock_irqrestore(&qoztmp->lock, flags);
689
static void qoz_unassign(struct qoz_card *qoztmp, int span, int chan, int timeslot) {
692
// int timeslot = span * 2 + (chan - 1);
693
int fifo = span * 2 + (chan - 1);
694
int hfc_chan = span * 4 + (chan - 1);
696
spin_lock_irqsave(&qoztmp->lock, flags);
698
qoz_outb(qoztmp,qoz_R_FIFO,(fifo << 1));
699
qoz_waitbusy(qoztmp);
700
qoz_outb(qoztmp,qoz_R_INC_RES_FIFO,0x2);
701
qoz_waitbusy(qoztmp);
702
qoz_outb(qoztmp,qoz_A_CON_HDLC,0x02);
703
qoz_outb(qoztmp,qoz_A_CHANNEL,(hfc_chan << 1));
704
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x1);
706
qoz_outb(qoztmp,qoz_R_FIFO,(fifo << 1) | 1);
707
qoz_waitbusy(qoztmp);
708
qoz_outb(qoztmp,qoz_R_INC_RES_FIFO,0x2);
709
qoz_waitbusy(qoztmp);
710
qoz_outb(qoztmp,qoz_A_CON_HDLC,0x02);
711
qoz_outb(qoztmp,qoz_A_CHANNEL,(hfc_chan << 1) | 1);
712
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x1);
714
qoz_outb(qoztmp,qoz_R_SLOT,(timeslot << 1) | 1);
715
qoz_outb(qoztmp,qoz_A_SL_CFG, 0x0);
717
qoz_outb(qoztmp,qoz_R_SLOT,timeslot << 1);
718
qoz_outb(qoztmp,qoz_A_SL_CFG, 0x0);
720
spin_unlock_irqrestore(&qoztmp->lock, flags);
724
static int ztqoz_dacs(struct zt_chan *dst, struct zt_chan *src)
726
struct qoz_card *qoztmp = NULL;
729
if (!dacs) return -1;
734
if (src->pvt != dst->pvt) {
737
timeslot = src->channo;
739
printk("qozap: Assigning channel %d/%d -> %d/%d, timeslot %d, different cards!\n", src->span->offset, src->chanpos, dst->span->offset, dst->chanpos, timeslot);
742
printk("qozap: Not Assigning %d/%d -> %d/%d, different cards!\n", src->span->offset, src->chanpos, dst->span->offset, dst->chanpos);
747
// timeslot = src->span->offset * 2 + (src->chanpos);
748
timeslot = src->channo;
750
printk("qozap: Assigning channel %d/%d -> %d/%d, timeslot %d, same card!\n", src->span->offset, src->chanpos, dst->span->offset, dst->chanpos, timeslot);
753
if ((src->chanpos == 3) || (dst->chanpos == 3)) {
755
printk("qozap: Not Assigning D-channel %d/%d -> %d/%d!\n", src->span->offset, src->chanpos, dst->span->offset, dst->chanpos);
757
qoz_assign(qoztmp, src->span->offset, src->chanpos, dst->span->offset, dst->chanpos, timeslot, use_pcm_bus);
761
if (dst->chanpos == 3) {
763
printk("qozap: Not Unassigning D-channel %d/%d!\n", dst->span->offset, dst->chanpos);
765
timeslot = dst->channo;
766
qoz_unassign(qoztmp, dst->span->offset, dst->chanpos, timeslot);
768
printk("qozap: Unassigning channel %d/%d, timeslot %d!\n", dst->span->offset, dst->chanpos, timeslot);
774
static void qoz_resync(struct qoz_card *qoztmp) {
779
if (pcmslave) return;
781
for (i=0; i<qoztmp->stports; i++){
782
if (qoztmp->st[i].l1up && (qoztmp->st_sync[i] > 0) && (qoztmp->st_sync[i] < best)) {
783
best = qoztmp->st_sync[i];
788
for (i=0; i<qoztmp->stports; i++){
789
if ((qoztmp->st_sync[i] > 0) && (qoztmp->st_sync[i] < best)) {
790
best = qoztmp->st_sync[i];
795
if (src == qoztmp->syncsrc)
798
qoztmp->syncsrc = src;
799
qoz_outb(qoztmp, qoz_R_ST_SYNC, src | 0x08);
801
printk(KERN_INFO "qozap: card %d Sync source changed to span %d\n", qoztmp->cardno, src + 1);
805
static inline void qoz_run(struct qoz_card *qoztmp) {
809
for (s=0;s<qoztmp->stports;s++) {
811
if (qoztmp->spans[s].flags & ZT_FLAG_RUNNING) {
812
/* oh zaptel! tell us what to transmit... */
813
zt_transmit(&qoztmp->spans[s]);
815
qoz_fifo_tx(qoztmp, s * 2);
817
qoz_fifo_tx(qoztmp, (s * 2) + 1);
819
if ((qoztmp->st[s].layer1state != 7) && (qoztmp->chans[s][2].bytes2transmit > 0) && (qoztmp->st[s].nt_mode != 1)) {
820
if (qoztmp->st[s].t3 == -1) {
822
printk(KERN_INFO "qozap: activating layer 1, span %d\n",s);
823
qoztmp->st[s].t3 = 0;
824
spin_lock_irqsave(&qoztmp->lock,flags);
825
qoz_outb(qoztmp,qoz_R_ST_SEL, s);
826
qoz_outb(qoztmp,qoz_A_ST_WR_STA,0x60);
827
spin_unlock_irqrestore(&qoztmp->lock, flags);
833
if (qoztmp->spans[s].alarms != ZT_ALARM_RED) {
834
qoz_dfifo_tx(qoztmp, s);
836
if ((qoztmp->st[s].t3 == -1) && (qoztmp->st[s].t4 == -1) && (qoztmp->st[s].layer1state == 3) && (qoztmp->st[s].nt_mode != 1)) {
839
printk(KERN_INFO "qozap: clearing alarms on span %d\n",s);
840
qoztmp->spans[s].alarms = ZT_ALARM_NONE;
841
zt_alarm_notify_no_master_change(&qoztmp->spans[s]);
845
qoztmp->chans[s][2].bytes2receive = 0;
846
qoztmp->chans[s][2].bytes2transmit = 0;
847
qoztmp->chans[s][2].eofrx = 0;
848
qoztmp->chans[s][2].eoftx = 0;
853
qoz_fifo_rx(qoztmp,(s*2));
855
qoz_fifo_rx(qoztmp,(s*2)+1);
857
if (qoztmp->st[s].drx > 0) {
859
printk(KERN_CRIT "qozap: card %d st[%d].drx = %d\n", qoztmp->cardno, s, qoztmp->st[s].drx);
860
qoz_dfifo_rx(qoztmp, s);
862
if (qoztmp->spans[s].flags & ZT_FLAG_RUNNING) {
863
/* oh zaptel! thou shall receive! */
864
zt_receive(&(qoztmp->spans[s]));
869
qoz_fifo_rx(qoztmp,(s*2));
871
qoz_fifo_rx(qoztmp,(s*2)+1);
873
/* if (qoztmp->st[s].drx > 0) {
875
printk(KERN_CRIT "qozap: card %d st[%d].drx = %d\n", qoztmp->cardno, s, qoztmp->st[s].drx);
876
qoz_dfifo_rx(qoztmp, s);
878
if (qoztmp->spans[s].flags & ZT_FLAG_RUNNING) {
879
zt_receive(&(qoztmp->spans[s]));
882
if (qoztmp->spans[s].flags & ZT_FLAG_RUNNING) {
883
/* oh zaptel! tell us what to transmit... */
884
// zt_transmit(&qoztmp->spans[s]);
886
qoz_fifo_tx(qoztmp, s * 2);
888
qoz_fifo_tx(qoztmp, (s * 2) + 1);
890
// qoz_dfifo_tx(qoztmp, s);
892
qoztmp->chans[s][2].bytes2receive = 0;
893
qoztmp->chans[s][2].bytes2transmit = 0;
894
qoztmp->chans[s][2].eofrx = 0;
895
qoztmp->chans[s][2].eoftx = 0;
902
ZAP_IRQ_HANDLER(qoz_interrupt) {
903
struct qoz_card *qoztmp = dev_id;
905
unsigned char irq_misc,irq_sci,status,l1state,irq_foview,fi;
906
int st=0,i=0,offset=0;
917
if ((!qoztmp->pci_io) || (!qoztmp->ioport)) {
918
printk(KERN_CRIT "qozap: no pci mem/io\n");
927
return IRQ_RETVAL(1);
934
spin_lock_irqsave(&(qoztmp->lock), flags);
935
status = qoz_inb(qoztmp,qoz_R_STATUS);
936
irq_sci = qoz_inb(qoztmp,qoz_R_SCI);
937
spin_unlock_irqrestore(&(qoztmp->lock), flags);
939
if (!(status & 0x80) && !(status & 0x40) && (irq_sci == 0)) {
940
// printk(KERN_CRIT "qozap: status %#x\n", status);
948
/* state machine irq */
951
printk(KERN_INFO "qozap: card %d R_BERT_STA = %#x\n", qoztmp->cardno, qoz_inb(qoztmp, qoz_R_BERT_STA) & 7);
953
if (qoztmp->type == 0xb552) {
955
} else if (qoztmp->type == 0xb55b) {
960
spin_lock_irqsave(&(qoztmp->lock), flags);
961
for (st=0;st<qoztmp->stports;st++) {
962
if (irq_sci & (1 << st)) {
963
qoz_outb(qoztmp,qoz_R_ST_SEL,st);
964
l1state = qoz_inb(qoztmp,qoz_A_ST_RD_STA) & 0xf;
966
printk(KERN_INFO "qozap: card %d span %d A_ST_RD_STA = %#x\n", qoztmp->cardno, st+1, qoz_inb(qoztmp, qoz_A_ST_RD_STA));
968
qoztmp->st[st].layer1state = l1state;
969
if (qoztmp->st[st].nt_mode == 1) {
971
printk(KERN_INFO "card %d span %d state G%d (A_ST_RD_STA = %#x)\n",qoztmp->cardno,st+1,l1state,qoz_inb(qoztmp,qoz_A_ST_RD_STA));
974
qoztmp->st[st].l1up = 1;
976
if (qoztmp->stports == 8) {
977
sprintf(qoztmp->spans[st].desc,"octoBRI PCI ISDN Card %d Span %d [NT] Layer 1 ACTIVATED (G%d)",qoztmp->cardno ,st + 1, l1state);
978
} else if (qoztmp->stports == 2) {
979
sprintf(qoztmp->spans[st].desc,"duoBRI PCI ISDN Card %d Span %d [NT] (cardID %d) Layer 1 ACTIVATED (G%d)",qoztmp->cardno ,st + 1,qoztmp->cardID, l1state);
981
sprintf(qoztmp->spans[st].desc,"quadBRI PCI ISDN Card %d Span %d [NT] (cardID %d) Layer 1 ACTIVATED (G%d)",qoztmp->cardno ,st + 1,qoztmp->cardID, l1state);
983
qoz_outb(qoztmp,qoz_A_ST_WR_STA,3 | 0x10 );
984
qoztmp->leds[st] = 1;
986
qoztmp->st[st].l1up = 0;
987
if (qoztmp->stports == 8) {
988
sprintf(qoztmp->spans[st].desc,"octoBRI PCI ISDN Card %d Span %d [NT] Layer 1 DEACTIVATED (G%d)",qoztmp->cardno ,st + 1, l1state);
989
} else if (qoztmp->stports == 2) {
990
sprintf(qoztmp->spans[st].desc,"duoBRI PCI ISDN Card %d Span %d [NT] (cardID %d) Layer 1 DEACTIVATED (G%d)",qoztmp->cardno ,st + 1,qoztmp->cardID, l1state);
992
sprintf(qoztmp->spans[st].desc,"quadBRI PCI ISDN Card %d Span %d [NT] (cardID %d) Layer 1 DEACTIVATED (G%d)",qoztmp->cardno ,st + 1,qoztmp->cardID, l1state);
994
qoztmp->leds[st] = 0;
998
printk(KERN_INFO "card %d span %d state F%d (A_ST_RD_STA = %#x)\n",qoztmp->cardno,st+1,l1state,qoz_inb(qoztmp,qoz_A_ST_RD_STA));
1001
qoztmp->st[st].l1up = 0;
1002
if (qoztmp->st[st].t3 > -1) {
1003
/* keep layer1 up, if the span is started. */
1004
if (qoztmp->spans[st].flags & ZT_FLAG_RUNNING) {
1006
printk("qozap: re-activating layer1 span %d\n", st);
1007
qoz_outb(qoztmp,qoz_A_ST_WR_STA,0x60);
1011
printk("qozap: not re-activating layer1 span %d\n", st);
1012
qoz_outb(qoztmp,qoz_A_ST_WR_STA,0x40);
1013
/* if we tried to activate layer 1 and it failed make this an alarm */
1014
// qoztmp->spans[st].alarms = ZT_ALARM_RED;
1015
// zt_alarm_notify(&qoztmp->spans[st]);
1016
/* if the network shuts us down in idle mode dont make this an alarm */
1018
qoztmp->leds[st] = 0;
1019
if (qoztmp->stports == 8) {
1020
sprintf(qoztmp->spans[st].desc,"octoBRI PCI ISDN Card %d Span %d [TE] Layer 1 DEACTIVATED (F%d)",qoztmp->cardno ,st + 1, l1state);
1021
} else if (qoztmp->stports == 2) {
1022
sprintf(qoztmp->spans[st].desc,"duoBRI PCI ISDN Card %d Span %d [TE] (cardID %d) Layer 1 DEACTIVATED (F%d)",qoztmp->cardno ,st + 1,qoztmp->cardID, l1state);
1024
sprintf(qoztmp->spans[st].desc,"quadBRI PCI ISDN Card %d Span %d [TE] (cardID %d) Layer 1 DEACTIVATED (F%d)",qoztmp->cardno ,st + 1,qoztmp->cardID, l1state);
1026
} else if (l1state == 7) {
1027
qoztmp->st[st].l1up = 1;
1028
/* reset D RX fifo */
1029
qoz_outb(qoztmp,qoz_R_FIFO,((st + offset) << 1) | 1);
1030
qoz_waitbusy(qoztmp);
1031
qoz_outb(qoztmp,qoz_R_INC_RES_FIFO,0x2);
1032
qoz_waitbusy(qoztmp);
1033
/* activation complete, stop timer t3 */
1034
qoztmp->st[st].t3 = -1;
1035
qoztmp->spans[st].alarms = ZT_ALARM_NONE;
1036
zt_alarm_notify(&qoztmp->spans[st]);
1037
qoztmp->leds[st] = 1;
1038
if (qoztmp->stports == 8) {
1039
sprintf(qoztmp->spans[st].desc,"octoBRI PCI ISDN Card %d Span %d [TE] Layer 1 ACTIVATED (F%d)",qoztmp->cardno ,st + 1, l1state);
1040
} else if (qoztmp->stports == 2) {
1041
sprintf(qoztmp->spans[st].desc,"duoBRI PCI ISDN Card %d Span %d [TE] (cardID %d) Layer 1 ACTIVATED (F%d)",qoztmp->cardno ,st + 1,qoztmp->cardID, l1state);
1043
sprintf(qoztmp->spans[st].desc,"quadBRI PCI ISDN Card %d Span %d [TE] (cardID %d) Layer 1 ACTIVATED (F%d)",qoztmp->cardno ,st + 1,qoztmp->cardID, l1state);
1045
} else if (l1state == 8) {
1048
printk(KERN_INFO "qozap: starting t4 for span %d\n", st);
1049
qoztmp->st[st].t4 = 0;
1051
qoztmp->st[st].l1up = 0;
1052
qoztmp->leds[st] = 0;
1053
if (qoztmp->stports == 8) {
1054
sprintf(qoztmp->spans[st].desc,"octoBRI PCI ISDN Card %d Span %d [TE] Layer 1 DEACTIVATED (F%d)",qoztmp->cardno ,st + 1, l1state);
1055
} else if (qoztmp->stports == 2) {
1056
sprintf(qoztmp->spans[st].desc,"duoBRI PCI ISDN Card %d Span %d [TE] (cardID %d) Layer 1 DEACTIVATED (F%d)",qoztmp->cardno ,st + 1,qoztmp->cardID, l1state);
1058
sprintf(qoztmp->spans[st].desc,"quadBRI PCI ISDN Card %d Span %d [TE] (cardID %d) Layer 1 DEACTIVATED (F%d)",qoztmp->cardno ,st + 1,qoztmp->cardID, l1state);
1066
spin_unlock_irqrestore(&(qoztmp->lock), flags);
1071
if (status & 0x40) {
1072
spin_lock_irqsave(&(qoztmp->lock), flags);
1073
irq_misc = qoz_inb(qoztmp,qoz_R_IRQ_MISC);
1074
spin_unlock_irqrestore(&(qoztmp->lock), flags);
1075
if (irq_misc & 0x2) {
1079
if (qoztmp->ticks % 100) {
1082
if (qoztmp->ticks % 40) {
1083
/* you thought that 42 was the answer.... */
1086
if (qoztmp->ticks > 1000) {
1088
for (j=0;j<qoztmp->stports;j++) {
1090
if (qoztmp->st[j].t3 >= 0) {
1093
if (qoztmp->st[j].nt_mode != 1) {
1094
if ((qoztmp->st[j].t3 > qoz_T3) && (qoztmp->st[j].layer1state != 7)) {
1095
/* deactivate layer 1 */
1097
printk(KERN_INFO "qozap: t3 timer expired for span %d\n", j);
1098
spin_lock_irqsave(&(qoztmp->lock), flags);
1099
qoz_outb(qoztmp,qoz_R_ST_SEL, j);
1100
qoz_outb(qoztmp,qoz_A_ST_WR_STA, 0x40 );
1101
qoz_waitbusy(qoztmp);
1102
qoztmp->st[j].t3 = -1;
1103
qoztmp->spans[j].alarms = ZT_ALARM_RED;
1104
spin_unlock_irqrestore(&(qoztmp->lock), flags);
1105
zt_alarm_notify_no_master_change(&qoztmp->spans[j]);
1109
if (qoztmp->st[j].t4 >= 0) {
1112
if (qoztmp->st[j].nt_mode != 1) {
1113
if ((qoztmp->st[j].t4 > qoz_T4) && (qoztmp->st[j].layer1state != 7)) {
1114
/* deactivate layer 1 */
1116
printk(KERN_INFO "qozap: t4 timer expired for span %d\n", j);
1117
spin_lock_irqsave(&(qoztmp->lock), flags);
1118
qoz_outb(qoztmp,qoz_R_ST_SEL, j);
1119
qoz_outb(qoztmp,qoz_A_ST_WR_STA, 0x40 );
1120
qoztmp->st[j].t4 = -1;
1121
qoztmp->st[st].l1up = 0;
1122
qoztmp->spans[j].alarms = ZT_ALARM_RED;
1123
qoz_waitbusy(qoztmp);
1124
spin_unlock_irqrestore(&(qoztmp->lock), flags);
1125
zt_alarm_notify_no_master_change(&qoztmp->spans[j]);
1131
if (irq_misc & 0x4) {
1132
// printk(KERN_INFO "qozap proc/nonproc irq\n");
1136
if (status & 0x80) {
1138
spin_lock_irqsave(&(qoztmp->lock), flags);
1139
irq_foview = qoz_inb(qoztmp,qoz_R_IRQ_OVIEW);
1140
if ((qoztmp->type == 0xb552) || (qoztmp->type == 0xb55b)) {
1141
if (irq_foview & 0x60) {
1143
fi = qoz_inb(qoztmp,qoz_R_IRQ_FIFO_BL6);
1144
for (i=0; i < 8; i++) {
1145
if (fi & (1 << i)) {
1146
st = offset + (i / 2);
1149
printk(KERN_CRIT "qozap: HDLC RX irq fifo %d span %d\n", i, st+1);
1150
qoztmp->st[st].drx += 1;
1153
printk(KERN_CRIT "qozap: HDLC TX irq fifo %d span %d\n", i, st+1);
1158
if (irq_foview & 0x80) {
1160
fi = qoz_inb(qoztmp,qoz_R_IRQ_FIFO_BL7);
1161
for (i=0; i < 8; i++) {
1162
if (fi & (1 << i)) {
1163
st = offset + (i / 2);
1166
printk(KERN_CRIT "qozap: HDLC RX irq fifo %d span %d\n", i, st+1);
1167
qoztmp->st[st].drx += 1;
1170
printk(KERN_CRIT "qozap: HDLC TX irq fifo %d span %d\n", i, st+1);
1176
if (irq_foview & 0x80) {
1177
fi = qoz_inb(qoztmp,qoz_R_IRQ_FIFO_BL7);
1178
for (i=0; i < 8; i++) {
1179
if (fi & (1 << i)) {
1183
printk(KERN_CRIT "qozap: HDLC RX irq fifo %d span %d\n", i, st+1);
1184
qoztmp->st[st].drx += 1;
1187
printk(KERN_CRIT "qozap: HDLC TX irq fifo %d span %d\n", i, st+1);
1193
spin_unlock_irqrestore(&(qoztmp->lock), flags);
1197
return IRQ_RETVAL(1);
1201
static int ztqoz_open(struct zt_chan *chan) {
1202
// printk(KERN_INFO "qozap: channel %d opened.\n",chan->channo);
1206
try_module_get(THIS_MODULE);
1211
static int ztqoz_close(struct zt_chan *chan) {
1212
// printk(KERN_INFO "qozap: channel %d closed.\n",chan->channo);
1216
module_put(THIS_MODULE);
1221
static int ztqoz_rbsbits(struct zt_chan *chan, int bits) {
1225
static int ztqoz_ioctl(struct zt_chan *chan, unsigned int cmd, unsigned long data) {
1233
static int ztqoz_startup(struct zt_span *span) {
1234
struct qoz_card *qoztmp = span->pvt;
1235
unsigned long flags;
1240
if (qoztmp == NULL) {
1241
printk(KERN_INFO "qozap: no card for span at startup!\n");
1244
alreadyrunning = span->flags & ZT_FLAG_RUNNING;
1245
// printk(KERN_CRIT "already running %d flags %d\n", alreadyrunning, span->flags);
1247
if (!alreadyrunning) {
1248
span->chans[2].flags &= ~ZT_FLAG_HDLC;
1249
span->chans[2].flags |= ZT_FLAG_BRIDCHAN;
1251
/* setup B channel buffers (8 bytes each) */
1252
for (i=0; i<2 ; i++) {
1253
memset(qoztmp->rxbuf[span->offset][i],0x0,sizeof(qoztmp->rxbuf[span->offset][i]));
1254
span->chans[i].readchunk = qoztmp->rxbuf[span->offset][i];
1255
memset(qoztmp->txbuf[span->offset][i],0x0,sizeof(qoztmp->txbuf[span->offset][i]));
1256
span->chans[i].writechunk = qoztmp->txbuf[span->offset][i];
1258
/* setup D channel buffer */
1259
memset(qoztmp->dtxbuf[span->offset],0x0,sizeof(qoztmp->dtxbuf[span->offset]));
1260
span->chans[2].writechunk = qoztmp->dtxbuf[span->offset];
1261
qoztmp->chans[span->offset][2].maxbytes2transmit = sizeof(qoztmp->dtxbuf[span->offset]);
1263
memset(qoztmp->drxbuf[span->offset],0x0,sizeof(qoztmp->drxbuf[span->offset]));
1264
span->chans[2].readchunk = qoztmp->drxbuf[span->offset];
1266
span->flags |= ZT_FLAG_RUNNING;
1268
// printk(KERN_CRIT "already running\n");
1272
if (pcmslave && !span->offset) {
1273
set_current_state(TASK_UNINTERRUPTIBLE);
1274
schedule_timeout((100 * HZ) / 1000);
1277
spin_lock_irqsave(&qoztmp->lock,flags);
1278
if (pcmslave && !span->offset) {
1280
printk(KERN_INFO "qozap: resetting PCM interface to slave mode\n");
1281
qoz_reset_pcm(qoztmp);
1285
qoz_outb(qoztmp,qoz_R_IRQ_CTRL, 0);
1287
if (qoztmp->type == 0xb552) {
1289
} else if (qoztmp->type == 0xb55b) {
1295
/* setup D-FIFO TX */
1296
qoz_outb(qoztmp,qoz_R_FIFO,(span->offset + offset) << 1);
1297
qoz_waitbusy(qoztmp);
1298
qoz_outb(qoztmp,qoz_R_INC_RES_FIFO,0x2);
1299
qoz_waitbusy(qoztmp);
1300
qoz_outb(qoztmp,qoz_A_CON_HDLC,0xD);
1301
qoz_outb(qoztmp,qoz_A_SUBCH_CFG,0x2);
1302
qoz_outb(qoztmp,qoz_A_CHANNEL,((span->offset * 4) + 2) << 1);
1303
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x1);
1305
/* setup D-FIFO RX */
1306
qoz_outb(qoztmp,qoz_R_FIFO,((span->offset + offset) << 1) | 1);
1307
qoz_waitbusy(qoztmp);
1308
qoz_outb(qoztmp,qoz_R_INC_RES_FIFO,0x2);
1309
qoz_waitbusy(qoztmp);
1310
qoz_outb(qoztmp,qoz_A_CON_HDLC,0xD);
1311
qoz_outb(qoztmp,qoz_A_SUBCH_CFG,0x2);
1312
qoz_outb(qoztmp,qoz_A_CHANNEL,(((span->offset * 4) + 2) << 1) | 1);
1313
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x1);
1315
/* setup B1-FIFO TX */
1316
qoz_outb(qoztmp,qoz_R_FIFO,(span->offset * 2) << 1);
1317
qoz_waitbusy(qoztmp);
1318
qoz_outb(qoztmp,qoz_R_INC_RES_FIFO,0x2);
1319
qoz_waitbusy(qoztmp);
1320
qoz_outb(qoztmp,qoz_A_CON_HDLC,0x2);
1321
qoz_outb(qoztmp,qoz_A_CHANNEL,(span->offset * 4) << 1);
1322
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x1);
1324
/* setup B1-FIFO RX */
1325
qoz_outb(qoztmp,qoz_R_FIFO,((span->offset * 2) << 1) | 1);
1326
qoz_waitbusy(qoztmp);
1327
qoz_outb(qoztmp,qoz_R_INC_RES_FIFO,0x2);
1328
qoz_waitbusy(qoztmp);
1329
qoz_outb(qoztmp,qoz_A_CON_HDLC,0x2);
1330
qoz_outb(qoztmp,qoz_A_CHANNEL,((span->offset * 4) << 1) | 1);
1331
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x1);
1333
/* setup B2-FIFO TX */
1334
qoz_outb(qoztmp,qoz_R_FIFO,((span->offset * 2) + 1) << 1);
1335
qoz_waitbusy(qoztmp);
1336
qoz_outb(qoztmp,qoz_R_INC_RES_FIFO,0x2);
1337
qoz_waitbusy(qoztmp);
1338
qoz_outb(qoztmp,qoz_A_CON_HDLC,0x2);
1339
qoz_outb(qoztmp,qoz_A_CHANNEL,((span->offset * 4) + 1) << 1);
1340
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x1);
1342
/* setup B2-FIFO RX */
1343
qoz_outb(qoztmp,qoz_R_FIFO,(((span->offset * 2) + 1) << 1) | 1);
1344
qoz_waitbusy(qoztmp);
1345
qoz_outb(qoztmp,qoz_R_INC_RES_FIFO,0x2);
1346
qoz_waitbusy(qoztmp);
1347
qoz_outb(qoztmp,qoz_A_CON_HDLC,0x2);
1348
qoz_outb(qoztmp,qoz_A_CHANNEL,((((span->offset) * 4) + 1) << 1) | 1);
1349
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x1);
1352
printk(KERN_INFO "qozap: starting card %d span %d/%d.\n",qoztmp->cardno,span->spanno,span->offset);
1354
/* activate layer 1 */
1355
qoz_outb(qoztmp,qoz_R_ST_SEL,span->offset);
1356
if (qoztmp->st[span->offset].nt_mode == 1) {
1358
qoz_outb(qoztmp,qoz_A_ST_CTRL0,0x7);
1359
qoz_outb(qoztmp,qoz_A_ST_CTRL1,0x0);
1360
qoz_outb(qoztmp,qoz_A_ST_CTRL2,0x3);
1361
qoz_outb(qoztmp,qoz_A_ST_CLK_DLY,0x60 | CLKDEL_NT);
1364
qoz_outb(qoztmp,qoz_A_ST_CTRL0,0x3);
1365
qoz_outb(qoztmp,qoz_A_ST_CTRL1,0x0);
1366
qoz_outb(qoztmp,qoz_A_ST_CTRL2,0x3);
1367
if (qoztmp->type == 0xb550) {
1368
qoz_outb(qoztmp,qoz_A_ST_CLK_DLY,CLKDEL_TE);
1370
qoz_outb(qoztmp,qoz_A_ST_CLK_DLY,CLKDEL_TE + 1);
1373
qoztmp->st[span->offset].t3 = 0;
1374
qoztmp->st[span->offset].t4 = -1;
1376
qoz_outb(qoztmp,qoz_R_ST_SEL,span->offset);
1377
if (qoztmp->st[span->offset].nt_mode == 1) {
1378
qoz_outb(qoztmp,qoz_A_ST_WR_STA,0x80);
1380
qoz_outb(qoztmp,qoz_A_ST_WR_STA,0x0);
1384
qoz_outb(qoztmp,qoz_R_ST_SEL,span->offset);
1385
if (qoztmp->st[span->offset].nt_mode == 1) {
1386
qoz_outb(qoztmp,qoz_A_ST_WR_STA,0x60 | 0x80); // ACT, G2->G3 EN
1388
qoz_outb(qoztmp,qoz_A_ST_WR_STA,0x60); // start Activation
1392
qoz_outb(qoztmp,qoz_R_IRQ_CTRL, 8 | 1);
1394
spin_unlock_irqrestore(&qoztmp->lock,flags);
1398
static int ztqoz_shutdown(struct zt_span *span) {
1399
unsigned long flags;
1400
struct qoz_card *qoztmp = span->pvt;
1404
if (qoztmp == NULL) {
1405
printk(KERN_CRIT "qozap: qoztmp == NULL!\n");
1410
alreadyrunning = span->flags & ZT_FLAG_RUNNING;
1412
if (!alreadyrunning) {
1416
// printk(KERN_CRIT "qozap: stopping card %d port %d.\n",qoztmp->cardno, span->offset + 1);
1418
spin_lock_irqsave(&qoztmp->lock,flags);
1419
// turn off irqs for all fifos
1420
if (qoztmp->type == 0xb552) {
1422
} else if (qoztmp->type == 0xb55b) {
1428
/* disable D TX fifo */
1429
qoz_outb(qoztmp,qoz_R_FIFO,(span->offset + offset) << 1);
1430
qoz_waitbusy(qoztmp);
1431
qoz_outb(qoztmp,qoz_A_CON_HDLC,0x1);
1432
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x0);
1434
/* disable D RX fifo */
1435
qoz_outb(qoztmp,qoz_R_FIFO,((span->offset + offset) << 1) | 1);
1436
qoz_waitbusy(qoztmp);
1437
qoz_outb(qoztmp,qoz_A_CON_HDLC,0x1);
1438
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x0);
1440
/* disable B1 TX fifo */
1441
qoz_outb(qoztmp,qoz_R_FIFO,(span->offset * 2) << 1);
1442
qoz_waitbusy(qoztmp);
1443
qoz_outb(qoztmp,qoz_A_CON_HDLC,0x2);
1444
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x0);
1446
/* disable B1 RX fifo */
1447
qoz_outb(qoztmp,qoz_R_FIFO,((span->offset * 2) << 1) | 1);
1448
qoz_waitbusy(qoztmp);
1449
qoz_outb(qoztmp,qoz_A_CON_HDLC,0x2);
1450
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x0);
1452
/* disable B2 TX fifo */
1453
qoz_outb(qoztmp,qoz_R_FIFO,(((span->offset) * 2) + 1) << 1);
1454
qoz_waitbusy(qoztmp);
1455
qoz_outb(qoztmp,qoz_A_CON_HDLC,0x2);
1456
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x0);
1458
/* disable B2 RX fifo */
1459
qoz_outb(qoztmp,qoz_R_FIFO,((((span->offset) * 2) + 1) << 1) | 1);
1460
qoz_waitbusy(qoztmp);
1461
qoz_outb(qoztmp,qoz_A_CON_HDLC,0x2);
1462
qoz_outb(qoztmp,qoz_A_IRQ_MSK,0x0);
1464
span->flags &= ~ZT_FLAG_RUNNING;
1466
/* Deactivate Layer 1 */
1467
qoz_outb(qoztmp,qoz_R_ST_SEL,span->offset);
1468
if (qoztmp->st[span->offset].nt_mode == 1) {
1469
qoz_outb(qoztmp,qoz_A_ST_WR_STA,0x40);
1471
qoz_outb(qoztmp,qoz_A_ST_WR_STA,0x40);
1475
spin_unlock_irqrestore(&qoztmp->lock,flags);
1476
// printk(KERN_CRIT "qozap: card %d span %d/%d down.\n",qoztmp->cardno,span->spanno,span->offset);
1480
static int ztqoz_maint(struct zt_span *span, int cmd) {
1484
static int ztqoz_chanconfig(struct zt_chan *chan,int sigtype) {
1485
// printk(KERN_INFO "chan_config sigtype=%d\n",sigtype);
1489
static int ztqoz_spanconfig(struct zt_span *span,struct zt_lineconfig *lc) {
1490
struct qoz_card *qoztmp = span->pvt;
1491
span->lineconfig = lc->lineconfig;
1492
qoztmp->st_sync[span->offset] = lc->sync;
1493
qoztmp->syncsrc = -1;
1497
static int ztqoz_initialize(struct qoz_card *qoztmp) {
1500
for (s=0; s < qoztmp->stports; s++) {
1501
memset(&qoztmp->spans[s],0,sizeof(struct zt_span));
1502
sprintf(qoztmp->spans[s].name,"ztqoz/%d/%d",qoztmp->cardno ,s + 1);
1503
if (qoztmp->stports == 8) {
1504
if (qoztmp->st[s].nt_mode == 1){
1505
sprintf(qoztmp->spans[s].desc,"octoBRI PCI ISDN Card %d Span %d [NT]",qoztmp->cardno,s + 1);
1507
sprintf(qoztmp->spans[s].desc,"octoBRI PCI ISDN Card %d Span %d [TE]",qoztmp->cardno,s + 1);
1509
} else if (qoztmp->stports == 2) {
1510
if (qoztmp->st[s].nt_mode == 1){
1511
sprintf(qoztmp->spans[s].desc,"duoBRI PCI ISDN Card %d Span %d [NT]",qoztmp->cardno,s + 1);
1513
sprintf(qoztmp->spans[s].desc,"duoBRI PCI ISDN Card %d Span %d [TE]",qoztmp->cardno,s + 1);
1516
if (qoztmp->cardID < 0xff) {
1517
if (qoztmp->st[s].nt_mode == 1){
1518
sprintf(qoztmp->spans[s].desc,"quadBRI PCI ISDN Card %d Span %d [NT] (cardID %d)",qoztmp->cardno,s + 1,qoztmp->cardID);
1520
sprintf(qoztmp->spans[s].desc,"quadBRI PCI ISDN Card %d Span %d [TE] (cardID %d)",qoztmp->cardno,s + 1,qoztmp->cardID);
1523
if (qoztmp->st[s].nt_mode == 1){
1524
sprintf(qoztmp->spans[s].desc,"quadBRI PCI ISDN Card %d Span %d [NT]",qoztmp->cardno,s + 1);
1526
sprintf(qoztmp->spans[s].desc,"quadBRI PCI ISDN Card %d Span %d [TE]",qoztmp->cardno,s + 1);
1531
qoztmp->spans[s].spanconfig = ztqoz_spanconfig;
1532
qoztmp->spans[s].chanconfig = ztqoz_chanconfig;
1533
qoztmp->spans[s].startup = ztqoz_startup;
1534
qoztmp->spans[s].shutdown = ztqoz_shutdown;
1535
qoztmp->spans[s].maint = ztqoz_maint;
1536
qoztmp->spans[s].rbsbits = ztqoz_rbsbits;
1537
qoztmp->spans[s].open = ztqoz_open;
1538
qoztmp->spans[s].close = ztqoz_close;
1539
qoztmp->spans[s].ioctl = ztqoz_ioctl;
1540
qoztmp->spans[s].dacs = ztqoz_dacs;
1542
qoztmp->spans[s].chans = qoztmp->chans[s];
1543
qoztmp->spans[s].channels = 3;
1544
qoztmp->spans[s].deflaw = ZT_LAW_ALAW;
1545
qoztmp->spans[s].linecompat = ZT_CONFIG_AMI | ZT_CONFIG_CCS;
1546
init_waitqueue_head(&qoztmp->spans[s].maintq);
1547
qoztmp->spans[s].pvt = qoztmp;
1548
qoztmp->spans[s].offset = s;
1550
for (i=0; i < qoztmp->spans[s].channels; i++) {
1551
memset(&(qoztmp->chans[s][i]),0x0,sizeof(struct zt_chan));
1552
sprintf(qoztmp->chans[s][i].name,"ztqoz%d/%d/%d",qoztmp->cardno,s + 1,i + 1);
1553
qoztmp->chans[s][i].pvt = qoztmp;
1554
qoztmp->chans[s][i].sigcap = ZT_SIG_CLEAR | ZT_SIG_DACS;
1555
qoztmp->chans[s][i].chanpos = i + 1;
1558
if (zt_register(&qoztmp->spans[s],0)) {
1559
printk(KERN_INFO "qozap: unable to register zaptel span %d!\n",s+1);
1562
// printk(KERN_INFO "qozap: registered zaptel span %d.\n",s+1);
1568
int qoz_findCards(unsigned int pcidid) {
1569
struct pci_dev *tmp;
1570
struct qoz_card *qoztmp = NULL;
1572
unsigned char dips=0;
1575
tmp = pci_get_device(PCI_VENDOR_ID_CCD,pcidid,multi_qoz);
1576
while (tmp != NULL) {
1577
multi_qoz = tmp; // skip this next time.
1579
if (pci_enable_device(tmp)) {
1584
qoztmp = kmalloc(sizeof(struct qoz_card),GFP_KERNEL);
1586
printk(KERN_WARNING "qozap: unable to kmalloc!\n");
1587
pci_disable_device(tmp);
1591
memset(qoztmp, 0x0, sizeof(struct qoz_card));
1593
spin_lock_init(&qoztmp->lock);
1594
qoztmp->pcidev = tmp;
1595
qoztmp->pcibus = tmp->bus->number;
1596
qoztmp->pcidevfn = tmp->devfn;
1599
printk(KERN_WARNING "qozap: no irq!\n");
1601
qoztmp->irq = tmp->irq;
1604
qoztmp->pci_io_phys = (char *) tmp->resource[1].start;
1605
if (!qoztmp->pci_io_phys) {
1606
printk(KERN_WARNING "qozap: no iomem!\n");
1607
pci_disable_device(tmp);
1612
qoztmp->ioport = tmp->resource[0].start;
1613
if (!qoztmp->ioport) {
1614
printk(KERN_WARNING "qozap: no ioport!\n");
1615
pci_disable_device(tmp);
1619
if (!request_region(qoztmp->ioport, 8, "qozap")) {
1620
printk(KERN_WARNING "qozap: couldnt request io range!\n");
1621
pci_disable_device(tmp);
1625
if (!request_mem_region((unsigned long) qoztmp->pci_io_phys, 256, "qozap")) {
1626
printk(KERN_WARNING "qozap: couldnt request io mem range!\n");
1627
release_region(qoztmp->ioport, 8);
1628
pci_disable_device(tmp);
1633
if (request_irq(qoztmp->irq, qoz_interrupt, ZAP_IRQ_SHARED, "qozap", qoztmp)) {
1634
printk(KERN_WARNING "qozap: unable to register irq\n");
1636
pci_disable_device(tmp);
1641
qoztmp->pci_io = ioremap((ulong) qoztmp->pci_io_phys, 256);
1643
pci_write_config_word(qoztmp->pcidev, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
1645
qoz_outb(qoztmp,qoz_R_IRQ_CTRL, 0);
1647
qoztmp->type = tmp->subsystem_device;
1648
qoz_resetCard(qoztmp);
1651
if ((tmp->subsystem_device==0xb520) && (pcidid == PCI_DEVICE_ID_CCD_M4)) {
1652
// printk(KERN_INFO "MODES = %#x.\n",modes);
1653
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0x80 | 0x40);
1654
qoz_outb(qoztmp,qoz_R_GPIO_EN1,0x00);
1655
dips = (qoz_inb(qoztmp,qoz_R_GPIO_IN1) >> 5);
1658
if ((dips & (1 << i)) != 0) {
1659
cid -= (1 << (2-i));
1662
// printk(KERN_INFO "DIPS = %#x CID= %#x\n",dips,cid);
1663
} else if ((tmp->subsystem_device==0xb550) && (pcidid == PCI_DEVICE_ID_CCD_M4)) {
1665
// printk(KERN_INFO "MODES = %#x.\n",modes);
1666
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0xF0);
1667
qoz_outb(qoztmp,qoz_R_GPIO_EN0,0x00);
1668
qoz_outb(qoztmp,qoz_R_GPIO_EN1,0x00);
1669
// dips = qoz_inb(qoztmp,qoz_R_GPIO_IN1) >> 5;
1670
dips = ((qoz_inb(qoztmp,qoz_R_GPI_IN3) & 80) >> 1) | ((qoz_inb(qoztmp,qoz_R_GPI_IN3) & 8) << 2) | qoz_inb(qoztmp,qoz_R_GPIO_IN1);
1674
if ((dips & (1 << i)) == 0) {
1679
} else if ((tmp->subsystem_device==0xb556) && (pcidid == PCI_DEVICE_ID_CCD_M4)) {
1682
/* gpi27 1 gpi23 2 */
1683
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0xf0);
1684
qoz_outb(qoztmp,qoz_R_GPIO_EN0,0x00);
1685
qoz_outb(qoztmp,qoz_R_GPIO_EN1,0x00);
1687
/* dips = qoz_inb_io(qoztmp,0x4000);
1688
dips = qoz_inb_io(qoztmp,0x4000);
1689
dips = qoz_inb_io(qoztmp,0x4000);
1690
dips = qoz_inb_io(qoztmp,0x4000);
1692
qoz_outw_io(qoztmp,0x0,0x0); */
1695
} else if ((tmp->subsystem_device==0xb558) && (pcidid == PCI_DEVICE_ID_CCD_M4)) {
1696
/* quadBRI minipCI */
1697
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0xF0);
1698
qoz_outb(qoztmp,qoz_R_GPIO_EN0,0x00);
1699
qoz_outb(qoztmp,qoz_R_GPIO_EN1,0x00);
1700
dips = qoz_inb(qoztmp,qoz_R_GPIO_IN1) >> 5;
1701
/* printk(KERN_INFO "gpio_in1 %#x\n", qoz_inb(qoztmp,qoz_R_GPIO_IN1));
1703
printk(KERN_INFO "gpi_in2 %#x\n", qoz_inb(qoztmp,qoz_R_GPI_IN2));
1704
printk(KERN_INFO "dip1 %#x\n", (qoz_inb(qoztmp,qoz_R_GPI_IN3) & 80) >> 7);
1705
printk(KERN_INFO "gpi_in3 %#x\n", qoz_inb(qoztmp,qoz_R_GPI_IN3));
1706
printk(KERN_INFO "dip2 %#x\n", (qoz_inb(qoztmp,qoz_R_GPI_IN3) & 8) >> 3); >*/
1709
if ((dips & (1 << i)) != 0) {
1713
// printk(KERN_INFO "DIPS = %#x CID= %#x\n",dips,cid);
1715
} else if ((tmp->subsystem_device==0xb55b) && (pcidid == PCI_DEVICE_ID_CCD_M)){
1716
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x21);
1718
dips = ~qoz_inb_io(qoztmp,0x4000);
1719
dips = ~qoz_inb_io(qoztmp,0x4000);
1720
dips = ~qoz_inb_io(qoztmp,0x4000);
1721
dips = ~qoz_inb_io(qoztmp,0x4000);
1724
qoz_outw_io(qoztmp,0x0,0x0);
1728
if ((dips & (1 << i)) != 0) {
1732
qoz_outb(qoztmp,qoz_R_BRG_PCM_CFG,0x20);
1733
printk(KERN_CRIT "dips = %#x cid = %d\n", dips, cid);
1734
} else if (((tmp->subsystem_device==0xb752) || (tmp->subsystem_device==0xb751)) && (pcidid == PCI_DEVICE_ID_CCD_M4)){
1735
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0xF0);
1736
qoz_outb(qoztmp,qoz_R_GPIO_EN0,0x00);
1737
qoz_outb(qoztmp,qoz_R_GPIO_EN1,0x00);
1738
// dips = qoz_inb(qoztmp,qoz_R_GPIO_IN1) >> 5;
1739
dips = ((qoz_inb(qoztmp,qoz_R_GPI_IN3) & 80) >> 1) | ((qoz_inb(qoztmp,qoz_R_GPI_IN3) & 8) << 2) | qoz_inb(qoztmp,qoz_R_GPIO_IN1);
1743
if ((dips & (1 << i)) == 0) {
1747
printk(KERN_CRIT "dips = %#x cid = %d\n", dips, cid);
1753
if ((tmp->subsystem_device==0xb520) && (pcidid == PCI_DEVICE_ID_CCD_M4)) {
1754
modes = qoz_inb(qoztmp,qoz_R_GPI_IN3) >> 4;
1755
} else if ((tmp->subsystem_device==0xb550) && (pcidid == PCI_DEVICE_ID_CCD_M4)) {
1756
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0xf0);
1757
qoz_outb(qoztmp,qoz_R_GPIO_EN0,0x00);
1759
printk(KERN_CRIT "gpio_in0 %#x \n", qoz_inb(qoztmp,qoz_R_GPIO_IN0));
1760
printk(KERN_CRIT "gpio_in1 %#x \n", qoz_inb(qoztmp,qoz_R_GPIO_IN1));
1761
printk(KERN_CRIT "gpi_in1 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN1));
1762
printk(KERN_CRIT "gpi_in2 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN2));
1763
printk(KERN_CRIT "gpi_in3 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN3));
1765
modes = qoz_inb(qoztmp,qoz_R_GPI_IN3) >> 4;
1766
} else if ((tmp->subsystem_device==0xb558) && (pcidid == PCI_DEVICE_ID_CCD_M4)) {
1767
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0xf0);
1768
qoz_outb(qoztmp,qoz_R_GPIO_EN0,0x00);
1770
printk(KERN_CRIT "gpio_in0 %#x \n", qoz_inb(qoztmp,qoz_R_GPIO_IN0));
1771
printk(KERN_CRIT "gpio_in1 %#x \n", qoz_inb(qoztmp,qoz_R_GPIO_IN1));
1772
printk(KERN_CRIT "gpi_in1 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN1));
1773
printk(KERN_CRIT "gpi_in2 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN2));
1774
printk(KERN_CRIT "gpi_in3 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN3));
1776
modes = qoz_inb(qoztmp,qoz_R_GPI_IN3) >> 4;
1777
} else if ((tmp->subsystem_device==0xb556) && (pcidid == PCI_DEVICE_ID_CCD_M4)) {
1778
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0xf0);
1779
qoz_outb(qoztmp,qoz_R_GPIO_EN0,0x00);
1781
printk(KERN_CRIT "gpio_in0 %#x \n", qoz_inb(qoztmp,qoz_R_GPIO_IN0));
1782
printk(KERN_CRIT "gpio_in1 %#x \n", qoz_inb(qoztmp,qoz_R_GPIO_IN1));
1783
printk(KERN_CRIT "gpi_in1 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN1));
1784
printk(KERN_CRIT "gpi_in2 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN2));
1785
printk(KERN_CRIT "gpi_in3 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN3));
1787
modes = qoz_inb(qoztmp,qoz_R_GPI_IN3) >> 4;
1788
} else if ((tmp->subsystem_device==0xb751) && (pcidid == PCI_DEVICE_ID_CCD_M4)) {
1789
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0xf0);
1790
qoz_outb(qoztmp,qoz_R_GPIO_EN0,0x00);
1792
printk(KERN_CRIT "gpio_in0 %#x \n", qoz_inb(qoztmp,qoz_R_GPIO_IN0));
1793
printk(KERN_CRIT "gpio_in1 %#x \n", qoz_inb(qoztmp,qoz_R_GPIO_IN1));
1794
printk(KERN_CRIT "gpi_in1 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN1));
1795
printk(KERN_CRIT "gpi_in2 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN2));
1796
printk(KERN_CRIT "gpi_in3 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN3));
1798
modes = qoz_inb(qoztmp,qoz_R_GPI_IN3) >> 4;
1799
} else if ((tmp->subsystem_device==0xb752) && (pcidid == PCI_DEVICE_ID_CCD_M4)) {
1800
qoz_outb(qoztmp,qoz_R_GPIO_SEL,0xf0);
1801
qoz_outb(qoztmp,qoz_R_GPIO_EN0,0x00);
1803
printk(KERN_CRIT "gpio_in0 %#x \n", qoz_inb(qoztmp,qoz_R_GPIO_IN0));
1804
printk(KERN_CRIT "gpio_in1 %#x \n", qoz_inb(qoztmp,qoz_R_GPIO_IN1));
1805
printk(KERN_CRIT "gpi_in1 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN1));
1806
printk(KERN_CRIT "gpi_in2 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN2));
1807
printk(KERN_CRIT "gpi_in3 %#x \n", qoz_inb(qoztmp,qoz_R_GPI_IN3));
1809
modes = qoz_inb(qoztmp,qoz_R_GPI_IN3) >> 4;
1811
modes = 0; // assume TE mode
1814
modes = ports >> totalBRIs;
1817
if (pcidid == PCI_DEVICE_ID_CCD_M4) {
1818
switch (tmp->subsystem_device) {
1820
if (ports == -1) ports = 0; /* assume TE mode if no ports param */
1822
"qozap: CologneChip HFC-4S evaluation board configured at io port %#x IRQ %d HZ %d\n",
1823
(u_int) qoztmp->ioport,
1829
"qozap: Junghanns.NET quadBRI card configured at io port %#x IRQ %d HZ %d CardID %d\n",
1830
(u_int) qoztmp->ioport,
1831
qoztmp->irq, HZ, cid);
1836
"qozap: Junghanns.NET quadBRI (Version 2.0) card configured at io port %#x IRQ %d HZ %d CardID %d\n",
1837
(u_int) qoztmp->ioport,
1838
qoztmp->irq, HZ, cid);
1843
"qozap: Junghanns.NET duoBRI card configured at io port %#x IRQ %d HZ %d CardID %d\n",
1844
(u_int) qoztmp->ioport,
1845
qoztmp->irq, HZ, cid);
1850
"qozap: Junghanns.NET duoBRI miniPCI card configured at io port %#x IRQ %d HZ %d CardID %d\n",
1851
(u_int) qoztmp->ioport,
1852
qoztmp->irq, HZ, cid);
1857
"qozap: Junghanns.NET duoBRI PCIe card configured at io port %#x IRQ %d HZ %d CardID %d\n",
1858
(u_int) qoztmp->ioport,
1859
qoztmp->irq, HZ, cid);
1864
"qozap: Junghanns.NET quadBRI miniPCI card configured at io port %#x IRQ %d HZ %d CardID %d\n",
1865
(u_int) qoztmp->ioport,
1866
qoztmp->irq, HZ, cid);
1871
"qozap: Junghanns.NET quadBRI PCIe card configured at io port %#x IRQ %d HZ %d CardID %d\n",
1872
(u_int) qoztmp->ioport,
1873
qoztmp->irq, HZ, cid);
1878
switch (tmp->subsystem_device) {
1881
"qozap: Junghanns.NET octoBRI card configured at io port %#x IRQ %d HZ %d\n",
1882
(u_int) qoztmp->ioport,
1887
"qozap: Junghanns.NET octoBRI (Version 2.0) card configured at io port %#x IRQ %d HZ %d\n",
1888
(u_int) qoztmp->ioport,
1894
if (qoztmp->pcidev != NULL) {
1895
pci_disable_device(qoztmp->pcidev);
1897
pci_write_config_word(qoztmp->pcidev, PCI_COMMAND, 0);
1898
free_irq(qoztmp->irq,qoztmp);
1901
tmp = pci_get_device(PCI_VENDOR_ID_CCD,pcidid,multi_qoz);
1908
qoztmp->cardID = cid;
1909
qoztmp->type = tmp->subsystem_device;
1911
printk(KERN_INFO "qozap: S/T ports: %d [",qoztmp->stports);
1912
for (i=0;i<qoztmp->stports;i++) {
1913
qoztmp->st_sync[i] = 0;
1914
if ((modes & (1 << i)) != 0) {
1915
qoztmp->st[i].nt_mode = 1;
1918
qoztmp->st[i].nt_mode = 0;
1924
qoz_registerCard(qoztmp);
1925
tmp = pci_get_device(PCI_VENDOR_ID_CCD,pcidid,multi_qoz);
1931
int qoz_sortCards(void) {
1932
int changed=0,tmpcardno;
1933
struct qoz_card *tmpcard,*tmpcard2;
1934
spin_lock(®isterlock);
1937
tmpcard = qoz_dev_list;
1938
while (tmpcard != NULL) {
1939
if (tmpcard->prev) {
1940
if (tmpcard->prev->cardID > tmpcard->cardID) {
1941
tmpcardno = tmpcard->prev->cardno;
1942
tmpcard->prev->cardno = tmpcard->cardno;
1943
tmpcard->cardno = tmpcardno;
1945
tmpcard2 = tmpcard->prev;
1946
if (tmpcard2->prev) {
1947
tmpcard2->prev->next = tmpcard;
1949
qoz_dev_list = tmpcard;
1951
if (tmpcard->next) {
1952
tmpcard->next->prev = tmpcard2;
1954
tmpcard2->next = tmpcard->next;
1955
tmpcard->prev = tmpcard2->prev;
1956
tmpcard->next = tmpcard2;
1957
tmpcard2->prev = tmpcard;
1962
tmpcard = tmpcard->next;
1964
} while (changed == 1);
1965
spin_unlock(®isterlock);
1969
int qoz_zapCards(void) {
1970
struct qoz_card *tmpcard;
1971
tmpcard = qoz_dev_list;
1972
while (tmpcard != NULL) {
1973
ztqoz_initialize(tmpcard);
1974
tmpcard = tmpcard->next;
1980
int init_module(void) {
1982
qoz_findCards(PCI_DEVICE_ID_CCD_M4);
1984
qoz_findCards(PCI_DEVICE_ID_CCD_M);
1989
if (qoz_dev_count == 0) {
1990
printk(KERN_INFO "qozap: no multiBRI cards found.\n");
1992
printk(KERN_INFO "qozap: %d multiBRI card(s) in this box, %d BRI ports total, bloop %d, pcmslave %d, dacs %d.\n",qoz_dev_count, totalBRIs, bloop, pcmslave, dacs);
1997
void cleanup_module(void) {
1998
struct qoz_card *tmpcard,*tmplist;
2000
tmplist = qoz_dev_list;
2001
while (tmplist != NULL) {
2003
qoz_resetCard(tmplist);
2004
qoz_undoWD(tmplist);
2005
qoz_shutdownCard(tmplist);
2006
tmplist = tmplist->next;
2008
tmplist = qoz_dev_list;
2009
spin_lock(®isterlock);
2010
while (tmplist != NULL) {
2011
tmpcard = tmplist->next;
2016
spin_unlock(®isterlock);
2017
printk(KERN_INFO "qozap: shutdown %d multiBRI cards.\n", i);
2022
module_param(doubleclock, int, 0600);
2023
module_param(ports, int, 0600);
2024
module_param(pcmslave, int, 0600);
2025
module_param(bloop, int, 0600);
2026
module_param(debug, int, 0600);
2027
module_param(dacs, int, 0600);
2028
module_param(sort, int, 0600);
2030
MODULE_PARM(doubleclock,"i");
2031
MODULE_PARM(ports,"i");
2032
MODULE_PARM(pcmslave,"i");
2033
MODULE_PARM(bloop,"i");
2034
MODULE_PARM(debug,"i");
2035
MODULE_PARM(dacs,"i");
2036
MODULE_PARM(sort,"i");
2040
MODULE_DESCRIPTION("quad/octo BRI zaptel driver");
2041
MODULE_AUTHOR("Klaus-Peter Junghanns <kpj@junghanns.net>");
2042
#ifdef MODULE_LICENSE
2043
MODULE_LICENSE("GPL");