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* Digium, Inc. Wildcard TE12xP T1/E1 card Driver
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* Written by Michael Spiceland <mspiceland@digium.com>
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* Adapted from the wctdm24xxp and wcte11xp drivers originally
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* written by Mark Spencer <markster@digium.com>
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* Matthew Fredrickson <creslin@digium.com>
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* William Meadows <wmeadows@digium.com>
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* Copyright (C) 2007-2008, Digium, Inc.
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* All rights reserved.
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <linux/proc_fs.h>
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#include <linux/moduleparam.h>
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#include "../wct4xxp/wct4xxp.h" /* For certain definitions */
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#include "../voicebus.h"
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#if defined(VPM_SUPPORT)
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#include "vpmadt032.h"
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struct pci_driver te12xp_driver;
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static int chanmap_t1[] =
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static int chanmap_e1[] =
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static int chanmap_e1uc[] =
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static int j1mode = 0;
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static int alarmdebounce = 0;
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static int loopback = 0;
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static int t1e1override = -1;
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static int unchannelized = 0;
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static int latency = VOICEBUS_DEFAULT_LATENCY;
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int vpmdtmfsupport = 0;
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int vpmtsisupport = 0;
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int vpmnlpthresh = 24;
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int vpmnlpmaxsupp = 0;
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struct t1 *ifaces[WC_MAX_IFACES];
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spinlock_t ifacelock = SPIN_LOCK_UNLOCKED;
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static struct t1_desc te120p = { "Wildcard TE120P", 0 };
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static struct t1_desc te122 = { "Wildcard TE122", 0 };
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static struct t1_desc te121 = { "Wildcard TE121", 0 };
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int schluffen(wait_queue_head_t *q)
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DECLARE_WAITQUEUE(wait, current);
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add_wait_queue(q, &wait);
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current->state = TASK_INTERRUPTIBLE;
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if (!signal_pending(current)) schedule();
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current->state = TASK_RUNNING;
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remove_wait_queue(q, &wait);
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if (signal_pending(current)) return -ERESTARTSYS;
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static inline int empty_slot(struct t1 *wc)
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for (x = 0; x < sizeof(wc->cmdq.cmds) / sizeof(wc->cmdq.cmds[0]); x++) {
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if (!wc->cmdq.cmds[x].flags && !wc->cmdq.cmds[x].address)
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static inline void cmd_dequeue(struct t1 *wc, volatile unsigned char *writechunk, int eframe, int slot)
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struct command *curcmd=NULL;
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/* Search for something waiting to transmit */
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if ((slot < 6) && (eframe) && (eframe < ZT_CHUNKSIZE - 1)) {
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/* only 6 useable cs slots per */
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for (x = 0; x < sizeof(wc->cmdq.cmds) / sizeof(wc->cmdq.cmds[0]); x++) {
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if ((wc->cmdq.cmds[x].flags & (__CMD_RD | __CMD_WR | __CMD_LEDS | __CMD_PINS)) &&
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!(wc->cmdq.cmds[x].flags & (__CMD_TX | __CMD_FIN))) {
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curcmd = &wc->cmdq.cmds[x];
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wc->cmdq.cmds[x].flags |= __CMD_TX;
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wc->cmdq.cmds[x].ident = wc->txident;
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/* If nothing else, use filler */
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curcmd->address = 0x4a;
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curcmd->flags = __CMD_RD;
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curcmd->cs_slot = slot;
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if (curcmd->flags & __CMD_WR)
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writechunk[CMD_BYTE(slot,0,0)] = 0x0c; /* 0c write command */
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else if (curcmd->flags & __CMD_LEDS)
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writechunk[CMD_BYTE(slot,0,0)] = 0x10 | ((curcmd->address) & 0x0E); /* led set command */
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else if (curcmd->flags & __CMD_PINS)
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writechunk[CMD_BYTE(slot,0,0)] = 0x30; /* CPLD2 pin state */
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writechunk[CMD_BYTE(slot,0,0)] = 0x0a; /* read command */
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writechunk[CMD_BYTE(slot,1,0)] = curcmd->address;
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writechunk[CMD_BYTE(slot,2,0)] = curcmd->data;
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static inline void cmd_decipher(struct t1 *wc, volatile unsigned char *readchunk)
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unsigned char ident, cs_slot;
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unsigned int is_vpm = 0;
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/* Search for any pending results */
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for (x = 0; x < sizeof(wc->cmdq.cmds) / sizeof(wc->cmdq.cmds[0]); x++) {
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if ((wc->cmdq.cmds[x].flags & (__CMD_RD | __CMD_WR | __CMD_LEDS | __CMD_PINS)) &&
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(wc->cmdq.cmds[x].flags & (__CMD_TX)) &&
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!(wc->cmdq.cmds[x].flags & (__CMD_FIN))) {
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ident = wc->cmdq.cmds[x].ident;
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cs_slot = wc->cmdq.cmds[x].cs_slot;
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if (ident == wc->rxident) {
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wc->cmdq.cmds[x].data |= readchunk[CMD_BYTE(cs_slot,2,is_vpm)];
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/*printk("answer in rxident=%d cs_slot=%d is %d CMD_BYTE=%d jiffies=%d\n", ident, cs_slot, last_read_command, CMD_BYTE(cs_slot, 2), jiffies); */
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wc->cmdq.cmds[x].flags |= __CMD_FIN;
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if (wc->cmdq.cmds[x].flags & (__CMD_WR | __CMD_LEDS))
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/* clear out writes (and leds) since they need no ack */
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memset(&wc->cmdq.cmds[x], 0, sizeof(wc->cmdq.cmds[x]));
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static inline int t1_setreg_full(struct t1 *wc, int addr, int val, int inisr, int vpm_num)
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spin_lock_irqsave(&wc->reglock, flags);
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hit = empty_slot(wc);
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wc->cmdq.cmds[hit].address = addr;
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wc->cmdq.cmds[hit].data = val;
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wc->cmdq.cmds[hit].flags |= __CMD_WR;
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wc->cmdq.cmds[hit].flags |= __CMD_VPM;
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wc->cmdq.cmds[hit].vpm_num = vpm_num;
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spin_unlock_irqrestore(&wc->reglock, flags);
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if ((ret = schluffen(&wc->regq)))
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return (hit > -1) ? 0 : -1;
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static inline int t1_setreg(struct t1 *wc, int addr, int val)
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return t1_setreg_full(wc, addr, val, 0, NOT_VPM);
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/***************************************************************************
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* Check for unconsumed isr register reads and clean them up.
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**************************************************************************/
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static inline void clean_leftovers(struct t1 *wc)
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/* find our requested command */
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for (x = 0; x < sizeof(wc->cmdq.cmds) / sizeof(wc->cmdq.cmds[0]); x++) {
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if ((wc->cmdq.cmds[x].flags & __CMD_RD) &&
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(wc->cmdq.cmds[x].flags & __CMD_ISR) &&
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!(wc->cmdq.cmds[x].flags & __CMD_FIN)) {
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debug_printk(1,"leftover isr read! %d", count);
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memset(&wc->cmdq.cmds[x], 0, sizeof(wc->cmdq.cmds[x]));
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/********************************************************************
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* Called in interrupt context to retrieve a value already requested
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* by the normal t1_getreg().
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*******************************************************************/
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static inline int t1_getreg_isr(struct t1 *wc, int addr)
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/* find our requested command */
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for (x = 0;x < sizeof(wc->cmdq.cmds) / sizeof(wc->cmdq.cmds[0]); x++) {
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if ((wc->cmdq.cmds[x].flags & __CMD_RD) &&
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(wc->cmdq.cmds[x].address==addr))
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if (wc->cmdq.cmds[x].flags & __CMD_FIN) {
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/* still in progress. */
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debug_printk(2, "t1_getreg_isr() no addr=%02x\n", addr);
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return -1; /* oops, couldn't find it */
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ret = wc->cmdq.cmds[hit].data;
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memset(&wc->cmdq.cmds[hit], 0, sizeof(struct command));
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static inline int t1_getreg_full(struct t1 *wc, int addr, int inisr, int vpm_num)
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spin_lock_irqsave(&wc->reglock, flags);
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hit = empty_slot(wc);
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wc->cmdq.cmds[hit].address = addr;
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wc->cmdq.cmds[hit].data = 0x00;
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wc->cmdq.cmds[hit].flags |= __CMD_RD;
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wc->cmdq.cmds[hit].flags |= __CMD_VPM;
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wc->cmdq.cmds[hit].vpm_num = vpm_num;
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wc->cmdq.cmds[hit].flags |= __CMD_ISR;
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if (inisr) /* must be requested in t1_getreg_isr() */
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return (hit > -1) ? 0 : -1;
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spin_unlock_irqrestore(&wc->reglock, flags);
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if ((ret = schluffen(&wc->regq)))
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spin_lock_irqsave(&wc->reglock, flags);
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if (wc->cmdq.cmds[hit].flags & __CMD_FIN) {
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ret = wc->cmdq.cmds[hit].data;
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memset(&wc->cmdq.cmds[hit], 0, sizeof(wc->cmdq.cmds[hit]));
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spin_unlock_irqrestore(&wc->reglock, flags);
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if ((ret = schluffen(&wc->regq)))
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static inline int t1_getreg(struct t1 *wc, int addr, int inisr)
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return t1_getreg_full(wc, addr, inisr, NOT_VPM);
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static inline int t1_setleds(struct t1 *wc, int leds, int inisr)
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leds = ~leds & 0x0E; /* invert the LED bits (3 downto 1)*/
373
spin_lock_irqsave(&wc->reglock, flags);
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hit = empty_slot(wc);
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wc->cmdq.cmds[hit].flags |= __CMD_LEDS;
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wc->cmdq.cmds[hit].address = leds;
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spin_unlock_irqrestore(&wc->reglock, flags);
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if ((ret = schluffen(&wc->regq)))
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return (hit > -1) ? 0 : -1;
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static inline int t1_getpins(struct t1 *wc, int inisr)
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spin_lock_irqsave(&wc->reglock, flags);
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hit = empty_slot(wc);
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wc->cmdq.cmds[hit].address = 0x00;
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wc->cmdq.cmds[hit].data = 0x00;
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wc->cmdq.cmds[hit].flags |= __CMD_PINS;
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spin_unlock_irqrestore(&wc->reglock, flags);
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return (hit > -1) ? 0 : -1;
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if ((ret = schluffen(&wc->regq)))
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spin_lock_irqsave(&wc->reglock, flags);
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if (wc->cmdq.cmds[hit].flags & __CMD_FIN) {
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ret = wc->cmdq.cmds[hit].data;
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memset(&wc->cmdq.cmds[hit], 0, sizeof(wc->cmdq.cmds[hit]));
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spin_unlock_irqrestore(&wc->reglock, flags);
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if ((ret = schluffen(&wc->regq)))
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static void __t1xxp_set_clear(struct t1 *wc, int channo)
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unsigned short val=0;
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for (i = 0; i < 24; i++) {
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if (wc->span.chans[i].flags & ZT_FLAG_CLEAR)
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val |= 1 << (7 - (i % 8));
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if (((i % 8)==7) && /* write byte every 8 channels */
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((channo < 0) || /* channo=-1 means all channels */
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(j == (channo-1)/8) )) { /* only the register for this channo */
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ret = t1_setreg_full(wc, 0x2f + j, val, 1, NOT_VPM);
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module_printk("set_clear failed for chan %d!\n",i);
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static void t1_release(struct t1 *wc)
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zt_unregister(&wc->span);
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printk("Freed a Wildcard TE12xP\n");
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static void t4_serial_setup(struct t1 *wc)
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module_printk("Setting up global serial parameters for %s\n",
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wc->spantype == TYPE_E1 ? (unchannelized ? "Unchannelized E1" : "E1") : "T1");
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t1_setreg(wc, 0x85, 0xe0); /* GPC1: Multiplex mode enabled, FSC is output, active low, RCLK from channel 0 */
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t1_setreg(wc, 0x08, 0x05); /* IPC: Interrupt push/pull active low */
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/* Global clocks (8.192 Mhz CLK) */
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t1_setreg(wc, 0x92, 0x00);
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t1_setreg(wc, 0x93, 0x18);
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t1_setreg(wc, 0x94, 0xfb);
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t1_setreg(wc, 0x95, 0x0b);
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t1_setreg(wc, 0x96, 0x00);
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t1_setreg(wc, 0x97, 0x0b);
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t1_setreg(wc, 0x98, 0xdb);
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t1_setreg(wc, 0x99, 0xdf);
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/* Configure interrupts */
481
t1_setreg(wc, 0x46, 0xc0); /* GCR: Interrupt on Activation/Deactivation of AIX, LOS */
483
/* Configure system interface */
484
t1_setreg(wc, 0x3e, 0x0a /* 0x02 */); /* SIC1: 4.096 Mhz clock/bus, double buffer receive / transmit, byte interleaved */
485
t1_setreg(wc, 0x3f, 0x00); /* SIC2: No FFS, no center receive eliastic buffer, phase 0 */
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t1_setreg(wc, 0x40, 0x04); /* SIC3: Edges for capture */
487
t1_setreg(wc, 0x44, 0x30); /* CMR1: RCLK is at 8.192 Mhz dejittered */
488
t1_setreg(wc, 0x45, 0x00); /* CMR2: We provide sync and clock for tx and rx. */
489
t1_setreg(wc, 0x22, 0x00); /* XC0: Normal operation of Sa-bits */
490
t1_setreg(wc, 0x23, 0x04); /* XC1: 0 offset */
491
t1_setreg(wc, 0x24, 0x00); /* RC0: Just shy of 255 */
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t1_setreg(wc, 0x25, 0x05); /* RC1: The rest of RC0 */
494
/* Configure ports */
495
t1_setreg(wc, 0x80, 0x00); /* PC1: SPYR/SPYX input on RPA/XPA */
496
t1_setreg(wc, 0x81, 0x22); /* PC2: RMFB/XSIG output/input on RPB/XPB */
497
t1_setreg(wc, 0x82, 0x65); /* PC3: Some unused stuff */
498
t1_setreg(wc, 0x83, 0x35); /* PC4: Some more unused stuff */
499
t1_setreg(wc, 0x84, 0x31); /* PC5: XMFS active low, SCLKR is input, RCLK is output */
500
t1_setreg(wc, 0x86, 0x03); /* PC6: CLK1 is Tx Clock output, CLK2 is 8.192 Mhz from DCO-R */
501
t1_setreg(wc, 0x3b, 0x00); /* Clear LCR1 */
504
static void t1_configure_t1(struct t1 *wc, int lineconfig, int txlevel)
506
unsigned int fmr4, fmr2, fmr1, fmr0, lim2;
507
char *framing, *line;
510
if ((txlevel > 7) || (txlevel < 4))
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mytxlevel = txlevel - 4;
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fmr1 = 0x9e; /* FMR1: Mode 0, T1 mode, CRC on for ESF, 2.048 Mhz system data rate, no XAIS */
515
fmr2 = 0x22; /* FMR2: no payload loopback, auto send yellow alarm */
522
fmr4 = 0x0c; /* FMR4: Lose sync on 2 out of 5 framing bits, auto resync */
524
lim2 = 0x21; /* LIM2: 50% peak is a "1", Advanced Loss recovery */
525
lim2 |= (mytxlevel << 6); /* LIM2: Add line buildout */
526
t1_setreg(wc, 0x1d, fmr1);
527
t1_setreg(wc, 0x1e, fmr2);
529
/* Configure line interface */
530
if (lineconfig & ZT_CONFIG_AMI) {
537
if (lineconfig & ZT_CONFIG_D4) {
544
t1_setreg(wc, 0x1c, fmr0);
546
t1_setreg(wc, 0x20, fmr4);
547
t1_setreg(wc, 0x21, 0x40); /* FMR5: Enable RBS mode */
549
t1_setreg(wc, 0x37, 0xf8); /* LIM1: Clear data in case of LOS, Set receiver threshold (0.5V), No remote loop, no DRS */
550
t1_setreg(wc, 0x36, 0x08); /* LIM0: Enable auto long haul mode, no local loop (must be after LIM1) */
552
t1_setreg(wc, 0x02, 0x50); /* CMDR: Reset the receiver and transmitter line interface */
553
t1_setreg(wc, 0x02, 0x00); /* CMDR: Reset the receiver and transmitter line interface */
555
t1_setreg(wc, 0x3a, lim2); /* LIM2: 50% peak amplitude is a "1" */
556
t1_setreg(wc, 0x38, 0x0a); /* PCD: LOS after 176 consecutive "zeros" */
557
t1_setreg(wc, 0x39, 0x15); /* PCR: 22 "ones" clear LOS */
560
t1_setreg(wc, 0x24, 0x80); /* J1 overide */
562
/* Generate pulse mask for T1 */
565
t1_setreg(wc, 0x26, 0x07); /* XPM0 */
566
t1_setreg(wc, 0x27, 0x01); /* XPM1 */
567
t1_setreg(wc, 0x28, 0x00); /* XPM2 */
570
t1_setreg(wc, 0x26, 0x8c); /* XPM0 */
571
t1_setreg(wc, 0x27, 0x11); /* XPM1 */
572
t1_setreg(wc, 0x28, 0x01); /* XPM2 */
575
t1_setreg(wc, 0x26, 0x8c); /* XPM0 */
576
t1_setreg(wc, 0x27, 0x01); /* XPM1 */
577
t1_setreg(wc, 0x28, 0x00); /* XPM2 */
581
t1_setreg(wc, 0x26, 0xd7); /* XPM0 */
582
t1_setreg(wc, 0x27, 0x22); /* XPM1 */
583
t1_setreg(wc, 0x28, 0x01); /* XPM2 */
587
module_printk("Span configured for %s/%s\n", framing, line);
590
static void t1_configure_e1(struct t1 *wc, int lineconfig)
592
unsigned int fmr2, fmr1, fmr0;
593
unsigned int cas = 0;
595
char *framing, *line;
597
fmr1 = 0x46; /* FMR1: E1 mode, Automatic force resync, PCM30 mode, 8.192 Mhz backplane, no XAIS */
598
fmr2 = 0x03; /* FMR2: Auto transmit remote alarm, auto loss of multiframe recovery, no payload loopback */
603
if (lineconfig & ZT_CONFIG_CRC4) {
604
fmr1 |= 0x08; /* CRC4 transmit */
605
fmr2 |= 0xc0; /* CRC4 receive */
608
t1_setreg(wc, 0x1d, fmr1);
609
t1_setreg(wc, 0x1e, fmr2);
611
/* Configure line interface */
612
if (lineconfig & ZT_CONFIG_AMI) {
619
if (lineconfig & ZT_CONFIG_CCS) {
625
t1_setreg(wc, 0x1c, fmr0);
628
t1_setreg(wc, 0x1f, 0x40);
630
t1_setreg(wc, 0x37, 0xf0 /*| 0x6 */ ); /* LIM1: Clear data in case of LOS, Set receiver threshold (0.5V), No remote loop, no DRS */
631
t1_setreg(wc, 0x36, 0x08); /* LIM0: Enable auto long haul mode, no local loop (must be after LIM1) */
633
t1_setreg(wc, 0x02, 0x50); /* CMDR: Reset the receiver and transmitter line interface */
634
t1_setreg(wc, 0x02, 0x00); /* CMDR: Reset the receiver and transmitter line interface */
636
/* Condition receive line interface for E1 after reset */
637
t1_setreg(wc, 0xbb, 0x17);
638
t1_setreg(wc, 0xbc, 0x55);
639
t1_setreg(wc, 0xbb, 0x97);
640
t1_setreg(wc, 0xbb, 0x11);
641
t1_setreg(wc, 0xbc, 0xaa);
642
t1_setreg(wc, 0xbb, 0x91);
643
t1_setreg(wc, 0xbb, 0x12);
644
t1_setreg(wc, 0xbc, 0x55);
645
t1_setreg(wc, 0xbb, 0x92);
646
t1_setreg(wc, 0xbb, 0x0c);
647
t1_setreg(wc, 0xbb, 0x00);
648
t1_setreg(wc, 0xbb, 0x8c);
650
t1_setreg(wc, 0x3a, 0x20); /* LIM2: 50% peak amplitude is a "1" */
651
t1_setreg(wc, 0x38, 0x0a); /* PCD: LOS after 176 consecutive "zeros" */
652
t1_setreg(wc, 0x39, 0x15); /* PCR: 22 "ones" clear LOS */
654
t1_setreg(wc, 0x20, 0x9f); /* XSW: Spare bits all to 1 */
656
t1_setreg(wc, 0x21, 0x3c);
658
t1_setreg(wc, 0x21, 0x1c|cas); /* XSP: E-bit set when async. AXS auto, XSIF to 1 */
661
/* Generate pulse mask for E1 */
662
t1_setreg(wc, 0x26, 0x54); /* XPM0 */
663
t1_setreg(wc, 0x27, 0x02); /* XPM1 */
664
t1_setreg(wc, 0x28, 0x00); /* XPM2 */
665
module_printk("Span configured for %s/%s%s\n", framing, line, crc4);
668
static void t1xxp_framer_start(struct t1 *wc, struct zt_span *span)
670
int alreadyrunning = wc->span.flags & ZT_FLAG_RUNNING;
673
if (wc->spantype == TYPE_E1) { /* if this is an E1 card */
674
t1_configure_e1(wc, span->lineconfig);
675
} else { /* is a T1 card */
676
t1_configure_t1(wc, span->lineconfig, span->txlevel);
677
__t1xxp_set_clear(wc, -1);
680
spin_lock_irqsave(&wc->reglock, flags);
682
wc->span.flags |= ZT_FLAG_RUNNING;
683
spin_unlock_irqrestore(&wc->reglock, flags);
686
static int t1xxp_startup(struct zt_span *span)
688
struct t1 *wc = span->pvt;
691
/* initialize the start value for the entire chunk of last ec buffer */
692
for (i = 0; i < span->channels; i++) {
693
memset(wc->ec_chunk1[i], ZT_LIN2X(0, &span->chans[i]), ZT_CHUNKSIZE);
694
memset(wc->ec_chunk2[i], ZT_LIN2X(0, &span->chans[i]), ZT_CHUNKSIZE);
697
/* Reset framer with proper parameters and start */
698
t1xxp_framer_start(wc, span);
699
debug_printk(1, "Calling startup (flags is %d)\n", span->flags);
704
static int t1xxp_shutdown(struct zt_span *span)
706
struct t1 *wc = span->pvt;
709
t1_setreg(wc, 0x46, 0x41); /* GCR: Interrupt on Activation/Deactivation of AIX, LOS */
710
spin_lock_irqsave(&wc->reglock, flags);
711
span->flags &= ~ZT_FLAG_RUNNING;
712
spin_unlock_irqrestore(&wc->reglock, flags);
716
static int t1xxp_chanconfig(struct zt_chan *chan, int sigtype)
718
struct t1 *wc = chan->pvt;
719
int alreadyrunning = chan->span->flags & ZT_FLAG_RUNNING;
721
if (alreadyrunning && (wc->spantype != TYPE_E1))
722
__t1xxp_set_clear(wc, chan->channo);
727
static int t1xxp_spanconfig(struct zt_span *span, struct zt_lineconfig *lc)
729
struct t1 *wc = span->pvt;
731
/* Do we want to SYNC on receive or not */
738
/* If already running, apply changes immediately */
739
if (span->flags & ZT_FLAG_RUNNING)
740
return t1xxp_startup(span);
745
static int t1xxp_rbsbits(struct zt_chan *chan, int bits)
749
struct t1 *wc = chan->pvt;
752
debug_printk(2, "Setting bits to %d on channel %s\n", bits, chan->name);
753
if (wc->spantype == TYPE_E1) { /* do it E1 way */
754
if (chan->chanpos == 16)
757
n = chan->chanpos - 1;
758
if (chan->chanpos > 15) n--;
760
spin_lock_irqsave(&wc->reglock, flags);
762
m = (n / 15) << 2; /* nibble selector */
763
c &= (0xf << m); /* keep the other nibble */
764
c |= (bits & 0xf) << (4 - m); /* put our new nibble here */
766
spin_unlock_irqrestore(&wc->reglock, flags);
767
/* output them to the chip */
768
t1_setreg_full(wc,0x71 + b,c,1,NOT_VPM);
769
} else if (wc->span.lineconfig & ZT_CONFIG_D4) {
770
n = chan->chanpos - 1;
772
spin_lock_irqsave(&wc->reglock, flags);
774
m = ((3 - (n % 4)) << 1); /* nibble selector */
775
c &= ~(0x3 << m); /* keep the other nibble */
776
c |= ((bits >> 2) & 0x3) << m; /* put our new nibble here */
778
spin_unlock_irqrestore(&wc->reglock, flags);
779
/* output them to the chip */
780
t1_setreg_full(wc,0x70 + b,c,1,NOT_VPM);
781
t1_setreg_full(wc,0x70 + b + 6,c,1,NOT_VPM);
782
} else if (wc->span.lineconfig & ZT_CONFIG_ESF) {
783
n = chan->chanpos - 1;
785
spin_lock_irqsave(&wc->reglock, flags);
787
m = ((n % 2) << 2); /* nibble selector */
788
c &= (0xf << m); /* keep the other nibble */
789
c |= (bits & 0xf) << (4 - m); /* put our new nibble here */
791
spin_unlock_irqrestore(&wc->reglock, flags);
792
/* output them to the chip */
793
t1_setreg_full(wc,0x70 + b,c,1,NOT_VPM);
795
debug_printk(2,"Finished setting RBS bits\n");
800
static inline void __t1_check_sigbits_reads(struct t1 *wc)
804
if (!(wc->span.flags & ZT_FLAG_RUNNING))
806
if (wc->spantype == TYPE_E1) {
807
for (i = 0; i < 15; i++) {
808
if (t1_getreg(wc, 0x71 + i, 1))
811
} else if (wc->span.lineconfig & ZT_CONFIG_D4) {
812
for (i = 0; i < 24; i+=4) {
813
if (t1_getreg(wc, 0x70 + (i >> 2), 1))
817
for (i = 0; i < 24; i+=2) {
818
if (t1_getreg(wc, 0x70 + (i >> 1), 1))
824
static inline void __t1_check_sigbits(struct t1 *wc)
828
if (!(wc->span.flags & ZT_FLAG_RUNNING))
830
if (wc->spantype == TYPE_E1) {
831
for (i = 0; i < 15; i++) {
832
a = t1_getreg_isr(wc, 0x71 + i);
834
/* Get high channel in low bits */
836
if (!(wc->span.chans[i+16].sig & ZT_SIG_CLEAR)) {
837
if (wc->span.chans[i+16].rxsig != rxs) {
838
spin_unlock(&wc->reglock);
839
zt_rbsbits(&wc->span.chans[i+16], rxs);
840
spin_lock(&wc->reglock);
843
rxs = (a >> 4) & 0xf;
844
if (!(wc->span.chans[i].sig & ZT_SIG_CLEAR)) {
845
if (wc->span.chans[i].rxsig != rxs) {
846
spin_unlock(&wc->reglock);
847
zt_rbsbits(&wc->span.chans[i], rxs);
848
spin_lock(&wc->reglock);
853
} else if (wc->span.lineconfig & ZT_CONFIG_D4) {
854
for (i = 0; i < 24; i+=4) {
855
a = t1_getreg_isr(wc, 0x70 + (i>>2));
857
/* Get high channel in low bits */
858
rxs = (a & 0x3) << 2;
859
if (!(wc->span.chans[i+3].sig & ZT_SIG_CLEAR)) {
860
if (wc->span.chans[i+3].rxsig != rxs) {
861
spin_unlock(&wc->reglock);
862
zt_rbsbits(&wc->span.chans[i+3], rxs);
863
spin_lock(&wc->reglock);
867
if (!(wc->span.chans[i+2].sig & ZT_SIG_CLEAR)) {
868
if (wc->span.chans[i+2].rxsig != rxs) {
869
spin_unlock(&wc->reglock);
870
zt_rbsbits(&wc->span.chans[i+2], rxs);
871
spin_lock(&wc->reglock);
874
rxs = (a >> 2) & 0xc;
875
if (!(wc->span.chans[i+1].sig & ZT_SIG_CLEAR)) {
876
if (wc->span.chans[i+1].rxsig != rxs) {
877
spin_unlock(&wc->reglock);
878
zt_rbsbits(&wc->span.chans[i+1], rxs);
879
spin_lock(&wc->reglock);
882
rxs = (a >> 4) & 0xc;
883
if (!(wc->span.chans[i].sig & ZT_SIG_CLEAR)) {
884
if (wc->span.chans[i].rxsig != rxs) {
885
spin_unlock(&wc->reglock);
886
zt_rbsbits(&wc->span.chans[i], rxs);
887
spin_lock(&wc->reglock);
893
for (i = 0; i < 24; i+=2) {
894
a = t1_getreg_isr(wc, 0x70 + (i>>1));
896
/* Get high channel in low bits */
898
if (!(wc->span.chans[i+1].sig & ZT_SIG_CLEAR)) {
899
if (wc->span.chans[i+1].rxsig != rxs) {
900
spin_unlock(&wc->reglock);
901
zt_rbsbits(&wc->span.chans[i+1], rxs);
902
spin_lock(&wc->reglock);
905
rxs = (a >> 4) & 0xf;
906
if (!(wc->span.chans[i].sig & ZT_SIG_CLEAR)) {
907
if (wc->span.chans[i].rxsig != rxs) {
908
spin_unlock(&wc->reglock);
909
zt_rbsbits(&wc->span.chans[i], rxs);
910
spin_lock(&wc->reglock);
918
static int t1xxp_maint(struct zt_span *span, int cmd)
920
struct t1 *wc = span->pvt;
922
if (wc->spantype == TYPE_E1) {
925
module_printk("XXX Turn off local and remote loops E1 XXX\n");
927
case ZT_MAINT_LOCALLOOP:
928
module_printk("XXX Turn on local loopback E1 XXX\n");
930
case ZT_MAINT_REMOTELOOP:
931
module_printk("XXX Turn on remote loopback E1 XXX\n");
933
case ZT_MAINT_LOOPUP:
934
module_printk("XXX Send loopup code E1 XXX\n");
936
case ZT_MAINT_LOOPDOWN:
937
module_printk("XXX Send loopdown code E1 XXX\n");
939
case ZT_MAINT_LOOPSTOP:
940
module_printk("XXX Stop sending loop codes E1 XXX\n");
943
module_printk("Unknown E1 maint command: %d\n", cmd);
949
module_printk("XXX Turn off local and remote loops T1 XXX\n");
951
case ZT_MAINT_LOCALLOOP:
952
module_printk("XXX Turn on local loop and no remote loop XXX\n");
954
case ZT_MAINT_REMOTELOOP:
955
module_printk("XXX Turn on remote loopup XXX\n");
957
case ZT_MAINT_LOOPUP:
958
t1_setreg(wc, 0x21, 0x50); /* FMR5: Nothing but RBS mode */
960
case ZT_MAINT_LOOPDOWN:
961
t1_setreg(wc, 0x21, 0x60); /* FMR5: Nothing but RBS mode */
963
case ZT_MAINT_LOOPSTOP:
964
t1_setreg(wc, 0x21, 0x40); /* FMR5: Nothing but RBS mode */
967
module_printk("Unknown T1 maint command: %d\n", cmd);
975
static int t1xxp_open(struct zt_chan *chan)
977
struct t1 *wc = chan->pvt;
986
try_module_get(THIS_MODULE);
992
static int t1xxp_close(struct zt_chan *chan)
994
struct t1 *wc = chan->pvt;
1001
module_put(THIS_MODULE);
1004
/* If we're dead, release us now */
1005
if (!wc->usecount && wc->dead)
1011
static int t1xxp_ioctl(struct zt_chan *chan, unsigned int cmd, unsigned long data)
1014
struct t1 *wc = chan->pvt;
1018
/* Since all register access was moved into the voicebus
1019
* module....this was removed. Although...why does the client
1020
* library need access to the registers (debugging)? \todo ..
1027
if (get_user(x, (int *) data))
1031
if (wc->vpm150m && (x && !vpmdtmfsupport))
1033
if (x & ZT_TONEDETECT_ON) {
1034
set_bit(chan->chanpos - 1, &wc->dtmfmask);
1035
module_printk("turning on tone detection\n");
1037
clear_bit(chan->chanpos - 1, &wc->dtmfmask);
1038
module_printk("turning off tone detection\n");
1040
if (x & ZT_TONEDETECT_MUTE) {
1042
set_bit(chan->chanpos - 1, &wc->vpm150m->desireddtmfmutestate);
1045
clear_bit(chan->chanpos - 1, &wc->vpm150m->desireddtmfmutestate);
1057
#include "adt_lec.c"
1059
static int t1xxp_echocan_with_params(struct zt_chan *chan, struct zt_echocanparams *ecp, struct zt_echocanparam *p)
1061
struct adt_lec_params params;
1062
struct t1 *wc = chan->pvt;
1063
struct vpm150m *vpm150m = wc->vpm150m;
1065
struct vpm150m_workentry *work;
1071
adt_lec_init_defaults(¶ms, 32);
1073
if ((ret = adt_lec_parse_params(¶ms, ecp, p)))
1076
/* we can't really control the tap length, but the value is used
1077
to control whether the ec is on or off, so translate it */
1078
params.tap_length = ecp->tap_length ? 1 : 0;
1080
if (!(work = kmalloc(sizeof(*work), GFP_KERNEL)))
1083
work->params = params;
1086
spin_lock_irqsave(&vpm150m->lock, flags);
1087
list_add_tail(&work->list, &vpm150m->worklist);
1088
spin_unlock_irqrestore(&vpm150m->lock, flags);
1090
/* we must do this later since we cannot sleep in the echocan function */
1091
if (test_bit(VPM150M_ACTIVE, &vpm150m->control))
1092
queue_work(vpm150m->wq, &vpm150m->work_echocan);
1094
return 0; /* how do I return the status since it is done later by the workqueue? */
1098
static int t1_software_init(struct t1 *wc)
1101
struct pci_dev* dev;
1103
dev = voicebus_get_pci_dev(wc->vb);
1106
for (x = 0; x < sizeof(ifaces) / sizeof(ifaces[0]); x++) {
1107
if (ifaces[x] == wc) {
1108
debug_printk(1, "software init for card %d\n",x);
1113
if (x == sizeof(ifaces) / sizeof(ifaces[0]))
1116
t4_serial_setup(wc);
1119
sprintf(wc->span.name, "WCT1/%d", wc->num);
1120
snprintf(wc->span.desc, sizeof(wc->span.desc) - 1, "%s Card %d", wc->variety, wc->num);
1121
wc->span.manufacturer = "Digium";
1122
strncpy(wc->span.devicetype, wc->variety, sizeof(wc->span.devicetype) - 1);
1124
#if defined(VPM_SUPPORT)
1126
strncat(wc->span.devicetype, " with VPMADT032", sizeof(wc->span.devicetype) - 1);
1129
snprintf(wc->span.location, sizeof(wc->span.location) - 1,
1130
"PCI Bus %02d Slot %02d", dev->bus->number, PCI_SLOT(dev->devfn) + 1);
1132
wc->span.spanconfig = t1xxp_spanconfig;
1133
wc->span.chanconfig = t1xxp_chanconfig;
1134
wc->span.irq = dev->irq;
1135
wc->span.startup = t1xxp_startup;
1136
wc->span.shutdown = t1xxp_shutdown;
1137
wc->span.rbsbits = t1xxp_rbsbits;
1138
wc->span.maint = t1xxp_maint;
1139
wc->span.open = t1xxp_open;
1140
wc->span.close = t1xxp_close;
1141
wc->span.ioctl = t1xxp_ioctl;
1143
wc->span.echocan_with_params = t1xxp_echocan_with_params;
1146
if (wc->spantype == TYPE_E1) {
1148
wc->span.channels = 32;
1150
wc->span.channels = 31;
1151
wc->span.spantype = "E1";
1152
wc->span.linecompat = ZT_CONFIG_HDB3 | ZT_CONFIG_CCS | ZT_CONFIG_CRC4;
1153
wc->span.deflaw = ZT_LAW_ALAW;
1155
wc->span.channels = 24;
1156
wc->span.spantype = "T1";
1157
wc->span.linecompat = ZT_CONFIG_AMI | ZT_CONFIG_B8ZS | ZT_CONFIG_D4 | ZT_CONFIG_ESF;
1158
wc->span.deflaw = ZT_LAW_MULAW;
1160
wc->span.chans = wc->chans;
1161
wc->span.flags = ZT_FLAG_RBS;
1163
init_waitqueue_head(&wc->span.maintq);
1164
for (x = 0; x < wc->span.channels; x++) {
1165
sprintf(wc->chans[x].name, "WCT1/%d/%d", wc->num, x + 1);
1166
wc->chans[x].sigcap = ZT_SIG_EM | ZT_SIG_CLEAR | ZT_SIG_EM_E1 |
1167
ZT_SIG_FXSLS | ZT_SIG_FXSGS | ZT_SIG_MTP2 |
1168
ZT_SIG_FXSKS | ZT_SIG_FXOLS | ZT_SIG_DACS_RBS |
1169
ZT_SIG_FXOGS | ZT_SIG_FXOKS | ZT_SIG_CAS | ZT_SIG_SF;
1170
wc->chans[x].pvt = wc;
1171
wc->chans[x].chanpos = x + 1;
1173
if (zt_register(&wc->span, 0)) {
1174
module_printk("Unable to register span with Zaptel\n");
1177
wc->initialized = 1;
1183
static inline unsigned char t1_vpm_in(struct t1 *wc, int unit, const unsigned int addr)
1185
return t1_getreg_full(wc, addr, 0, unit);
1188
static inline unsigned char t1_vpm_out(struct t1 *wc, int unit, const unsigned int addr, const unsigned char val)
1190
return t1_setreg_full(wc, addr, val, 0, unit);
1195
static int t1_hardware_post_init(struct t1 *wc)
1201
if (t1e1override > -1) {
1203
wc->spantype = TYPE_E1;
1205
wc->spantype = TYPE_T1;
1207
if (t1_getpins(wc,0) & 0x01) /* returns 1 for T1 mode */
1208
wc->spantype = TYPE_T1;
1210
wc->spantype = TYPE_E1;
1212
debug_printk(1, "spantype: %s\n", wc->spantype==1 ? "T1" : "E1");
1214
if (wc->spantype == TYPE_E1) {
1216
wc->chanmap = chanmap_e1uc;
1218
wc->chanmap = chanmap_e1;
1220
wc->chanmap = chanmap_t1;
1221
/* what version of the FALC are we using? */
1222
reg = t1_setreg(wc, 0x4a, 0xaa);
1223
reg = t1_getreg(wc, 0x4a, 0);
1224
debug_printk(1, "FALC version: %08x\n", reg);
1226
/* make sure reads and writes work */
1227
for (x = 0; x < 256; x++) {
1228
t1_setreg(wc, 0x14, x);
1229
if ((reg = t1_getreg(wc, 0x14, 0)) != x)
1230
module_printk("Wrote '%x' but read '%x'\n", x, reg);
1233
/* all LED's blank */
1234
wc->ledtestreg = UNSET_LED_ORANGE(wc->ledtestreg);
1235
wc->ledtestreg = UNSET_LED_REDGREEN(wc->ledtestreg);
1236
t1_setleds(wc, wc->ledtestreg, 0);
1239
t1_vpm150m_init(wc);
1241
module_printk("VPM present and operational (Firmware version %x)\n", wc->vpm150m->version);
1242
wc->ctlreg |= 0x10; /* turn on vpm (RX audio from vpm module) */
1243
if (vpmtsisupport) {
1244
debug_printk(1, "enabling VPM TSI pin\n");
1245
wc->ctlreg |= 0x01; /* turn on vpm timeslot interchange pin */
1253
static inline void __t1_check_alarms_reads(struct t1 *wc)
1255
if (!(wc->span.flags & ZT_FLAG_RUNNING))
1258
if (t1_getreg(wc, 0x4c, 1))
1259
wc->isrreaderrors++;
1260
if (t1_getreg(wc, 0x20, 1))
1261
wc->isrreaderrors++;
1262
if (t1_getreg(wc, 0x4d, 1))
1263
wc->isrreaderrors++;
1266
static inline void __t1_check_alarms(struct t1 *wc)
1271
unsigned char fmr4; /* must read this always */
1273
if (!(wc->span.flags & ZT_FLAG_RUNNING))
1276
c = t1_getreg_isr(wc, 0x4c);
1277
fmr4 = t1_getreg_isr(wc, 0x20); /* must read this even if we don't use it */
1278
d = t1_getreg_isr(wc, 0x4d);
1280
/* Assume no alarms */
1283
/* And consider only carrier alarms */
1284
wc->span.alarms &= (ZT_ALARM_RED | ZT_ALARM_BLUE | ZT_ALARM_NOTOPEN);
1286
if (wc->spantype == TYPE_E1) {
1288
/* No multiframe found, force RAI high after 400ms only if
1289
we haven't found a multiframe since last loss
1291
if (!wc->flags.nmf) {
1292
t1_setreg_full(wc, 0x20, 0x9f | 0x20, 1, NOT_VPM); /* LIM0: Force RAI High */
1294
module_printk("NMF workaround on!\n");
1296
t1_setreg_full(wc, 0x1e, 0xc3, 1, NOT_VPM); /* Reset to CRC4 mode */
1297
t1_setreg_full(wc, 0x1c, 0xf2, 1, NOT_VPM); /* Force Resync */
1298
t1_setreg_full(wc, 0x1c, 0xf0, 1, NOT_VPM); /* Force Resync */
1299
} else if (!(c & 0x02)) {
1300
if (wc->flags.nmf) {
1301
t1_setreg_full(wc, 0x20, 0x9f, 1, NOT_VPM); /* LIM0: Clear forced RAI */
1303
module_printk("NMF workaround off!\n");
1307
/* Detect loopup code if we're not sending one */
1308
if ((!wc->span.mainttimer) && (d & 0x08)) {
1309
/* Loop-up code detected */
1310
if ((wc->loopupcnt++ > 80) && (wc->span.maintstat != ZT_MAINT_REMOTELOOP)) {
1311
t1_setreg_full(wc, 0x36, 0x08, 1, NOT_VPM); /* LIM0: Disable any local loop */
1312
t1_setreg_full(wc, 0x37, 0xf6, 1, NOT_VPM); /* LIM1: Enable remote loop */
1313
wc->span.maintstat = ZT_MAINT_REMOTELOOP;
1317
/* Same for loopdown code */
1318
if ((!wc->span.mainttimer) && (d & 0x10)) {
1319
/* Loop-down code detected */
1320
if ((wc->loopdowncnt++ > 80) && (wc->span.maintstat == ZT_MAINT_REMOTELOOP)) {
1321
t1_setreg_full(wc, 0x36, 0x08, 1, NOT_VPM); /* LIM0: Disable any local loop */
1322
t1_setreg_full(wc, 0x37, 0xf0, 1, NOT_VPM); /* LIM1: Disable remote loop */
1323
wc->span.maintstat = ZT_MAINT_NONE;
1326
wc->loopdowncnt = 0;
1329
if (wc->span.lineconfig & ZT_CONFIG_NOTOPEN) {
1330
for (x=0,j=0;x < wc->span.channels;x++)
1331
if ((wc->span.chans[x].flags & ZT_FLAG_OPEN) ||
1332
(wc->span.chans[x].flags & ZT_FLAG_NETDEV))
1335
alarms |= ZT_ALARM_NOTOPEN;
1339
if (wc->alarmcount >= alarmdebounce) {
1341
alarms |= ZT_ALARM_RED;
1347
alarms |= ZT_ALARM_BLUE;
1349
/* Keep track of recovering */
1350
if ((!alarms) && wc->span.alarms)
1351
wc->alarmtimer = ZT_ALARMSETTLE_TIME;
1353
alarms |= ZT_ALARM_RECOVER;
1355
/* If receiving alarms, go into Yellow alarm state */
1356
if (alarms && !wc->flags.sendingyellow) {
1357
module_printk("Setting yellow alarm\n");
1359
/* We manually do yellow alarm to handle RECOVER and NOTOPEN, otherwise it's auto anyway */
1360
t1_setreg_full(wc, 0x20, fmr4 | 0x20, 1, NOT_VPM);
1361
wc->flags.sendingyellow = 1;
1362
} else if (!alarms && wc->flags.sendingyellow) {
1363
module_printk("Clearing yellow alarm\n");
1364
/* We manually do yellow alarm to handle RECOVER */
1365
t1_setreg_full(wc, 0x20, fmr4 & ~0x20, 1, NOT_VPM);
1366
wc->flags.sendingyellow = 0;
1369
if ((c & 0x10) && !unchannelized)
1370
alarms |= ZT_ALARM_YELLOW;
1371
if (wc->span.mainttimer || wc->span.maintstat)
1372
alarms |= ZT_ALARM_LOOPBACK;
1373
wc->span.alarms = alarms;
1374
spin_unlock(&wc->reglock);
1375
zt_alarm_notify(&wc->span);
1376
spin_lock(&wc->reglock);
1379
static inline void __handle_leds(struct t1 *wc)
1381
if (wc->span.alarms & (ZT_ALARM_RED | ZT_ALARM_BLUE)) {
1383
if (wc->blinktimer == 160)
1384
wc->ledtestreg = SET_LED_RED(wc->ledtestreg);
1385
if (wc->blinktimer == 480) {
1386
wc->ledtestreg = UNSET_LED_REDGREEN(wc->ledtestreg);
1389
} else if (wc->span.alarms & ZT_ALARM_YELLOW) {
1391
if (!(wc->yellowtimer % 2))
1392
wc->ledtestreg = SET_LED_RED(wc->ledtestreg);
1394
wc->ledtestreg = SET_LED_GREEN(wc->ledtestreg);
1396
if (wc->span.maintstat != ZT_MAINT_NONE)
1397
wc->ledtestreg = SET_LED_ORANGE(wc->ledtestreg);
1399
wc->ledtestreg = UNSET_LED_ORANGE(wc->ledtestreg);
1400
if (wc->span.flags & ZT_FLAG_RUNNING)
1401
wc->ledtestreg = SET_LED_GREEN(wc->ledtestreg);
1403
wc->ledtestreg = UNSET_LED_REDGREEN(wc->ledtestreg);
1406
if (wc->ledtestreg != wc->ledlastvalue) {
1407
t1_setleds(wc, wc->ledtestreg, 1);
1408
wc->ledlastvalue = wc->ledtestreg;
1413
static void __t1_do_counters(struct t1 *wc)
1415
if (wc->alarmtimer) {
1416
if (!--wc->alarmtimer) {
1417
wc->span.alarms &= ~(ZT_ALARM_RECOVER);
1418
zt_alarm_notify(&wc->span);
1423
static inline void t1_isr_misc(struct t1 *wc)
1425
const unsigned int x = wc->intcount & 0x3f;
1426
int buffer_count = voicebus_current_latency(wc->vb);
1428
if (unlikely(!wc->initialized)) return;
1432
__t1_do_counters(wc);
1435
__t1_check_sigbits_reads(wc);
1437
else if ( 1 == x ) {
1438
if (!(wc->intcount & 0x30)) {
1439
__t1_check_alarms_reads(wc);
1443
else if ( x == buffer_count*2) {
1444
__t1_check_sigbits(wc);
1446
else if ( x == (buffer_count*2)+1 ) {
1447
if (wc->alarms_read) {
1448
__t1_check_alarms(wc);
1452
else if ( x == (buffer_count*2)+2) {
1453
clean_leftovers(wc);
1457
static inline void t1_transmitprep(struct t1 *wc, unsigned char* writechunk)
1463
/* Calculate Transmission */
1464
if (likely(wc->initialized)) {
1465
spin_unlock(&wc->reglock);
1466
zt_transmit(&wc->span);
1467
spin_lock(&wc->reglock);
1470
for (x = 0; x < ZT_CHUNKSIZE; x++) {
1471
if (likely(wc->initialized)) {
1472
for (chan = 0; chan < wc->span.channels; chan++)
1473
writechunk[(chan+1)*2] = wc->chans[chan].writechunk[x];
1476
/* process the command queue */
1477
for (y = 0; y < 7; y++) {
1478
cmd_dequeue(wc, writechunk, x, y);
1481
if(likely(wc->vpm150m)) {
1482
vpm150m_cmd_dequeue(wc, writechunk, x);
1486
if (x < ZT_CHUNKSIZE - 1) {
1487
writechunk[EFRAME_SIZE] = wc->ctlreg;
1488
writechunk[EFRAME_SIZE + 1] = wc->txident++;
1490
writechunk += (EFRAME_SIZE + EFRAME_GAP);
1494
static inline void cmd_retransmit(struct t1 *wc)
1498
for (x = 0; x < sizeof(wc->cmdq.cmds) / sizeof(wc->cmdq.cmds[0]); x++) {
1499
if (!(wc->cmdq.cmds[x].flags & __CMD_FIN)) {
1500
wc->cmdq.cmds[x].flags &= ~(__CMD_TX) ; /* clear __CMD_TX */
1501
wc->cmdq.cmds[x].ident = 0;
1506
static inline void t1_receiveprep(struct t1 *wc, unsigned char* readchunk)
1509
unsigned char expected;
1511
for (x = 0; x < ZT_CHUNKSIZE; x++) {
1512
if (likely(wc->initialized)) {
1513
for (chan = 0; chan < wc->span.channels; chan++) {
1514
wc->chans[chan].readchunk[x]= readchunk[(chan+1)*2];
1517
if (x < ZT_CHUNKSIZE - 1) {
1518
expected = wc->rxident+1;
1519
wc->rxident = readchunk[EFRAME_SIZE + 1];
1520
wc->statreg = readchunk[EFRAME_SIZE + 2];
1521
if (wc->rxident != expected) {
1522
wc->span.irqmisses++;
1524
if (unlikely(debug && wc->initialized))
1525
module_printk("oops: rxident=%d expected=%d x=%d\n", wc->rxident, expected, x);
1528
cmd_decipher(wc, readchunk);
1531
vpm150m_cmd_decipher(wc, readchunk);
1533
readchunk += (EFRAME_SIZE + EFRAME_GAP);
1537
if (likely(wc->initialized)) {
1538
spin_unlock(&wc->reglock);
1539
for (x = 0; x < wc->span.channels; x++) {
1540
zt_ec_chunk(&wc->chans[x], wc->chans[x].readchunk, wc->ec_chunk2[x]);
1541
memcpy(wc->ec_chunk2[x],wc->ec_chunk1[x],ZT_CHUNKSIZE);
1542
memcpy(wc->ec_chunk1[x],wc->chans[x].writechunk,ZT_CHUNKSIZE);
1544
zt_receive(&wc->span);
1545
spin_lock(&wc->reglock);
1548
/* Wake up anyone sleeping to read/write a new register */
1549
wake_up_interruptible(&wc->regq);
1553
t1_handle_transmit(void* vbb, void* context)
1555
struct t1* wc = context;
1556
/* Either this function is called from within interrupt context, or
1557
* the reglock will never be acquired from interrupt context, so it's
1558
* safe to grab it without locking interrupt.
1560
memset(vbb, 0, SFRAME_SIZE);
1561
spin_lock(&wc->reglock);
1563
t1_transmitprep(wc, vbb);
1566
spin_unlock(&wc->reglock);
1567
voicebus_transmit(wc->vb, vbb);
1571
t1_handle_receive(void* vbb, void* context)
1573
struct t1* wc = context;
1575
/* Either this function is called from within interrupt context, or
1576
* the reglock will never be acquired from interrupt context, so it's
1577
* safe to grab it without locking interrupt.
1579
spin_lock(&wc->reglock);
1580
t1_receiveprep(wc, vbb);
1581
spin_unlock(&wc->reglock);
1584
static int __devinit te12xp_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1587
struct t1_desc *d = (struct t1_desc *) ent->driver_data;
1590
int startinglatency;
1592
for (x = 0; x < sizeof(ifaces) / sizeof(ifaces[0]); x++)
1593
if (!ifaces[x]) break;
1595
if (x >= sizeof(ifaces) / sizeof(ifaces[0])) {
1596
module_printk("Too many interfaces\n");
1601
wc = kmalloc(sizeof(*wc), GFP_KERNEL);
1606
memset(wc, 0, sizeof(*wc));
1607
spin_lock_init(&wc->reglock);
1608
wc->variety = d->name;
1611
init_waitqueue_head(&wc->regq);
1612
snprintf(wc->name, sizeof(wc->name)-1, "wcte12xp%d", x);
1613
if ((res=voicebus_init(pdev, SFRAME_SIZE, wc->name,
1614
t1_handle_receive, t1_handle_transmit, wc, &wc->vb)))
1621
/* Keep track of which device we are */
1622
pci_set_drvdata(pdev, wc);
1623
if (VOICEBUS_DEFAULT_LATENCY != latency) {
1624
voicebus_set_minlatency(wc->vb, latency);
1626
voicebus_start(wc->vb);
1627
startinglatency = voicebus_current_latency(wc->vb);
1628
t1_hardware_post_init(wc);
1629
t1_software_init(wc);
1630
if (voicebus_current_latency(wc->vb) > startinglatency) {
1631
/* The voicebus library increased the latency during
1632
* initialization because the host wasn't able to service the
1633
* interrupts from the adapter quickly enough. In this case,
1634
* we'll increase our latency and restart the initialization.
1636
printk(KERN_NOTICE "%s: Restarting board initialization " \
1637
"after increasing latency.\n", wc->name);
1638
latency = voicebus_current_latency(wc->vb);
1639
zt_unregister(&wc->span);
1640
voicebus_release(wc->vb);
1646
module_printk("Found a %s\n", wc->variety);
1651
static void __devexit te12xp_remove_one(struct pci_dev *pdev)
1653
struct t1 *wc = pci_get_drvdata(pdev);
1655
unsigned long flags;
1656
struct vpm150m *vpm150m = wc->vpm150m;
1663
clear_bit(VPM150M_DTMFDETECT, &vpm150m->control);
1664
clear_bit(VPM150M_ACTIVE, &vpm150m->control);
1665
flush_workqueue(vpm150m->wq);
1666
destroy_workqueue(vpm150m->wq);
1671
voicebus_release(wc->vb);
1674
if (debug && wc->isrreaderrors)
1675
debug_printk(1, "isrreaderrors=%d\n", wc->isrreaderrors);
1679
spin_lock_irqsave(&wc->reglock, flags);
1682
spin_unlock_irqrestore(&wc->reglock, flags);
1686
/* Release span, possibly delayed */
1693
static struct pci_device_id te12xp_pci_tbl[] = {
1694
{ 0xd161, 0x0120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &te120p},
1695
{ 0xd161, 0x8000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &te121},
1696
{ 0xd161, 0x8001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &te122},
1700
MODULE_DEVICE_TABLE(pci, te12xp_pci_tbl);
1702
struct pci_driver te12xp_driver = {
1704
probe: te12xp_init_one,
1706
remove: __devexit_p(te12xp_remove_one),
1708
remove: te12xp_remove_one,
1712
id_table: te12xp_pci_tbl,
1715
static int __init te12xp_init(void)
1719
res = zap_pci_module(&te12xp_driver);
1721
return res ? -ENODEV : 0;
1725
static void __exit te12xp_cleanup(void)
1727
pci_unregister_driver(&te12xp_driver);
1731
module_param(debug, int, S_IRUGO | S_IWUSR);
1732
module_param(loopback, int, S_IRUGO | S_IWUSR);
1733
module_param(t1e1override, int, S_IRUGO | S_IWUSR);
1734
module_param(j1mode, int, S_IRUGO | S_IWUSR);
1735
module_param(alarmdebounce, int, S_IRUGO | S_IWUSR);
1736
module_param(latency, int, S_IRUGO | S_IWUSR);
1738
module_param(vpmsupport, int, S_IRUGO | S_IWUSR);
1739
module_param(vpmdtmfsupport, int, S_IRUGO | S_IWUSR);
1740
module_param(vpmtsisupport, int, S_IRUGO | S_IWUSR);
1743
MODULE_PARM(debug, "i");
1744
MODULE_PARM(loopback, "i");
1745
MODULE_PARM(t1e1override, "i");
1746
MODULE_PARM(j1mode, "i");
1747
MODULE_PARM(alarmdebounce, "i");
1749
MODULE_PARM(vpmsupport, "i");
1750
MODULE_PARM(vpmdtmfsupport, "i");
1751
MODULE_PARM(vpmtsisupport, "i");
1752
MODULE_PARM(vpmnlptype, "i");
1753
MODULE_PARM(vpmnlpthresh, "i");
1754
MODULE_PARM(vpmnlpmaxsupp, "i");
1758
#ifdef MODULE_LICENSE
1759
MODULE_LICENSE("GPL");
1762
module_init(te12xp_init);
1763
module_exit(te12xp_cleanup);