2
* zaphfc.c - Zaptel driver for HFC-S PCI A based ISDN BRI cards
4
* Copyright (C) 2006, headiisue GmbH; Jens Wilke
5
* Copyright (C) 2004 Daniele Orlandi
6
* Copyright (C) 2002, 2003, 2004, Junghanns.NET GmbH
8
* Jens Wilke <jw_vzaphfc@headissue.com>
10
* Original author of this code is
11
* Daniele "Vihai" Orlandi <daniele@orlandi.com>
13
* Major rewrite of the driver made by
14
* Klaus-Peter Junghanns <kpj@junghanns.net>
16
* This program is free software and may be modified and
17
* distributed under the terms of the GNU Public License.
19
* Please read the README file for important infos.
22
#include <linux/spinlock.h>
23
#include <linux/init.h>
24
#include <linux/pci.h>
25
#include <linux/interrupt.h>
26
#include <linux/module.h>
27
#include <linux/moduleparam.h>
28
#include <linux/version.h>
29
#include <linux/kernel.h>
30
#include <linux/delay.h>
31
#include <linux/proc_fs.h>
32
#include <linux/netdevice.h>
33
#include <linux/if_arp.h>
49
static int modes = 0; // all TE
50
static int nt_modes[hfc_MAX_BOARDS] = { [0 ... (hfc_MAX_BOARDS-1)] = -1 };
51
static int force_l1_up = 0;
52
static int sniff_zaptel_d_channel = 0;
53
static struct proc_dir_entry *hfc_proc_zaphfc_dir;
59
static struct pci_device_id hfc_pci_ids[] = {
60
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_2BD0,
61
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
62
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B000,
63
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
64
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B006,
65
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
66
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B007,
67
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
68
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B008,
69
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
70
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B009,
71
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
72
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B00A,
73
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
74
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B00B,
75
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
76
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B00C,
77
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
78
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B100,
79
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
80
{PCI_VENDOR_ID_ABOCOM, PCI_DEVICE_ID_ABOCOM_2BD1,
81
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
82
{PCI_VENDOR_ID_ASUSTEK, PCI_DEVICE_ID_ASUSTEK_0675,
83
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
84
{PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_T_CONCEPT,
85
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
86
{PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_A1T,
87
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
88
{PCI_VENDOR_ID_ANIGMA, PCI_DEVICE_ID_ANIGMA_MC145575,
89
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
90
{PCI_VENDOR_ID_ZOLTRIX, PCI_DEVICE_ID_ZOLTRIX_2BD0,
91
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
92
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_E,
93
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
94
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_E,
95
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
96
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_A,
97
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
98
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_A,
99
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
100
{PCI_VENDOR_ID_SITECOM, PCI_DEVICE_ID_SITECOM_3069,
101
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
105
MODULE_DEVICE_TABLE(pci, hfc_pci_ids);
107
static int __devinit hfc_probe(struct pci_dev *dev
108
, const struct pci_device_id *ent);
109
static void __devexit hfc_remove(struct pci_dev *dev);
111
struct pci_driver hfc_driver = {
112
.name = hfc_DRIVER_NAME,
113
.id_table = hfc_pci_ids,
115
.remove = hfc_remove,
118
/******************************************
120
******************************************/
122
static void hfc_softreset(struct hfc_card *card)
124
printk(KERN_INFO hfc_DRIVER_PREFIX
129
hfc_outb(card, hfc_CIRM, hfc_CIRM_RESET); // softreset on
130
udelay(6); // wait at least 5.21us
131
hfc_outb(card, hfc_CIRM, 0); // softreset off
133
set_current_state(TASK_UNINTERRUPTIBLE);
134
schedule_timeout((hfc_RESET_DELAY * HZ) / 1000); // wait 20 ms
137
void hfc_resetCard(struct hfc_card *card)
140
hfc_outb(card, hfc_INT_M1, card->regs.m1); // no ints
143
hfc_outb(card, hfc_INT_M2, card->regs.m2); // not at all
148
hfc_outb(card, hfc_TRM, card->regs.trm);
150
// Select the non-capacitive line mode for the S/T interface */
151
card->regs.sctrl = hfc_SCTRL_NONE_CAP;
154
// ST-Bit delay for NT-Mode
155
hfc_outb(card, hfc_CLKDEL, hfc_CLKDEL_NT);
157
card->regs.sctrl |= hfc_SCTRL_MODE_NT;
159
// ST-Bit delay for TE-Mode
160
hfc_outb(card, hfc_CLKDEL, hfc_CLKDEL_TE);
162
card->regs.sctrl |= hfc_SCTRL_MODE_TE;
165
hfc_outb(card, hfc_SCTRL, card->regs.sctrl);
168
card->regs.sctrl_e = hfc_SCTRL_E_AUTO_AWAKE;
169
hfc_outb(card, hfc_SCTRL_E, card->regs.sctrl_e);
171
// No B-channel enabled at startup
172
card->regs.sctrl_r = 0;
173
hfc_outb(card, hfc_SCTRL_R, card->regs.sctrl_r);
176
hfc_outb(card, hfc_MST_MODE, hfc_MST_MODE_MASTER);
178
// Connect internal blocks
180
hfc_CONNECT_B1_HFC_from_ST |
181
hfc_CONNECT_B1_ST_from_HFC |
182
hfc_CONNECT_B1_GCI_from_HFC |
183
hfc_CONNECT_B2_HFC_from_ST |
184
hfc_CONNECT_B2_ST_from_HFC |
185
hfc_CONNECT_B2_GCI_from_HFC;
186
hfc_outb(card, hfc_CONNECT, card->regs.connect);
188
// All bchans are HDLC by default, not useful, actually
189
// since mode is set during open()
190
hfc_outb(card, hfc_CTMT, 0);
193
hfc_outb(card, hfc_CIRM, 0);
195
// Enable D-rx FIFO. At least one FIFO must be enabled (by specs)
196
card->regs.fifo_en = hfc_FIFOEN_DRX;
197
hfc_outb(card, hfc_FIFO_EN, card->regs.fifo_en);
201
// Clear already pending ints
202
hfc_inb(card, hfc_INT_S1);
203
hfc_inb(card, hfc_INT_S2);
206
card->regs.m1 = hfc_INTS_DREC | hfc_INTS_L1STATE | hfc_INTS_TIMER;
207
hfc_outb(card, hfc_INT_M1, card->regs.m1);
209
card->regs.m2 = hfc_M2_IRQ_ENABLE;
210
hfc_outb(card, hfc_INT_M2, card->regs.m2);
212
// Unlocks the states machine
213
hfc_outb(card, hfc_STATES, 0);
215
// There's no need to explicitly activate L1 now.
216
// Activation is managed inside the interrupt routine.
219
static void hfc_update_fifo_state(struct hfc_card *card)
221
// I'm not sure if irqsave is needed but there could be a race
222
// condition since hfc_update_fifo_state could be called from
223
// both the IRQ handler and the *_(open|close) functions
226
spin_lock_irqsave(&card->chans[B1].lock, flags);
227
if (!card->fifo_suspended &&
228
(card->chans[B1].status == open_framed ||
229
card->chans[B1].status == open_voice)) {
231
if(!(card->regs.fifo_en & hfc_FIFOEN_B1RX)) {
232
card->regs.fifo_en |= hfc_FIFOEN_B1RX;
233
hfc_clear_fifo_rx(&card->chans[B1].rx);
236
if(!(card->regs.fifo_en & hfc_FIFOEN_B1TX)) {
237
card->regs.fifo_en |= hfc_FIFOEN_B1TX;
238
hfc_clear_fifo_tx(&card->chans[B1].tx);
241
if(card->regs.fifo_en & hfc_FIFOEN_B1RX)
242
card->regs.fifo_en &= ~hfc_FIFOEN_B1RX;
243
if(card->regs.fifo_en & hfc_FIFOEN_B1TX)
244
card->regs.fifo_en &= ~hfc_FIFOEN_B1TX;
246
spin_unlock_irqrestore(&card->chans[B1].lock, flags);
248
spin_lock_irqsave(&card->chans[B2].lock, flags);
249
if (!card->fifo_suspended &&
250
(card->chans[B2].status == open_framed ||
251
card->chans[B2].status == open_voice ||
252
card->chans[B2].status == sniff_aux)) {
254
if(!(card->regs.fifo_en & hfc_FIFOEN_B2RX)) {
255
card->regs.fifo_en |= hfc_FIFOEN_B2RX;
256
hfc_clear_fifo_rx(&card->chans[B2].rx);
259
if(!(card->regs.fifo_en & hfc_FIFOEN_B2TX)) {
260
card->regs.fifo_en |= hfc_FIFOEN_B2TX;
261
hfc_clear_fifo_tx(&card->chans[B2].tx);
264
if(card->regs.fifo_en & hfc_FIFOEN_B2RX)
265
card->regs.fifo_en &= ~hfc_FIFOEN_B2RX;
266
if(card->regs.fifo_en & hfc_FIFOEN_B2TX)
267
card->regs.fifo_en &= ~hfc_FIFOEN_B2TX;
269
spin_unlock_irqrestore(&card->chans[B2].lock, flags);
271
spin_lock_irqsave(&card->chans[D].lock, flags);
272
if (!card->fifo_suspended &&
273
card->chans[D].status == open_framed) {
275
// if(!(card->regs.fifo_en & hfc_FIFOEN_DRX)) {
276
// hfc_clear_fifo_rx(&card->chans[B2].rx);
278
// card->chans[B2].rx.ugly_framebuf_size = 0;
279
// card->chans[B2].rx.ugly_framebuf_off = 0;
282
if(!(card->regs.fifo_en & hfc_FIFOEN_DTX)) {
283
card->regs.fifo_en |= hfc_FIFOEN_DTX;
285
card->chans[D].tx.ugly_framebuf_size = 0;
286
card->chans[D].tx.ugly_framebuf_off = 0;
289
// if(card->regs.fifo_en & hfc_FIFOEN_DRX)
290
// card->regs.fifo_en &= ~hfc_FIFOEN_DRX;
291
if(card->regs.fifo_en & hfc_FIFOEN_DTX)
292
card->regs.fifo_en &= ~hfc_FIFOEN_DTX;
294
spin_unlock_irqrestore(&card->chans[D].lock, flags);
296
hfc_outb(card, hfc_FIFO_EN, card->regs.fifo_en);
299
static inline void hfc_suspend_fifo(struct hfc_card *card)
301
card->fifo_suspended = TRUE;
303
hfc_update_fifo_state(card);
305
// When L1 goes down D rx receives garbage; it is nice to
306
// clear it to avoid a CRC error on reactivation
307
// udelay is needed because the FIFO deactivation happens
310
hfc_clear_fifo_rx(&card->chans[D].rx);
313
if (debug_level >= 3) {
314
printk(KERN_DEBUG hfc_DRIVER_PREFIX
322
static inline void hfc_resume_fifo(struct hfc_card *card)
324
card->fifo_suspended = FALSE;
326
hfc_update_fifo_state(card);
329
if (debug_level >= 3) {
330
printk(KERN_DEBUG hfc_DRIVER_PREFIX
338
static void hfc_check_l1_up(struct hfc_card *card)
340
if ((!card->nt_mode && card->l1_state != 7) ||
341
(card->nt_mode && card->l1_state != 3)) {
342
// 0 because this is quite verbose when an inferface is unconnected, jaw
344
if(debug_level >= 1) {
345
printk(KERN_DEBUG hfc_DRIVER_PREFIX
347
"L1 is down, bringing up L1.\n",
352
hfc_outb(card, hfc_STATES, hfc_STATES_DO_ACTION |
354
hfc_STATES_NT_G2_G3);
358
/******************************************
359
* /proc interface functions
360
******************************************/
362
struct hfc_status_to_name_names {
363
enum hfc_chan_status status;
367
static char *hfc_status_to_name(int status)
369
struct hfc_status_to_name_names names[] = {
371
{ open_framed, "framed" },
372
{ open_voice, "voice" },
373
{ sniff_aux, "sniff aux" },
374
{ loopback, "loopback" },
379
for (i=0; i<sizeof(names); i++) {
380
if (names[i].status == status)
381
return names[i].name;
387
static void hfc_hexdump(char *src,char *dst, int size)
389
static char hexchars[] = "0123456789ABCDEF";
392
for(i=0;i<size;i++) {
393
dst[i*2] = hexchars[(src[i] & 0xf0) >> 4];
394
dst[i*2+1]= hexchars[src[i] & 0xf];
400
static int hfc_proc_read_info(char *page, char **start,
401
off_t off, int count,
402
int *eof, void *data)
404
struct hfc_card *card = data;
408
chip_id = hfc_inb(card, hfc_CHIP_ID);
410
len = snprintf(page, PAGE_SIZE,
414
"PCI Mem : %#08lx (0x%p)\n"
415
"FIFO Mem : %#08lx (0x%p)\n"
422
"\nChannel %12s %12s %12s %12s %4s %4s %4s %4s %4s\n"
423
"D : %12llu %12llu %12llu %12llu %4llu %4llu %4llu %4llu %4llu %c%c %s\n"
424
"B1 : %12llu %12llu %12llu %12llu %4llu %4llu %4llu %4llu %4llu %c%c %s\n"
425
"B2 : %12llu %12llu %12llu %12llu %4llu %4llu %4llu %4llu %4llu %c%c %s\n"
429
,card->io_bus_mem, card->io_mem
430
,(ulong)card->fifo_bus_mem, card->fifo_mem
431
,card->nt_mode?"NT":"TE"
433
,card->nt_mode?'G':'F'
435
,card->sync_loss_reported?"YES":"NO"
437
,card->fifo_suspended?"YES":"NO"
439
,"RX Frames","TX Frames","RX Bytes","TX Bytes","RXFF","TXFF","RXU","TXU","CRC"
440
,card->chans[D].rx.frames
441
,card->chans[D].tx.frames
442
,card->chans[D].rx.bytes
443
,card->chans[D].tx.bytes
444
,card->chans[D].rx.fifo_full
445
,card->chans[D].tx.fifo_full
446
,card->chans[D].rx.fifo_underrun
447
,card->chans[D].tx.fifo_underrun
448
,card->chans[D].rx.crc
449
,card->chans[D].open_by_netdev ? 'N' : ' '
450
,card->chans[D].open_by_zaptel ? 'Z' : ' '
451
,hfc_status_to_name(card->chans[D].status)
453
,card->chans[B1].rx.frames
454
,card->chans[B1].tx.frames
455
,card->chans[B1].rx.bytes
456
,card->chans[B1].tx.bytes
457
,card->chans[B1].rx.fifo_full
458
,card->chans[B1].tx.fifo_full
459
,card->chans[B1].rx.fifo_underrun
460
,card->chans[B1].tx.fifo_underrun
461
,card->chans[B1].rx.crc
462
,card->chans[B1].open_by_netdev ? 'N' : ' '
463
,card->chans[B1].open_by_zaptel ? 'Z' : ' '
464
,hfc_status_to_name(card->chans[B1].status)
466
,card->chans[B2].rx.frames
467
,card->chans[B2].tx.frames
468
,card->chans[B2].rx.bytes
469
,card->chans[B2].tx.bytes
470
,card->chans[B2].rx.fifo_full
471
,card->chans[B2].tx.fifo_full
472
,card->chans[B2].rx.fifo_underrun
473
,card->chans[B2].tx.fifo_underrun
474
,card->chans[B2].rx.crc
475
,card->chans[B2].open_by_netdev ? 'N' : ' '
476
,card->chans[B2].open_by_zaptel ? 'Z' : ' '
477
,hfc_status_to_name(card->chans[B2].status)
483
static int hfc_proc_read_fifos(char *page, char **start,
484
off_t off, int count,
485
int *eof, void *data)
487
struct hfc_card *card = data;
490
len = snprintf(page, PAGE_SIZE,
491
" Receive Transmit\n"
492
"Channel F1 F2 Z1 Z2 Used F1 F2 Z1 Z2 Used\n"
493
"D : %02x %02x %04x %04x %4d %02x %02x %04x %04x %4d\n"
494
"B1 : %02x %02x %04x %04x %4d %02x %02x %04x %04x %4d\n"
495
"B2 : %02x %02x %04x %04x %4d %02x %02x %04x %04x %4d\n"
496
,*card->chans[D].rx.f1
497
,*card->chans[D].rx.f2
498
,*Z1_F2(&card->chans[D].rx)
499
,*Z2_F2(&card->chans[D].rx)
500
,hfc_fifo_used_rx(&card->chans[D].rx)
501
,*card->chans[D].tx.f1
502
,*card->chans[D].tx.f2
503
,*Z1_F1(&card->chans[D].tx)
504
,*Z2_F1(&card->chans[D].tx)
505
,hfc_fifo_used_tx(&card->chans[D].tx)
507
,*card->chans[B1].rx.f1
508
,*card->chans[B1].rx.f2
509
,*Z1_F2(&card->chans[B1].rx)
510
,*Z2_F2(&card->chans[B1].rx)
511
,hfc_fifo_used_rx(&card->chans[B1].rx)
512
,*card->chans[B1].tx.f1
513
,*card->chans[B1].tx.f2
514
,*Z1_F1(&card->chans[B1].tx)
515
,*Z2_F1(&card->chans[B1].tx)
516
,hfc_fifo_used_tx(&card->chans[B1].tx)
518
,*card->chans[B2].rx.f1
519
,*card->chans[B2].rx.f2
520
,*Z1_F2(&card->chans[B2].rx)
521
,*Z2_F2(&card->chans[B2].rx)
522
,hfc_fifo_used_rx(&card->chans[B2].rx)
523
,*card->chans[B2].tx.f1
524
,*card->chans[B2].tx.f2
525
,*Z1_F1(&card->chans[B2].tx)
526
,*Z2_F1(&card->chans[B2].tx)
527
,hfc_fifo_used_tx(&card->chans[B2].tx)
533
static int hfc_proc_read_bufs(char *page, char **start,
534
off_t off, int count,
535
int *eof, void *data)
537
struct hfc_card *card = data;
540
char hex_rchunk[3][ZT_CHUNKSIZE * 2 + 1];
541
char hex_wchunk[3][ZT_CHUNKSIZE * 2 + 1];
543
hfc_hexdump(card->chans[D].rx.zaptel_buffer, hex_rchunk[0], ZT_CHUNKSIZE);
544
hfc_hexdump(card->chans[D].tx.zaptel_buffer, hex_wchunk[0], ZT_CHUNKSIZE);
545
hfc_hexdump(card->chans[B1].rx.zaptel_buffer, hex_rchunk[1], ZT_CHUNKSIZE);
546
hfc_hexdump(card->chans[B1].tx.zaptel_buffer, hex_wchunk[1], ZT_CHUNKSIZE);
547
hfc_hexdump(card->chans[B2].rx.zaptel_buffer, hex_rchunk[2], ZT_CHUNKSIZE);
548
hfc_hexdump(card->chans[B2].tx.zaptel_buffer, hex_wchunk[2], ZT_CHUNKSIZE);
550
len = snprintf(page, PAGE_SIZE,
551
"Channel Read Chunk Write Chunk\n"
555
,hex_rchunk[0],hex_wchunk[0]
556
,hex_rchunk[1],hex_wchunk[1]
557
,hex_rchunk[2],hex_wchunk[2]
563
/******************************************
564
* net_device interface functions
565
******************************************/
567
static int hfc_open(struct net_device *netdev)
569
struct hfc_chan_duplex *chan = netdev->priv;
570
struct hfc_card *card = chan->card;
572
spin_lock(&chan->lock);
574
if (chan->status != free &&
575
(chan->number != D || chan->status != open_framed)) {
576
spin_unlock(&chan->lock);
580
chan->status = open_framed;
581
chan->open_by_netdev = TRUE;
583
spin_unlock(&chan->lock);
585
printk(KERN_INFO hfc_DRIVER_PREFIX
594
static int hfc_close(struct net_device *netdev)
596
struct hfc_chan_duplex *chan = netdev->priv;
597
struct hfc_card *card = chan->card;
599
spin_lock(&chan->lock);
601
if (chan->status != open_framed) {
602
spin_unlock(&chan->lock);
607
chan->open_by_netdev = FALSE;
609
spin_unlock(&chan->lock);
611
printk(KERN_INFO hfc_DRIVER_PREFIX
620
static int hfc_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
622
struct hfc_chan_duplex *chan = netdev->priv;
623
struct hfc_card *card = chan->card;
625
netdev->trans_start = jiffies;
627
hfc_check_l1_up(card);
629
hfc_fifo_put_frame(&chan->tx, skb->data, skb->len);
631
// We're not called from IRQ handler, otherwise we'd need
638
static struct net_device_stats *hfc_get_stats(struct net_device *netdev)
640
struct hfc_chan_duplex *chan = netdev->priv;
641
// struct hfc_card *card = chan->card;
643
return &chan->net_device_stats;
646
static void hfc_set_multicast_list(struct net_device *netdev)
648
struct hfc_chan_duplex *chan = netdev->priv;
649
struct hfc_card *card = chan->card;
651
spin_lock(&card->lock);
653
if(netdev->flags & IFF_PROMISC && !card->echo_enabled) {
655
printk(KERN_INFO hfc_DRIVER_PREFIX
657
"is in NT mode, not going promiscuous\n",
660
spin_unlock(&card->lock);
664
if (card->chans[B2].status != free) {
665
printk(KERN_INFO hfc_DRIVER_PREFIX
667
"chan %s: is busy, not going promiscuous\n",
669
card->chans[B2].name);
671
spin_unlock(&card->lock);
675
card->regs.trm |= hfc_TRM_ECHO;
676
card->regs.m1 |= hfc_INTS_B2REC;
677
card->regs.cirm &= ~hfc_CIRM_B2_REV;
678
card->regs.sctrl &= ~hfc_SCTRL_B2_ENA;
679
card->regs.sctrl_r &= ~hfc_SCTRL_R_B2_ENA;
680
card->regs.connect |= hfc_CONNECT_B2_ST_from_GCI;
681
card->regs.ctmt &= ~hfc_CTMT_TRANSB2;
683
card->chans[B2].status = sniff_aux;
685
card->echo_enabled = TRUE;
687
printk(KERN_INFO hfc_DRIVER_PREFIX
689
"chan %s entered echo mode on channel %s\n",
692
card->chans[B2].name);
694
} else if(!(netdev->flags & IFF_PROMISC) && card->echo_enabled) {
695
if (!card->echo_enabled) {
696
spin_unlock(&card->lock);
700
card->regs.trm &= ~hfc_TRM_ECHO;
701
card->regs.m1 &= ~hfc_INTS_B2REC;
702
card->regs.cirm |= hfc_CIRM_B2_REV;
703
card->regs.sctrl &= ~hfc_SCTRL_B2_ENA;
704
card->regs.sctrl_r &= ~hfc_SCTRL_R_B2_ENA;
706
hfc_CONNECT_B1_HFC_from_ST |
707
hfc_CONNECT_B1_ST_from_HFC |
708
hfc_CONNECT_B1_GCI_from_HFC |
709
hfc_CONNECT_B2_HFC_from_ST |
710
hfc_CONNECT_B2_ST_from_HFC |
711
hfc_CONNECT_B2_GCI_from_HFC;
713
card->chans[B2].status = free;
715
card->echo_enabled = FALSE;
717
printk(KERN_INFO hfc_DRIVER_PREFIX
719
"chan %s left promiscuous mode.\n",
724
spin_unlock(&card->lock);
726
hfc_outb(card, hfc_TRM, card->regs.trm);
727
hfc_outb(card, hfc_CIRM, card->regs.cirm);
728
hfc_outb(card, hfc_SCTRL, card->regs.sctrl);
729
hfc_outb(card, hfc_SCTRL_R, card->regs.sctrl_r);
730
hfc_outb(card, hfc_CONNECT, card->regs.connect);
731
hfc_outb(card, hfc_CTMT, card->regs.ctmt);
733
// Enable appropriate B receive interrupt
734
hfc_outb(card, hfc_INT_M1, card->regs.m1);
736
hfc_update_fifo_state(card);
739
/******************************************
740
* Zaptel interface (zaptel sucks)
741
******************************************/
743
static int hfc_zap_open(struct zt_chan *zaptel_chan)
745
struct hfc_chan_duplex *chan = zaptel_chan->pvt;
746
struct hfc_card *card = chan->card;
748
spin_lock(&chan->lock);
750
switch (chan->number) {
752
if (chan->status != free &&
753
chan->status != open_framed) {
754
spin_unlock(&chan->lock);
758
chan->status = open_framed;
763
if (chan->status != free) {
764
spin_unlock(&chan->lock);
768
chan->status = open_voice;
772
chan->open_by_zaptel = TRUE;
778
try_module_get(THIS_MODULE);
781
spin_unlock(&chan->lock);
783
switch (chan->number) {
789
card->regs.m2 |= hfc_M2_PROC_TRANS;
790
card->regs.ctmt |= hfc_CTMT_TRANSB1; // Enable transparent mode
791
card->regs.cirm |= hfc_CIRM_B1_REV; // Reversed bit order
792
card->regs.sctrl |= hfc_SCTRL_B1_ENA; // Enable transmission
793
card->regs.sctrl_r |= hfc_SCTRL_R_B1_ENA; // Enable reception
798
card->regs.m2 |= hfc_M2_PROC_TRANS;
799
card->regs.ctmt |= hfc_CTMT_TRANSB2; // Enable transparent mode
800
card->regs.cirm |= hfc_CIRM_B2_REV; // Reversed bit order
801
card->regs.sctrl |= hfc_SCTRL_B2_ENA; // Enable transmission
802
card->regs.sctrl_r |= hfc_SCTRL_R_B2_ENA; // Enable reception
807
// If not already enabled, enable processing transition (8KHz)
809
hfc_outb(card, hfc_INT_M2, card->regs.m2);
810
hfc_outb(card, hfc_CTMT, card->regs.ctmt);
811
hfc_outb(card, hfc_CIRM, card->regs.cirm);
812
hfc_outb(card, hfc_SCTRL, card->regs.sctrl);
813
hfc_outb(card, hfc_SCTRL_R, card->regs.sctrl_r);
815
hfc_update_fifo_state(card);
817
printk(KERN_INFO hfc_DRIVER_PREFIX
819
"chan %s opened as %s.\n",
827
static int hfc_zap_close(struct zt_chan *zaptel_chan)
829
struct hfc_chan_duplex *chan = zaptel_chan->pvt;
830
struct hfc_card *card = chan->card;
833
printk(KERN_CRIT hfc_DRIVER_PREFIX
834
"hfc_zap_close called with NULL card\n");
838
spin_lock(&chan->lock);
840
if (chan->status == free) {
841
spin_unlock(&chan->lock);
846
chan->open_by_zaptel = FALSE;
848
spin_unlock(&chan->lock);
850
switch (chan->number) {
856
card->regs.ctmt &= ~hfc_CTMT_TRANSB1;
857
card->regs.cirm &= ~hfc_CIRM_B1_REV;
858
card->regs.sctrl &= ~hfc_SCTRL_B1_ENA;
859
card->regs.sctrl_r &= ~hfc_SCTRL_R_B1_ENA;
864
card->regs.ctmt &= ~hfc_CTMT_TRANSB2;
865
card->regs.cirm &= ~hfc_CIRM_B2_REV;
866
card->regs.sctrl &= ~hfc_SCTRL_B2_ENA;
867
card->regs.sctrl_r &= ~hfc_SCTRL_R_B2_ENA;
871
if (card->chans[B1].status == free &&
872
card->chans[B2].status == free)
873
card->regs.m2 &= ~hfc_M2_PROC_TRANS;
875
hfc_outb(card, hfc_INT_M2, card->regs.m2);
876
hfc_outb(card, hfc_CTMT, card->regs.ctmt);
877
hfc_outb(card, hfc_CIRM, card->regs.cirm);
878
hfc_outb(card, hfc_SCTRL, card->regs.sctrl);
879
hfc_outb(card, hfc_SCTRL_R, card->regs.sctrl_r);
881
hfc_update_fifo_state(card);
887
module_put(THIS_MODULE);
890
printk(KERN_INFO hfc_DRIVER_PREFIX
892
"chan %s closed as %s.\n",
900
static int hfc_zap_rbsbits(struct zt_chan *chan, int bits)
905
static int hfc_zap_ioctl(struct zt_chan *chan, unsigned int cmd, unsigned long data)
915
static int hfc_zap_startup(struct zt_span *span)
917
struct hfc_card *card = span->pvt;
921
printk(KERN_INFO hfc_DRIVER_PREFIX
923
"no card for span at startup!\n",
927
alreadyrunning = span->flags & ZT_FLAG_RUNNING;
929
if (!alreadyrunning) {
930
span->chans[ZT_D].flags &= ~ZT_FLAG_HDLC;
931
span->chans[ZT_D].flags |= ZT_FLAG_BRIDCHAN;
932
span->flags |= ZT_FLAG_RUNNING;
938
static int hfc_zap_shutdown(struct zt_span *span)
943
static int hfc_zap_maint(struct zt_span *span, int cmd)
948
static int hfc_zap_chanconfig(struct zt_chan *chan, int sigtype)
953
static int hfc_zap_spanconfig(struct zt_span *span, struct zt_lineconfig *lc)
955
span->lineconfig = lc->lineconfig;
960
static int hfc_zap_initialize(struct hfc_card *card)
963
memset(&card->zt_span, 0x0, sizeof(struct zt_span));
965
snprintf(card->zt_span.name, sizeof(card->zt_span.name),
966
"ZTHFC%d", card->cardnum + 1);
968
snprintf(card->zt_span.desc, sizeof(card->zt_span.desc),
969
hfc_DRIVER_DESCR " card %d [%s]",
971
card->nt_mode?"NT":"TE");
973
card->zt_span.spanconfig = hfc_zap_spanconfig;
974
card->zt_span.chanconfig = hfc_zap_chanconfig;
975
card->zt_span.startup = hfc_zap_startup;
976
card->zt_span.shutdown = hfc_zap_shutdown;
977
card->zt_span.maint = hfc_zap_maint;
978
card->zt_span.rbsbits = hfc_zap_rbsbits;
979
card->zt_span.open = hfc_zap_open;
980
card->zt_span.close = hfc_zap_close;
981
card->zt_span.ioctl = hfc_zap_ioctl;
983
card->zt_span.chans = card->zt_chans;
984
card->zt_span.channels = 3;
985
card->zt_span.deflaw = ZT_LAW_ALAW;
986
card->zt_span.linecompat = ZT_CONFIG_AMI | ZT_CONFIG_CCS; // <--- this is really BS
987
card->zt_span.offset = 0;
988
init_waitqueue_head(&card->zt_span.maintq);
989
card->zt_span.pvt = card;
991
for (i = 0; i < card->zt_span.channels; i++) {
992
memset(&card->zt_chans[i], 0x0, sizeof(struct zt_chan));
994
snprintf(card->zt_chans[i].name, sizeof(card->zt_chans[i].name),
996
card->cardnum + 1, 0, i + 1);
998
printk(KERN_INFO hfc_DRIVER_PREFIX
1002
card->zt_chans[i].name);
1004
card->zt_chans[i].sigcap = ZT_SIG_EM | ZT_SIG_CLEAR |
1005
ZT_SIG_FXSLS | ZT_SIG_FXSGS |
1006
ZT_SIG_FXSKS | ZT_SIG_FXOLS |
1007
ZT_SIG_FXOGS | ZT_SIG_FXOKS |
1008
ZT_SIG_CAS | ZT_SIG_SF;
1010
card->zt_chans[i].chanpos = i + 1;
1013
card->zt_chans[ZT_D].readchunk = card->chans[D].rx.zaptel_buffer;
1014
card->zt_chans[ZT_D].writechunk = card->chans[D].tx.zaptel_buffer;
1015
card->zt_chans[ZT_D].pvt = &card->chans[D];
1017
card->zt_chans[ZT_B1].readchunk = card->chans[B1].rx.zaptel_buffer;
1018
card->zt_chans[ZT_B1].writechunk = card->chans[B1].tx.zaptel_buffer;
1019
card->zt_chans[ZT_B1].pvt = &card->chans[B1];
1021
card->zt_chans[ZT_B2].readchunk = card->chans[B2].rx.zaptel_buffer;
1022
card->zt_chans[ZT_B2].writechunk = card->chans[B2].tx.zaptel_buffer;
1023
card->zt_chans[ZT_B2].pvt = &card->chans[B2];
1025
if (zt_register(&card->zt_span,0)) {
1026
printk(KERN_CRIT "unable to register zaptel device!\n");
1033
static void hfc_zap_transmit(struct hfc_chan_simplex *chan)
1035
hfc_fifo_put(chan, chan->zaptel_buffer, ZT_CHUNKSIZE);
1038
static void hfc_zap_receive(struct hfc_chan_simplex *chan)
1040
hfc_fifo_get(chan, chan->zaptel_buffer, ZT_CHUNKSIZE);
1043
/******************************************
1045
******************************************/
1047
static void hfc_handle_timer_interrupt(struct hfc_card *card);
1048
static void hfc_handle_state_interrupt(struct hfc_card *card);
1049
static void hfc_handle_processing_interrupt(struct hfc_card *card);
1050
static void hfc_frame_arrived(struct hfc_chan_duplex *chan);
1051
static void hfc_handle_voice(struct hfc_card *card);
1053
ZAP_IRQ_HANDLER(hfc_interrupt)
1055
struct hfc_card *card = dev_id;
1056
unsigned long flags;
1060
printk(KERN_CRIT hfc_DRIVER_PREFIX
1061
"spurious interrupt (IRQ %d)\n",
1066
spin_lock_irqsave(&card->lock, flags);
1067
status = hfc_inb(card, hfc_STATUS);
1068
if (!(status & hfc_STATUS_ANYINT)) {
1069
// maybe we are sharing the irq
1070
spin_unlock_irqrestore(&card->lock,flags);
1074
/* We used to ingore the IRQ when the card was in processing
1075
* state but apparently there is no restriction to access the
1076
* card in such state:
1078
* Joerg Ciesielski wrote:
1079
* > There is no restriction for the IRQ handler to access
1080
* > HFC-S PCI during processing phase. A IRQ latency of 375 us
1081
* > is also no problem since there are no interrupt sources in
1082
* > HFC-S PCI which must be handled very fast.
1083
* > Due to its deep fifos the IRQ latency can be several ms with
1084
* > out the risk of loosing data. Even the S/T state interrupts
1085
* > must not be handled with a latency less than <5ms.
1087
* > The processing phase only indicates that HFC-S PCI is
1088
* > processing the Fifos as PCI master so that data is read and
1089
* > written in the 32k memory window. But there is no restriction
1090
* > to access data in the memory window during this time.
1092
* // if (status & hfc_STATUS_PCI_PROC) {
1093
* // return IRQ_HANDLED;
1097
s1 = hfc_inb(card, hfc_INT_S1);
1098
s2 = hfc_inb(card, hfc_INT_S2);
1101
if (s1 & hfc_INTS_TIMER) {
1103
hfc_handle_timer_interrupt(card);
1106
if (s1 & hfc_INTS_L1STATE) {
1107
// state machine (bit 6)
1108
hfc_handle_state_interrupt(card);
1111
if (s1 & hfc_INTS_DREC) {
1112
// D chan RX (bit 5)
1113
hfc_frame_arrived(&card->chans[D]);
1116
if (s1 & hfc_INTS_B1REC) {
1117
// B1 chan RX (bit 3)
1118
hfc_frame_arrived(&card->chans[B1]);
1121
if (s1 & hfc_INTS_B2REC) {
1122
// B2 chan RX (bit 4)
1123
hfc_frame_arrived(&card->chans[B2]);
1126
if (s1 & hfc_INTS_DTRANS) {
1127
// D chan TX (bit 2)
1130
if (s1 & hfc_INTS_B1TRANS) {
1131
// B1 chan TX (bit 0)
1134
if (s1 & hfc_INTS_B2TRANS) {
1135
// B2 chan TX (bit 1)
1141
if (s2 & hfc_M2_PMESEL) {
1142
// kaboom irq (bit 7)
1144
/* CologneChip says:
1146
* the meaning of this fatal error bit is that HFC-S PCI as PCI
1147
* master could not access the PCI bus within 125us to finish its
1148
* data processing. If this happens only very seldom it does not
1149
* cause big problems but of course some B-channel or D-channel
1150
* data will be corrupted due to this event.
1152
* Unfortunately this bit is only set once after the problem occurs
1153
* and can only be reseted by a software reset. That means it is not
1154
* easily possible to check how often this fatal error happens.
1157
if(!card->sync_loss_reported) {
1158
printk(KERN_CRIT hfc_DRIVER_PREFIX
1160
"sync lost, pci performance too low!\n",
1163
card->sync_loss_reported = TRUE;
1167
if (s2 & hfc_M2_GCI_MON_REC) {
1168
// RxR monitor channel (bit 2)
1171
if (s2 & hfc_M2_GCI_I_CHG) {
1172
// GCI I-change (bit 1)
1175
if (s2 & hfc_M2_PROC_TRANS){
1176
// processing/non-processing transition (bit 0)
1177
hfc_handle_processing_interrupt(card);
1182
spin_unlock_irqrestore(&card->lock,flags);
1187
static void hfc_handle_timer_interrupt(struct hfc_card *card)
1189
if(card->ignore_first_timer_interrupt) {
1190
card->ignore_first_timer_interrupt = FALSE;
1194
if ((card->nt_mode && card->l1_state == 3) ||
1195
(!card->nt_mode && card->l1_state == 7)) {
1197
card->regs.ctmt &= ~hfc_CTMT_TIMER_MASK;
1198
hfc_outb(card, hfc_CTMT, card->regs.ctmt);
1200
hfc_resume_fifo(card);
1204
static void hfc_handle_state_interrupt(struct hfc_card *card)
1206
u8 new_state = hfc_inb(card,hfc_STATES) & hfc_STATES_STATE_MASK;
1209
if (debug_level >= 1) {
1210
printk(KERN_DEBUG hfc_DRIVER_PREFIX
1212
"layer 1 state = %c%d\n",
1214
card->nt_mode?'G':'F',
1219
if (card->nt_mode) {
1222
if (new_state == 3) {
1223
// fix to G3 state (see specs)
1224
hfc_outb(card, hfc_STATES, hfc_STATES_LOAD_STATE | 3);
1227
if (new_state == 3 && card->l1_state != 3) {
1228
hfc_resume_fifo(card);
1231
if (new_state != 3 && card->l1_state == 3) {
1232
hfc_suspend_fifo(card);
1235
if (new_state == 3) {
1236
// Keep L1 up... zaptel & libpri expects a always up L1...
1237
// Enable only when using an unpatched libpri
1240
hfc_outb(card, hfc_STATES,
1241
hfc_STATES_DO_ACTION |
1242
hfc_STATES_ACTIVATE|
1243
hfc_STATES_NT_G2_G3);
1247
if (new_state == 7 && card->l1_state != 7) {
1248
// TE is now active, schedule FIFO activation after
1249
// some time, otherwise the first frames are lost
1251
card->regs.ctmt |= hfc_CTMT_TIMER_50 | hfc_CTMT_TIMER_CLEAR;
1252
hfc_outb(card, hfc_CTMT, card->regs.ctmt);
1254
// Activating the timer firest an interrupt immediately, we
1255
// obviously need to ignore it
1256
card->ignore_first_timer_interrupt = TRUE;
1259
if (new_state != 7 && card->l1_state == 7) {
1260
// TE has become inactive, disable FIFO
1261
hfc_suspend_fifo(card);
1265
card->l1_state = new_state;
1268
static void hfc_handle_processing_interrupt(struct hfc_card *card)
1270
int available_bytes=0;
1272
// Synchronize with the first enabled channel
1273
if(card->regs.fifo_en & hfc_FIFOEN_B1RX)
1274
available_bytes = hfc_fifo_used_rx(&card->chans[B1].rx);
1275
if(card->regs.fifo_en & hfc_FIFOEN_B2RX)
1276
available_bytes = hfc_fifo_used_rx(&card->chans[B2].rx);
1278
available_bytes = -1;
1280
if ((available_bytes == -1 && card->ticks == 8) ||
1281
available_bytes >= ZT_CHUNKSIZE + hfc_RX_FIFO_PRELOAD) {
1284
if (available_bytes > ZT_CHUNKSIZE*2 + hfc_RX_FIFO_PRELOAD) {
1286
// we are out of sync, clear fifos, jaw
1287
hfc_clear_fifo_rx(&card->chans[B1].rx);
1288
hfc_clear_fifo_tx(&card->chans[B1].tx);
1289
hfc_clear_fifo_rx(&card->chans[B2].rx);
1290
hfc_clear_fifo_tx(&card->chans[B2].tx);
1293
if (debug_level >= 4) {
1294
printk(KERN_DEBUG hfc_DRIVER_PREFIX
1296
"late IRQ, %d bytes late\n",
1300
hfc_RX_FIFO_PRELOAD));
1304
hfc_handle_voice(card);
1311
static void hfc_sniff_zaptel_d_channel(struct hfc_card *card)
1313
struct sk_buff *skb =
1314
dev_alloc_skb(card->chans[D].tx.ugly_framebuf_size);
1317
printk(KERN_ERR hfc_DRIVER_PREFIX
1319
"cannot allocate skb: sniffed frame dropped\n",
1324
skb->dev = card->chans[D].netdev;
1325
skb->protocol = htons(card->chans[D].protocol);
1327
skb->ip_summed = CHECKSUM_COMPLETE;
1329
skb->ip_summed = CHECKSUM_HW;
1331
skb->pkt_type = PACKET_OUTGOING;
1333
memcpy(skb_put(skb, card->chans[D].tx.ugly_framebuf_size),
1334
card->chans[D].tx.ugly_framebuf,
1335
card->chans[D].tx.ugly_framebuf_size);
1340
static void hfc_handle_voice(struct hfc_card *card)
1342
if (card->chans[B1].status != open_voice &&
1343
card->chans[B2].status != open_voice)
1346
card->zt_chans[ZT_D].bytes2transmit = 0;
1347
card->zt_chans[ZT_D].maxbytes2transmit = ZT_CHUNKSIZE;
1349
zt_transmit(&card->zt_span);
1351
if (card->regs.fifo_en & hfc_FIFOEN_B1TX)
1352
hfc_zap_transmit(&card->chans[B1].tx);
1353
if (card->regs.fifo_en & hfc_FIFOEN_B2TX)
1354
hfc_zap_transmit(&card->chans[B2].tx);
1356
if (card->zt_chans[ZT_D].bytes2transmit) {
1357
hfc_check_l1_up(card);
1359
memcpy(card->chans[D].tx.ugly_framebuf +
1360
card->chans[D].tx.ugly_framebuf_size,
1361
card->chans[D].tx.zaptel_buffer,
1362
card->zt_chans[ZT_D].bytes2transmit);
1364
card->chans[D].tx.ugly_framebuf_size +=
1365
card->zt_chans[ZT_D].bytes2transmit;
1367
if (card->zt_chans[ZT_D].eoftx) {
1368
hfc_fifo_put_frame(&card->chans[D].tx,
1369
card->chans[D].tx.ugly_framebuf,
1370
card->chans[D].tx.ugly_framebuf_size);
1372
if (sniff_zaptel_d_channel)
1373
hfc_sniff_zaptel_d_channel(card);
1375
card->chans[D].tx.ugly_framebuf_size = 0;
1376
card->zt_chans[ZT_D].eoftx = FALSE;
1380
if (card->regs.fifo_en & hfc_FIFOEN_B1RX)
1381
hfc_zap_receive(&card->chans[B1].rx);
1383
memset(&card->chans[B1].rx.zaptel_buffer, 0x7f,
1384
sizeof(card->chans[B1].rx.zaptel_buffer));
1386
if (card->regs.fifo_en & hfc_FIFOEN_B2RX)
1387
hfc_zap_receive(&card->chans[B2].rx);
1389
memset(&card->chans[B2].rx.zaptel_buffer, 0x7f,
1390
sizeof(card->chans[B1].rx.zaptel_buffer));
1392
// Echo cancellation
1393
zt_ec_chunk(&card->zt_chans[ZT_B1],
1394
card->chans[B1].rx.zaptel_buffer,
1395
card->chans[B1].tx.zaptel_buffer);
1396
zt_ec_chunk(&card->zt_chans[ZT_B2],
1397
card->chans[B2].rx.zaptel_buffer,
1398
card->chans[B2].tx.zaptel_buffer);
1400
// If there's a frame in the FIFO, read it all and make it
1401
// available to zaptel
1402
if (hfc_fifo_has_frames(&card->chans[D].rx)) {
1403
hfc_frame_arrived(&card->chans[D]);
1406
// Stupid zaptel frame handling
1407
if (!card->chans[D].rx.ugly_framebuf_size) {
1408
// hmm....ok, let zaptel receive nothing
1409
card->zt_chans[ZT_D].bytes2receive = 0;
1410
card->zt_chans[ZT_D].eofrx = FALSE;
1412
else if (card->chans[D].rx.ugly_framebuf_size -
1413
card->chans[D].rx.ugly_framebuf_off > ZT_CHUNKSIZE) {
1415
// the frame is longer than ZT_CHUNKSIZE
1416
memcpy(card->chans[D].rx.zaptel_buffer,
1417
card->chans[D].rx.ugly_framebuf+
1418
card->chans[D].rx.ugly_framebuf_off,
1421
card->zt_chans[ZT_D].bytes2receive = ZT_CHUNKSIZE;
1422
card->zt_chans[ZT_D].eofrx = FALSE;
1424
card->chans[D].rx.ugly_framebuf_off += ZT_CHUNKSIZE;
1426
// we can read it all
1427
memcpy(card->chans[D].rx.zaptel_buffer,
1428
card->chans[D].rx.ugly_framebuf+
1429
card->chans[D].rx.ugly_framebuf_off,
1430
card->chans[D].rx.ugly_framebuf_size);
1432
card->zt_chans[ZT_D].bytes2receive = card->chans[D].rx.ugly_framebuf_size-
1433
card->chans[D].rx.ugly_framebuf_off;
1434
card->zt_chans[ZT_D].eofrx = TRUE;
1436
card->chans[D].rx.ugly_framebuf_size = 0;
1437
card->chans[D].rx.ugly_framebuf_off = 0;
1440
if (card->zt_span.flags & ZT_FLAG_RUNNING) {
1441
zt_receive(&card->zt_span);
1446
static void hfc_frame_arrived(struct hfc_chan_duplex *chan)
1448
struct hfc_card *card = chan->card;
1450
struct sk_buff *skb;
1452
while(hfc_fifo_has_frames(&chan->rx) && --antiloop) {
1453
int frame_size = hfc_fifo_get_frame_size(&chan->rx);
1455
if (frame_size < 3) {
1458
printk(KERN_DEBUG hfc_DRIVER_PREFIX
1461
"invalid frame received, just %d bytes\n",
1467
hfc_fifo_drop_frame(&chan->rx);
1469
chan->net_device_stats.rx_dropped++;
1472
} else if(frame_size == 3) {
1475
printk(KERN_DEBUG hfc_DRIVER_PREFIX
1478
"empty frame received\n",
1483
hfc_fifo_drop_frame(&chan->rx);
1485
chan->net_device_stats.rx_dropped++;
1490
if (chan->open_by_zaptel &&
1491
card->chans[D].rx.ugly_framebuf_size) {
1492
// We have to wait for zaptel to transmit the
1493
// frame... wait for next time
1498
skb = dev_alloc_skb(frame_size - 3);
1501
printk(KERN_ERR hfc_DRIVER_PREFIX
1504
"cannot allocate skb: frame dropped\n",
1508
hfc_fifo_drop_frame(&chan->rx);
1510
chan->net_device_stats.rx_dropped++;
1515
// Oh... this is the echo channel... redirect to D
1517
if (card->echo_enabled && chan->number == B2) {
1518
skb->protocol = htons(card->chans[D].protocol);
1519
skb->dev = card->chans[D].netdev;
1520
skb->pkt_type = PACKET_OTHERHOST;
1522
skb->protocol = htons(chan->protocol);
1523
skb->dev = chan->netdev;
1524
skb->pkt_type = PACKET_HOST;
1528
skb->ip_summed = CHECKSUM_COMPLETE;
1530
skb->ip_summed = CHECKSUM_HW;
1533
if (chan->open_by_zaptel) {
1534
card->chans[D].rx.ugly_framebuf_size = frame_size - 1;
1536
if (hfc_fifo_get_frame(&card->chans[D].rx,
1537
card->chans[D].rx.ugly_framebuf,
1538
frame_size - 1) == -1) {
1543
memcpy(skb_put(skb, frame_size - 3),
1544
card->chans[D].rx.ugly_framebuf,
1547
if (hfc_fifo_get_frame(&chan->rx,
1548
skb_put(skb, frame_size - 3),
1549
frame_size - 3) == -1) {
1555
chan->net_device_stats.rx_packets++;
1556
chan->net_device_stats.rx_bytes += frame_size - 1;
1562
printk(KERN_CRIT hfc_DRIVER_PREFIX
1564
"Infinite loop detected\n",
1568
/******************************************
1569
* Module initialization and cleanup
1570
******************************************/
1572
static void hfc_setup_lapd(struct hfc_chan_duplex *chan)
1574
chan->netdev->priv = chan;
1575
chan->netdev->open = hfc_open;
1576
chan->netdev->stop = hfc_close;
1577
chan->netdev->hard_start_xmit = hfc_xmit_frame;
1578
chan->netdev->get_stats = hfc_get_stats;
1579
chan->netdev->set_multicast_list = hfc_set_multicast_list;
1581
memset(chan->netdev->dev_addr, 0x00, sizeof(chan->netdev->dev_addr));
1583
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
1584
SET_MODULE_OWNER(chan->netdev);
1588
static int __devinit hfc_probe(struct pci_dev *pci_dev,
1589
const struct pci_device_id *ent)
1591
static int cardnum=0;
1595
struct hfc_card *card = NULL;
1596
card = kmalloc(sizeof(struct hfc_card), GFP_KERNEL);
1598
printk(KERN_CRIT hfc_DRIVER_PREFIX
1599
"unable to kmalloc!\n");
1601
goto err_alloc_hfccard;
1604
memset(card, 0x00, sizeof(struct hfc_card));
1605
card->cardnum = cardnum;
1606
card->pcidev = pci_dev;
1607
spin_lock_init(&card->lock);
1609
pci_set_drvdata(pci_dev, card);
1611
if ((err = pci_enable_device(pci_dev))) {
1612
goto err_pci_enable_device;
1615
if ((err = pci_set_dma_mask(pci_dev, PCI_DMA_32BIT))) {
1616
printk(KERN_ERR hfc_DRIVER_PREFIX
1618
"No suitable DMA configuration available.\n",
1620
goto err_pci_set_dma_mask;
1623
pci_write_config_word(pci_dev, PCI_COMMAND, PCI_COMMAND_MEMORY);
1625
if((err = pci_request_regions(pci_dev, hfc_DRIVER_NAME))) {
1626
printk(KERN_CRIT hfc_DRIVER_PREFIX
1628
"cannot request I/O memory region\n",
1630
goto err_pci_request_regions;
1633
pci_set_master(pci_dev);
1635
if (!pci_dev->irq) {
1636
printk(KERN_CRIT hfc_DRIVER_PREFIX
1644
card->io_bus_mem = pci_resource_start(pci_dev,1);
1645
if (!card->io_bus_mem) {
1646
printk(KERN_CRIT hfc_DRIVER_PREFIX
1654
if(!(card->io_mem = ioremap(card->io_bus_mem, hfc_PCI_MEM_SIZE))) {
1655
printk(KERN_CRIT hfc_DRIVER_PREFIX
1657
"cannot ioremap I/O memory\n",
1663
// pci_alloc_consistent guarantees alignment (Documentation/DMA-mapping.txt)
1664
card->fifo_mem = pci_alloc_consistent(pci_dev, hfc_FIFO_SIZE, &card->fifo_bus_mem);
1665
if (!card->fifo_mem) {
1666
printk(KERN_CRIT hfc_DRIVER_PREFIX
1668
"unable to allocate FIFO DMA memory!\n",
1671
goto err_alloc_fifo;
1674
memset(card->fifo_mem, 0x00, hfc_FIFO_SIZE);
1676
card->fifos = card->fifo_mem;
1678
pci_write_config_dword(card->pcidev, hfc_PCI_MWBA, card->fifo_bus_mem);
1680
if ((err = request_irq(card->pcidev->irq, &hfc_interrupt,
1681
ZAP_IRQ_SHARED, hfc_DRIVER_NAME, card))) {
1682
printk(KERN_CRIT hfc_DRIVER_PREFIX
1684
"unable to register irq\n",
1686
goto err_request_irq;
1689
card->nt_mode = FALSE;
1691
if (modes & (1 << card->cardnum))
1692
card->nt_mode = TRUE;
1694
for (i=0; i<hfc_MAX_BOARDS; i++) {
1695
/* DEBUG printk(KERN_INFO "nt_modes[%i]=%i\n", i, nt_modes[i]); */
1696
if (nt_modes[i] == card->cardnum) {
1701
//---------------------------------- D
1702
card->chans[D].card = card;
1703
card->chans[D].name = "D";
1704
card->chans[D].status = free;
1705
card->chans[D].number = D;
1706
card->chans[D].protocol = ETH_P_LAPD;
1707
spin_lock_init(&card->chans[D].lock);
1709
card->chans[D].rx.chan = &card->chans[D];
1710
card->chans[D].rx.fifo_base = card->fifos + 0x4000;
1711
card->chans[D].rx.z_base = card->fifos + 0x4000;
1712
card->chans[D].rx.z1_base = card->fifos + 0x6080;
1713
card->chans[D].rx.z2_base = card->fifos + 0x6082;
1714
card->chans[D].rx.z_min = 0x0000;
1715
card->chans[D].rx.z_max = 0x01FF;
1716
card->chans[D].rx.f_min = 0x10;
1717
card->chans[D].rx.f_max = 0x1F;
1718
card->chans[D].rx.f1 = card->fifos + 0x60a0;
1719
card->chans[D].rx.f2 = card->fifos + 0x60a1;
1720
card->chans[D].rx.fifo_size = card->chans[D].rx.z_max - card->chans[D].rx.z_min + 1;
1721
card->chans[D].rx.f_num = card->chans[D].rx.f_max - card->chans[D].rx.f_min + 1;
1723
card->chans[D].tx.chan = &card->chans[D];
1724
card->chans[D].tx.fifo_base = card->fifos + 0x0000;
1725
card->chans[D].tx.z_base = card->fifos + 0x0000;
1726
card->chans[D].tx.z1_base = card->fifos + 0x2080;
1727
card->chans[D].tx.z2_base = card->fifos + 0x2082;
1728
card->chans[D].tx.z_min = 0x0000;
1729
card->chans[D].tx.z_max = 0x01FF;
1730
card->chans[D].tx.f_min = 0x10;
1731
card->chans[D].tx.f_max = 0x1F;
1732
card->chans[D].tx.f1 = card->fifos + 0x20a0;
1733
card->chans[D].tx.f2 = card->fifos + 0x20a1;
1734
card->chans[D].tx.fifo_size = card->chans[D].tx.z_max - card->chans[D].tx.z_min + 1;
1735
card->chans[D].tx.f_num = card->chans[D].tx.f_max - card->chans[D].tx.f_min + 1;
1737
if(!(card->chans[D].netdev = alloc_netdev(0, "isdn%dd", setup_lapd))) {
1738
printk(KERN_ERR hfc_DRIVER_PREFIX
1739
"net_device alloc failed, abort.\n");
1741
goto err_alloc_netdev_d;
1744
hfc_setup_lapd(&card->chans[D]);
1746
card->chans[D].netdev->irq = card->pcidev->irq;
1747
card->chans[D].netdev->base_addr = card->io_bus_mem;
1748
/* card->chans[D].netdev->rmem_start = card->fifo_bus_mem + 0x4000;
1749
card->chans[D].netdev->rmem_end = card->fifo_bus_mem + 0x4000 +
1750
card->chans[D].rx.fifo_size - 1;*/
1751
card->chans[D].netdev->mem_start = card->fifo_bus_mem + 0x0000;
1752
card->chans[D].netdev->mem_end = card->fifo_bus_mem + 0x0000 +
1753
card->chans[D].tx.fifo_size - 1;
1755
if((err = register_netdev(card->chans[D].netdev))) {
1756
printk(KERN_INFO hfc_DRIVER_PREFIX
1758
"Cannot register net device, aborting.\n",
1760
goto err_register_netdev_d;
1763
//---------------------------------- B1
1764
card->chans[B1].card = card;
1765
card->chans[B1].name = "B1";
1766
card->chans[B1].status = free;
1767
card->chans[B1].number = B1;
1768
card->chans[B1].protocol = 0;
1769
spin_lock_init(&card->chans[B1].lock);
1771
card->chans[B1].rx.chan = &card->chans[B1];
1772
card->chans[B1].rx.fifo_base = card->fifos + 0x4200;
1773
card->chans[B1].rx.z_base = card->fifos + 0x4000;
1774
card->chans[B1].rx.z1_base = card->fifos + 0x6000;
1775
card->chans[B1].rx.z2_base = card->fifos + 0x6002;
1776
card->chans[B1].rx.z_min = 0x0200;
1777
card->chans[B1].rx.z_max = 0x1FFF;
1778
card->chans[B1].rx.f_min = 0x00;
1779
card->chans[B1].rx.f_max = 0x1F;
1780
card->chans[B1].rx.f1 = card->fifos + 0x6080;
1781
card->chans[B1].rx.f2 = card->fifos + 0x6081;
1782
card->chans[B1].rx.fifo_size = card->chans[B1].rx.z_max - card->chans[B1].rx.z_min + 1;
1783
card->chans[B1].rx.f_num = card->chans[B1].rx.f_max - card->chans[B1].rx.f_min + 1;
1785
card->chans[B1].tx.chan = &card->chans[B1];
1786
card->chans[B1].tx.fifo_base = card->fifos + 0x0200;
1787
card->chans[B1].tx.z_base = card->fifos + 0x0000;
1788
card->chans[B1].tx.z1_base = card->fifos + 0x2000;
1789
card->chans[B1].tx.z2_base = card->fifos + 0x2002;
1790
card->chans[B1].tx.z_min = 0x0200;
1791
card->chans[B1].tx.z_max = 0x1FFF;
1792
card->chans[B1].tx.f_min = 0x00;
1793
card->chans[B1].tx.f_max = 0x1F;
1794
card->chans[B1].tx.f1 = card->fifos + 0x2080;
1795
card->chans[B1].tx.f2 = card->fifos + 0x2081;
1796
card->chans[B1].tx.fifo_size = card->chans[B1].tx.z_max - card->chans[B1].tx.z_min + 1;
1797
card->chans[B1].tx.f_num = card->chans[B1].tx.f_max - card->chans[B1].tx.f_min + 1;
1799
// card->chans[B1].netdev->irq = card->pcidev->irq;
1800
// card->chans[B1].netdev->base_addr = card->io_bus_mem;
1801
/* card->chans[B1].netdev->rmem_start = card->fifo_bus_mem + 0x4200;
1802
card->chans[B1].netdev->rmem_end = card->fifo_bus_mem + 0x4200 +
1803
card->chans[B1].rx.fifo_size - 1;*/
1804
// card->chans[B1].netdev->mem_start = card->fifo_bus_mem + 0x0200;
1805
// card->chans[B1].netdev->mem_end = card->fifo_bus_mem + 0x0200 +
1806
// card->chans[B1].tx.fifo_size - 1;
1808
//---------------------------------- B2
1809
card->chans[B2].card = card;
1810
card->chans[B2].name = "B2";
1811
card->chans[B2].status = free;
1812
card->chans[B2].number = B2;
1813
card->chans[B2].protocol = 0;
1814
spin_lock_init(&card->chans[B2].lock);
1816
card->chans[B2].rx.chan = &card->chans[B2];
1817
card->chans[B2].rx.fifo_base = card->fifos + 0x6200,
1818
card->chans[B2].rx.z_base = card->fifos + 0x6000;
1819
card->chans[B2].rx.z1_base = card->fifos + 0x6100;
1820
card->chans[B2].rx.z2_base = card->fifos + 0x6102;
1821
card->chans[B2].rx.z_min = 0x0200;
1822
card->chans[B2].rx.z_max = 0x1FFF;
1823
card->chans[B2].rx.f_min = 0x00;
1824
card->chans[B2].rx.f_max = 0x1F;
1825
card->chans[B2].rx.f1 = card->fifos + 0x6180;
1826
card->chans[B2].rx.f2 = card->fifos + 0x6181;
1827
card->chans[B2].rx.fifo_size = card->chans[B2].rx.z_max - card->chans[B2].rx.z_min + 1;
1828
card->chans[B2].rx.f_num = card->chans[B2].rx.f_max - card->chans[B2].rx.f_min + 1;
1830
card->chans[B2].tx.chan = &card->chans[B2];
1831
card->chans[B2].tx.fifo_base = card->fifos + 0x2200;
1832
card->chans[B2].tx.z_base = card->fifos + 0x2000;
1833
card->chans[B2].tx.z1_base = card->fifos + 0x2100;
1834
card->chans[B2].tx.z2_base = card->fifos + 0x2102;
1835
card->chans[B2].tx.z_min = 0x0200;
1836
card->chans[B2].tx.z_max = 0x1FFF;
1837
card->chans[B2].tx.f_min = 0x00;
1838
card->chans[B2].tx.f_max = 0x1F;
1839
card->chans[B2].tx.f1 = card->fifos + 0x2180;
1840
card->chans[B2].tx.f2 = card->fifos + 0x2181;
1841
card->chans[B2].tx.fifo_size = card->chans[B2].tx.z_max - card->chans[B2].tx.z_min + 1;
1842
card->chans[B2].tx.f_num = card->chans[B2].tx.f_max - card->chans[B2].tx.f_min + 1;
1844
// card->chans[B2].netdev->irq = card->pcidev->irq;
1845
// card->chans[B2].netdev->base_addr = card->io_bus_mem;
1846
/* card->chans[B2].netdev->rmem_start = card->fifo_bus_mem + 0x6200;
1847
card->chans[B2].netdev->rmem_end = card->fifo_bus_mem + 0x6200 +
1848
card->chans[B2].rx.fifo_size - 1;*/
1849
// card->chans[B2].netdev->mem_start = card->fifo_bus_mem + 0x2200;
1850
// card->chans[B2].netdev->mem_end = card->fifo_bus_mem + 0x2200 +
1851
// card->chans[B2].tx.fifo_size - 1;
1853
// -------------------------------------------------------
1855
hfc_zap_initialize(card);
1857
snprintf(card->proc_dir_name,
1858
sizeof(card->proc_dir_name),
1859
"%d", card->cardnum);
1860
card->proc_dir = proc_mkdir(card->proc_dir_name, hfc_proc_zaphfc_dir);
1861
card->proc_dir->owner = THIS_MODULE;
1863
card->proc_info = create_proc_read_entry(
1864
"info", 0444, card->proc_dir,
1865
hfc_proc_read_info, card);
1866
card->proc_info->owner = THIS_MODULE;
1868
card->proc_fifos = create_proc_read_entry(
1869
"fifos", 0400, card->proc_dir,
1870
hfc_proc_read_fifos, card);
1871
card->proc_fifos->owner = THIS_MODULE;
1873
card->proc_bufs = create_proc_read_entry(
1874
"bufs", 0400, card->proc_dir,
1875
hfc_proc_read_bufs, card);
1876
card->proc_bufs->owner = THIS_MODULE;
1878
hfc_resetCard(card);
1880
printk(KERN_INFO hfc_DRIVER_PREFIX
1881
"card %d configured for %s mode at mem %#lx (0x%p) IRQ %u\n",
1883
card->nt_mode?"NT":"TE",
1892
// unregister_netdev(card->chans[D].netdev);
1893
err_register_netdev_d:
1894
free_netdev(card->chans[D].netdev);
1896
free_irq(pci_dev->irq, card);
1898
pci_free_consistent(pci_dev, hfc_FIFO_SIZE,
1899
card->fifo_mem, card->fifo_bus_mem);
1901
iounmap(card->io_mem);
1905
pci_release_regions(pci_dev);
1906
err_pci_request_regions:
1907
err_pci_set_dma_mask:
1908
err_pci_enable_device:
1914
static void __devexit hfc_remove(struct pci_dev *pci_dev)
1916
struct hfc_card *card = pci_get_drvdata(pci_dev);
1918
unregister_netdev(card->chans[D].netdev);
1920
// unsigned long flags;
1921
// spin_lock_irqsave(&card->lock,flags);
1923
printk(KERN_INFO hfc_DRIVER_PREFIX
1925
"shutting down card at %p.\n",
1929
hfc_softreset(card);
1931
zt_unregister(&card->zt_span);
1934
// disable memio and bustmaster
1935
pci_write_config_word(pci_dev, PCI_COMMAND, 0);
1937
// spin_unlock_irqrestore(&card->lock,flags);
1939
remove_proc_entry("bufs", card->proc_dir);
1940
remove_proc_entry("fifos", card->proc_dir);
1941
remove_proc_entry("info", card->proc_dir);
1942
remove_proc_entry(card->proc_dir_name, hfc_proc_zaphfc_dir);
1944
free_irq(pci_dev->irq, card);
1946
pci_free_consistent(pci_dev, hfc_FIFO_SIZE,
1947
card->fifo_mem, card->fifo_bus_mem);
1949
iounmap(card->io_mem);
1951
pci_release_regions(pci_dev);
1953
pci_disable_device(pci_dev);
1955
free_netdev(card->chans[D].netdev);
1959
/******************************************
1961
******************************************/
1963
static int __init hfc_init_module(void)
1967
printk(KERN_INFO hfc_DRIVER_PREFIX
1968
hfc_DRIVER_STRING " loading\n");
1970
hfc_proc_zaphfc_dir = proc_mkdir(hfc_DRIVER_NAME, proc_root_driver);
1972
ret = zap_pci_module(&hfc_driver);
1976
module_init(hfc_init_module);
1978
static void __exit hfc_module_exit(void)
1980
pci_unregister_driver(&hfc_driver);
1982
remove_proc_entry(hfc_DRIVER_NAME, proc_root_driver);
1984
printk(KERN_INFO hfc_DRIVER_PREFIX
1985
hfc_DRIVER_STRING " unloaded\n");
1988
module_exit(hfc_module_exit);
1992
MODULE_DESCRIPTION(hfc_DRIVER_DESCR);
1993
MODULE_AUTHOR("Jens Wilke <jw_vzaphfc@headissue.com>, Daniele (Vihai) Orlandi <daniele@orlandi.com>");
1994
#ifdef MODULE_LICENSE
1995
MODULE_LICENSE("GPL");
2000
module_param(modes, int, 0444);
2003
* Old 2.6 kernels had module_param_array() macro that receive the counter
2006
int nt_modes_num_values;
2007
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
2008
module_param_array(nt_modes, int, nt_modes_num_values, 0444);
2010
module_param_array(nt_modes, int, &nt_modes_num_values, 0444);
2013
module_param(force_l1_up, int, 0444);
2014
module_param(sniff_zaptel_d_channel, int, 0444);
2016
module_param(debug_level, int, 0444);
2021
MODULE_PARM(modes,"i");
2022
MODULE_PARM(force_l1_up,"i");
2023
MODULE_PARM(sniff_zaptel_d_channel,"i");
2025
MODULE_PARM(debug_level,"i");
2030
MODULE_PARM_DESC(modes, "[Deprecated] bit-mask to configure NT mode");
2031
MODULE_PARM_DESC(nt_modes, "Comma-separated list of card IDs to configure in NT mode");
2032
MODULE_PARM_DESC(force_l1_up, "Don't allow L1 to go down");
2033
MODULE_PARM_DESC(sniff_zaptel_d_channel, "Make frames transmitted from zaptel"
2034
" appear as received by the board");
2036
MODULE_PARM_DESC(debug_level, "Debug verbosity level");