108
109
unsigned int l3sclkstctrl; /* offset 0x04 */
109
110
unsigned int l4fwclkstctrl; /* offset 0x08 */
110
111
unsigned int l3clkstctrl; /* offset 0x0c */
111
unsigned int resv1[6];
113
unsigned int cpgmac0clkctrl; /* offset 0x14 */
114
unsigned int resv2[4];
112
115
unsigned int emifclkctrl; /* offset 0x28 */
113
116
unsigned int ocmcramclkctrl; /* offset 0x2c */
114
unsigned int resv2[12];
117
unsigned int gpmcclkctrl; /* offset 0x30 */
118
unsigned int resv3[2];
119
unsigned int mmc0clkctrl; /* offset 0x3C */
120
unsigned int elmclkctrl; /* offset 0x40 */
121
unsigned int i2c2clkctrl; /* offset 0x44 */
122
unsigned int i2c1clkctrl; /* offset 0x48 */
123
unsigned int spi0clkctrl; /* offset 0x4C */
124
unsigned int spi1clkctrl; /* offset 0x50 */
125
unsigned int resv4[3];
115
126
unsigned int l4lsclkctrl; /* offset 0x60 */
116
127
unsigned int l4fwclkctrl; /* offset 0x64 */
117
unsigned int resv3[6];
128
unsigned int resv5[6];
118
129
unsigned int timer2clkctrl; /* offset 0x80 */
119
unsigned int resv4[19];
130
unsigned int resv6[11];
131
unsigned int gpio2clkctrl; /* offset 0xB0 */
132
unsigned int resv7[7];
120
133
unsigned int emiffwclkctrl; /* offset 0xD0 */
121
unsigned int resv5[2];
134
unsigned int resv8[2];
122
135
unsigned int l3instrclkctrl; /* offset 0xDC */
123
136
unsigned int l3clkctrl; /* Offset 0xE0 */
124
unsigned int resv6[14];
137
unsigned int resv9[14];
125
138
unsigned int l4hsclkstctrl; /* offset 0x11C */
126
139
unsigned int l4hsclkctrl; /* offset 0x120 */
140
unsigned int resv10[8];
141
unsigned int cpswclkctrl; /* offset 0x144 */
129
144
/* Encapsulating Display pll registers */
158
173
unsigned int wdt_unfr; /* offset 0x100 */
161
/* Timer Registers */
163
unsigned int resv1[4];
164
unsigned int tiocpcfgreg; /* offset 0x10 */
165
unsigned int resv2[9];
166
unsigned int tclrreg; /* offset 0x38 */
167
unsigned int tcrrreg; /* offset 0x3C */
168
unsigned int tldrreg; /* offset 0x40 */
169
unsigned int resv3[4];
170
unsigned int tsicrreg; /* offset 0x54 */
173
176
/* Timer 32 bit registers */
175
178
unsigned int tidr; /* offset 0x00 */
176
unsigned int res1[0xc];
179
unsigned char res1[12];
177
180
unsigned int tiocp_cfg; /* offset 0x10 */
178
unsigned int res2[0xc];
181
unsigned char res2[12];
179
182
unsigned int tier; /* offset 0x20 */
180
183
unsigned int tistatr; /* offset 0x24 */
181
184
unsigned int tistat; /* offset 0x28 */