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Viewing changes to drivers/spi/omap3_spi.c

  • Committer: Package Import Robot
  • Author(s): Clint Adams
  • Date: 2012-05-01 18:07:19 UTC
  • mfrom: (16.1.23 sid)
  • Revision ID: package-import@ubuntu.com-20120501180719-rjntk3287im4a0ns
Tags: 2012.04.01-1
* New upstream version.
  - Update mipsel-native-endianness.diff.
  - Update no-error-on-set-but-unused-variables.diff (partially merged).
  - Drop kirkwood_spi-irq_mask.diff (merged).
  - Drop kirkwood-disable-l2c.diff (merged).

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Lines of Context:
drivers/spi/omap3_spi.c
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        return 0;
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}
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/*McSPI Transmit Receive Mode*/
 
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int omap3_spi_txrx(struct spi_slave *slave,
 
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                unsigned int len, const u8 *txp, u8 *rxp, unsigned long flags)
 
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{
 
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        struct omap3_spi_slave *ds = to_omap3_spi(slave);
 
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        int timeout = SPI_WAIT_TIMEOUT;
 
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        int chconf = readl(&ds->regs->channel[ds->slave.cs].chconf);
 
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        int irqstatus = readl(&ds->regs->irqstatus);
 
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        int i=0;
 
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        /*Enable SPI channel*/
 
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        if (flags & SPI_XFER_BEGIN)
 
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                writel(OMAP3_MCSPI_CHCTRL_EN,
 
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                       &ds->regs->channel[ds->slave.cs].chctrl);
 
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        /*set TRANSMIT-RECEIVE Mode*/
 
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        chconf &= ~OMAP3_MCSPI_CHCONF_TRM_MASK;
 
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        chconf |= OMAP3_MCSPI_CHCONF_FORCE;
 
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        writel(chconf, &ds->regs->channel[ds->slave.cs].chconf);
 
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        /*Shift in and out 1 byte at time*/
 
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        for (i=0; i < len; i++){
 
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                /* Write: wait for TX empty (TXS == 1)*/
 
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                irqstatus |= (1<< (4*(ds->slave.bus)));
 
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                while (!(readl(&ds->regs->channel[ds->slave.cs].chstat) &
 
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                         OMAP3_MCSPI_CHSTAT_TXS)) {
 
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                        if (--timeout <= 0) {
 
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                                printf("SPI TXS timed out, status=0x%08x\n",
 
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                                       readl(&ds->regs->channel[ds->slave.cs].chstat));
 
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                                return -1;
 
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                        }
 
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                }
 
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                /* Write the data */
 
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                writel(txp[i], &ds->regs->channel[ds->slave.cs].tx);
 
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                /*Read: wait for RX containing data (RXS == 1)*/
 
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                while (!(readl(&ds->regs->channel[ds->slave.cs].chstat) &
 
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                         OMAP3_MCSPI_CHSTAT_RXS)) {
 
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                        if (--timeout <= 0) {
 
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                                printf("SPI RXS timed out, status=0x%08x\n",
 
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                                       readl(&ds->regs->channel[ds->slave.cs].chstat));
 
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                                return -1;
 
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                        }
 
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                }
 
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                /* Read the data */
 
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                rxp[i] = readl(&ds->regs->channel[ds->slave.cs].rx);
 
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        }
 
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        /*if transfer must be terminated disable the channel*/
 
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        if (flags & SPI_XFER_END) {
 
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                chconf &= ~OMAP3_MCSPI_CHCONF_FORCE;
 
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                writel(chconf, &ds->regs->channel[ds->slave.cs].chconf);
 
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                writel(0, &ds->regs->channel[ds->slave.cs].chctrl);
 
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        }
 
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        return 0;
 
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}
 
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
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             const void *dout, void *din, unsigned long flags)
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{
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                }
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                ret = 0;
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        } else {
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                if (dout != NULL)
 
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                if (dout != NULL && din != NULL)
 
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                        ret = omap3_spi_txrx(slave, len, txp, rxp, flags);
 
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                else if (dout != NULL)
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                        ret = omap3_spi_write(slave, len, txp, flags);
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                if (din != NULL)
 
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                else if (din != NULL)
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                        ret = omap3_spi_read(slave, len, rxp, flags);
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        }
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        return ret;