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* Copyright Ericsson AB 2010. All Rights Reserved.
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* The contents of this file are subject to the Erlang Public License,
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* Version 1.1, (the "License"); you may not use this file except in
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* compliance with the License. You should have received a copy of the
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* Erlang Public License along with this software. If not, it can be
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* retrieved online at http://www.erlang.org/.
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* Software distributed under the License is distributed on an "AS IS"
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* basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
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* the License for the specific language governing rights and limitations
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* Description: Native atomics ethread support when using VC++
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* Author: Rickard Green
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#undef ETHR_INCLUDE_ATOMIC_IMPL__
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#if !defined(ETHR_WIN_ATOMIC32_H__) && defined(ETHR_ATOMIC_WANT_32BIT_IMPL__)
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#define ETHR_WIN_ATOMIC32_H__
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#define ETHR_INCLUDE_ATOMIC_IMPL__ 4
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#undef ETHR_ATOMIC_WANT_32BIT_IMPL__
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#elif !defined(ETHR_WIN_ATOMIC64_H__) && defined(ETHR_ATOMIC_WANT_64BIT_IMPL__)
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#define ETHR_WIN_ATOMIC64_H__
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#ifdef ETHR_HAVE__INTERLOCKEDCOMPAREEXCHANGE64
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/* _InterlockedCompareExchange64() required... */
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#define ETHR_INCLUDE_ATOMIC_IMPL__ 8
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#undef ETHR_ATOMIC_WANT_64BIT_IMPL__
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#ifdef ETHR_INCLUDE_ATOMIC_IMPL__
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#if defined(_MSC_VER) && _MSC_VER >= 1400
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#ifndef ETHR_WIN_ATOMIC_COMMON__
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#define ETHR_WIN_ATOMIC_COMMON__
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#define ETHR_HAVE_NATIVE_ATOMICS 1
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#if defined(_M_IX86) || defined(_M_AMD64) || defined(_M_IA64)
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# define ETHR_READ_AND_SET_WITHOUT_INTERLOCKED_OP__ 1
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# define ETHR_READ_AND_SET_WITHOUT_INTERLOCKED_OP__ 0
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#if defined(_M_AMD64) || (defined(_M_IX86) \
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&& !defined(ETHR_PRE_PENTIUM4_COMPAT))
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# define ETHR_READ_ACQB_AND_SET_RELB_COMPILER_BARRIER_ONLY__ 1
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# define ETHR_READ_ACQB_AND_SET_RELB_COMPILER_BARRIER_ONLY__ 0
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* No configure test checking for interlocked acquire/release
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* versions have been written, yet. It should define
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* ETHR_HAVE_INTERLOCKED_ACQUIRE_RELEASE_BARRIERS if, and
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* only if, all used interlocked operations with barriers
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* Note, that these are pure optimizations for the itanium
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#undef ETHR_COMPILER_BARRIER
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#define ETHR_COMPILER_BARRIER _ReadWriteBarrier()
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#pragma intrinsic(_ReadWriteBarrier)
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#pragma intrinsic(_InterlockedCompareExchange)
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#if defined(_M_AMD64) || (defined(_M_IX86) \
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&& !defined(ETHR_PRE_PENTIUM4_COMPAT))
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#include <emmintrin.h>
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#pragma intrinsic(_mm_mfence)
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#define ETHR_MEMORY_BARRIER _mm_mfence()
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#pragma intrinsic(_mm_sfence)
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#define ETHR_WRITE_MEMORY_BARRIER _mm_sfence()
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#pragma intrinsic(_mm_lfence)
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#define ETHR_READ_MEMORY_BARRIER _mm_lfence()
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#define ETHR_READ_DEPEND_MEMORY_BARRIER ETHR_COMPILER_BARRIER
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#define ETHR_MEMORY_BARRIER \
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volatile long x___ = 0; \
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_InterlockedCompareExchange(&x___, (long) 1, (long) 0); \
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#endif /* ETHR_WIN_ATOMIC_COMMON__ */
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#if ETHR_INCLUDE_ATOMIC_IMPL__ == 4
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#define ETHR_HAVE_NATIVE_ATOMIC32 1
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* All used operations available as 32-bit intrinsics
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#pragma intrinsic(_InterlockedDecrement)
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#pragma intrinsic(_InterlockedIncrement)
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#pragma intrinsic(_InterlockedExchangeAdd)
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#pragma intrinsic(_InterlockedExchange)
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#pragma intrinsic(_InterlockedAnd)
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#pragma intrinsic(_InterlockedOr)
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#ifdef ETHR_HAVE_INTERLOCKED_ACQUIRE_RELEASE_BARRIERS
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#pragma intrinsic(_InterlockedExchangeAdd_acq)
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#pragma intrinsic(_InterlockedIncrement_acq)
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#pragma intrinsic(_InterlockedDecrement_rel)
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#pragma intrinsic(_InterlockedCompareExchange_acq)
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#pragma intrinsic(_InterlockedCompareExchange_rel)
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#define ETHR_ILCKD__(X) _Interlocked ## X
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#ifdef ETHR_HAVE_INTERLOCKED_ACQUIRE_RELEASE_BARRIERS
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#define ETHR_ILCKD_ACQ__(X) _Interlocked ## X ## _acq
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#define ETHR_ILCKD_REL__(X) _Interlocked ## X ## _rel
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#define ETHR_ILCKD_ACQ__(X) _Interlocked ## X
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#define ETHR_ILCKD_REL__(X) _Interlocked ## X
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#define ETHR_NATMC_FUNC__(X) ethr_native_atomic32_ ## X
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#define ETHR_ATMC_T__ ethr_native_atomic32_t
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#define ETHR_AINT_T__ ethr_sint32_t
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#elif ETHR_INCLUDE_ATOMIC_IMPL__ == 8
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#define ETHR_HAVE_NATIVE_ATOMIC64 1
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* _InterlockedCompareExchange64() is required. The other may not
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* be available, but if so, we can generate them.
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#pragma intrinsic(_InterlockedCompareExchange64)
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#if ETHR_READ_AND_SET_WITHOUT_INTERLOCKED_OP__
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#define ETHR_OWN_ILCKD_INIT_VAL__(PTR) *(PTR)
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#define ETHR_OWN_ILCKD_INIT_VAL__(PTR) (__int64) 0
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#define ETHR_OWN_ILCKD_BODY_IMPL__(FUNC, PTR, NEW, ACT, EXP, OPS, RET) \
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__int64 NEW, ACT, EXP; \
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ACT = ETHR_OWN_ILCKD_INIT_VAL__(PTR); \
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ACT = _InterlockedCompareExchange64(PTR, NEW, EXP); \
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} while (ACT != EXP); \
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#define ETHR_OWN_ILCKD_1_IMPL__(FUNC, NEW, ACT, EXP, OPS, RET) \
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static __forceinline __int64 \
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FUNC(__int64 volatile *ptr) \
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ETHR_OWN_ILCKD_BODY_IMPL__(FUNC, ptr, NEW, ACT, EXP, OPS, RET)
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#define ETHR_OWN_ILCKD_2_IMPL__(FUNC, NEW, ACT, EXP, OPS, ARG, RET) \
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static __forceinline __int64 \
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FUNC(__int64 volatile *ptr, __int64 ARG) \
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ETHR_OWN_ILCKD_BODY_IMPL__(FUNC, ptr, NEW, ACT, EXP, OPS, RET)
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#ifdef ETHR_HAVE__INTERLOCKEDDECREMENT64
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#pragma intrinsic(_InterlockedDecrement64)
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ETHR_OWN_ILCKD_1_IMPL__(_InterlockedDecrement64, new, act, exp,
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#ifdef ETHR_HAVE__INTERLOCKEDINCREMENT64
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#pragma intrinsic(_InterlockedIncrement64)
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ETHR_OWN_ILCKD_1_IMPL__(_InterlockedIncrement64, new, act, exp,
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#ifdef ETHR_HAVE__INTERLOCKEDEXCHANGEADD64
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#pragma intrinsic(_InterlockedExchangeAdd64)
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ETHR_OWN_ILCKD_2_IMPL__(_InterlockedExchangeAdd64, new, act, exp,
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new = act + arg, arg, act)
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#ifdef ETHR_HAVE__INTERLOCKEDEXCHANGE64
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#pragma intrinsic(_InterlockedExchange64)
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ETHR_OWN_ILCKD_2_IMPL__(_InterlockedExchange64, new, act, exp,
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#ifdef ETHR_HAVE__INTERLOCKEDAND64
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#pragma intrinsic(_InterlockedAnd64)
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ETHR_OWN_ILCKD_2_IMPL__(_InterlockedAnd64, new, act, exp,
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new = act & arg, arg, act)
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#ifdef ETHR_HAVE__INTERLOCKEDOR64
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#pragma intrinsic(_InterlockedOr64)
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ETHR_OWN_ILCKD_2_IMPL__(_InterlockedOr64, new, act, exp,
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new = act | arg, arg, act)
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#ifdef ETHR_HAVE_INTERLOCKED_ACQUIRE_RELEASE_BARRIERS
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#pragma intrinsic(_InterlockedExchangeAdd64_acq)
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#pragma intrinsic(_InterlockedIncrement64_acq)
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#pragma intrinsic(_InterlockedDecrement64_rel)
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#pragma intrinsic(_InterlockedCompareExchange64_acq)
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#pragma intrinsic(_InterlockedCompareExchange64_rel)
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#define ETHR_ILCKD__(X) _Interlocked ## X ## 64
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#ifdef ETHR_HAVE_INTERLOCKED_ACQUIRE_RELEASE_BARRIERS
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#define ETHR_ILCKD_ACQ__(X) _Interlocked ## X ## 64_acq
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#define ETHR_ILCKD_REL__(X) _Interlocked ## X ## 64_rel
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#define ETHR_ILCKD_ACQ__(X) _Interlocked ## X ## 64
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#define ETHR_ILCKD_REL__(X) _Interlocked ## X ## 64
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#define ETHR_NATMC_FUNC__(X) ethr_native_atomic64_ ## X
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#define ETHR_ATMC_T__ ethr_native_atomic64_t
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#define ETHR_AINT_T__ ethr_sint64_t
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#error "Unsupported integer size"
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volatile ETHR_AINT_T__ value;
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#if defined(ETHR_TRY_INLINE_FUNCS) || defined(ETHR_ATOMIC_IMPL__)
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static ETHR_INLINE ETHR_AINT_T__ *
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ETHR_NATMC_FUNC__(addr)(ETHR_ATMC_T__ *var)
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return (ETHR_AINT_T__ *) &var->value;
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static ETHR_INLINE void
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ETHR_NATMC_FUNC__(init)(ETHR_ATMC_T__ *var, ETHR_AINT_T__ i)
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#if ETHR_READ_AND_SET_WITHOUT_INTERLOCKED_OP__
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(void) ETHR_ILCKD__(Exchange)(&var->value, i);
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static ETHR_INLINE void
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ETHR_NATMC_FUNC__(set)(ETHR_ATMC_T__ *var, ETHR_AINT_T__ i)
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#if ETHR_READ_AND_SET_WITHOUT_INTERLOCKED_OP__
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(void) ETHR_ILCKD__(Exchange)(&var->value, i);
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static ETHR_INLINE ETHR_AINT_T__
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ETHR_NATMC_FUNC__(read)(ETHR_ATMC_T__ *var)
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#if ETHR_READ_AND_SET_WITHOUT_INTERLOCKED_OP__
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return ETHR_ILCKD__(ExchangeAdd)(&var->value, (ETHR_AINT_T__) 0);
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static ETHR_INLINE void
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ETHR_NATMC_FUNC__(add)(ETHR_ATMC_T__ *var, ETHR_AINT_T__ incr)
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(void) ETHR_ILCKD__(ExchangeAdd)(&var->value, incr);
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static ETHR_INLINE ETHR_AINT_T__
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ETHR_NATMC_FUNC__(add_return)(ETHR_ATMC_T__ *var, ETHR_AINT_T__ i)
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return ETHR_ILCKD__(ExchangeAdd)(&var->value, i) + i;
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static ETHR_INLINE void
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ETHR_NATMC_FUNC__(inc)(ETHR_ATMC_T__ *var)
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(void) ETHR_ILCKD__(Increment)(&var->value);
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static ETHR_INLINE void
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ETHR_NATMC_FUNC__(dec)(ETHR_ATMC_T__ *var)
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(void) ETHR_ILCKD__(Decrement)(&var->value);
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static ETHR_INLINE ETHR_AINT_T__
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ETHR_NATMC_FUNC__(inc_return)(ETHR_ATMC_T__ *var)
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return ETHR_ILCKD__(Increment)(&var->value);
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static ETHR_INLINE ETHR_AINT_T__
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ETHR_NATMC_FUNC__(dec_return)(ETHR_ATMC_T__ *var)
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return ETHR_ILCKD__(Decrement)(&var->value);
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static ETHR_INLINE ETHR_AINT_T__
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ETHR_NATMC_FUNC__(and_retold)(ETHR_ATMC_T__ *var, ETHR_AINT_T__ mask)
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return ETHR_ILCKD__(And)(&var->value, mask);
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static ETHR_INLINE ETHR_AINT_T__
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ETHR_NATMC_FUNC__(or_retold)(ETHR_ATMC_T__ *var, ETHR_AINT_T__ mask)
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return ETHR_ILCKD__(Or)(&var->value, mask);
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static ETHR_INLINE ETHR_AINT_T__
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ETHR_NATMC_FUNC__(cmpxchg)(ETHR_ATMC_T__ *var,
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return ETHR_ILCKD__(CompareExchange)(&var->value, new, old);
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static ETHR_INLINE ETHR_AINT_T__
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ETHR_NATMC_FUNC__(xchg)(ETHR_ATMC_T__ *var, ETHR_AINT_T__ new)
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return ETHR_ILCKD__(Exchange)(&var->value, new);
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* Atomic ops with at least specified barriers.
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static ETHR_INLINE ETHR_AINT_T__
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ETHR_NATMC_FUNC__(read_acqb)(ETHR_ATMC_T__ *var)
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#if ETHR_READ_ACQB_AND_SET_RELB_COMPILER_BARRIER_ONLY__
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ETHR_AINT_T__ val = var->value;
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ETHR_COMPILER_BARRIER;
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return ETHR_ILCKD_ACQ__(ExchangeAdd)(&var->value, (ETHR_AINT_T__) 0);
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static ETHR_INLINE ETHR_AINT_T__
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ETHR_NATMC_FUNC__(inc_return_acqb)(ETHR_ATMC_T__ *var)
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return ETHR_ILCKD_ACQ__(Increment)(&var->value);
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static ETHR_INLINE void
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ETHR_NATMC_FUNC__(set_relb)(ETHR_ATMC_T__ *var, ETHR_AINT_T__ i)
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#if ETHR_READ_ACQB_AND_SET_RELB_COMPILER_BARRIER_ONLY__
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ETHR_COMPILER_BARRIER;
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(void) ETHR_ILCKD_REL__(Exchange)(&var->value, i);
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static ETHR_INLINE void
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ETHR_NATMC_FUNC__(dec_relb)(ETHR_ATMC_T__ *var)
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(void) ETHR_ILCKD_REL__(Decrement)(&var->value);
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static ETHR_INLINE ETHR_AINT_T__
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ETHR_NATMC_FUNC__(dec_return_relb)(ETHR_ATMC_T__ *var)
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return ETHR_ILCKD_REL__(Decrement)(&var->value);
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static ETHR_INLINE ETHR_AINT_T__
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ETHR_NATMC_FUNC__(cmpxchg_acqb)(ETHR_ATMC_T__ *var,
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return ETHR_ILCKD_ACQ__(CompareExchange)(&var->value, new, old);
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static ETHR_INLINE ETHR_AINT_T__
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ETHR_NATMC_FUNC__(cmpxchg_relb)(ETHR_ATMC_T__ *var,
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return ETHR_ILCKD_REL__(CompareExchange)(&var->value, new, old);
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#endif /* ETHR_TRY_INLINE_FUNCS */
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#undef ETHR_ILCKD_ACQ__
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#undef ETHR_ILCKD_REL__
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#undef ETHR_NATMC_FUNC__
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#undef ETHR_READ_AND_SET_WITHOUT_INTERLOCKED_OP__
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#undef ETHR_READ_ACQB_AND_SET_RELB_COMPILER_BARRIER_ONLY__
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#endif /* _MSC_VER */
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#endif /* ETHR_INCLUDE_ATOMIC_IMPL__ */