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* arch/arm/mach-dove/dump_cp15_regs.c
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/proc_fs.h>
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proc_dump_cp15_read(char *page, char **start, off_t off, int count, int *eof,
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asm volatile("mrc p15, 0, %0, c0, c0, 0": "=r"(value));
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p += sprintf(p, "Main ID: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c0, 1": "=r"(value));
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p += sprintf(p, "Cache Type: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c0, 3": "=r"(value));
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p += sprintf(p, "TLB Type: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c1, 0": "=r"(value));
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p += sprintf(p, "Processor Feature 0: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c1, 1": "=r"(value));
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p += sprintf(p, "Processor Feature 1: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c1, 2": "=r"(value));
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p += sprintf(p, "Debug Feature 0: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c1, 3": "=r"(value));
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p += sprintf(p, "Auxiliary Feature 0: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c1, 4": "=r"(value));
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p += sprintf(p, "Memory Model Feature 0: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c1, 5": "=r"(value));
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p += sprintf(p, "Memory Model Feature 1: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c1, 6": "=r"(value));
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p += sprintf(p, "Memory Model Feature 2: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c1, 7": "=r"(value));
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p += sprintf(p, "Memory Model Feature 3: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c2, 0": "=r"(value));
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p += sprintf(p, "Set Attribute 0: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c2, 1": "=r"(value));
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p += sprintf(p, "Set Attribute 1: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c2, 2": "=r"(value));
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p += sprintf(p, "Set Attribute 2: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c2, 3": "=r"(value));
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p += sprintf(p, "Set Attribute 3: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c2, 4": "=r"(value));
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p += sprintf(p, "Set Attribute 4: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c0, c2, 5": "=r"(value));
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p += sprintf(p, "Set Attribute 5: 0x%08x\n", value);
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asm volatile("mrc p15, 1, %0, c0, c0, 0": "=r"(value));
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p += sprintf(p, "Current Cache Size ID: 0x%08x\n", value);
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asm volatile("mrc p15, 1, %0, c0, c0, 1": "=r"(value));
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p += sprintf(p, "Current Cache Level ID: 0x%08x\n", value);
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asm volatile("mrc p15, 2, %0, c0, c0, 0": "=r"(value));
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p += sprintf(p, "Cache Size Selection: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c1, c0, 0": "=r"(value));
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p += sprintf(p, "Control : 0x%08x\n", value);
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#if defined(CONFIG_CPU_V6) || defined(CONFIG_DOVE_DEBUGGER_MODE_V6)
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#ifndef CONFIG_DOVE_REV_Z0
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p += sprintf(p, " L2\t\t: %s\n", (value & (1 << 26)) ?
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"Enabled" : "Disabled");
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asm volatile("mrc p15, 0, %0, c1, c0, 1": "=r"(value));
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p += sprintf(p, "Auxiliary Control : 0x%08x\n", value);
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#ifndef CONFIG_DOVE_DEBUGGER_MODE_V6
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p += sprintf(p, " L2\t\t: %s\n", (value & (1 << 1)) ?
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"Enabled" : "Disabled");
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asm volatile("mrc p15, 0, %0, c1, c0, 2": "=r"(value));
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p += sprintf(p, "Coprocessor Access Control : 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c1, c1, 0": "=r"(value));
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p += sprintf(p, "Secure Configuration : 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c2, c0, 0": "=r"(value));
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p += sprintf(p, "Translation Table Base 0 : 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c2, c0, 1": "=r"(value));
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p += sprintf(p, "Translation Table Base 1 : 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c2, c0, 2": "=r"(value));
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p += sprintf(p, "Translation Table Control : 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c3, c0, 0": "=r"(value));
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p += sprintf(p, "Domain Access Control : 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c5, c0, 0": "=r"(value));
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p += sprintf(p, "Data Fault Status : 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c5, c0, 1": "=r"(value));
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p += sprintf(p, "Instruction Fault Status : 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c6, c0, 0": "=r"(value));
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p += sprintf(p, "Data Fault Address : 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c6, c0, 1": "=r"(value));
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p += sprintf(p, "Watchpoint Fault Address : 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c6, c0, 2": "=r"(value));
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p += sprintf(p, "Instruction Fault Address : 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c7, c10, 6": "=r"(value));
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p += sprintf(p, "Cache Dirty Status: 0x%08x\n", value);
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asm volatile("mrc p15, 1, %0, c15, c1, 0": "=r"(value));
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p += sprintf(p, "L2 Extra Features: 0x%08x\n", value);
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asm volatile("mrc p15, 1, %0, c15, c1, 0": "=r"(value));
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p += sprintf(p, "Control Configuration: 0x%08x\n", value);
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p += sprintf(p, " Write Buffer Coalescing\t: %s\n", (value & (1 << 8)) ?
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"Enabled" : "Disabled");
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if (value & (1 << 8))
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p += sprintf(p, " WB WAIT CYC\t: 0x%x\n", (value >> 9) & 0x7);
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p += sprintf(p, " Coprocessor dual issue \t: %s\n", (value & (1 << 15)) ?
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"Disabled" : "Enabled");
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p += sprintf(p, " L2 Cache Burst 8 \t: %s\n", (value & (1 << 20)) ?
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"Enabled" : "Disabled");
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p += sprintf(p, " L2 Cache Way 7-4 \t: %s\n", (value & (1 << 21)) ?
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"Enabled" : "Disabled");
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#ifdef CONFIG_DOVE_REV_Z0
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p += sprintf(p, " L2\t\t: %s\n", (value & (1 << 22)) ?
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"Enabled" : "Disabled");
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p += sprintf(p, " L2 ECC\t: %s\n", (value & (1 << 23)) ?
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"Enabled" : "Disabled");
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p += sprintf(p, " L2 Prefetch\t: %s\n", (value & (1 << 24)) ?
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"Disabled" : "Enabled");
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p += sprintf(p, " L2 write allocate\t: %s\n", (value & (1 << 28)) ?
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"Enabled" : "Disabled");
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p += sprintf(p, " Streaming\t: %s\n", (value & (1 << 29)) ?
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"Enabled" : "Disabled");
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asm volatile("mrc p15, 1, %0, c15, c12, 0": "=r"(value));
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p += sprintf(p, "CPU ID Code Extension: 0x%08x\n", value);
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asm volatile("mrc p15, 1, %0, c15, c9, 6": "=r"(value));
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p += sprintf(p, "L2C Error Counter: 0x%08x\n", value);
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p += sprintf(p, " L2C Uncorrectable Errors \t: 0x%04x\n", value & 0xFFFF);
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p += sprintf(p, " L2C Correctable Errors \t: 0x%04x\n",
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(value >> 16) & 0xFFFF);
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asm volatile("mrc p15, 1, %0, c15, c9, 7": "=r"(value));
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p += sprintf(p, "L2C Error Threshold: 0x%08x\n", value);
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asm volatile("mrc p15, 1, %0, c15, c11, 7": "=r"(value));
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p += sprintf(p, "L2C Error Capture: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c9, c14, 0": "=r"(value));
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p += sprintf(p, "User mode access for PMC registers: %s\n", (value & 1) ?
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"Enabled" : "Disabled");
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asm volatile("mrc p15, 0, %0, c10, c2, 0": "=r"(value));
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p += sprintf(p, "Memory Attribute PRRR: 0x%08x\n", value);
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asm volatile("mrc p15, 0, %0, c10, c2, 1": "=r"(value));
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p += sprintf(p, "Memory Attribute NMRR: 0x%08x\n", value);
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asm volatile("mrc p15, 1, %0, c15, c1, 1": "=r"(value));
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p += sprintf(p, "Auxiliary Debug Modes Control: 0x%08x\n", value);
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len = (p - page) - off;
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*eof = (len <= count) ? 1 : 0;
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int dump_init_module(void)
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#ifdef CONFIG_PROC_FS
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struct proc_dir_entry *res;
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res = create_proc_entry("mv_dump_cp15", S_IRUSR, NULL);
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res->read_proc = proc_dump_cp15_read;
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void dump_cleanup_module(void)
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remove_proc_entry("mv_dump_cp15", NULL);
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module_init(dump_init_module);
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module_exit(dump_cleanup_module);
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MODULE_AUTHOR("Saeed Bishara");
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MODULE_LICENSE("GPL");