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/*******************************************************************************
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Copyright (C) Marvell International Ltd. and its affiliates
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This software file (the "File") is owned and distributed by Marvell
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International Ltd. and/or its affiliates ("Marvell") under the following
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alternative licensing terms. Once you have made an election to distribute the
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File under one of the following license alternatives, please (i) delete this
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introductory statement regarding license alternatives, (ii) delete the two
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license alternatives that you have not elected to use and (iii) preserve the
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Marvell copyright notice above.
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********************************************************************************
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Marvell GPL License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File in accordance with the terms and conditions of the General
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Public License Version 2, June 1991 (the "GPL License"), a copy of which is
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available along with the File in the license.txt file or by writing to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
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on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
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THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
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WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
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DISCLAIMED. The GPL License provides additional details about this warranty
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*******************************************************************************/
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/*******************************************************************************
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*******************************************************************************/
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#include "ctrlEnv/mvCtrlEnvRegs.h"
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#include "mvSysHwConfig.h"
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#ifdef CONFIG_MV_INCLUDE_GIG_ETH
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#include "eth/mvEth.h"
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/*******************************************************************************
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* mvCtrlEthMaxPortGet - Get Marvell controller number of etherent ports.
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* This function returns Marvell controller number of etherent port.
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* Marvell controller number of etherent port.
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*******************************************************************************/
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MV_U32 mvCtrlEthMaxPortGet(MV_VOID)
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/*******************************************************************************
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* mvCtrlModelGet - Get Marvell controller device model (Id)
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* This function returns 16bit describing the device model (ID) as defined
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* in PCI Device and Vendor ID configuration register offset 0x0.
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* 16bit desscribing Marvell controller ID
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*******************************************************************************/
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MV_U16 mvCtrlModelGet(MV_VOID)
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return MV_6781_DEV_ID;
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MV_U8 mvCtrlRevGet(MV_VOID)
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#ifdef CONFIG_DOVE_REV_Z0
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#ifdef CONFIG_DOVE_REV_Y0
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//EXPORT_SYMBOL(mvCtrlEthMaxPortGet);
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/*******************************************************************************
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* mvBoardTclkGet - Get the board Tclk (Controller clock)
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* This routine extract the controller core clock.
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* This function uses the controller counters to make identification.
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* Note: In order to avoid interference, make sure task context switch
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* and interrupts will not occure during this function operation
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* countNum - Counter number.
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* 32bit clock cycles in Hertz.
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*******************************************************************************/
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MV_U32 mvBoardTclkGet(MV_VOID)
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#if defined(TCLK_AUTO_DETECT)
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MV_U32 tmpTClkRate = 166666667;
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tmpTClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
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tmpTClkRate &= MSAR_TCLCK_MASK;
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tmpTClkRate = MV_BOARD_TCLK_166MHZ;
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return MV_BOARD_DEFAULT_TCLK;
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#include <asm/mach-types.h>
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#ifdef CONFIG_MV_INCLUDE_GIG_ETH
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/*******************************************************************************
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* mvBoardPhyAddrGet - Get the phy address
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* This routine returns the Phy address of a given ethernet port.
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* ethPortNum - Ethernet port number.
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* 32bit describing Phy address, -1 if the port number is wrong.
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*******************************************************************************/
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MV_32 mvBoardPhyAddrGet(MV_U32 ethPortNum)
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MV_U32 boardId= mvBoardIdGet();
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if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
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mvOsPrintf("mvBoardPhyAddrGet: Board unknown.\n");
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return BOARD_INFO(boardId)->pBoardMacInfo[ethPortNum].boardEthSmiAddr;
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if(machine_is_rd88f6281())
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else if (machine_is_db88f6281_bp())
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else if (machine_is_rd88f6192_nas())
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printk("error in %s: unknown board\n", __func__);
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// printk("%s: PhyAddr: %x\n", __func__, ret);
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/*******************************************************************************
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* mvBoardMacSpeedGet - Get the Mac speed
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* This routine returns the Mac speed if pre define of a given ethernet port.
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* ethPortNum - Ethernet port number.
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* MV_BOARD_MAC_SPEED, -1 if the port number is wrong.
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*******************************************************************************/
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MV_ETH_MAC_SPEED mvBoardMacSpeedGet(MV_U32 ethPortNum)
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MV_U32 boardId= mvBoardIdGet();
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if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
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mvOsPrintf("mvBoardMacSpeedGet: Board unknown.\n");
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return BOARD_INFO(boardId)->pBoardMacInfo[ethPortNum].boardMacSpeed;
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if(machine_is_rd88f6281())
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return BOARD_MAC_SPEED_1000M;
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else if (machine_is_db88f6281_bp())
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return BOARD_MAC_SPEED_AUTO;
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else if (machine_is_rd88f6192_nas())
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return BOARD_MAC_SPEED_AUTO;
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printk("error in %s: unknown board", __func__);
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return ETH_MAC_SPEED_AUTO;
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MV_BOOL mvBoardIsPortInSgmii(MV_U32 ethPortNum)
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//u8 mvMacAddr[6] = {0, };
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u8 mvMacAddr[CONFIG_MV_ETH_PORTS_NUM][6];
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u16 mvMtu[CONFIG_MV_ETH_PORTS_NUM] = {0};
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/*******************************************************************************
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* mvBoardSpecInitGet -
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* RETURN: Return MV_TRUE and parameters in case board need spesific phy init,
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* otherwise return MV_FALSE.
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*******************************************************************************/
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MV_BOOL mvBoardSpecInitGet(MV_U32* regOff, MV_U32* data)
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MV_U32 mvCpuPclkGet(MV_VOID)
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#if defined(PCLCK_AUTO_DETECT)
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MV_U32 tmpPClkRate=0;
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MV_U32 cpuCLK[] = MV_CPU_CLCK_TBL;
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tmpPClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
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tmpPClkRate = tmpPClkRate & MSAR_CPUCLCK_MASK;
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tmpPClkRate = tmpPClkRate >> MSAR_CPUCLCK_OFFS;
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tmpPClkRate = cpuCLK[tmpPClkRate];
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return MV_DEFAULT_PCLK
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/*******************************************************************************
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* mvCpuL2ClkGet - Get the CPU L2 (CPU bus clock)
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* This routine extract the CPU L2 clock.
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* 32bit clock cycles in Hertz.
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*******************************************************************************/
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MV_U32 mvCpuL2ClkGet(MV_VOID)
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#ifdef L2CLK_AUTO_DETECT
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MV_U32 L2ClkRate, tmp, pClkRate, indexL2Rtio;
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MV_U32 cpuCLK[] = MV_CPU_CLCK_TBL;
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MV_U32 L2Rtio[][2] = MV_L2_CLCK_RTIO_TBL;
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pClkRate = mvCpuPclkGet();
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tmp = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
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indexL2Rtio = tmp & MSAR_L2CLCK_RTIO_MASK;
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indexL2Rtio = indexL2Rtio >> MSAR_L2CLCK_RTIO_OFFS;
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L2ClkRate = ((pClkRate * L2Rtio[indexL2Rtio][1]) / L2Rtio[indexL2Rtio][0]);
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return MV_BOARD_DEFAULT_L2CLK;
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/*******************************************************************************
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* mvCtrlPwrClckGet - Get Power State of specific Unit
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******************************************************************************/
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MV_BOOL mvCtrlPwrClckGet(MV_UNIT_ID unitId, MV_U32 index)
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MV_U32 reg = MV_REG_READ(CLOCK_GATING_CTRL_REG);
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MV_BOOL state = MV_TRUE;
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#if defined(MV_INCLUDE_USB)
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if ((reg & CGC_USBENCLOCK_MASK(index)) == CGC_USBENCLOCK_DIS(index))
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#if defined(MV_INCLUDE_GIG_ETH)
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case ETH_GIG_UNIT_ID:
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if ((reg & CGC_GEENCLOCK_MASK) == CGC_GEENCLOCK_DIS)
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#if defined(MV_INCLUDE_SATA)
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if ((reg & CGC_SATAENCLOCK_MASK) == CGC_SATAENCLOCK_DIS)
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#if defined(MV_INCLUDE_PEX)
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if ((reg & CGC_PEXENCLOCK_MASK(index)) == CGC_PEXENCLOCK_DIS(index))
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#if defined(MV_INCLUDE_SDIO)
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if ((reg & CGC_SDIOENCLOCK_MASK(index))== CGC_SDIOENCLOCK_DIS(index))
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#if defined(MV_INCLUDE_NAND)
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if ((reg & CGC_NANDENCLOCK_MASK) == CGC_NANDENCLOCK_DIS)
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#if defined(MV_INCLUDE_CAMERA)
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if ((reg & CGC_CAMENCLOCK_MASK) == CGC_CAMENCLOCK_DIS)
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#if defined(MV_INCLUDE_AUDIO)
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if ((reg & CGC_ADENCLOCK_MASK(index)) == CGC_ADENCLOCK_DIS(index))
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#if defined(MV_INCLUDE_GPU)
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if ((reg & CGC_GPUENCLOCK_MASK) == CGC_GPUENCLOCK_DIS)
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#if defined(MV_INCLUDE_AC97)
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if ((reg & CGC_AC97ENCLOCK_MASK) == CGC_AC97ENCLOCK_DIS)
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#if defined(MV_INCLUDE_PDAM)
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if ((reg & CGC_PDMAENCLOCK_MASK) == CGC_PDMAENCLOCK_DIS)
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#if defined(MV_INCLUDE_XOR)
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if ((reg & CGC_XORENCLOCK_MASK(index))== CGC_XORENCLOCK_DIS(index))
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#ifdef CONFIG_MV_INCLUDE_AUDIO
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MV_VOID mvAudioHalInit(MV_U8 unit);
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MV_STATUS mvAudioInit(MV_U8 unit)
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mvAudioHalInit(unit);
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#ifdef CONFIG_MV_INCLUDE_XOR
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MV_VOID mvXorHalInit (MV_U32 xorChanNum);
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MV_STATUS mvXorInit (MV_VOID)
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/* Initiate XOR address decode */
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for(i = 0; i < MV_XOR_MAX_UNIT; i++)
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mvXorInitWinsUnit(i);
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mvXorHalInit(MV_XOR_MAX_CHAN);
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#include "twsi/mvTwsi.h"
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MV_U8 mvBoardA2DTwsiChanNumGet(MV_U8 unit)
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MV_U8 mvBoardA2DTwsiAddrTypeGet(MV_U8 unit)
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MV_U8 mvBoardA2DTwsiAddrGet(MV_U8 port)
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MV_U32 mvCtrlUsbMaxGet(void)
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MV_U32 mv_crypto_base_get(void)
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return (DOVE_CESA_VIRT_BASE + 0x10000);
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MV_U32 mv_crypto_phys_base_get(void)
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return (DOVE_CESA_PHYS_BASE + 0x10000);
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MV_U32 mv_crypto_irq_get(void)
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return IRQ_DOVE_CRYPTO;