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/*******************************************************************************
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Copyright (C) Marvell International Ltd. and its affiliates
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This software file (the "File") is owned and distributed by Marvell
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International Ltd. and/or its affiliates ("Marvell") under the following
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alternative licensing terms. Once you have made an election to distribute the
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File under one of the following license alternatives, please (i) delete this
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introductory statement regarding license alternatives, (ii) delete the two
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license alternatives that you have not elected to use and (iii) preserve the
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Marvell copyright notice above.
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********************************************************************************
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Marvell Commercial License Option
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If you received this File from Marvell and you have entered into a commercial
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license agreement (a "Commercial License") with Marvell, the File is licensed
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to you under the terms of the applicable Commercial License.
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********************************************************************************
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Marvell GPL License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File in accordance with the terms and conditions of the General
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Public License Version 2, June 1991 (the "GPL License"), a copy of which is
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available along with the File in the license.txt file or by writing to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
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on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
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THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
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WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
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DISCLAIMED. The GPL License provides additional details about this warranty
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********************************************************************************
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Marvell BSD License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File under the following licensing terms.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of Marvell nor the names of its contributors may be
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used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************/
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#ifndef __INCmvCommonh
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#define __INCmvCommonh
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#include "mvDeviceId.h"
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#ifndef MV_ASMLANGUAGE
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/* 16bit nibble swap. For example 0x1234 -> 0x2143 */
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#define MV_NIBBLE_SWAP_16BIT(X) (((X&0xf) << 4) | \
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/* 32bit nibble swap. For example 0x12345678 -> 0x21436587 */
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#define MV_NIBBLE_SWAP_32BIT(X) (((X&0xf) << 4) | \
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((X&0xf0000) << 4) | \
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((X&0xf00000) >> 4) | \
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((X&0xf000000) << 4) | \
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((X&0xf0000000) >> 4))
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/* 16bit byte swap. For example 0x1122 -> 0x2211 */
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#define MV_BYTE_SWAP_16BIT(X) ((((X)&0xff)<<8) | (((X)&0xff00)>>8))
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/* 32bit byte swap. For example 0x11223344 -> 0x44332211 */
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#define MV_BYTE_SWAP_32BIT(X) ((((X)&0xff)<<24) | \
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(((X)&0xff00)<<8) | \
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(((X)&0xff0000)>>8) | \
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(((X)&0xff000000)>>24))
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/* 64bit byte swap. For example 0x11223344.55667788 -> 0x88776655.44332211 */
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#define MV_BYTE_SWAP_64BIT(X) ((l64) ((((X)&0xffULL)<<56) | \
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(((X)&0xff00ULL)<<40) | \
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(((X)&0xff0000ULL)<<24) | \
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(((X)&0xff000000ULL)<<8) | \
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(((X)&0xff00000000ULL)>>8) | \
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(((X)&0xff0000000000ULL)>>24) | \
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(((X)&0xff000000000000ULL)>>40) | \
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(((X)&0xff00000000000000ULL)>>56)))
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/* Endianess macros. */
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#if defined(MV_CPU_LE)
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#define MV_16BIT_LE(X) (X)
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#define MV_32BIT_LE(X) (X)
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#define MV_64BIT_LE(X) (X)
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#define MV_16BIT_BE(X) MV_BYTE_SWAP_16BIT(X)
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#define MV_32BIT_BE(X) MV_BYTE_SWAP_32BIT(X)
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#define MV_64BIT_BE(X) MV_BYTE_SWAP_64BIT(X)
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#elif defined(MV_CPU_BE)
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#define MV_16BIT_LE(X) MV_BYTE_SWAP_16BIT(X)
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#define MV_32BIT_LE(X) MV_BYTE_SWAP_32BIT(X)
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#define MV_64BIT_LE(X) MV_BYTE_SWAP_64BIT(X)
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#define MV_16BIT_BE(X) (X)
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#define MV_32BIT_BE(X) (X)
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#define MV_64BIT_BE(X) (X)
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#error "CPU endianess isn't defined!\n"
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/* Bit field definitions */
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#define NO_BIT 0x00000000
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/* avoid redefinition of bits */
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#define BIT0 0x00000001
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#define BIT1 0x00000002
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#define BIT2 0x00000004
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#define BIT3 0x00000008
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#define BIT4 0x00000010
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#define BIT5 0x00000020
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#define BIT6 0x00000040
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#define BIT7 0x00000080
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#define BIT8 0x00000100
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#define BIT9 0x00000200
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#define BIT10 0x00000400
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#define BIT11 0x00000800
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#define BIT12 0x00001000
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#define BIT13 0x00002000
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#define BIT14 0x00004000
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#define BIT15 0x00008000
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#define BIT16 0x00010000
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#define BIT17 0x00020000
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#define BIT18 0x00040000
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#define BIT19 0x00080000
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#define BIT20 0x00100000
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#define BIT21 0x00200000
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#define BIT22 0x00400000
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#define BIT23 0x00800000
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#define BIT24 0x01000000
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#define BIT25 0x02000000
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#define BIT26 0x04000000
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#define BIT27 0x08000000
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#define BIT28 0x10000000
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#define BIT29 0x20000000
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#define BIT30 0x40000000
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#define BIT31 0x80000000
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#define _1K 0x00000400
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#define _2K 0x00000800
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#define _4K 0x00001000
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#define _8K 0x00002000
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#define _16K 0x00004000
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#define _32K 0x00008000
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#define _64K 0x00010000
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#define _128K 0x00020000
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#define _256K 0x00040000
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#define _512K 0x00080000
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#define _1M 0x00100000
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#define _2M 0x00200000
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#define _4M 0x00400000
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#define _8M 0x00800000
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#define _16M 0x01000000
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#define _32M 0x02000000
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#define _64M 0x04000000
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#define _128M 0x08000000
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#define _256M 0x10000000
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#define _512M 0x20000000
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#define _1G 0x40000000
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#define _2G 0x80000000
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/* Tclock and Sys clock define */
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#define _100MHz 100000000
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#define _125MHz 125000000
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#define _133MHz 133333334
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#define _150MHz 150000000
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#define _160MHz 160000000
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#define _166MHz 166666667
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#define _175MHz 175000000
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#define _178MHz 178000000
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#define _183MHz 183333334
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#define _187MHz 187000000
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#define _192MHz 192000000
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#define _194MHz 194000000
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#define _200MHz 200000000
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#define _233MHz 233333334
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#define _250MHz 250000000
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#define _266MHz 266666667
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#define _300MHz 300000000
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/* Supported clocks */
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#define MV_BOARD_TCLK_100MHZ 100000000
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#define MV_BOARD_TCLK_125MHZ 125000000
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#define MV_BOARD_TCLK_133MHZ 133333333
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#define MV_BOARD_TCLK_150MHZ 150000000
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#define MV_BOARD_TCLK_166MHZ 166666667
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#define MV_BOARD_TCLK_200MHZ 200000000
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/* For better address window table readability */
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#define N_A -1 /* Not applicable */
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/* Cache configuration options for memory (DRAM, SRAM, ... ) */
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/* Memory uncached, HW or SW cache coherency is not needed */
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#define MV_UNCACHED 0
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/* Memory cached, HW cache coherency supported in WriteThrough mode */
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#define MV_CACHE_COHER_HW_WT 1
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/* Memory cached, HW cache coherency supported in WriteBack mode */
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#define MV_CACHE_COHER_HW_WB 2
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/* Memory cached, No HW cache coherency, Cache coherency must be in SW */
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#define MV_CACHE_COHER_SW 3
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/* Macro for testing aligment. Positive if number is NOT aligned */
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#define MV_IS_NOT_ALIGN(number, align) ((number) & ((align) - 1))
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/* Macro for alignment up. For example, MV_ALIGN_UP(0x0330, 0x20) = 0x0340 */
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#define MV_ALIGN_UP(number, align) \
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(((number) & ((align) - 1)) ? (((number) + (align)) & ~((align)-1)) : (number))
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/* Macro for alignment down. For example, MV_ALIGN_UP(0x0330, 0x20) = 0x0320 */
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#define MV_ALIGN_DOWN(number, align) ((number) & ~((align)-1))
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/* This macro returns absolute value */
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#define MV_ABS(number) (((int)(number) < 0) ? -(int)(number) : (int)(number))
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/* Bit fields manipulation macros */
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/* An integer word which its 'x' bit is set */
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#define MV_BIT_MASK(bitNum) (1 << (bitNum) )
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/* Checks wheter bit 'x' in integer word is set */
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#define MV_BIT_CHECK(word, bitNum) ( (word) & MV_BIT_MASK(bitNum) )
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/* Clear (reset) bit 'x' in integer word (RMW - Read-Modify-Write) */
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#define MV_BIT_CLEAR(word, bitNum) ( (word) &= ~(MV_BIT_MASK(bitNum)) )
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/* Set bit 'x' in integer word (RMW) */
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#define MV_BIT_SET(word, bitNum) ( (word) |= MV_BIT_MASK(bitNum) )
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/* Invert bit 'x' in integer word (RMW) */
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#define MV_BIT_INV(word, bitNum) ( (word) ^= MV_BIT_MASK(bitNum) )
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/* Get the min between 'a' or 'b' */
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#define MV_MIN(a,b) (((a) < (b)) ? (a) : (b))
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/* Get the max between 'a' or 'b' */
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#define MV_MAX(a,b) (((a) < (b)) ? (b) : (a))
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#define mvOsDivide(num, div) \
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int i=0, rem=(num); \
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while(rem >= (div)) \
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#define mvOsReminder(num, div) \
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while(rem >= (div)) \
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#define MV_IP_QUAD(ipAddr) ((ipAddr >> 24) & 0xFF), ((ipAddr >> 16) & 0xFF), \
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((ipAddr >> 8) & 0xFF), ((ipAddr >> 0) & 0xFF)
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#define MV_IS_POWER_OF_2(num) ((num != 0) && ((num & (num - 1)) == 0))
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#ifndef MV_ASMLANGUAGE
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/* mvCommon API list */
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MV_VOID mvHexToBin(const char* pHexStr, MV_U8* pBin, int size);
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void mvAsciiToHex(const char* asciiStr, char* hexStr);
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void mvBinToHex(const MV_U8* bin, char* hexStr, int size);
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void mvBinToAscii(const MV_U8* bin, char* asciiStr, int size);
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MV_STATUS mvMacStrToHex(const char* macStr, MV_U8* macHex);
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MV_STATUS mvMacHexToStr(MV_U8* macHex, char* macStr);
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void mvSizePrint(MV_U32);
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MV_U32 mvLog2(MV_U32 num);
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MV_STATUS mvWinOverlapTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2);
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MV_STATUS mvWinWithinWinTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2);
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#endif /* MV_ASMLANGUAGE */
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#endif /* __INCmvCommonh */