1
/*====================================================================
2
* Project: Board Support Package (BSP)
4
* Function: SFR definitions for MPC5xx
5
* The names with double underscore are used in assembler parts
6
* the other can be used to access these registers in C/C++
8
* Copyright HighTec EDV-Systeme GmbH 1982-2007
9
*====================================================================*/
13
#if defined HIMO_DEBUG
14
#define INTERNAL_RAM_BASE 0x1000000
16
#define INTERNAL_RAM_BASE 0x1000000
19
#define __SIUMCR (INTERNAL_RAM_BASE + 0x2fc000)
20
#define __SYPCR (INTERNAL_RAM_BASE + 0x2fc004)
21
#define __SIPEND (INTERNAL_RAM_BASE + 0x2fc010)
22
#define __SIMASK (INTERNAL_RAM_BASE + 0x2fc014)
23
#define __SIEL (INTERNAL_RAM_BASE + 0x2fc018)
24
#define __SIVEC (INTERNAL_RAM_BASE + 0x2fc01c)
25
#define __BR0 (INTERNAL_RAM_BASE + 0x2fc100)
26
#define __OR0 (INTERNAL_RAM_BASE + 0x2fc104)
27
#define __BR1 (INTERNAL_RAM_BASE + 0x2fc108)
28
#define __OR1 (INTERNAL_RAM_BASE + 0x2fc10c)
29
#define __BR2 (INTERNAL_RAM_BASE + 0x2fc110)
30
#define __OR2 (INTERNAL_RAM_BASE + 0x2fc114)
31
#define __BR3 (INTERNAL_RAM_BASE + 0x2fc118)
32
#define __OR3 (INTERNAL_RAM_BASE + 0x2fc11c)
33
#define __DMBR (INTERNAL_RAM_BASE + 0x2fc140)
34
#define __DMOR (INTERNAL_RAM_BASE + 0x2fc144)
35
#define __PISCR (INTERNAL_RAM_BASE + 0x2fc240)
36
#define __PITC (INTERNAL_RAM_BASE + 0x2fc244)
37
#define __PITR (INTERNAL_RAM_BASE + 0x2fc248)
38
#define __SCCR (INTERNAL_RAM_BASE + 0x2fc280)
39
#define __PLPRCR (INTERNAL_RAM_BASE + 0x2fc284)
40
#define __PLPRCRK (INTERNAL_RAM_BASE + 0x2fc384)
41
#define __TBSCR (INTERNAL_RAM_BASE + 0x2fc200)
43
#define __DPTMCR (INTERNAL_RAM_BASE + 0x300000)
44
#define __RAMBAR (INTERNAL_RAM_BASE + 0x300004)
45
#define __PORTQS (INTERNAL_RAM_BASE + 0x305014)
46
#define __PQSPAR (INTERNAL_RAM_BASE + 0x305016)
47
#define __MPIOSMDR (INTERNAL_RAM_BASE + 0x306100)
48
#define __MPIOSMDDR (INTERNAL_RAM_BASE + 0x306102)
49
#define __MIOS1TPCR (INTERNAL_RAM_BASE + 0x306800)
50
#define __SRAMMCR (INTERNAL_RAM_BASE + 0x380000)
51
#define __SGPIODT1 (INTERNAL_RAM_BASE + 0x2fc024)
52
#define __SGPIODT2 (INTERNAL_RAM_BASE + 0x2fc028)
53
#define __SGPIOCR (INTERNAL_RAM_BASE + 0x2fc02c)
54
#define __EMCR (INTERNAL_RAM_BASE + 0x2fc030)
55
#define __UMCR (INTERNAL_RAM_BASE + 0x307f80)
56
#define __QDSCI_IL (INTERNAL_RAM_BASE + 0x305004)
58
#define SIUMCR (* (volatile unsigned int *) __SIUMCR)
59
#define SYPCR (* (volatile unsigned int *) __SYPCR)
60
#define SIPEND (* (volatile unsigned short *) __SIPEND)
61
#define SIMASK (* (volatile unsigned short *) __SIMASK)
62
#define SIEL (* (volatile unsigned short *) __SIEL)
63
#define SIVEC (* (volatile unsigned char *) __SIVEC)
64
#define BR0 (* (volatile unsigned int *) __BR0)
65
#define OR0 (* (volatile unsigned int *) __OR0)
66
#define BR1 (* (volatile unsigned int *) __BR1)
67
#define OR1 (* (volatile unsigned int *) __OR1)
68
#define BR2 (* (volatile unsigned int *) __BR2)
69
#define OR2 (* (volatile unsigned int *) __OR2)
70
#define BR3 (* (volatile unsigned int *) __BR3)
71
#define OR3 (* (volatile unsigned int *) __OR3)
72
#define DMBR (* (volatile unsigned int *) __DMBR)
73
#define DMOR (* (volatile unsigned int *) __DMOR)
74
#define PISCR (* (volatile unsigned short *) __PISCR)
75
#define PITC (* (volatile unsigned short *) __PITC)
76
#define PITR (* (volatile unsigned short *) __PITR)
77
#define SCCR (* (volatile unsigned int *) __SCCR)
78
#define PLPRCR (* (volatile unsigned int *) __PLPRCR)
79
#define PLPRCRK (* (volatile unsigned int *) __PLPRCRK)
80
#define TBSCR (* (volatile unsigned short *) __TBSCR)
82
#define DPTMCR (* (volatile unsigned int *) __DPTMCR)
83
#define RAMBAR (* (volatile unsigned int *) __RAMBAR)
84
#define PORTQS (* (volatile unsigned int *) __PORTQS)
85
#define PQSPAR (* (volatile unsigned short *) __PQSPAR)
86
#define MPIOSMDR (* (volatile unsigned short *) __MPIOSMDR)
87
#define MPIOSMDDR (* (volatile unsigned short *) __MPIOSMDDR)
88
#define MIOS1TPCR (* (volatile unsigned int *) __MIOS1TPCR)
89
#define SRAMMCR (* (volatile unsigned int *) __SRAMMCR)
90
#define SGPIODT1 (* (volatile unsigned int *) __SGPIODT1)
91
#define SGPIODT2 (* (volatile unsigned int *) __SGPIODT2)
92
#define SGPIOCR (* (volatile unsigned int *) __SGPIOCR)
93
#define EMCR (* (volatile unsigned int *) __EMCR)
94
#define UMCR (* (volatile unsigned int *) __UMCR)
95
/* Dual SCI Interrupt Level */
96
#define QDSCI_IL (*(volatile short *)__QDSCI_IL)
101
#define SPR_BBCMCR 560
103
/* Refer to MPC555 User's Manual March 1, 1999 revision
104
section 6.13.2.1 and 6.13.2.4 for more info */
106
/* SIPEND (SIU Interrupt Pending Register ) */
107
#define SIPEND_IRQ0 0x8000 /* IRQ 0 */
108
#define SIPEND_LVL0 0x4000 /* LVL 0 */
109
#define SIPEND_IRQ1 0x2000 /* IRQ 1 */
110
#define SIPEND_LVL1 0x1000 /* LVL 1 */
111
#define SIPEND_IRQ2 0x0800 /* IRQ 2 */
112
#define SIPEND_LVL2 0x0400 /* LVL 2 */
113
#define SIPEND_IRQ3 0x0200 /* IRQ 3 */
114
#define SIPEND_LVL3 0x0100 /* LVL 3 */
115
#define SIPEND_IRQ4 0x0080 /* IRQ 4 */
116
#define SIPEND_LVL4 0x0040 /* LVL 4 */
117
#define SIPEND_IRQ5 0x0020 /* IRQ 5 */
118
#define SIPEND_LVL5 0x0010 /* LVL 5 */
119
#define SIPEND_IRQ6 0x0008 /* IRQ 6 */
120
#define SIPEND_LVL6 0x0004 /* LVL 6 */
121
#define SIPEND_IRQ7 0x0002 /* IRQ 7 */
122
#define SIPEND_LVL7 0x0001 /* LVL 7 */
123
#define SIPEND_IRQ(x) (0x8000>>(x<<1)) /* IRQ x */
124
#define SIPEND_LVL(x) (0x4000>>(x<<1)) /* LVL x */
126
/* SIEL (SIU Interrupt Edge Level Register) */
127
#define SIEL_ED0 0x8000
128
#define SIEL_WM0 0x4000
129
#define SIEL_ED1 0x2000
130
#define SIEL_WM1 0x1000
131
#define SIEL_ED2 0x0800
132
#define SIEL_WM2 0x0400
133
#define SIEL_ED3 0x0200
134
#define SIEL_WM3 0x0100
135
#define SIEL_ED4 0x0080
136
#define SIEL_WM4 0x0040
137
#define SIEL_ED5 0x0020
138
#define SIEL_WM5 0x0010
139
#define SIEL_ED6 0x0008
140
#define SIEL_WM6 0x0004
141
#define SIEL_ED7 0x0002
142
#define SIEL_WM7 0x0001
143
#define SIEL_ED(x) (0x8000>>(x<<1))
144
#define SIEL_WM(x) (0x4000>>(x<<1))
146
/* SIVEC (SIU Interrupt Vector) */
147
#define SIVEC_IRQ0 0x00 /* IRQ 0 */
148
#define SIVEC_LVL0 0x04 /* LVL 0 */
149
#define SIVEC_IRQ1 0x08 /* IRQ 1 */
150
#define SIVEC_LVL1 0x0c /* LVL 1 */
151
#define SIVEC_IRQ2 0x10 /* IRQ 2 */
152
#define SIVEC_LVL2 0x14 /* LVL 2 */
153
#define SIVEC_IRQ3 0x18 /* IRQ 3 */
154
#define SIVEC_LVL3 0x1c /* LVL 3 */
155
#define SIVEC_IRQ4 0x20 /* IRQ 4 */
156
#define SIVEC_LVL4 0x24 /* LVL 4 */
157
#define SIVEC_IRQ5 0x28 /* IRQ 5 */
158
#define SIVEC_LVL5 0x2c /* LVL 5 */
159
#define SIVEC_IRQ6 0x30 /* IRQ 6 */
160
#define SIVEC_LVL6 0x34 /* LVL 6 */
161
#define SIVEC_IRQ7 0x38 /* IRQ 7 */
162
#define SIVEC_LVL7 0x3c /* LVL 7 */
163
#define SIVEC_IRQ(x) (x<<3) /* IRQ x */
164
#define SIVEC_LVL(x) ((x<<3)+0x4)/* LVL x */
168
#define LEDOFF(x) (MPIOSMDR |= (1<<(x)))
169
#define LEDON(x) (MPIOSMDR &= ~(1<<(x)))
170
#define LEDTOGGLE(x) (MPIOSMDR ^= (1<<(x)))
172
#endif /* __MPC555_H__*/