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* crt0.S -- startup file for PowerPC systems.
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# definitions for clock frequency for phyCOREMPC555/phyCOREMPC565
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# default is phyCOREMPC565 at 40 MHz
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# define CLOCK_SCALE 0x00104000 /* 40 MHz ((1+1) * 20 MHz) */
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# define CLOCK_SCALE 0x00D04000 /* 56 MHz ((13+1) * 4 MHz) */
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# define CLOCK_SCALE 0x00904000 /* 40 MHz (( 9+1) * 4 MHz) */
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.type _start,@function
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** Make the processor to run at specified clock frequency
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** by programming PLPRCR register with suitable value
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#if !defined(HIMO_DEBUG)
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lis %r4, __PLPRCRK@ha /* unlock PLPRCR register */
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stw %r5, __PLPRCRK@l(%r4)
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lwz %r5, __PLPRCR@l(%r4)
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lis %r5, (CLOCK_SCALE>>16)
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ori %r5, %r5, (CLOCK_SCALE & 0xffff)
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stw %r5, __PLPRCR@l(%r4)
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lwz %r5, __SCCR@l(%r4)
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lis %r6, 0x0100 /* clear RTDIV: set pre divider to 4 */
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stw %r5, __SCCR@l(%r4)
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sth %r5, __SIMASK@l(%r4)
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/* load the system stack */
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lis %r1, __USER_STACK_TOP@ha
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la %r1, __USER_STACK_TOP@l(%r1)
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stw %r0,0(%r1) /* clear back chain */
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stwu %r1,-64(%r1) /* push another stack frame */
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/* initialize data sections */
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li %r3,0 /* argc = 0 */
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li %r4,0 /* argv = NULL */
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/* return value from main is argument to exit */
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.size _start,.Lstart-_start
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.section ".sdata","aw"
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__atexit: /* tell C's eabi-ctor's we have an atexit function */
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.long atexit@fixup /* and that it is to register __do_global_dtors */
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.section ".fixup","aw"
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.type clear_table,@function
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lis %r9,__clear_table@ha
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la %r9,__clear_table@l(%r9)
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.size clear_table,clear_table_end-clear_table
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.type copy_table,@function
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lis %r9,__copy_table@ha
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la %r9,__copy_table@l(%r9)
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.size copy_table,copy_table_end-copy_table