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VMMDECL(RTSEL) SELMGetTrap8Selector(PVM pVM);
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VMMDECL(void) SELMSetTrap8EIP(PVM pVM, uint32_t u32EIP);
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VMMDECL(int) SELMGetRing1Stack(PVM pVM, uint32_t *pSS, PRTGCPTR32 pEsp);
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VMMDECL(RTGCPTR) SELMGetGuestTSS(PVM pVM);
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VMMDECL(RTSEL) SELMGetHyperCS(PVM pVM);
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VMMDECL(RTSEL) SELMGetHyperCS64(PVM pVM);
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VMMDECL(RTSEL) SELMGetHyperDS(PVM pVM);
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VMMDECL(RTSEL) SELMGetHyperTSS(PVM pVM);
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VMMDECL(RTSEL) SELMGetHyperTSSTrap08(PVM pVM);
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VMMDECL(RTRCPTR) SELMGetHyperGDT(PVM pVM);
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VMMDECL(int) SELMGetTSSInfo(PVM pVM, PVMCPU pVCpu, PRTGCUINTPTR pGCPtrTss, PRTGCUINTPTR pcbTss, bool *pfCanHaveIOBitmap);
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VMMDECL(RTGCPTR) SELMToFlat(PVM pVM, DIS_SELREG SelReg, PCPUMCTXCORE pCtxCore, RTGCPTR Addr);
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VMMDECL(RTGCPTR) SELMToFlatBySel(PVM pVM, RTSEL Sel, RTGCPTR Addr);
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VMMDECL(void) SELMShadowCR3Changed(PVM pVM, PVMCPU pVCpu);
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VMMDECL(RTSEL) SELMGetTrap8Selector(PVM pVM);
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VMMDECL(void) SELMSetTrap8EIP(PVM pVM, uint32_t u32EIP);
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VMMDECL(int) SELMGetRing1Stack(PVM pVM, uint32_t *pSS, PRTGCPTR32 pEsp);
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VMMDECL(RTGCPTR) SELMGetGuestTSS(PVM pVM);
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VMMDECL(RTSEL) SELMGetHyperCS(PVM pVM);
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VMMDECL(RTSEL) SELMGetHyperCS64(PVM pVM);
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VMMDECL(RTSEL) SELMGetHyperDS(PVM pVM);
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VMMDECL(RTSEL) SELMGetHyperTSS(PVM pVM);
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VMMDECL(RTSEL) SELMGetHyperTSSTrap08(PVM pVM);
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VMMDECL(RTRCPTR) SELMGetHyperGDT(PVM pVM);
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VMMDECL(int) SELMGetTSSInfo(PVM pVM, PVMCPU pVCpu, PRTGCUINTPTR pGCPtrTss, PRTGCUINTPTR pcbTss, bool *pfCanHaveIOBitmap);
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VMMDECL(RTGCPTR) SELMToFlat(PVM pVM, DISSELREG SelReg, PCPUMCTXCORE pCtxCore, RTGCPTR Addr);
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VMMDECL(RTGCPTR) SELMToFlatBySel(PVM pVM, RTSEL Sel, RTGCPTR Addr);
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VMMDECL(void) SELMShadowCR3Changed(PVM pVM, PVMCPU pVCpu);
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/** Flags for SELMToFlatEx().
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#define SELMTOFLAT_FLAGS_HYPER RT_BIT(10)
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VMMDECL(int) SELMToFlatEx(PVM pVM, DIS_SELREG SelReg, PCCPUMCTXCORE pCtxCore, RTGCPTR Addr, unsigned fFlags, PRTGCPTR ppvGC);
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VMMDECL(int) SELMToFlatBySelEx(PVM pVM, X86EFLAGS eflags, RTSEL Sel, RTGCPTR Addr, PCCPUMSELREGHID pHiddenSel,
78
unsigned fFlags, PRTGCPTR ppvGC, uint32_t *pcb);
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VMMDECL(int) SELMValidateAndConvertCSAddr(PVM pVM, X86EFLAGS eflags, RTSEL SelCPL, RTSEL SelCS,
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PCCPUMSELREGHID pHiddenCSSel, RTGCPTR Addr, PRTGCPTR ppvFlat);
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VMMDECL(int) SELMValidateAndConvertCSAddrGCTrap(PVM pVM, X86EFLAGS eflags, RTSEL SelCPL, RTSEL SelCS, RTGCPTR Addr,
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PRTGCPTR ppvFlat, uint32_t *pcBits);
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VMMDECL(DISCPUMODE) SELMGetCpuModeFromSelector(PVM pVM, X86EFLAGS eflags, RTSEL Sel, PCCPUMSELREGHID pHiddenSel);
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VMMDECL(int) SELMGetLDTFromSel(PVM pVM, RTSEL SelLdt, PRTGCPTR ppvLdt, unsigned *pcbLimit);
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VMMDECL(int) SELMToFlatEx(PVMCPU pVCpu, DISSELREG SelReg, PCPUMCTXCORE pCtxCore, RTGCPTR Addr, uint32_t fFlags,
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VMMDECL(int) SELMToFlatBySelEx(PVMCPU pVCpu, X86EFLAGS eflags, RTSEL Sel, RTGCPTR Addr, uint32_t fFlags,
79
PRTGCPTR ppvGC, uint32_t *pcb);
80
VMMDECL(int) SELMValidateAndConvertCSAddr(PVMCPU pVCpu, X86EFLAGS eflags, RTSEL SelCPL, RTSEL SelCS,
81
PCPUMSELREG pSRegCS, RTGCPTR Addr, PRTGCPTR ppvFlat);
82
#ifdef VBOX_WITH_RAW_MODE
83
VMM_INT_DECL(void) SELMLoadHiddenSelectorReg(PVMCPU pVCpu, PCCPUMCTX pCtx, PCPUMSELREG pSReg);
89
89
* @ingroup grp_selm
92
VMMR3DECL(int) SELMR3Init(PVM pVM);
93
VMMR3DECL(int) SELMR3InitFinalize(PVM pVM);
94
VMMR3DECL(void) SELMR3Relocate(PVM pVM);
95
VMMR3DECL(int) SELMR3Term(PVM pVM);
96
VMMR3DECL(void) SELMR3Reset(PVM pVM);
97
VMMR3DECL(int) SELMR3UpdateFromCPUM(PVM pVM, PVMCPU pVCpu);
98
VMMR3DECL(int) SELMR3SyncTSS(PVM pVM, PVMCPU pVCpu);
99
VMMR3DECL(int) SELMR3GetSelectorInfo(PVM pVM, PVMCPU pVCpu, RTSEL Sel, PDBGFSELINFO pSelInfo);
100
VMMR3DECL(int) SELMR3GetShadowSelectorInfo(PVM pVM, RTSEL Sel, PDBGFSELINFO pSelInfo);
101
VMMR3DECL(void) SELMR3DisableMonitoring(PVM pVM);
102
VMMR3DECL(void) SELMR3DumpDescriptor(X86DESC Desc, RTSEL Sel, const char *pszMsg);
103
VMMR3DECL(void) SELMR3DumpHyperGDT(PVM pVM);
104
VMMR3DECL(void) SELMR3DumpHyperLDT(PVM pVM);
105
VMMR3DECL(void) SELMR3DumpGuestGDT(PVM pVM);
106
VMMR3DECL(void) SELMR3DumpGuestLDT(PVM pVM);
107
VMMR3DECL(bool) SELMR3CheckTSS(PVM pVM);
108
VMMR3DECL(int) SELMR3DebugCheck(PVM pVM);
92
VMMR3DECL(int) SELMR3Init(PVM pVM);
93
VMMR3DECL(int) SELMR3InitFinalize(PVM pVM);
94
VMMR3DECL(void) SELMR3Relocate(PVM pVM);
95
VMMR3DECL(int) SELMR3Term(PVM pVM);
96
VMMR3DECL(void) SELMR3Reset(PVM pVM);
97
VMMR3DECL(VBOXSTRICTRC) SELMR3UpdateFromCPUM(PVM pVM, PVMCPU pVCpu);
98
VMMR3DECL(int) SELMR3SyncTSS(PVM pVM, PVMCPU pVCpu);
99
VMMR3DECL(int) SELMR3GetSelectorInfo(PVM pVM, PVMCPU pVCpu, RTSEL Sel, PDBGFSELINFO pSelInfo);
100
VMMR3DECL(int) SELMR3GetShadowSelectorInfo(PVM pVM, RTSEL Sel, PDBGFSELINFO pSelInfo);
101
VMMR3DECL(void) SELMR3DisableMonitoring(PVM pVM);
102
VMMR3DECL(void) SELMR3DumpDescriptor(X86DESC Desc, RTSEL Sel, const char *pszMsg);
103
VMMR3DECL(void) SELMR3DumpHyperGDT(PVM pVM);
104
VMMR3DECL(void) SELMR3DumpHyperLDT(PVM pVM);
105
VMMR3DECL(void) SELMR3DumpGuestGDT(PVM pVM);
106
VMMR3DECL(void) SELMR3DumpGuestLDT(PVM pVM);
107
VMMR3DECL(bool) SELMR3CheckTSS(PVM pVM);
108
VMMR3DECL(int) SELMR3DebugCheck(PVM pVM);
109
109
/** @def SELMR3_DEBUG_CHECK
110
110
* Invokes SELMR3DebugCheck in stricts builds. */
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111
# ifdef VBOX_STRICT