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* Copyright (C) 2005 Mike Isely <isely@pobox.com>
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/firmware.h>
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#include <linux/videodev2.h>
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#include <media/v4l2-common.h>
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#include <media/tuner.h>
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#include "pvrusb2-std.h"
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#include "pvrusb2-util.h"
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#include "pvrusb2-hdw.h"
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#include "pvrusb2-i2c-core.h"
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#include "pvrusb2-eeprom.h"
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#include "pvrusb2-hdw-internal.h"
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#include "pvrusb2-encoder.h"
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#include "pvrusb2-debug.h"
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#include "pvrusb2-fx2-cmd.h"
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#include "pvrusb2-wm8775.h"
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#include "pvrusb2-video-v4l.h"
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#include "pvrusb2-cx2584x-v4l.h"
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#include "pvrusb2-cs53l32a.h"
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#include "pvrusb2-audio.h"
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#define TV_MIN_FREQ 55250000L
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#define TV_MAX_FREQ 850000000L
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/* This defines a minimum interval that the decoder must remain quiet
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before we are allowed to start it running. */
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#define TIME_MSEC_DECODER_WAIT 50
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/* This defines a minimum interval that the encoder must remain quiet
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before we are allowed to configure it. I had this originally set to
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50msec, but Martin Dauskardt <martin.dauskardt@gmx.de> reports that
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things work better when it's set to 100msec. */
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#define TIME_MSEC_ENCODER_WAIT 100
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/* This defines the minimum interval that the encoder must successfully run
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before we consider that the encoder has run at least once since its
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firmware has been loaded. This measurement is in important for cases
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where we can't do something until we know that the encoder has been run
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#define TIME_MSEC_ENCODER_OK 250
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static struct pvr2_hdw *unit_pointers[PVR_NUM] = {[ 0 ... PVR_NUM-1 ] = NULL};
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static DEFINE_MUTEX(pvr2_unit_mtx);
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static int procreload;
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static int tuner[PVR_NUM] = { [0 ... PVR_NUM-1] = -1 };
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static int tolerance[PVR_NUM] = { [0 ... PVR_NUM-1] = 0 };
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static int video_std[PVR_NUM] = { [0 ... PVR_NUM-1] = 0 };
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static int init_pause_msec;
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module_param(ctlchg, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ctlchg, "0=optimize ctl change 1=always accept new ctl value");
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module_param(init_pause_msec, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(init_pause_msec, "hardware initialization settling delay");
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module_param(procreload, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(procreload,
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"Attempt init failure recovery with firmware reload");
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module_param_array(tuner, int, NULL, 0444);
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MODULE_PARM_DESC(tuner,"specify installed tuner type");
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module_param_array(video_std, int, NULL, 0444);
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MODULE_PARM_DESC(video_std,"specify initial video standard");
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module_param_array(tolerance, int, NULL, 0444);
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MODULE_PARM_DESC(tolerance,"specify stream error tolerance");
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/* US Broadcast channel 3 (61.25 MHz), to help with testing */
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static int default_tv_freq = 61250000L;
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/* 104.3 MHz, a usable FM station for my area */
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static int default_radio_freq = 104300000L;
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module_param_named(tv_freq, default_tv_freq, int, 0444);
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MODULE_PARM_DESC(tv_freq, "specify initial television frequency");
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module_param_named(radio_freq, default_radio_freq, int, 0444);
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MODULE_PARM_DESC(radio_freq, "specify initial radio frequency");
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#define PVR2_CTL_WRITE_ENDPOINT 0x01
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#define PVR2_CTL_READ_ENDPOINT 0x81
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#define PVR2_GPIO_IN 0x9008
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#define PVR2_GPIO_OUT 0x900c
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#define PVR2_GPIO_DIR 0x9020
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#define trace_firmware(...) pvr2_trace(PVR2_TRACE_FIRMWARE,__VA_ARGS__)
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#define PVR2_FIRMWARE_ENDPOINT 0x02
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/* size of a firmware chunk */
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#define FIRMWARE_CHUNK_SIZE 0x2000
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typedef void (*pvr2_subdev_update_func)(struct pvr2_hdw *,
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struct v4l2_subdev *);
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static const pvr2_subdev_update_func pvr2_module_update_functions[] = {
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[PVR2_CLIENT_ID_WM8775] = pvr2_wm8775_subdev_update,
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[PVR2_CLIENT_ID_SAA7115] = pvr2_saa7115_subdev_update,
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[PVR2_CLIENT_ID_MSP3400] = pvr2_msp3400_subdev_update,
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[PVR2_CLIENT_ID_CX25840] = pvr2_cx25840_subdev_update,
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[PVR2_CLIENT_ID_CS53L32A] = pvr2_cs53l32a_subdev_update,
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static const char *module_names[] = {
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[PVR2_CLIENT_ID_MSP3400] = "msp3400",
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[PVR2_CLIENT_ID_CX25840] = "cx25840",
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[PVR2_CLIENT_ID_SAA7115] = "saa7115",
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[PVR2_CLIENT_ID_TUNER] = "tuner",
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[PVR2_CLIENT_ID_DEMOD] = "tuner",
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[PVR2_CLIENT_ID_CS53L32A] = "cs53l32a",
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[PVR2_CLIENT_ID_WM8775] = "wm8775",
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static const unsigned char *module_i2c_addresses[] = {
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[PVR2_CLIENT_ID_TUNER] = "\x60\x61\x62\x63",
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[PVR2_CLIENT_ID_DEMOD] = "\x43",
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[PVR2_CLIENT_ID_MSP3400] = "\x40",
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[PVR2_CLIENT_ID_SAA7115] = "\x21",
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[PVR2_CLIENT_ID_WM8775] = "\x1b",
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[PVR2_CLIENT_ID_CX25840] = "\x44",
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[PVR2_CLIENT_ID_CS53L32A] = "\x11",
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static const char *ir_scheme_names[] = {
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[PVR2_IR_SCHEME_NONE] = "none",
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[PVR2_IR_SCHEME_29XXX] = "29xxx",
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[PVR2_IR_SCHEME_24XXX] = "24xxx (29xxx emulation)",
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[PVR2_IR_SCHEME_24XXX_MCE] = "24xxx (MCE device)",
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[PVR2_IR_SCHEME_ZILOG] = "Zilog",
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/* Define the list of additional controls we'll dynamically construct based
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on query of the cx2341x module. */
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struct pvr2_mpeg_ids {
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static const struct pvr2_mpeg_ids mpeg_ids[] = {
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.strid = "audio_layer",
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.id = V4L2_CID_MPEG_AUDIO_ENCODING,
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.strid = "audio_bitrate",
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.id = V4L2_CID_MPEG_AUDIO_L2_BITRATE,
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/* Already using audio_mode elsewhere :-( */
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.strid = "mpeg_audio_mode",
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.id = V4L2_CID_MPEG_AUDIO_MODE,
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.strid = "mpeg_audio_mode_extension",
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.id = V4L2_CID_MPEG_AUDIO_MODE_EXTENSION,
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.strid = "audio_emphasis",
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.id = V4L2_CID_MPEG_AUDIO_EMPHASIS,
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.strid = "audio_crc",
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.id = V4L2_CID_MPEG_AUDIO_CRC,
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.strid = "video_aspect",
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.id = V4L2_CID_MPEG_VIDEO_ASPECT,
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.strid = "video_b_frames",
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.id = V4L2_CID_MPEG_VIDEO_B_FRAMES,
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.strid = "video_gop_size",
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.id = V4L2_CID_MPEG_VIDEO_GOP_SIZE,
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.strid = "video_gop_closure",
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.id = V4L2_CID_MPEG_VIDEO_GOP_CLOSURE,
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.strid = "video_bitrate_mode",
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.id = V4L2_CID_MPEG_VIDEO_BITRATE_MODE,
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.strid = "video_bitrate",
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.id = V4L2_CID_MPEG_VIDEO_BITRATE,
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.strid = "video_bitrate_peak",
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.id = V4L2_CID_MPEG_VIDEO_BITRATE_PEAK,
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.strid = "video_temporal_decimation",
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.id = V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION,
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.strid = "stream_type",
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.id = V4L2_CID_MPEG_STREAM_TYPE,
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.strid = "video_spatial_filter_mode",
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.id = V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE,
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.strid = "video_spatial_filter",
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.id = V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER,
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.strid = "video_luma_spatial_filter_type",
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.id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE,
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.strid = "video_chroma_spatial_filter_type",
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.id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE,
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.strid = "video_temporal_filter_mode",
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.id = V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE,
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.strid = "video_temporal_filter",
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.id = V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER,
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.strid = "video_median_filter_type",
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.id = V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE,
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.strid = "video_luma_median_filter_top",
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.id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP,
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.strid = "video_luma_median_filter_bottom",
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.id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM,
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.strid = "video_chroma_median_filter_top",
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.id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP,
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.strid = "video_chroma_median_filter_bottom",
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.id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM,
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#define MPEGDEF_COUNT ARRAY_SIZE(mpeg_ids)
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static const char *control_values_srate[] = {
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[V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100] = "44.1 kHz",
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[V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000] = "48 kHz",
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[V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000] = "32 kHz",
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static const char *control_values_input[] = {
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[PVR2_CVAL_INPUT_TV] = "television", /*xawtv needs this name*/
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[PVR2_CVAL_INPUT_DTV] = "dtv",
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[PVR2_CVAL_INPUT_RADIO] = "radio",
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[PVR2_CVAL_INPUT_SVIDEO] = "s-video",
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[PVR2_CVAL_INPUT_COMPOSITE] = "composite",
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static const char *control_values_audiomode[] = {
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[V4L2_TUNER_MODE_MONO] = "Mono",
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[V4L2_TUNER_MODE_STEREO] = "Stereo",
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[V4L2_TUNER_MODE_LANG1] = "Lang1",
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[V4L2_TUNER_MODE_LANG2] = "Lang2",
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[V4L2_TUNER_MODE_LANG1_LANG2] = "Lang1+Lang2",
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static const char *control_values_hsm[] = {
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[PVR2_CVAL_HSM_FAIL] = "Fail",
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[PVR2_CVAL_HSM_HIGH] = "High",
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[PVR2_CVAL_HSM_FULL] = "Full",
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static const char *pvr2_state_names[] = {
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[PVR2_STATE_NONE] = "none",
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[PVR2_STATE_DEAD] = "dead",
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[PVR2_STATE_COLD] = "cold",
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[PVR2_STATE_WARM] = "warm",
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[PVR2_STATE_ERROR] = "error",
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[PVR2_STATE_READY] = "ready",
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[PVR2_STATE_RUN] = "run",
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struct pvr2_fx2cmd_descdef {
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static const struct pvr2_fx2cmd_descdef pvr2_fx2cmd_desc[] = {
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{FX2CMD_MEM_WRITE_DWORD, "write encoder dword"},
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{FX2CMD_MEM_READ_DWORD, "read encoder dword"},
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{FX2CMD_HCW_ZILOG_RESET, "zilog IR reset control"},
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{FX2CMD_MEM_READ_64BYTES, "read encoder 64bytes"},
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{FX2CMD_REG_WRITE, "write encoder register"},
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{FX2CMD_REG_READ, "read encoder register"},
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{FX2CMD_MEMSEL, "encoder memsel"},
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{FX2CMD_I2C_WRITE, "i2c write"},
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{FX2CMD_I2C_READ, "i2c read"},
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{FX2CMD_GET_USB_SPEED, "get USB speed"},
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{FX2CMD_STREAMING_ON, "stream on"},
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{FX2CMD_STREAMING_OFF, "stream off"},
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{FX2CMD_FWPOST1, "fwpost1"},
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{FX2CMD_POWER_OFF, "power off"},
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{FX2CMD_POWER_ON, "power on"},
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{FX2CMD_DEEP_RESET, "deep reset"},
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{FX2CMD_GET_EEPROM_ADDR, "get rom addr"},
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{FX2CMD_GET_IR_CODE, "get IR code"},
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{FX2CMD_HCW_DEMOD_RESETIN, "hcw demod resetin"},
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{FX2CMD_HCW_DTV_STREAMING_ON, "hcw dtv stream on"},
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{FX2CMD_HCW_DTV_STREAMING_OFF, "hcw dtv stream off"},
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{FX2CMD_ONAIR_DTV_STREAMING_ON, "onair dtv stream on"},
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{FX2CMD_ONAIR_DTV_STREAMING_OFF, "onair dtv stream off"},
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{FX2CMD_ONAIR_DTV_POWER_ON, "onair dtv power on"},
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{FX2CMD_ONAIR_DTV_POWER_OFF, "onair dtv power off"},
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static int pvr2_hdw_set_input(struct pvr2_hdw *hdw,int v);
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static void pvr2_hdw_state_sched(struct pvr2_hdw *);
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static int pvr2_hdw_state_eval(struct pvr2_hdw *);
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static void pvr2_hdw_set_cur_freq(struct pvr2_hdw *,unsigned long);
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static void pvr2_hdw_worker_poll(struct work_struct *work);
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static int pvr2_hdw_wait(struct pvr2_hdw *,int state);
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static int pvr2_hdw_untrip_unlocked(struct pvr2_hdw *);
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static void pvr2_hdw_state_log_state(struct pvr2_hdw *);
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static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl);
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static int pvr2_hdw_commit_setup(struct pvr2_hdw *hdw);
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static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw);
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static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw);
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static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw);
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static void pvr2_hdw_quiescent_timeout(unsigned long);
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static void pvr2_hdw_encoder_wait_timeout(unsigned long);
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static void pvr2_hdw_encoder_run_timeout(unsigned long);
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static int pvr2_issue_simple_cmd(struct pvr2_hdw *,u32);
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static int pvr2_send_request_ex(struct pvr2_hdw *hdw,
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unsigned int timeout,int probe_fl,
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void *write_data,unsigned int write_len,
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void *read_data,unsigned int read_len);
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static int pvr2_hdw_check_cropcap(struct pvr2_hdw *hdw);
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static void trace_stbit(const char *name,int val)
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pvr2_trace(PVR2_TRACE_STBITS,
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"State bit %s <-- %s",
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name,(val ? "true" : "false"));
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static int ctrl_channelfreq_get(struct pvr2_ctrl *cptr,int *vp)
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struct pvr2_hdw *hdw = cptr->hdw;
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if ((hdw->freqProgSlot > 0) && (hdw->freqProgSlot <= FREQTABLE_SIZE)) {
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*vp = hdw->freqTable[hdw->freqProgSlot-1];
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static int ctrl_channelfreq_set(struct pvr2_ctrl *cptr,int m,int v)
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struct pvr2_hdw *hdw = cptr->hdw;
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unsigned int slotId = hdw->freqProgSlot;
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if ((slotId > 0) && (slotId <= FREQTABLE_SIZE)) {
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hdw->freqTable[slotId-1] = v;
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/* Handle side effects correctly - if we're tuned to this
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slot, then forgot the slot id relation since the stored
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frequency has been changed. */
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if (hdw->freqSelector) {
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if (hdw->freqSlotRadio == slotId) {
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hdw->freqSlotRadio = 0;
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if (hdw->freqSlotTelevision == slotId) {
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hdw->freqSlotTelevision = 0;
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static int ctrl_channelprog_get(struct pvr2_ctrl *cptr,int *vp)
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*vp = cptr->hdw->freqProgSlot;
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static int ctrl_channelprog_set(struct pvr2_ctrl *cptr,int m,int v)
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struct pvr2_hdw *hdw = cptr->hdw;
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if ((v >= 0) && (v <= FREQTABLE_SIZE)) {
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hdw->freqProgSlot = v;
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static int ctrl_channel_get(struct pvr2_ctrl *cptr,int *vp)
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struct pvr2_hdw *hdw = cptr->hdw;
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*vp = hdw->freqSelector ? hdw->freqSlotRadio : hdw->freqSlotTelevision;
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static int ctrl_channel_set(struct pvr2_ctrl *cptr,int m,int slotId)
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struct pvr2_hdw *hdw = cptr->hdw;
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if ((slotId < 0) || (slotId > FREQTABLE_SIZE)) return 0;
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freq = hdw->freqTable[slotId-1];
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pvr2_hdw_set_cur_freq(hdw,freq);
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if (hdw->freqSelector) {
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hdw->freqSlotRadio = slotId;
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hdw->freqSlotTelevision = slotId;
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static int ctrl_freq_get(struct pvr2_ctrl *cptr,int *vp)
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*vp = pvr2_hdw_get_cur_freq(cptr->hdw);
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static int ctrl_freq_is_dirty(struct pvr2_ctrl *cptr)
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return cptr->hdw->freqDirty != 0;
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static void ctrl_freq_clear_dirty(struct pvr2_ctrl *cptr)
440
cptr->hdw->freqDirty = 0;
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static int ctrl_freq_set(struct pvr2_ctrl *cptr,int m,int v)
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pvr2_hdw_set_cur_freq(cptr->hdw,v);
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static int ctrl_cropl_min_get(struct pvr2_ctrl *cptr, int *left)
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struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
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int stat = pvr2_hdw_check_cropcap(cptr->hdw);
456
*left = cap->bounds.left;
460
static int ctrl_cropl_max_get(struct pvr2_ctrl *cptr, int *left)
462
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
463
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
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*left = cap->bounds.left;
468
if (cap->bounds.width > cptr->hdw->cropw_val) {
469
*left += cap->bounds.width - cptr->hdw->cropw_val;
474
static int ctrl_cropt_min_get(struct pvr2_ctrl *cptr, int *top)
476
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
477
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
481
*top = cap->bounds.top;
485
static int ctrl_cropt_max_get(struct pvr2_ctrl *cptr, int *top)
487
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
488
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
492
*top = cap->bounds.top;
493
if (cap->bounds.height > cptr->hdw->croph_val) {
494
*top += cap->bounds.height - cptr->hdw->croph_val;
499
static int ctrl_cropw_max_get(struct pvr2_ctrl *cptr, int *val)
501
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
502
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
507
if (cap->bounds.width > cptr->hdw->cropl_val) {
508
*val = cap->bounds.width - cptr->hdw->cropl_val;
513
static int ctrl_croph_max_get(struct pvr2_ctrl *cptr, int *val)
515
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
516
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
521
if (cap->bounds.height > cptr->hdw->cropt_val) {
522
*val = cap->bounds.height - cptr->hdw->cropt_val;
527
static int ctrl_get_cropcapbl(struct pvr2_ctrl *cptr, int *val)
529
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
530
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
534
*val = cap->bounds.left;
538
static int ctrl_get_cropcapbt(struct pvr2_ctrl *cptr, int *val)
540
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
541
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
545
*val = cap->bounds.top;
549
static int ctrl_get_cropcapbw(struct pvr2_ctrl *cptr, int *val)
551
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
552
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
556
*val = cap->bounds.width;
560
static int ctrl_get_cropcapbh(struct pvr2_ctrl *cptr, int *val)
562
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
563
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
567
*val = cap->bounds.height;
571
static int ctrl_get_cropcapdl(struct pvr2_ctrl *cptr, int *val)
573
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
574
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
578
*val = cap->defrect.left;
582
static int ctrl_get_cropcapdt(struct pvr2_ctrl *cptr, int *val)
584
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
585
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
589
*val = cap->defrect.top;
593
static int ctrl_get_cropcapdw(struct pvr2_ctrl *cptr, int *val)
595
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
596
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
600
*val = cap->defrect.width;
604
static int ctrl_get_cropcapdh(struct pvr2_ctrl *cptr, int *val)
606
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
607
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
611
*val = cap->defrect.height;
615
static int ctrl_get_cropcappan(struct pvr2_ctrl *cptr, int *val)
617
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
618
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
622
*val = cap->pixelaspect.numerator;
626
static int ctrl_get_cropcappad(struct pvr2_ctrl *cptr, int *val)
628
struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
629
int stat = pvr2_hdw_check_cropcap(cptr->hdw);
633
*val = cap->pixelaspect.denominator;
637
static int ctrl_vres_max_get(struct pvr2_ctrl *cptr,int *vp)
639
/* Actual maximum depends on the video standard in effect. */
640
if (cptr->hdw->std_mask_cur & V4L2_STD_525_60) {
648
static int ctrl_vres_min_get(struct pvr2_ctrl *cptr,int *vp)
650
/* Actual minimum depends on device digitizer type. */
651
if (cptr->hdw->hdw_desc->flag_has_cx25840) {
659
static int ctrl_get_input(struct pvr2_ctrl *cptr,int *vp)
661
*vp = cptr->hdw->input_val;
665
static int ctrl_check_input(struct pvr2_ctrl *cptr,int v)
667
return ((1 << v) & cptr->hdw->input_allowed_mask) != 0;
670
static int ctrl_set_input(struct pvr2_ctrl *cptr,int m,int v)
672
return pvr2_hdw_set_input(cptr->hdw,v);
675
static int ctrl_isdirty_input(struct pvr2_ctrl *cptr)
677
return cptr->hdw->input_dirty != 0;
680
static void ctrl_cleardirty_input(struct pvr2_ctrl *cptr)
682
cptr->hdw->input_dirty = 0;
686
static int ctrl_freq_max_get(struct pvr2_ctrl *cptr, int *vp)
689
struct pvr2_hdw *hdw = cptr->hdw;
690
if (hdw->tuner_signal_stale) {
691
pvr2_hdw_status_poll(hdw);
693
fv = hdw->tuner_signal_info.rangehigh;
695
/* Safety fallback */
699
if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) {
708
static int ctrl_freq_min_get(struct pvr2_ctrl *cptr, int *vp)
711
struct pvr2_hdw *hdw = cptr->hdw;
712
if (hdw->tuner_signal_stale) {
713
pvr2_hdw_status_poll(hdw);
715
fv = hdw->tuner_signal_info.rangelow;
717
/* Safety fallback */
721
if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) {
730
static int ctrl_cx2341x_is_dirty(struct pvr2_ctrl *cptr)
732
return cptr->hdw->enc_stale != 0;
735
static void ctrl_cx2341x_clear_dirty(struct pvr2_ctrl *cptr)
737
cptr->hdw->enc_stale = 0;
738
cptr->hdw->enc_unsafe_stale = 0;
741
static int ctrl_cx2341x_get(struct pvr2_ctrl *cptr,int *vp)
744
struct v4l2_ext_controls cs;
745
struct v4l2_ext_control c1;
746
memset(&cs,0,sizeof(cs));
747
memset(&c1,0,sizeof(c1));
750
c1.id = cptr->info->v4l_id;
751
ret = cx2341x_ext_ctrls(&cptr->hdw->enc_ctl_state, 0, &cs,
758
static int ctrl_cx2341x_set(struct pvr2_ctrl *cptr,int m,int v)
761
struct pvr2_hdw *hdw = cptr->hdw;
762
struct v4l2_ext_controls cs;
763
struct v4l2_ext_control c1;
764
memset(&cs,0,sizeof(cs));
765
memset(&c1,0,sizeof(c1));
768
c1.id = cptr->info->v4l_id;
770
ret = cx2341x_ext_ctrls(&hdw->enc_ctl_state,
771
hdw->state_encoder_run, &cs,
774
/* Oops. cx2341x is telling us it's not safe to change
775
this control while we're capturing. Make a note of this
776
fact so that the pipeline will be stopped the next time
777
controls are committed. Then go on ahead and store this
779
ret = cx2341x_ext_ctrls(&hdw->enc_ctl_state,
782
if (!ret) hdw->enc_unsafe_stale = !0;
789
static unsigned int ctrl_cx2341x_getv4lflags(struct pvr2_ctrl *cptr)
791
struct v4l2_queryctrl qctrl;
792
struct pvr2_ctl_info *info;
793
qctrl.id = cptr->info->v4l_id;
794
cx2341x_ctrl_query(&cptr->hdw->enc_ctl_state,&qctrl);
795
/* Strip out the const so we can adjust a function pointer. It's
796
OK to do this here because we know this is a dynamically created
797
control, so the underlying storage for the info pointer is (a)
798
private to us, and (b) not in read-only storage. Either we do
799
this or we significantly complicate the underlying control
801
info = (struct pvr2_ctl_info *)(cptr->info);
802
if (qctrl.flags & V4L2_CTRL_FLAG_READ_ONLY) {
803
if (info->set_value) {
804
info->set_value = NULL;
807
if (!(info->set_value)) {
808
info->set_value = ctrl_cx2341x_set;
814
static int ctrl_streamingenabled_get(struct pvr2_ctrl *cptr,int *vp)
816
*vp = cptr->hdw->state_pipeline_req;
820
static int ctrl_masterstate_get(struct pvr2_ctrl *cptr,int *vp)
822
*vp = cptr->hdw->master_state;
826
static int ctrl_hsm_get(struct pvr2_ctrl *cptr,int *vp)
828
int result = pvr2_hdw_is_hsm(cptr->hdw);
829
*vp = PVR2_CVAL_HSM_FULL;
830
if (result < 0) *vp = PVR2_CVAL_HSM_FAIL;
831
if (result) *vp = PVR2_CVAL_HSM_HIGH;
835
static int ctrl_stdavail_get(struct pvr2_ctrl *cptr,int *vp)
837
*vp = cptr->hdw->std_mask_avail;
841
static int ctrl_stdavail_set(struct pvr2_ctrl *cptr,int m,int v)
843
struct pvr2_hdw *hdw = cptr->hdw;
845
ns = hdw->std_mask_avail;
846
ns = (ns & ~m) | (v & m);
847
if (ns == hdw->std_mask_avail) return 0;
848
hdw->std_mask_avail = ns;
849
pvr2_hdw_internal_set_std_avail(hdw);
850
pvr2_hdw_internal_find_stdenum(hdw);
854
static int ctrl_std_val_to_sym(struct pvr2_ctrl *cptr,int msk,int val,
855
char *bufPtr,unsigned int bufSize,
858
*len = pvr2_std_id_to_str(bufPtr,bufSize,msk & val);
862
static int ctrl_std_sym_to_val(struct pvr2_ctrl *cptr,
863
const char *bufPtr,unsigned int bufSize,
868
ret = pvr2_std_str_to_id(&id,bufPtr,bufSize);
869
if (ret < 0) return ret;
870
if (mskp) *mskp = id;
871
if (valp) *valp = id;
875
static int ctrl_stdcur_get(struct pvr2_ctrl *cptr,int *vp)
877
*vp = cptr->hdw->std_mask_cur;
881
static int ctrl_stdcur_set(struct pvr2_ctrl *cptr,int m,int v)
883
struct pvr2_hdw *hdw = cptr->hdw;
885
ns = hdw->std_mask_cur;
886
ns = (ns & ~m) | (v & m);
887
if (ns == hdw->std_mask_cur) return 0;
888
hdw->std_mask_cur = ns;
890
pvr2_hdw_internal_find_stdenum(hdw);
894
static int ctrl_stdcur_is_dirty(struct pvr2_ctrl *cptr)
896
return cptr->hdw->std_dirty != 0;
899
static void ctrl_stdcur_clear_dirty(struct pvr2_ctrl *cptr)
901
cptr->hdw->std_dirty = 0;
904
static int ctrl_signal_get(struct pvr2_ctrl *cptr,int *vp)
906
struct pvr2_hdw *hdw = cptr->hdw;
907
pvr2_hdw_status_poll(hdw);
908
*vp = hdw->tuner_signal_info.signal;
912
static int ctrl_audio_modes_present_get(struct pvr2_ctrl *cptr,int *vp)
915
unsigned int subchan;
916
struct pvr2_hdw *hdw = cptr->hdw;
917
pvr2_hdw_status_poll(hdw);
918
subchan = hdw->tuner_signal_info.rxsubchans;
919
if (subchan & V4L2_TUNER_SUB_MONO) {
920
val |= (1 << V4L2_TUNER_MODE_MONO);
922
if (subchan & V4L2_TUNER_SUB_STEREO) {
923
val |= (1 << V4L2_TUNER_MODE_STEREO);
925
if (subchan & V4L2_TUNER_SUB_LANG1) {
926
val |= (1 << V4L2_TUNER_MODE_LANG1);
928
if (subchan & V4L2_TUNER_SUB_LANG2) {
929
val |= (1 << V4L2_TUNER_MODE_LANG2);
936
static int ctrl_stdenumcur_set(struct pvr2_ctrl *cptr,int m,int v)
938
struct pvr2_hdw *hdw = cptr->hdw;
939
if (v < 0) return -EINVAL;
940
if (v > hdw->std_enum_cnt) return -EINVAL;
941
hdw->std_enum_cur = v;
944
if (hdw->std_mask_cur == hdw->std_defs[v].id) return 0;
945
hdw->std_mask_cur = hdw->std_defs[v].id;
951
static int ctrl_stdenumcur_get(struct pvr2_ctrl *cptr,int *vp)
953
*vp = cptr->hdw->std_enum_cur;
958
static int ctrl_stdenumcur_is_dirty(struct pvr2_ctrl *cptr)
960
return cptr->hdw->std_dirty != 0;
964
static void ctrl_stdenumcur_clear_dirty(struct pvr2_ctrl *cptr)
966
cptr->hdw->std_dirty = 0;
970
#define DEFINT(vmin,vmax) \
971
.type = pvr2_ctl_int, \
972
.def.type_int.min_value = vmin, \
973
.def.type_int.max_value = vmax
975
#define DEFENUM(tab) \
976
.type = pvr2_ctl_enum, \
977
.def.type_enum.count = ARRAY_SIZE(tab), \
978
.def.type_enum.value_names = tab
981
.type = pvr2_ctl_bool
983
#define DEFMASK(msk,tab) \
984
.type = pvr2_ctl_bitmask, \
985
.def.type_bitmask.valid_bits = msk, \
986
.def.type_bitmask.bit_names = tab
988
#define DEFREF(vname) \
989
.set_value = ctrl_set_##vname, \
990
.get_value = ctrl_get_##vname, \
991
.is_dirty = ctrl_isdirty_##vname, \
992
.clear_dirty = ctrl_cleardirty_##vname
995
#define VCREATE_FUNCS(vname) \
996
static int ctrl_get_##vname(struct pvr2_ctrl *cptr,int *vp) \
997
{*vp = cptr->hdw->vname##_val; return 0;} \
998
static int ctrl_set_##vname(struct pvr2_ctrl *cptr,int m,int v) \
999
{cptr->hdw->vname##_val = v; cptr->hdw->vname##_dirty = !0; return 0;} \
1000
static int ctrl_isdirty_##vname(struct pvr2_ctrl *cptr) \
1001
{return cptr->hdw->vname##_dirty != 0;} \
1002
static void ctrl_cleardirty_##vname(struct pvr2_ctrl *cptr) \
1003
{cptr->hdw->vname##_dirty = 0;}
1005
VCREATE_FUNCS(brightness)
1006
VCREATE_FUNCS(contrast)
1007
VCREATE_FUNCS(saturation)
1009
VCREATE_FUNCS(volume)
1010
VCREATE_FUNCS(balance)
1012
VCREATE_FUNCS(treble)
1014
VCREATE_FUNCS(cropl)
1015
VCREATE_FUNCS(cropt)
1016
VCREATE_FUNCS(cropw)
1017
VCREATE_FUNCS(croph)
1018
VCREATE_FUNCS(audiomode)
1019
VCREATE_FUNCS(res_hor)
1020
VCREATE_FUNCS(res_ver)
1021
VCREATE_FUNCS(srate)
1023
/* Table definition of all controls which can be manipulated */
1024
static const struct pvr2_ctl_info control_defs[] = {
1026
.v4l_id = V4L2_CID_BRIGHTNESS,
1027
.desc = "Brightness",
1028
.name = "brightness",
1029
.default_value = 128,
1033
.v4l_id = V4L2_CID_CONTRAST,
1036
.default_value = 68,
1040
.v4l_id = V4L2_CID_SATURATION,
1041
.desc = "Saturation",
1042
.name = "saturation",
1043
.default_value = 64,
1047
.v4l_id = V4L2_CID_HUE,
1054
.v4l_id = V4L2_CID_AUDIO_VOLUME,
1057
.default_value = 62000,
1061
.v4l_id = V4L2_CID_AUDIO_BALANCE,
1066
DEFINT(-32768,32767),
1068
.v4l_id = V4L2_CID_AUDIO_BASS,
1073
DEFINT(-32768,32767),
1075
.v4l_id = V4L2_CID_AUDIO_TREBLE,
1080
DEFINT(-32768,32767),
1082
.v4l_id = V4L2_CID_AUDIO_MUTE,
1089
.desc = "Capture crop left margin",
1090
.name = "crop_left",
1091
.internal_id = PVR2_CID_CROPL,
1095
.get_min_value = ctrl_cropl_min_get,
1096
.get_max_value = ctrl_cropl_max_get,
1097
.get_def_value = ctrl_get_cropcapdl,
1099
.desc = "Capture crop top margin",
1101
.internal_id = PVR2_CID_CROPT,
1105
.get_min_value = ctrl_cropt_min_get,
1106
.get_max_value = ctrl_cropt_max_get,
1107
.get_def_value = ctrl_get_cropcapdt,
1109
.desc = "Capture crop width",
1110
.name = "crop_width",
1111
.internal_id = PVR2_CID_CROPW,
1112
.default_value = 720,
1114
.get_max_value = ctrl_cropw_max_get,
1115
.get_def_value = ctrl_get_cropcapdw,
1117
.desc = "Capture crop height",
1118
.name = "crop_height",
1119
.internal_id = PVR2_CID_CROPH,
1120
.default_value = 480,
1122
.get_max_value = ctrl_croph_max_get,
1123
.get_def_value = ctrl_get_cropcapdh,
1125
.desc = "Capture capability pixel aspect numerator",
1126
.name = "cropcap_pixel_numerator",
1127
.internal_id = PVR2_CID_CROPCAPPAN,
1128
.get_value = ctrl_get_cropcappan,
1130
.desc = "Capture capability pixel aspect denominator",
1131
.name = "cropcap_pixel_denominator",
1132
.internal_id = PVR2_CID_CROPCAPPAD,
1133
.get_value = ctrl_get_cropcappad,
1135
.desc = "Capture capability bounds top",
1136
.name = "cropcap_bounds_top",
1137
.internal_id = PVR2_CID_CROPCAPBT,
1138
.get_value = ctrl_get_cropcapbt,
1140
.desc = "Capture capability bounds left",
1141
.name = "cropcap_bounds_left",
1142
.internal_id = PVR2_CID_CROPCAPBL,
1143
.get_value = ctrl_get_cropcapbl,
1145
.desc = "Capture capability bounds width",
1146
.name = "cropcap_bounds_width",
1147
.internal_id = PVR2_CID_CROPCAPBW,
1148
.get_value = ctrl_get_cropcapbw,
1150
.desc = "Capture capability bounds height",
1151
.name = "cropcap_bounds_height",
1152
.internal_id = PVR2_CID_CROPCAPBH,
1153
.get_value = ctrl_get_cropcapbh,
1155
.desc = "Video Source",
1157
.internal_id = PVR2_CID_INPUT,
1158
.default_value = PVR2_CVAL_INPUT_TV,
1159
.check_value = ctrl_check_input,
1161
DEFENUM(control_values_input),
1163
.desc = "Audio Mode",
1164
.name = "audio_mode",
1165
.internal_id = PVR2_CID_AUDIOMODE,
1166
.default_value = V4L2_TUNER_MODE_STEREO,
1168
DEFENUM(control_values_audiomode),
1170
.desc = "Horizontal capture resolution",
1171
.name = "resolution_hor",
1172
.internal_id = PVR2_CID_HRES,
1173
.default_value = 720,
1177
.desc = "Vertical capture resolution",
1178
.name = "resolution_ver",
1179
.internal_id = PVR2_CID_VRES,
1180
.default_value = 480,
1183
/* Hook in check for video standard and adjust maximum
1184
depending on the standard. */
1185
.get_max_value = ctrl_vres_max_get,
1186
.get_min_value = ctrl_vres_min_get,
1188
.v4l_id = V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ,
1189
.default_value = V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000,
1190
.desc = "Audio Sampling Frequency",
1193
DEFENUM(control_values_srate),
1195
.desc = "Tuner Frequency (Hz)",
1196
.name = "frequency",
1197
.internal_id = PVR2_CID_FREQUENCY,
1199
.set_value = ctrl_freq_set,
1200
.get_value = ctrl_freq_get,
1201
.is_dirty = ctrl_freq_is_dirty,
1202
.clear_dirty = ctrl_freq_clear_dirty,
1204
/* Hook in check for input value (tv/radio) and adjust
1205
max/min values accordingly */
1206
.get_max_value = ctrl_freq_max_get,
1207
.get_min_value = ctrl_freq_min_get,
1211
.set_value = ctrl_channel_set,
1212
.get_value = ctrl_channel_get,
1213
DEFINT(0,FREQTABLE_SIZE),
1215
.desc = "Channel Program Frequency",
1216
.name = "freq_table_value",
1217
.set_value = ctrl_channelfreq_set,
1218
.get_value = ctrl_channelfreq_get,
1220
/* Hook in check for input value (tv/radio) and adjust
1221
max/min values accordingly */
1222
.get_max_value = ctrl_freq_max_get,
1223
.get_min_value = ctrl_freq_min_get,
1225
.desc = "Channel Program ID",
1226
.name = "freq_table_channel",
1227
.set_value = ctrl_channelprog_set,
1228
.get_value = ctrl_channelprog_get,
1229
DEFINT(0,FREQTABLE_SIZE),
1231
.desc = "Streaming Enabled",
1232
.name = "streaming_enabled",
1233
.get_value = ctrl_streamingenabled_get,
1236
.desc = "USB Speed",
1237
.name = "usb_speed",
1238
.get_value = ctrl_hsm_get,
1239
DEFENUM(control_values_hsm),
1241
.desc = "Master State",
1242
.name = "master_state",
1243
.get_value = ctrl_masterstate_get,
1244
DEFENUM(pvr2_state_names),
1246
.desc = "Signal Present",
1247
.name = "signal_present",
1248
.get_value = ctrl_signal_get,
1251
.desc = "Audio Modes Present",
1252
.name = "audio_modes_present",
1253
.get_value = ctrl_audio_modes_present_get,
1254
/* For this type we "borrow" the V4L2_TUNER_MODE enum from
1255
v4l. Nothing outside of this module cares about this,
1256
but I reuse it in order to also reuse the
1257
control_values_audiomode string table. */
1258
DEFMASK(((1 << V4L2_TUNER_MODE_MONO)|
1259
(1 << V4L2_TUNER_MODE_STEREO)|
1260
(1 << V4L2_TUNER_MODE_LANG1)|
1261
(1 << V4L2_TUNER_MODE_LANG2)),
1262
control_values_audiomode),
1264
.desc = "Video Standards Available Mask",
1265
.name = "video_standard_mask_available",
1266
.internal_id = PVR2_CID_STDAVAIL,
1268
.get_value = ctrl_stdavail_get,
1269
.set_value = ctrl_stdavail_set,
1270
.val_to_sym = ctrl_std_val_to_sym,
1271
.sym_to_val = ctrl_std_sym_to_val,
1272
.type = pvr2_ctl_bitmask,
1274
.desc = "Video Standards In Use Mask",
1275
.name = "video_standard_mask_active",
1276
.internal_id = PVR2_CID_STDCUR,
1278
.get_value = ctrl_stdcur_get,
1279
.set_value = ctrl_stdcur_set,
1280
.is_dirty = ctrl_stdcur_is_dirty,
1281
.clear_dirty = ctrl_stdcur_clear_dirty,
1282
.val_to_sym = ctrl_std_val_to_sym,
1283
.sym_to_val = ctrl_std_sym_to_val,
1284
.type = pvr2_ctl_bitmask,
1286
.desc = "Video Standard Name",
1287
.name = "video_standard",
1288
.internal_id = PVR2_CID_STDENUM,
1290
.get_value = ctrl_stdenumcur_get,
1291
.set_value = ctrl_stdenumcur_set,
1292
.is_dirty = ctrl_stdenumcur_is_dirty,
1293
.clear_dirty = ctrl_stdenumcur_clear_dirty,
1294
.type = pvr2_ctl_enum,
1298
#define CTRLDEF_COUNT ARRAY_SIZE(control_defs)
1301
const char *pvr2_config_get_name(enum pvr2_config cfg)
1304
case pvr2_config_empty: return "empty";
1305
case pvr2_config_mpeg: return "mpeg";
1306
case pvr2_config_vbi: return "vbi";
1307
case pvr2_config_pcm: return "pcm";
1308
case pvr2_config_rawvideo: return "raw video";
1314
struct usb_device *pvr2_hdw_get_dev(struct pvr2_hdw *hdw)
1316
return hdw->usb_dev;
1320
unsigned long pvr2_hdw_get_sn(struct pvr2_hdw *hdw)
1322
return hdw->serial_number;
1326
const char *pvr2_hdw_get_bus_info(struct pvr2_hdw *hdw)
1328
return hdw->bus_info;
1332
const char *pvr2_hdw_get_device_identifier(struct pvr2_hdw *hdw)
1334
return hdw->identifier;
1338
unsigned long pvr2_hdw_get_cur_freq(struct pvr2_hdw *hdw)
1340
return hdw->freqSelector ? hdw->freqValTelevision : hdw->freqValRadio;
1343
/* Set the currently tuned frequency and account for all possible
1344
driver-core side effects of this action. */
1345
static void pvr2_hdw_set_cur_freq(struct pvr2_hdw *hdw,unsigned long val)
1347
if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
1348
if (hdw->freqSelector) {
1349
/* Swing over to radio frequency selection */
1350
hdw->freqSelector = 0;
1351
hdw->freqDirty = !0;
1353
if (hdw->freqValRadio != val) {
1354
hdw->freqValRadio = val;
1355
hdw->freqSlotRadio = 0;
1356
hdw->freqDirty = !0;
1359
if (!(hdw->freqSelector)) {
1360
/* Swing over to television frequency selection */
1361
hdw->freqSelector = 1;
1362
hdw->freqDirty = !0;
1364
if (hdw->freqValTelevision != val) {
1365
hdw->freqValTelevision = val;
1366
hdw->freqSlotTelevision = 0;
1367
hdw->freqDirty = !0;
1372
int pvr2_hdw_get_unit_number(struct pvr2_hdw *hdw)
1374
return hdw->unit_number;
1378
/* Attempt to locate one of the given set of files. Messages are logged
1379
appropriate to what has been found. The return value will be 0 or
1380
greater on success (it will be the index of the file name found) and
1381
fw_entry will be filled in. Otherwise a negative error is returned on
1382
failure. If the return value is -ENOENT then no viable firmware file
1383
could be located. */
1384
static int pvr2_locate_firmware(struct pvr2_hdw *hdw,
1385
const struct firmware **fw_entry,
1386
const char *fwtypename,
1387
unsigned int fwcount,
1388
const char *fwnames[])
1392
for (idx = 0; idx < fwcount; idx++) {
1393
ret = request_firmware(fw_entry,
1395
&hdw->usb_dev->dev);
1397
trace_firmware("Located %s firmware: %s;"
1403
if (ret == -ENOENT) continue;
1404
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1405
"request_firmware fatal error with code=%d",ret);
1408
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1410
" Device %s firmware"
1411
" seems to be missing.",
1413
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1414
"Did you install the pvrusb2 firmware files"
1415
" in their proper location?");
1417
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1418
"request_firmware unable to locate %s file %s",
1419
fwtypename,fwnames[0]);
1421
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1422
"request_firmware unable to locate"
1423
" one of the following %s files:",
1425
for (idx = 0; idx < fwcount; idx++) {
1426
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1427
"request_firmware: Failed to find %s",
1436
* pvr2_upload_firmware1().
1438
* Send the 8051 firmware to the device. After the upload, arrange for
1439
* device to re-enumerate.
1441
* NOTE : the pointer to the firmware data given by request_firmware()
1442
* is not suitable for an usb transaction.
1445
static int pvr2_upload_firmware1(struct pvr2_hdw *hdw)
1447
const struct firmware *fw_entry = NULL;
1450
unsigned int fwsize;
1454
if (!hdw->hdw_desc->fx2_firmware.cnt) {
1455
hdw->fw1_state = FW1_STATE_OK;
1456
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1457
"Connected device type defines"
1458
" no firmware to upload; ignoring firmware");
1462
hdw->fw1_state = FW1_STATE_FAILED; // default result
1464
trace_firmware("pvr2_upload_firmware1");
1466
ret = pvr2_locate_firmware(hdw,&fw_entry,"fx2 controller",
1467
hdw->hdw_desc->fx2_firmware.cnt,
1468
hdw->hdw_desc->fx2_firmware.lst);
1470
if (ret == -ENOENT) hdw->fw1_state = FW1_STATE_MISSING;
1474
usb_clear_halt(hdw->usb_dev, usb_sndbulkpipe(hdw->usb_dev, 0 & 0x7f));
1476
pipe = usb_sndctrlpipe(hdw->usb_dev, 0);
1477
fwsize = fw_entry->size;
1479
if ((fwsize != 0x2000) &&
1480
(!(hdw->hdw_desc->flag_fx2_16kb && (fwsize == 0x4000)))) {
1481
if (hdw->hdw_desc->flag_fx2_16kb) {
1482
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1483
"Wrong fx2 firmware size"
1484
" (expected 8192 or 16384, got %u)",
1487
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1488
"Wrong fx2 firmware size"
1489
" (expected 8192, got %u)",
1492
release_firmware(fw_entry);
1496
fw_ptr = kmalloc(0x800, GFP_KERNEL);
1497
if (fw_ptr == NULL){
1498
release_firmware(fw_entry);
1502
/* We have to hold the CPU during firmware upload. */
1503
pvr2_hdw_cpureset_assert(hdw,1);
1505
/* upload the firmware to address 0000-1fff in 2048 (=0x800) bytes
1509
for (address = 0; address < fwsize; address += 0x800) {
1510
memcpy(fw_ptr, fw_entry->data + address, 0x800);
1511
ret += usb_control_msg(hdw->usb_dev, pipe, 0xa0, 0x40, address,
1512
0, fw_ptr, 0x800, HZ);
1515
trace_firmware("Upload done, releasing device's CPU");
1517
/* Now release the CPU. It will disconnect and reconnect later. */
1518
pvr2_hdw_cpureset_assert(hdw,0);
1521
release_firmware(fw_entry);
1523
trace_firmware("Upload done (%d bytes sent)",ret);
1525
/* We should have written fwsize bytes */
1526
if (ret == fwsize) {
1527
hdw->fw1_state = FW1_STATE_RELOAD;
1536
* pvr2_upload_firmware2()
1538
* This uploads encoder firmware on endpoint 2.
1542
int pvr2_upload_firmware2(struct pvr2_hdw *hdw)
1544
const struct firmware *fw_entry = NULL;
1546
unsigned int pipe, fw_len, fw_done, bcnt, icnt;
1550
static const char *fw_files[] = {
1551
CX2341X_FIRM_ENC_FILENAME,
1554
if (hdw->hdw_desc->flag_skip_cx23416_firmware) {
1558
trace_firmware("pvr2_upload_firmware2");
1560
ret = pvr2_locate_firmware(hdw,&fw_entry,"encoder",
1561
ARRAY_SIZE(fw_files), fw_files);
1562
if (ret < 0) return ret;
1565
/* Since we're about to completely reinitialize the encoder,
1566
invalidate our cached copy of its configuration state. Next
1567
time we configure the encoder, then we'll fully configure it. */
1568
hdw->enc_cur_valid = 0;
1570
/* Encoder is about to be reset so note that as far as we're
1571
concerned now, the encoder has never been run. */
1572
del_timer_sync(&hdw->encoder_run_timer);
1573
if (hdw->state_encoder_runok) {
1574
hdw->state_encoder_runok = 0;
1575
trace_stbit("state_encoder_runok",hdw->state_encoder_runok);
1578
/* First prepare firmware loading */
1579
ret |= pvr2_write_register(hdw, 0x0048, 0xffffffff); /*interrupt mask*/
1580
ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000088); /*gpio dir*/
1581
ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/
1582
ret |= pvr2_hdw_cmd_deep_reset(hdw);
1583
ret |= pvr2_write_register(hdw, 0xa064, 0x00000000); /*APU command*/
1584
ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000408); /*gpio dir*/
1585
ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/
1586
ret |= pvr2_write_register(hdw, 0x9058, 0xffffffed); /*VPU ctrl*/
1587
ret |= pvr2_write_register(hdw, 0x9054, 0xfffffffd); /*reset hw blocks*/
1588
ret |= pvr2_write_register(hdw, 0x07f8, 0x80000800); /*encoder SDRAM refresh*/
1589
ret |= pvr2_write_register(hdw, 0x07fc, 0x0000001a); /*encoder SDRAM pre-charge*/
1590
ret |= pvr2_write_register(hdw, 0x0700, 0x00000000); /*I2C clock*/
1591
ret |= pvr2_write_register(hdw, 0xaa00, 0x00000000); /*unknown*/
1592
ret |= pvr2_write_register(hdw, 0xaa04, 0x00057810); /*unknown*/
1593
ret |= pvr2_write_register(hdw, 0xaa10, 0x00148500); /*unknown*/
1594
ret |= pvr2_write_register(hdw, 0xaa18, 0x00840000); /*unknown*/
1595
ret |= pvr2_issue_simple_cmd(hdw,FX2CMD_FWPOST1);
1596
ret |= pvr2_issue_simple_cmd(hdw,FX2CMD_MEMSEL | (1 << 8) | (0 << 16));
1599
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1600
"firmware2 upload prep failed, ret=%d",ret);
1601
release_firmware(fw_entry);
1605
/* Now send firmware */
1607
fw_len = fw_entry->size;
1609
if (fw_len % sizeof(u32)) {
1610
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1611
"size of %s firmware"
1612
" must be a multiple of %zu bytes",
1613
fw_files[fwidx],sizeof(u32));
1614
release_firmware(fw_entry);
1619
fw_ptr = kmalloc(FIRMWARE_CHUNK_SIZE, GFP_KERNEL);
1620
if (fw_ptr == NULL){
1621
release_firmware(fw_entry);
1622
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1623
"failed to allocate memory for firmware2 upload");
1628
pipe = usb_sndbulkpipe(hdw->usb_dev, PVR2_FIRMWARE_ENDPOINT);
1631
for (fw_done = 0; fw_done < fw_len;) {
1632
bcnt = fw_len - fw_done;
1633
if (bcnt > FIRMWARE_CHUNK_SIZE) bcnt = FIRMWARE_CHUNK_SIZE;
1634
memcpy(fw_ptr, fw_entry->data + fw_done, bcnt);
1635
/* Usbsnoop log shows that we must swap bytes... */
1636
/* Some background info: The data being swapped here is a
1637
firmware image destined for the mpeg encoder chip that
1638
lives at the other end of a USB endpoint. The encoder
1639
chip always talks in 32 bit chunks and its storage is
1640
organized into 32 bit words. However from the file
1641
system to the encoder chip everything is purely a byte
1642
stream. The firmware file's contents are always 32 bit
1643
swapped from what the encoder expects. Thus the need
1644
always exists to swap the bytes regardless of the endian
1645
type of the host processor and therefore swab32() makes
1647
for (icnt = 0; icnt < bcnt/4 ; icnt++)
1648
((u32 *)fw_ptr)[icnt] = swab32(((u32 *)fw_ptr)[icnt]);
1650
ret |= usb_bulk_msg(hdw->usb_dev, pipe, fw_ptr,bcnt,
1651
&actual_length, HZ);
1652
ret |= (actual_length != bcnt);
1657
trace_firmware("upload of %s : %i / %i ",
1658
fw_files[fwidx],fw_done,fw_len);
1661
release_firmware(fw_entry);
1664
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1665
"firmware2 upload transfer failure");
1671
ret |= pvr2_write_register(hdw, 0x9054, 0xffffffff); /*reset hw blocks*/
1672
ret |= pvr2_write_register(hdw, 0x9058, 0xffffffe8); /*VPU ctrl*/
1673
ret |= pvr2_issue_simple_cmd(hdw,FX2CMD_MEMSEL | (1 << 8) | (0 << 16));
1676
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1677
"firmware2 upload post-proc failure");
1681
if (hdw->hdw_desc->signal_routing_scheme ==
1682
PVR2_ROUTING_SCHEME_GOTVIEW) {
1683
/* Ensure that GPIO 11 is set to output for GOTVIEW
1685
pvr2_hdw_gpio_chg_dir(hdw,(1 << 11),~0);
1691
static const char *pvr2_get_state_name(unsigned int st)
1693
if (st < ARRAY_SIZE(pvr2_state_names)) {
1694
return pvr2_state_names[st];
1699
static int pvr2_decoder_enable(struct pvr2_hdw *hdw,int enablefl)
1701
/* Even though we really only care about the video decoder chip at
1702
this point, we'll broadcast stream on/off to all sub-devices
1703
anyway, just in case somebody else wants to hear the
1705
pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 stream=%s",
1706
(enablefl ? "on" : "off"));
1707
v4l2_device_call_all(&hdw->v4l2_dev, 0, video, s_stream, enablefl);
1708
if (hdw->decoder_client_id) {
1709
/* We get here if the encoder has been noticed. Otherwise
1710
we'll issue a warning to the user (which should
1711
normally never happen). */
1714
if (!hdw->flag_decoder_missed) {
1715
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1716
"WARNING: No decoder present");
1717
hdw->flag_decoder_missed = !0;
1718
trace_stbit("flag_decoder_missed",
1719
hdw->flag_decoder_missed);
1725
int pvr2_hdw_get_state(struct pvr2_hdw *hdw)
1727
return hdw->master_state;
1731
static int pvr2_hdw_untrip_unlocked(struct pvr2_hdw *hdw)
1733
if (!hdw->flag_tripped) return 0;
1734
hdw->flag_tripped = 0;
1735
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1736
"Clearing driver error statuss");
1741
int pvr2_hdw_untrip(struct pvr2_hdw *hdw)
1744
LOCK_TAKE(hdw->big_lock); do {
1745
fl = pvr2_hdw_untrip_unlocked(hdw);
1746
} while (0); LOCK_GIVE(hdw->big_lock);
1747
if (fl) pvr2_hdw_state_sched(hdw);
1754
int pvr2_hdw_get_streaming(struct pvr2_hdw *hdw)
1756
return hdw->state_pipeline_req != 0;
1760
int pvr2_hdw_set_streaming(struct pvr2_hdw *hdw,int enable_flag)
1763
LOCK_TAKE(hdw->big_lock); do {
1764
pvr2_hdw_untrip_unlocked(hdw);
1765
if ((!enable_flag) != !(hdw->state_pipeline_req)) {
1766
hdw->state_pipeline_req = enable_flag != 0;
1767
pvr2_trace(PVR2_TRACE_START_STOP,
1768
"/*--TRACE_STREAM--*/ %s",
1769
enable_flag ? "enable" : "disable");
1771
pvr2_hdw_state_sched(hdw);
1772
} while (0); LOCK_GIVE(hdw->big_lock);
1773
if ((ret = pvr2_hdw_wait(hdw,0)) < 0) return ret;
1775
while ((st = hdw->master_state) != PVR2_STATE_RUN) {
1776
if (st != PVR2_STATE_READY) return -EIO;
1777
if ((ret = pvr2_hdw_wait(hdw,st)) < 0) return ret;
1784
int pvr2_hdw_set_stream_type(struct pvr2_hdw *hdw,enum pvr2_config config)
1787
LOCK_TAKE(hdw->big_lock);
1788
if ((fl = (hdw->desired_stream_type != config)) != 0) {
1789
hdw->desired_stream_type = config;
1790
hdw->state_pipeline_config = 0;
1791
trace_stbit("state_pipeline_config",
1792
hdw->state_pipeline_config);
1793
pvr2_hdw_state_sched(hdw);
1795
LOCK_GIVE(hdw->big_lock);
1797
return pvr2_hdw_wait(hdw,0);
1801
static int get_default_tuner_type(struct pvr2_hdw *hdw)
1803
int unit_number = hdw->unit_number;
1805
if ((unit_number >= 0) && (unit_number < PVR_NUM)) {
1806
tp = tuner[unit_number];
1808
if (tp < 0) return -EINVAL;
1809
hdw->tuner_type = tp;
1810
hdw->tuner_updated = !0;
1815
static v4l2_std_id get_default_standard(struct pvr2_hdw *hdw)
1817
int unit_number = hdw->unit_number;
1819
if ((unit_number >= 0) && (unit_number < PVR_NUM)) {
1820
tp = video_std[unit_number];
1827
static unsigned int get_default_error_tolerance(struct pvr2_hdw *hdw)
1829
int unit_number = hdw->unit_number;
1831
if ((unit_number >= 0) && (unit_number < PVR_NUM)) {
1832
tp = tolerance[unit_number];
1838
static int pvr2_hdw_check_firmware(struct pvr2_hdw *hdw)
1840
/* Try a harmless request to fetch the eeprom's address over
1841
endpoint 1. See what happens. Only the full FX2 image can
1842
respond to this. If this probe fails then likely the FX2
1843
firmware needs be loaded. */
1845
LOCK_TAKE(hdw->ctl_lock); do {
1846
hdw->cmd_buffer[0] = FX2CMD_GET_EEPROM_ADDR;
1847
result = pvr2_send_request_ex(hdw,HZ*1,!0,
1850
if (result < 0) break;
1851
} while(0); LOCK_GIVE(hdw->ctl_lock);
1853
pvr2_trace(PVR2_TRACE_INIT,
1854
"Probe of device endpoint 1 result status %d",
1857
pvr2_trace(PVR2_TRACE_INIT,
1858
"Probe of device endpoint 1 succeeded");
1863
struct pvr2_std_hack {
1864
v4l2_std_id pat; /* Pattern to match */
1865
v4l2_std_id msk; /* Which bits we care about */
1866
v4l2_std_id std; /* What additional standards or default to set */
1869
/* This data structure labels specific combinations of standards from
1870
tveeprom that we'll try to recognize. If we recognize one, then assume
1871
a specified default standard to use. This is here because tveeprom only
1872
tells us about available standards not the intended default standard (if
1873
any) for the device in question. We guess the default based on what has
1874
been reported as available. Note that this is only for guessing a
1875
default - which can always be overridden explicitly - and if the user
1876
has otherwise named a default then that default will always be used in
1877
place of this table. */
1878
static const struct pvr2_std_hack std_eeprom_maps[] = {
1880
.pat = V4L2_STD_B|V4L2_STD_GH,
1881
.std = V4L2_STD_PAL_B|V4L2_STD_PAL_B1|V4L2_STD_PAL_G,
1885
.std = V4L2_STD_NTSC_M,
1888
.pat = V4L2_STD_PAL_I,
1889
.std = V4L2_STD_PAL_I,
1892
.pat = V4L2_STD_SECAM_L|V4L2_STD_SECAM_LC,
1893
.std = V4L2_STD_SECAM_L|V4L2_STD_SECAM_LC,
1897
.std = V4L2_STD_PAL_D|V4L2_STD_PAL_D1|V4L2_STD_PAL_K,
1901
static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw)
1905
v4l2_std_id std1,std2,std3;
1907
std1 = get_default_standard(hdw);
1908
std3 = std1 ? 0 : hdw->hdw_desc->default_std_mask;
1910
bcnt = pvr2_std_id_to_str(buf,sizeof(buf),hdw->std_mask_eeprom);
1911
pvr2_trace(PVR2_TRACE_STD,
1912
"Supported video standard(s) reported available"
1913
" in hardware: %.*s",
1916
hdw->std_mask_avail = hdw->std_mask_eeprom;
1918
std2 = (std1|std3) & ~hdw->std_mask_avail;
1920
bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std2);
1921
pvr2_trace(PVR2_TRACE_STD,
1922
"Expanding supported video standards"
1923
" to include: %.*s",
1925
hdw->std_mask_avail |= std2;
1928
pvr2_hdw_internal_set_std_avail(hdw);
1931
bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std1);
1932
pvr2_trace(PVR2_TRACE_STD,
1933
"Initial video standard forced to %.*s",
1935
hdw->std_mask_cur = std1;
1936
hdw->std_dirty = !0;
1937
pvr2_hdw_internal_find_stdenum(hdw);
1941
bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std3);
1942
pvr2_trace(PVR2_TRACE_STD,
1943
"Initial video standard"
1944
" (determined by device type): %.*s",bcnt,buf);
1945
hdw->std_mask_cur = std3;
1946
hdw->std_dirty = !0;
1947
pvr2_hdw_internal_find_stdenum(hdw);
1953
for (idx = 0; idx < ARRAY_SIZE(std_eeprom_maps); idx++) {
1954
if (std_eeprom_maps[idx].msk ?
1955
((std_eeprom_maps[idx].pat ^
1956
hdw->std_mask_eeprom) &
1957
std_eeprom_maps[idx].msk) :
1958
(std_eeprom_maps[idx].pat !=
1959
hdw->std_mask_eeprom)) continue;
1960
bcnt = pvr2_std_id_to_str(buf,sizeof(buf),
1961
std_eeprom_maps[idx].std);
1962
pvr2_trace(PVR2_TRACE_STD,
1963
"Initial video standard guessed as %.*s",
1965
hdw->std_mask_cur = std_eeprom_maps[idx].std;
1966
hdw->std_dirty = !0;
1967
pvr2_hdw_internal_find_stdenum(hdw);
1972
if (hdw->std_enum_cnt > 1) {
1973
// Autoselect the first listed standard
1974
hdw->std_enum_cur = 1;
1975
hdw->std_mask_cur = hdw->std_defs[hdw->std_enum_cur-1].id;
1976
hdw->std_dirty = !0;
1977
pvr2_trace(PVR2_TRACE_STD,
1978
"Initial video standard auto-selected to %s",
1979
hdw->std_defs[hdw->std_enum_cur-1].name);
1983
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1984
"Unable to select a viable initial video standard");
1988
static unsigned int pvr2_copy_i2c_addr_list(
1989
unsigned short *dst, const unsigned char *src,
1990
unsigned int dst_max)
1992
unsigned int cnt = 0;
1994
while (src[cnt] && (cnt + 1) < dst_max) {
1995
dst[cnt] = src[cnt];
1998
dst[cnt] = I2C_CLIENT_END;
2003
static void pvr2_hdw_cx25840_vbi_hack(struct pvr2_hdw *hdw)
2006
Mike Isely <isely@pobox.com> 19-Nov-2006 - This bit of nuttiness
2007
for cx25840 causes that module to correctly set up its video
2008
scaling. This is really a problem in the cx25840 module itself,
2009
but we work around it here. The problem has not been seen in
2010
ivtv because there VBI is supported and set up. We don't do VBI
2011
here (at least not yet) and thus we never attempted to even set
2014
struct v4l2_format fmt;
2015
if (hdw->decoder_client_id != PVR2_CLIENT_ID_CX25840) {
2016
/* We're not using a cx25840 so don't enable the hack */
2020
pvr2_trace(PVR2_TRACE_INIT,
2022
" Executing cx25840 VBI hack",
2023
hdw->decoder_client_id);
2024
memset(&fmt, 0, sizeof(fmt));
2025
fmt.type = V4L2_BUF_TYPE_SLICED_VBI_CAPTURE;
2026
v4l2_device_call_all(&hdw->v4l2_dev, hdw->decoder_client_id,
2027
video, s_fmt, &fmt);
2031
static int pvr2_hdw_load_subdev(struct pvr2_hdw *hdw,
2032
const struct pvr2_device_client_desc *cd)
2036
struct v4l2_subdev *sd;
2037
unsigned int i2ccnt;
2038
const unsigned char *p;
2039
/* Arbitrary count - max # i2c addresses we will probe */
2040
unsigned short i2caddr[25];
2042
mid = cd->module_id;
2043
fname = (mid < ARRAY_SIZE(module_names)) ? module_names[mid] : NULL;
2045
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2046
"Module ID %u for device %s has no name?"
2047
" The driver might have a configuration problem.",
2049
hdw->hdw_desc->description);
2052
pvr2_trace(PVR2_TRACE_INIT,
2053
"Module ID %u (%s) for device %s being loaded...",
2055
hdw->hdw_desc->description);
2057
i2ccnt = pvr2_copy_i2c_addr_list(i2caddr, cd->i2c_address_list,
2058
ARRAY_SIZE(i2caddr));
2059
if (!i2ccnt && ((p = (mid < ARRAY_SIZE(module_i2c_addresses)) ?
2060
module_i2c_addresses[mid] : NULL) != NULL)) {
2061
/* Second chance: Try default i2c address list */
2062
i2ccnt = pvr2_copy_i2c_addr_list(i2caddr, p,
2063
ARRAY_SIZE(i2caddr));
2065
pvr2_trace(PVR2_TRACE_INIT,
2067
" Using default i2c address list",
2073
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2074
"Module ID %u (%s) for device %s:"
2075
" No i2c addresses."
2076
" The driver might have a configuration problem.",
2077
mid, fname, hdw->hdw_desc->description);
2081
/* Note how the 2nd and 3rd arguments are the same for
2082
* v4l2_i2c_new_subdev(). Why?
2083
* Well the 2nd argument is the module name to load, while the 3rd
2084
* argument is documented in the framework as being the "chipid" -
2085
* and every other place where I can find examples of this, the
2086
* "chipid" appears to just be the module name again. So here we
2087
* just do the same thing. */
2089
pvr2_trace(PVR2_TRACE_INIT,
2091
" Setting up with specified i2c address 0x%x",
2093
sd = v4l2_i2c_new_subdev(&hdw->v4l2_dev, &hdw->i2c_adap,
2097
pvr2_trace(PVR2_TRACE_INIT,
2099
" Setting up with address probe list",
2101
sd = v4l2_i2c_new_subdev(&hdw->v4l2_dev, &hdw->i2c_adap,
2107
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2108
"Module ID %u (%s) for device %s failed to load."
2109
" Possible missing sub-device kernel module or"
2110
" initialization failure within module.",
2111
mid, fname, hdw->hdw_desc->description);
2115
/* Tag this sub-device instance with the module ID we know about.
2116
In other places we'll use that tag to determine if the instance
2117
requires special handling. */
2120
pvr2_trace(PVR2_TRACE_INFO, "Attached sub-driver %s", fname);
2123
/* client-specific setup... */
2125
case PVR2_CLIENT_ID_CX25840:
2126
case PVR2_CLIENT_ID_SAA7115:
2127
hdw->decoder_client_id = mid;
2136
static void pvr2_hdw_load_modules(struct pvr2_hdw *hdw)
2139
const struct pvr2_string_table *cm;
2140
const struct pvr2_device_client_table *ct;
2143
cm = &hdw->hdw_desc->client_modules;
2144
for (idx = 0; idx < cm->cnt; idx++) {
2145
request_module(cm->lst[idx]);
2148
ct = &hdw->hdw_desc->client_table;
2149
for (idx = 0; idx < ct->cnt; idx++) {
2150
if (pvr2_hdw_load_subdev(hdw, &ct->lst[idx]) < 0) okFl = 0;
2153
hdw->flag_modulefail = !0;
2154
pvr2_hdw_render_useless(hdw);
2159
static void pvr2_hdw_setup_low(struct pvr2_hdw *hdw)
2163
struct pvr2_ctrl *cptr;
2165
if (hdw->hdw_desc->fx2_firmware.cnt) {
2168
(hdw->usb_intf->cur_altsetting->desc.bNumEndpoints
2171
pvr2_trace(PVR2_TRACE_INIT,
2172
"USB endpoint config looks strange"
2173
"; possibly firmware needs to be"
2178
reloadFl = !pvr2_hdw_check_firmware(hdw);
2180
pvr2_trace(PVR2_TRACE_INIT,
2181
"Check for FX2 firmware failed"
2182
"; possibly firmware needs to be"
2187
if (pvr2_upload_firmware1(hdw) != 0) {
2188
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2189
"Failure uploading firmware1");
2194
hdw->fw1_state = FW1_STATE_OK;
2196
if (!pvr2_hdw_dev_ok(hdw)) return;
2198
hdw->force_dirty = !0;
2200
if (!hdw->hdw_desc->flag_no_powerup) {
2201
pvr2_hdw_cmd_powerup(hdw);
2202
if (!pvr2_hdw_dev_ok(hdw)) return;
2205
/* Take the IR chip out of reset, if appropriate */
2206
if (hdw->ir_scheme_active == PVR2_IR_SCHEME_ZILOG) {
2207
pvr2_issue_simple_cmd(hdw,
2208
FX2CMD_HCW_ZILOG_RESET |
2213
// This step MUST happen after the earlier powerup step.
2214
pvr2_i2c_core_init(hdw);
2215
if (!pvr2_hdw_dev_ok(hdw)) return;
2217
pvr2_hdw_load_modules(hdw);
2218
if (!pvr2_hdw_dev_ok(hdw)) return;
2220
v4l2_device_call_all(&hdw->v4l2_dev, 0, core, load_fw);
2222
for (idx = 0; idx < CTRLDEF_COUNT; idx++) {
2223
cptr = hdw->controls + idx;
2224
if (cptr->info->skip_init) continue;
2225
if (!cptr->info->set_value) continue;
2226
cptr->info->set_value(cptr,~0,cptr->info->default_value);
2229
pvr2_hdw_cx25840_vbi_hack(hdw);
2231
/* Set up special default values for the television and radio
2232
frequencies here. It's not really important what these defaults
2233
are, but I set them to something usable in the Chicago area just
2234
to make driver testing a little easier. */
2236
hdw->freqValTelevision = default_tv_freq;
2237
hdw->freqValRadio = default_radio_freq;
2239
// Do not use pvr2_reset_ctl_endpoints() here. It is not
2240
// thread-safe against the normal pvr2_send_request() mechanism.
2241
// (We should make it thread safe).
2243
if (hdw->hdw_desc->flag_has_hauppauge_rom) {
2244
ret = pvr2_hdw_get_eeprom_addr(hdw);
2245
if (!pvr2_hdw_dev_ok(hdw)) return;
2247
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2248
"Unable to determine location of eeprom,"
2251
hdw->eeprom_addr = ret;
2252
pvr2_eeprom_analyze(hdw);
2253
if (!pvr2_hdw_dev_ok(hdw)) return;
2256
hdw->tuner_type = hdw->hdw_desc->default_tuner_type;
2257
hdw->tuner_updated = !0;
2258
hdw->std_mask_eeprom = V4L2_STD_ALL;
2261
if (hdw->serial_number) {
2262
idx = scnprintf(hdw->identifier, sizeof(hdw->identifier) - 1,
2263
"sn-%lu", hdw->serial_number);
2264
} else if (hdw->unit_number >= 0) {
2265
idx = scnprintf(hdw->identifier, sizeof(hdw->identifier) - 1,
2267
hdw->unit_number + 'a');
2269
idx = scnprintf(hdw->identifier, sizeof(hdw->identifier) - 1,
2272
hdw->identifier[idx] = 0;
2274
pvr2_hdw_setup_std(hdw);
2276
if (!get_default_tuner_type(hdw)) {
2277
pvr2_trace(PVR2_TRACE_INIT,
2278
"pvr2_hdw_setup: Tuner type overridden to %d",
2283
if (!pvr2_hdw_dev_ok(hdw)) return;
2285
if (hdw->hdw_desc->signal_routing_scheme ==
2286
PVR2_ROUTING_SCHEME_GOTVIEW) {
2287
/* Ensure that GPIO 11 is set to output for GOTVIEW
2289
pvr2_hdw_gpio_chg_dir(hdw,(1 << 11),~0);
2292
pvr2_hdw_commit_setup(hdw);
2294
hdw->vid_stream = pvr2_stream_create();
2295
if (!pvr2_hdw_dev_ok(hdw)) return;
2296
pvr2_trace(PVR2_TRACE_INIT,
2297
"pvr2_hdw_setup: video stream is %p",hdw->vid_stream);
2298
if (hdw->vid_stream) {
2299
idx = get_default_error_tolerance(hdw);
2301
pvr2_trace(PVR2_TRACE_INIT,
2302
"pvr2_hdw_setup: video stream %p"
2303
" setting tolerance %u",
2304
hdw->vid_stream,idx);
2306
pvr2_stream_setup(hdw->vid_stream,hdw->usb_dev,
2307
PVR2_VID_ENDPOINT,idx);
2310
if (!pvr2_hdw_dev_ok(hdw)) return;
2312
hdw->flag_init_ok = !0;
2314
pvr2_hdw_state_sched(hdw);
2318
/* Set up the structure and attempt to put the device into a usable state.
2319
This can be a time-consuming operation, which is why it is not done
2320
internally as part of the create() step. */
2321
static void pvr2_hdw_setup(struct pvr2_hdw *hdw)
2323
pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) begin",hdw);
2325
pvr2_hdw_setup_low(hdw);
2326
pvr2_trace(PVR2_TRACE_INIT,
2327
"pvr2_hdw_setup(hdw=%p) done, ok=%d init_ok=%d",
2328
hdw,pvr2_hdw_dev_ok(hdw),hdw->flag_init_ok);
2329
if (pvr2_hdw_dev_ok(hdw)) {
2330
if (hdw->flag_init_ok) {
2333
"Device initialization"
2334
" completed successfully.");
2337
if (hdw->fw1_state == FW1_STATE_RELOAD) {
2340
"Device microcontroller firmware"
2341
" (re)loaded; it should now reset"
2346
PVR2_TRACE_ERROR_LEGS,
2347
"Device initialization was not successful.");
2348
if (hdw->fw1_state == FW1_STATE_MISSING) {
2350
PVR2_TRACE_ERROR_LEGS,
2351
"Giving up since device"
2352
" microcontroller firmware"
2353
" appears to be missing.");
2357
if (hdw->flag_modulefail) {
2359
PVR2_TRACE_ERROR_LEGS,
2360
"***WARNING*** pvrusb2 driver initialization"
2361
" failed due to the failure of one or more"
2362
" sub-device kernel modules.");
2364
PVR2_TRACE_ERROR_LEGS,
2365
"You need to resolve the failing condition"
2366
" before this driver can function. There"
2367
" should be some earlier messages giving more"
2368
" information about the problem.");
2373
PVR2_TRACE_ERROR_LEGS,
2374
"Attempting pvrusb2 recovery by reloading"
2375
" primary firmware.");
2377
PVR2_TRACE_ERROR_LEGS,
2378
"If this works, device should disconnect"
2379
" and reconnect in a sane state.");
2380
hdw->fw1_state = FW1_STATE_UNKNOWN;
2381
pvr2_upload_firmware1(hdw);
2384
PVR2_TRACE_ERROR_LEGS,
2385
"***WARNING*** pvrusb2 device hardware"
2386
" appears to be jammed"
2387
" and I can't clear it.");
2389
PVR2_TRACE_ERROR_LEGS,
2390
"You might need to power cycle"
2391
" the pvrusb2 device"
2392
" in order to recover.");
2395
pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) end",hdw);
2399
/* Perform second stage initialization. Set callback pointer first so that
2400
we can avoid a possible initialization race (if the kernel thread runs
2401
before the callback has been set). */
2402
int pvr2_hdw_initialize(struct pvr2_hdw *hdw,
2403
void (*callback_func)(void *),
2404
void *callback_data)
2406
LOCK_TAKE(hdw->big_lock); do {
2407
if (hdw->flag_disconnected) {
2408
/* Handle a race here: If we're already
2409
disconnected by this point, then give up. If we
2410
get past this then we'll remain connected for
2411
the duration of initialization since the entire
2412
initialization sequence is now protected by the
2416
hdw->state_data = callback_data;
2417
hdw->state_func = callback_func;
2418
pvr2_hdw_setup(hdw);
2419
} while (0); LOCK_GIVE(hdw->big_lock);
2420
return hdw->flag_init_ok;
2424
/* Create, set up, and return a structure for interacting with the
2425
underlying hardware. */
2426
struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf,
2427
const struct usb_device_id *devid)
2429
unsigned int idx,cnt1,cnt2,m;
2430
struct pvr2_hdw *hdw = NULL;
2432
struct pvr2_ctrl *cptr;
2433
struct usb_device *usb_dev;
2434
const struct pvr2_device_desc *hdw_desc;
2436
struct v4l2_queryctrl qctrl;
2437
struct pvr2_ctl_info *ciptr;
2439
usb_dev = interface_to_usbdev(intf);
2441
hdw_desc = (const struct pvr2_device_desc *)(devid->driver_info);
2443
if (hdw_desc == NULL) {
2444
pvr2_trace(PVR2_TRACE_INIT, "pvr2_hdw_create:"
2445
" No device description pointer,"
2446
" unable to continue.");
2447
pvr2_trace(PVR2_TRACE_INIT, "If you have a new device type,"
2448
" please contact Mike Isely <isely@pobox.com>"
2449
" to get it included in the driver\n");
2453
hdw = kzalloc(sizeof(*hdw),GFP_KERNEL);
2454
pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_create: hdw=%p, type \"%s\"",
2455
hdw,hdw_desc->description);
2456
pvr2_trace(PVR2_TRACE_INFO, "Hardware description: %s",
2457
hdw_desc->description);
2458
if (!hdw) goto fail;
2460
init_timer(&hdw->quiescent_timer);
2461
hdw->quiescent_timer.data = (unsigned long)hdw;
2462
hdw->quiescent_timer.function = pvr2_hdw_quiescent_timeout;
2464
init_timer(&hdw->encoder_wait_timer);
2465
hdw->encoder_wait_timer.data = (unsigned long)hdw;
2466
hdw->encoder_wait_timer.function = pvr2_hdw_encoder_wait_timeout;
2468
init_timer(&hdw->encoder_run_timer);
2469
hdw->encoder_run_timer.data = (unsigned long)hdw;
2470
hdw->encoder_run_timer.function = pvr2_hdw_encoder_run_timeout;
2472
hdw->master_state = PVR2_STATE_DEAD;
2474
init_waitqueue_head(&hdw->state_wait_data);
2476
hdw->tuner_signal_stale = !0;
2477
cx2341x_fill_defaults(&hdw->enc_ctl_state);
2479
/* Calculate which inputs are OK */
2481
if (hdw_desc->flag_has_analogtuner) m |= 1 << PVR2_CVAL_INPUT_TV;
2482
if (hdw_desc->digital_control_scheme != PVR2_DIGITAL_SCHEME_NONE) {
2483
m |= 1 << PVR2_CVAL_INPUT_DTV;
2485
if (hdw_desc->flag_has_svideo) m |= 1 << PVR2_CVAL_INPUT_SVIDEO;
2486
if (hdw_desc->flag_has_composite) m |= 1 << PVR2_CVAL_INPUT_COMPOSITE;
2487
if (hdw_desc->flag_has_fmradio) m |= 1 << PVR2_CVAL_INPUT_RADIO;
2488
hdw->input_avail_mask = m;
2489
hdw->input_allowed_mask = hdw->input_avail_mask;
2491
/* If not a hybrid device, pathway_state never changes. So
2492
initialize it here to what it should forever be. */
2493
if (!(hdw->input_avail_mask & (1 << PVR2_CVAL_INPUT_DTV))) {
2494
hdw->pathway_state = PVR2_PATHWAY_ANALOG;
2495
} else if (!(hdw->input_avail_mask & (1 << PVR2_CVAL_INPUT_TV))) {
2496
hdw->pathway_state = PVR2_PATHWAY_DIGITAL;
2499
hdw->control_cnt = CTRLDEF_COUNT;
2500
hdw->control_cnt += MPEGDEF_COUNT;
2501
hdw->controls = kzalloc(sizeof(struct pvr2_ctrl) * hdw->control_cnt,
2503
if (!hdw->controls) goto fail;
2504
hdw->hdw_desc = hdw_desc;
2505
hdw->ir_scheme_active = hdw->hdw_desc->ir_scheme;
2506
for (idx = 0; idx < hdw->control_cnt; idx++) {
2507
cptr = hdw->controls + idx;
2510
for (idx = 0; idx < 32; idx++) {
2511
hdw->std_mask_ptrs[idx] = hdw->std_mask_names[idx];
2513
for (idx = 0; idx < CTRLDEF_COUNT; idx++) {
2514
cptr = hdw->controls + idx;
2515
cptr->info = control_defs+idx;
2518
/* Ensure that default input choice is a valid one. */
2519
m = hdw->input_avail_mask;
2520
if (m) for (idx = 0; idx < (sizeof(m) << 3); idx++) {
2521
if (!((1 << idx) & m)) continue;
2522
hdw->input_val = idx;
2526
/* Define and configure additional controls from cx2341x module. */
2527
hdw->mpeg_ctrl_info = kzalloc(
2528
sizeof(*(hdw->mpeg_ctrl_info)) * MPEGDEF_COUNT, GFP_KERNEL);
2529
if (!hdw->mpeg_ctrl_info) goto fail;
2530
for (idx = 0; idx < MPEGDEF_COUNT; idx++) {
2531
cptr = hdw->controls + idx + CTRLDEF_COUNT;
2532
ciptr = &(hdw->mpeg_ctrl_info[idx].info);
2533
ciptr->desc = hdw->mpeg_ctrl_info[idx].desc;
2534
ciptr->name = mpeg_ids[idx].strid;
2535
ciptr->v4l_id = mpeg_ids[idx].id;
2536
ciptr->skip_init = !0;
2537
ciptr->get_value = ctrl_cx2341x_get;
2538
ciptr->get_v4lflags = ctrl_cx2341x_getv4lflags;
2539
ciptr->is_dirty = ctrl_cx2341x_is_dirty;
2540
if (!idx) ciptr->clear_dirty = ctrl_cx2341x_clear_dirty;
2541
qctrl.id = ciptr->v4l_id;
2542
cx2341x_ctrl_query(&hdw->enc_ctl_state,&qctrl);
2543
if (!(qctrl.flags & V4L2_CTRL_FLAG_READ_ONLY)) {
2544
ciptr->set_value = ctrl_cx2341x_set;
2546
strncpy(hdw->mpeg_ctrl_info[idx].desc,qctrl.name,
2547
PVR2_CTLD_INFO_DESC_SIZE);
2548
hdw->mpeg_ctrl_info[idx].desc[PVR2_CTLD_INFO_DESC_SIZE-1] = 0;
2549
ciptr->default_value = qctrl.default_value;
2550
switch (qctrl.type) {
2552
case V4L2_CTRL_TYPE_INTEGER:
2553
ciptr->type = pvr2_ctl_int;
2554
ciptr->def.type_int.min_value = qctrl.minimum;
2555
ciptr->def.type_int.max_value = qctrl.maximum;
2557
case V4L2_CTRL_TYPE_BOOLEAN:
2558
ciptr->type = pvr2_ctl_bool;
2560
case V4L2_CTRL_TYPE_MENU:
2561
ciptr->type = pvr2_ctl_enum;
2562
ciptr->def.type_enum.value_names =
2563
cx2341x_ctrl_get_menu(&hdw->enc_ctl_state,
2566
ciptr->def.type_enum.value_names[cnt1] != NULL;
2568
ciptr->def.type_enum.count = cnt1;
2574
// Initialize video standard enum dynamic control
2575
cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDENUM);
2577
memcpy(&hdw->std_info_enum,cptr->info,
2578
sizeof(hdw->std_info_enum));
2579
cptr->info = &hdw->std_info_enum;
2582
// Initialize control data regarding video standard masks
2583
valid_std_mask = pvr2_std_get_usable();
2584
for (idx = 0; idx < 32; idx++) {
2585
if (!(valid_std_mask & (1 << idx))) continue;
2586
cnt1 = pvr2_std_id_to_str(
2587
hdw->std_mask_names[idx],
2588
sizeof(hdw->std_mask_names[idx])-1,
2590
hdw->std_mask_names[idx][cnt1] = 0;
2592
cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDAVAIL);
2594
memcpy(&hdw->std_info_avail,cptr->info,
2595
sizeof(hdw->std_info_avail));
2596
cptr->info = &hdw->std_info_avail;
2597
hdw->std_info_avail.def.type_bitmask.bit_names =
2599
hdw->std_info_avail.def.type_bitmask.valid_bits =
2602
cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDCUR);
2604
memcpy(&hdw->std_info_cur,cptr->info,
2605
sizeof(hdw->std_info_cur));
2606
cptr->info = &hdw->std_info_cur;
2607
hdw->std_info_cur.def.type_bitmask.bit_names =
2609
hdw->std_info_avail.def.type_bitmask.valid_bits =
2613
hdw->cropcap_stale = !0;
2614
hdw->eeprom_addr = -1;
2615
hdw->unit_number = -1;
2616
hdw->v4l_minor_number_video = -1;
2617
hdw->v4l_minor_number_vbi = -1;
2618
hdw->v4l_minor_number_radio = -1;
2619
hdw->ctl_write_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL);
2620
if (!hdw->ctl_write_buffer) goto fail;
2621
hdw->ctl_read_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL);
2622
if (!hdw->ctl_read_buffer) goto fail;
2623
hdw->ctl_write_urb = usb_alloc_urb(0,GFP_KERNEL);
2624
if (!hdw->ctl_write_urb) goto fail;
2625
hdw->ctl_read_urb = usb_alloc_urb(0,GFP_KERNEL);
2626
if (!hdw->ctl_read_urb) goto fail;
2628
if (v4l2_device_register(&intf->dev, &hdw->v4l2_dev) != 0) {
2629
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2630
"Error registering with v4l core, giving up");
2633
mutex_lock(&pvr2_unit_mtx); do {
2634
for (idx = 0; idx < PVR_NUM; idx++) {
2635
if (unit_pointers[idx]) continue;
2636
hdw->unit_number = idx;
2637
unit_pointers[idx] = hdw;
2640
} while (0); mutex_unlock(&pvr2_unit_mtx);
2643
cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"pvrusb2");
2645
if (hdw->unit_number >= 0) {
2646
cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"_%c",
2647
('a' + hdw->unit_number));
2650
if (cnt1 >= sizeof(hdw->name)) cnt1 = sizeof(hdw->name)-1;
2651
hdw->name[cnt1] = 0;
2653
hdw->workqueue = create_singlethread_workqueue(hdw->name);
2654
INIT_WORK(&hdw->workpoll,pvr2_hdw_worker_poll);
2656
pvr2_trace(PVR2_TRACE_INIT,"Driver unit number is %d, name is %s",
2657
hdw->unit_number,hdw->name);
2659
hdw->tuner_type = -1;
2662
hdw->usb_intf = intf;
2663
hdw->usb_dev = usb_dev;
2665
usb_make_path(hdw->usb_dev, hdw->bus_info, sizeof(hdw->bus_info));
2667
ifnum = hdw->usb_intf->cur_altsetting->desc.bInterfaceNumber;
2668
usb_set_interface(hdw->usb_dev,ifnum,0);
2670
mutex_init(&hdw->ctl_lock_mutex);
2671
mutex_init(&hdw->big_lock_mutex);
2676
del_timer_sync(&hdw->quiescent_timer);
2677
del_timer_sync(&hdw->encoder_run_timer);
2678
del_timer_sync(&hdw->encoder_wait_timer);
2679
if (hdw->workqueue) {
2680
flush_workqueue(hdw->workqueue);
2681
destroy_workqueue(hdw->workqueue);
2682
hdw->workqueue = NULL;
2684
usb_free_urb(hdw->ctl_read_urb);
2685
usb_free_urb(hdw->ctl_write_urb);
2686
kfree(hdw->ctl_read_buffer);
2687
kfree(hdw->ctl_write_buffer);
2688
kfree(hdw->controls);
2689
kfree(hdw->mpeg_ctrl_info);
2690
kfree(hdw->std_defs);
2691
kfree(hdw->std_enum_names);
2698
/* Remove _all_ associations between this driver and the underlying USB
2700
static void pvr2_hdw_remove_usb_stuff(struct pvr2_hdw *hdw)
2702
if (hdw->flag_disconnected) return;
2703
pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_remove_usb_stuff: hdw=%p",hdw);
2704
if (hdw->ctl_read_urb) {
2705
usb_kill_urb(hdw->ctl_read_urb);
2706
usb_free_urb(hdw->ctl_read_urb);
2707
hdw->ctl_read_urb = NULL;
2709
if (hdw->ctl_write_urb) {
2710
usb_kill_urb(hdw->ctl_write_urb);
2711
usb_free_urb(hdw->ctl_write_urb);
2712
hdw->ctl_write_urb = NULL;
2714
if (hdw->ctl_read_buffer) {
2715
kfree(hdw->ctl_read_buffer);
2716
hdw->ctl_read_buffer = NULL;
2718
if (hdw->ctl_write_buffer) {
2719
kfree(hdw->ctl_write_buffer);
2720
hdw->ctl_write_buffer = NULL;
2722
hdw->flag_disconnected = !0;
2723
/* If we don't do this, then there will be a dangling struct device
2724
reference to our disappearing device persisting inside the V4L
2726
v4l2_device_disconnect(&hdw->v4l2_dev);
2727
hdw->usb_dev = NULL;
2728
hdw->usb_intf = NULL;
2729
pvr2_hdw_render_useless(hdw);
2733
/* Destroy hardware interaction structure */
2734
void pvr2_hdw_destroy(struct pvr2_hdw *hdw)
2737
pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_destroy: hdw=%p",hdw);
2738
if (hdw->workqueue) {
2739
flush_workqueue(hdw->workqueue);
2740
destroy_workqueue(hdw->workqueue);
2741
hdw->workqueue = NULL;
2743
del_timer_sync(&hdw->quiescent_timer);
2744
del_timer_sync(&hdw->encoder_run_timer);
2745
del_timer_sync(&hdw->encoder_wait_timer);
2746
if (hdw->fw_buffer) {
2747
kfree(hdw->fw_buffer);
2748
hdw->fw_buffer = NULL;
2750
if (hdw->vid_stream) {
2751
pvr2_stream_destroy(hdw->vid_stream);
2752
hdw->vid_stream = NULL;
2754
pvr2_i2c_core_done(hdw);
2755
v4l2_device_unregister(&hdw->v4l2_dev);
2756
pvr2_hdw_remove_usb_stuff(hdw);
2757
mutex_lock(&pvr2_unit_mtx); do {
2758
if ((hdw->unit_number >= 0) &&
2759
(hdw->unit_number < PVR_NUM) &&
2760
(unit_pointers[hdw->unit_number] == hdw)) {
2761
unit_pointers[hdw->unit_number] = NULL;
2763
} while (0); mutex_unlock(&pvr2_unit_mtx);
2764
kfree(hdw->controls);
2765
kfree(hdw->mpeg_ctrl_info);
2766
kfree(hdw->std_defs);
2767
kfree(hdw->std_enum_names);
2772
int pvr2_hdw_dev_ok(struct pvr2_hdw *hdw)
2774
return (hdw && hdw->flag_ok);
2778
/* Called when hardware has been unplugged */
2779
void pvr2_hdw_disconnect(struct pvr2_hdw *hdw)
2781
pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_disconnect(hdw=%p)",hdw);
2782
LOCK_TAKE(hdw->big_lock);
2783
LOCK_TAKE(hdw->ctl_lock);
2784
pvr2_hdw_remove_usb_stuff(hdw);
2785
LOCK_GIVE(hdw->ctl_lock);
2786
LOCK_GIVE(hdw->big_lock);
2790
// Attempt to autoselect an appropriate value for std_enum_cur given
2791
// whatever is currently in std_mask_cur
2792
static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw)
2795
for (idx = 1; idx < hdw->std_enum_cnt; idx++) {
2796
if (hdw->std_defs[idx-1].id == hdw->std_mask_cur) {
2797
hdw->std_enum_cur = idx;
2801
hdw->std_enum_cur = 0;
2805
// Calculate correct set of enumerated standards based on currently known
2806
// set of available standards bits.
2807
static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw)
2809
struct v4l2_standard *newstd;
2810
unsigned int std_cnt;
2813
newstd = pvr2_std_create_enum(&std_cnt,hdw->std_mask_avail);
2815
if (hdw->std_defs) {
2816
kfree(hdw->std_defs);
2817
hdw->std_defs = NULL;
2819
hdw->std_enum_cnt = 0;
2820
if (hdw->std_enum_names) {
2821
kfree(hdw->std_enum_names);
2822
hdw->std_enum_names = NULL;
2827
PVR2_TRACE_ERROR_LEGS,
2828
"WARNING: Failed to identify any viable standards");
2830
hdw->std_enum_names = kmalloc(sizeof(char *)*(std_cnt+1),GFP_KERNEL);
2831
hdw->std_enum_names[0] = "none";
2832
for (idx = 0; idx < std_cnt; idx++) {
2833
hdw->std_enum_names[idx+1] =
2836
// Set up the dynamic control for this standard
2837
hdw->std_info_enum.def.type_enum.value_names = hdw->std_enum_names;
2838
hdw->std_info_enum.def.type_enum.count = std_cnt+1;
2839
hdw->std_defs = newstd;
2840
hdw->std_enum_cnt = std_cnt+1;
2841
hdw->std_enum_cur = 0;
2842
hdw->std_info_cur.def.type_bitmask.valid_bits = hdw->std_mask_avail;
2846
int pvr2_hdw_get_stdenum_value(struct pvr2_hdw *hdw,
2847
struct v4l2_standard *std,
2851
if (!idx) return ret;
2852
LOCK_TAKE(hdw->big_lock); do {
2853
if (idx >= hdw->std_enum_cnt) break;
2855
memcpy(std,hdw->std_defs+idx,sizeof(*std));
2857
} while (0); LOCK_GIVE(hdw->big_lock);
2862
/* Get the number of defined controls */
2863
unsigned int pvr2_hdw_get_ctrl_count(struct pvr2_hdw *hdw)
2865
return hdw->control_cnt;
2869
/* Retrieve a control handle given its index (0..count-1) */
2870
struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_index(struct pvr2_hdw *hdw,
2873
if (idx >= hdw->control_cnt) return NULL;
2874
return hdw->controls + idx;
2878
/* Retrieve a control handle given its index (0..count-1) */
2879
struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_id(struct pvr2_hdw *hdw,
2880
unsigned int ctl_id)
2882
struct pvr2_ctrl *cptr;
2886
/* This could be made a lot more efficient, but for now... */
2887
for (idx = 0; idx < hdw->control_cnt; idx++) {
2888
cptr = hdw->controls + idx;
2889
i = cptr->info->internal_id;
2890
if (i && (i == ctl_id)) return cptr;
2896
/* Given a V4L ID, retrieve the control structure associated with it. */
2897
struct pvr2_ctrl *pvr2_hdw_get_ctrl_v4l(struct pvr2_hdw *hdw,unsigned int ctl_id)
2899
struct pvr2_ctrl *cptr;
2903
/* This could be made a lot more efficient, but for now... */
2904
for (idx = 0; idx < hdw->control_cnt; idx++) {
2905
cptr = hdw->controls + idx;
2906
i = cptr->info->v4l_id;
2907
if (i && (i == ctl_id)) return cptr;
2913
/* Given a V4L ID for its immediate predecessor, retrieve the control
2914
structure associated with it. */
2915
struct pvr2_ctrl *pvr2_hdw_get_ctrl_nextv4l(struct pvr2_hdw *hdw,
2916
unsigned int ctl_id)
2918
struct pvr2_ctrl *cptr,*cp2;
2922
/* This could be made a lot more efficient, but for now... */
2924
for (idx = 0; idx < hdw->control_cnt; idx++) {
2925
cptr = hdw->controls + idx;
2926
i = cptr->info->v4l_id;
2928
if (i <= ctl_id) continue;
2929
if (cp2 && (cp2->info->v4l_id < i)) continue;
2937
static const char *get_ctrl_typename(enum pvr2_ctl_type tp)
2940
case pvr2_ctl_int: return "integer";
2941
case pvr2_ctl_enum: return "enum";
2942
case pvr2_ctl_bool: return "boolean";
2943
case pvr2_ctl_bitmask: return "bitmask";
2949
static void pvr2_subdev_set_control(struct pvr2_hdw *hdw, int id,
2950
const char *name, int val)
2952
struct v4l2_control ctrl;
2953
pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 %s=%d", name, val);
2954
memset(&ctrl, 0, sizeof(ctrl));
2957
v4l2_device_call_all(&hdw->v4l2_dev, 0, core, s_ctrl, &ctrl);
2960
#define PVR2_SUBDEV_SET_CONTROL(hdw, id, lab) \
2961
if ((hdw)->lab##_dirty || (hdw)->force_dirty) { \
2962
pvr2_subdev_set_control(hdw, id, #lab, (hdw)->lab##_val); \
2965
/* Execute whatever commands are required to update the state of all the
2966
sub-devices so that they match our current control values. */
2967
static void pvr2_subdev_update(struct pvr2_hdw *hdw)
2969
struct v4l2_subdev *sd;
2971
pvr2_subdev_update_func fp;
2973
pvr2_trace(PVR2_TRACE_CHIPS, "subdev update...");
2975
if (hdw->tuner_updated || hdw->force_dirty) {
2976
struct tuner_setup setup;
2977
pvr2_trace(PVR2_TRACE_CHIPS, "subdev tuner set_type(%d)",
2979
if (((int)(hdw->tuner_type)) >= 0) {
2980
memset(&setup, 0, sizeof(setup));
2981
setup.addr = ADDR_UNSET;
2982
setup.type = hdw->tuner_type;
2983
setup.mode_mask = T_RADIO | T_ANALOG_TV;
2984
v4l2_device_call_all(&hdw->v4l2_dev, 0,
2985
tuner, s_type_addr, &setup);
2989
if (hdw->input_dirty || hdw->std_dirty || hdw->force_dirty) {
2990
pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 set_standard");
2991
if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
2992
v4l2_device_call_all(&hdw->v4l2_dev, 0,
2996
vs = hdw->std_mask_cur;
2997
v4l2_device_call_all(&hdw->v4l2_dev, 0,
2999
pvr2_hdw_cx25840_vbi_hack(hdw);
3001
hdw->tuner_signal_stale = !0;
3002
hdw->cropcap_stale = !0;
3005
PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_BRIGHTNESS, brightness);
3006
PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_CONTRAST, contrast);
3007
PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_SATURATION, saturation);
3008
PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_HUE, hue);
3009
PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_MUTE, mute);
3010
PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_VOLUME, volume);
3011
PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_BALANCE, balance);
3012
PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_BASS, bass);
3013
PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_TREBLE, treble);
3015
if (hdw->input_dirty || hdw->audiomode_dirty || hdw->force_dirty) {
3016
struct v4l2_tuner vt;
3017
memset(&vt, 0, sizeof(vt));
3018
vt.audmode = hdw->audiomode_val;
3019
v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner, s_tuner, &vt);
3022
if (hdw->freqDirty || hdw->force_dirty) {
3024
struct v4l2_frequency freq;
3025
fv = pvr2_hdw_get_cur_freq(hdw);
3026
pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 set_freq(%lu)", fv);
3027
if (hdw->tuner_signal_stale) pvr2_hdw_status_poll(hdw);
3028
memset(&freq, 0, sizeof(freq));
3029
if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) {
3030
/* ((fv * 1000) / 62500) */
3031
freq.frequency = (fv * 2) / 125;
3033
freq.frequency = fv / 62500;
3035
/* tuner-core currently doesn't seem to care about this, but
3036
let's set it anyway for completeness. */
3037
if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
3038
freq.type = V4L2_TUNER_RADIO;
3040
freq.type = V4L2_TUNER_ANALOG_TV;
3043
v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner,
3044
s_frequency, &freq);
3047
if (hdw->res_hor_dirty || hdw->res_ver_dirty || hdw->force_dirty) {
3048
struct v4l2_format fmt;
3049
memset(&fmt, 0, sizeof(fmt));
3050
fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
3051
fmt.fmt.pix.width = hdw->res_hor_val;
3052
fmt.fmt.pix.height = hdw->res_ver_val;
3053
pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 set_size(%dx%d)",
3054
fmt.fmt.pix.width, fmt.fmt.pix.height);
3055
v4l2_device_call_all(&hdw->v4l2_dev, 0, video, s_fmt, &fmt);
3058
if (hdw->srate_dirty || hdw->force_dirty) {
3060
pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 set_audio %d",
3062
switch (hdw->srate_val) {
3064
case V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000:
3067
case V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100:
3070
case V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000:
3074
v4l2_device_call_all(&hdw->v4l2_dev, 0,
3075
audio, s_clock_freq, val);
3078
/* Unable to set crop parameters; there is apparently no equivalent
3079
for VIDIOC_S_CROP */
3081
v4l2_device_for_each_subdev(sd, &hdw->v4l2_dev) {
3083
if (id >= ARRAY_SIZE(pvr2_module_update_functions)) continue;
3084
fp = pvr2_module_update_functions[id];
3089
if (hdw->tuner_signal_stale || hdw->cropcap_stale) {
3090
pvr2_hdw_status_poll(hdw);
3095
/* Figure out if we need to commit control changes. If so, mark internal
3096
state flags to indicate this fact and return true. Otherwise do nothing
3097
else and return false. */
3098
static int pvr2_hdw_commit_setup(struct pvr2_hdw *hdw)
3101
struct pvr2_ctrl *cptr;
3103
int commit_flag = hdw->force_dirty;
3105
unsigned int bcnt,ccnt;
3107
for (idx = 0; idx < hdw->control_cnt; idx++) {
3108
cptr = hdw->controls + idx;
3109
if (!cptr->info->is_dirty) continue;
3110
if (!cptr->info->is_dirty(cptr)) continue;
3113
if (!(pvrusb2_debug & PVR2_TRACE_CTL)) continue;
3114
bcnt = scnprintf(buf,sizeof(buf),"\"%s\" <-- ",
3117
cptr->info->get_value(cptr,&value);
3118
pvr2_ctrl_value_to_sym_internal(cptr,~0,value,
3120
sizeof(buf)-bcnt,&ccnt);
3122
bcnt += scnprintf(buf+bcnt,sizeof(buf)-bcnt," <%s>",
3123
get_ctrl_typename(cptr->info->type));
3124
pvr2_trace(PVR2_TRACE_CTL,
3125
"/*--TRACE_COMMIT--*/ %.*s",
3130
/* Nothing has changed */
3134
hdw->state_pipeline_config = 0;
3135
trace_stbit("state_pipeline_config",hdw->state_pipeline_config);
3136
pvr2_hdw_state_sched(hdw);
3142
/* Perform all operations needed to commit all control changes. This must
3143
be performed in synchronization with the pipeline state and is thus
3144
expected to be called as part of the driver's worker thread. Return
3145
true if commit successful, otherwise return false to indicate that
3146
commit isn't possible at this time. */
3147
static int pvr2_hdw_commit_execute(struct pvr2_hdw *hdw)
3150
struct pvr2_ctrl *cptr;
3151
int disruptive_change;
3153
/* Handle some required side effects when the video standard is
3155
if (hdw->std_dirty) {
3158
if (hdw->std_mask_cur & V4L2_STD_525_60) {
3165
/* Rewrite the vertical resolution to be appropriate to the
3166
video standard that has been selected. */
3167
if (nvres != hdw->res_ver_val) {
3168
hdw->res_ver_val = nvres;
3169
hdw->res_ver_dirty = !0;
3171
/* Rewrite the GOP size to be appropriate to the video
3172
standard that has been selected. */
3173
if (gop_size != hdw->enc_ctl_state.video_gop_size) {
3174
struct v4l2_ext_controls cs;
3175
struct v4l2_ext_control c1;
3176
memset(&cs, 0, sizeof(cs));
3177
memset(&c1, 0, sizeof(c1));
3180
c1.id = V4L2_CID_MPEG_VIDEO_GOP_SIZE;
3181
c1.value = gop_size;
3182
cx2341x_ext_ctrls(&hdw->enc_ctl_state, 0, &cs,
3183
VIDIOC_S_EXT_CTRLS);
3187
if (hdw->input_dirty && hdw->state_pathway_ok &&
3188
(((hdw->input_val == PVR2_CVAL_INPUT_DTV) ?
3189
PVR2_PATHWAY_DIGITAL : PVR2_PATHWAY_ANALOG) !=
3190
hdw->pathway_state)) {
3191
/* Change of mode being asked for... */
3192
hdw->state_pathway_ok = 0;
3193
trace_stbit("state_pathway_ok",hdw->state_pathway_ok);
3195
if (!hdw->state_pathway_ok) {
3196
/* Can't commit anything until pathway is ok. */
3199
/* The broadcast decoder can only scale down, so if
3200
* res_*_dirty && crop window < output format ==> enlarge crop.
3202
* The mpeg encoder receives fields of res_hor_val dots and
3203
* res_ver_val halflines. Limits: hor<=720, ver<=576.
3205
if (hdw->res_hor_dirty && hdw->cropw_val < hdw->res_hor_val) {
3206
hdw->cropw_val = hdw->res_hor_val;
3207
hdw->cropw_dirty = !0;
3208
} else if (hdw->cropw_dirty) {
3209
hdw->res_hor_dirty = !0; /* must rescale */
3210
hdw->res_hor_val = min(720, hdw->cropw_val);
3212
if (hdw->res_ver_dirty && hdw->croph_val < hdw->res_ver_val) {
3213
hdw->croph_val = hdw->res_ver_val;
3214
hdw->croph_dirty = !0;
3215
} else if (hdw->croph_dirty) {
3216
int nvres = hdw->std_mask_cur & V4L2_STD_525_60 ? 480 : 576;
3217
hdw->res_ver_dirty = !0;
3218
hdw->res_ver_val = min(nvres, hdw->croph_val);
3221
/* If any of the below has changed, then we can't do the update
3222
while the pipeline is running. Pipeline must be paused first
3223
and decoder -> encoder connection be made quiescent before we
3227
hdw->enc_unsafe_stale ||
3229
hdw->res_ver_dirty ||
3230
hdw->res_hor_dirty ||
3234
(hdw->active_stream_type != hdw->desired_stream_type));
3235
if (disruptive_change && !hdw->state_pipeline_idle) {
3236
/* Pipeline is not idle; we can't proceed. Arrange to
3237
cause pipeline to stop so that we can try this again
3239
hdw->state_pipeline_pause = !0;
3243
if (hdw->srate_dirty) {
3244
/* Write new sample rate into control structure since
3245
* the master copy is stale. We must track srate
3246
* separate from the mpeg control structure because
3247
* other logic also uses this value. */
3248
struct v4l2_ext_controls cs;
3249
struct v4l2_ext_control c1;
3250
memset(&cs,0,sizeof(cs));
3251
memset(&c1,0,sizeof(c1));
3254
c1.id = V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ;
3255
c1.value = hdw->srate_val;
3256
cx2341x_ext_ctrls(&hdw->enc_ctl_state, 0, &cs,VIDIOC_S_EXT_CTRLS);
3259
if (hdw->active_stream_type != hdw->desired_stream_type) {
3260
/* Handle any side effects of stream config here */
3261
hdw->active_stream_type = hdw->desired_stream_type;
3264
if (hdw->hdw_desc->signal_routing_scheme ==
3265
PVR2_ROUTING_SCHEME_GOTVIEW) {
3267
/* Handle GOTVIEW audio switching */
3268
pvr2_hdw_gpio_get_out(hdw,&b);
3269
if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
3271
pvr2_hdw_gpio_chg_out(hdw,(1 << 11),~0);
3274
pvr2_hdw_gpio_chg_out(hdw,(1 << 11),0);
3278
/* Check and update state for all sub-devices. */
3279
pvr2_subdev_update(hdw);
3281
hdw->tuner_updated = 0;
3282
hdw->force_dirty = 0;
3283
for (idx = 0; idx < hdw->control_cnt; idx++) {
3284
cptr = hdw->controls + idx;
3285
if (!cptr->info->clear_dirty) continue;
3286
cptr->info->clear_dirty(cptr);
3289
if ((hdw->pathway_state == PVR2_PATHWAY_ANALOG) &&
3290
hdw->state_encoder_run) {
3291
/* If encoder isn't running or it can't be touched, then
3292
this will get worked out later when we start the
3294
if (pvr2_encoder_adjust(hdw) < 0) return !0;
3297
hdw->state_pipeline_config = !0;
3298
/* Hardware state may have changed in a way to cause the cropping
3299
capabilities to have changed. So mark it stale, which will
3300
cause a later re-fetch. */
3301
trace_stbit("state_pipeline_config",hdw->state_pipeline_config);
3306
int pvr2_hdw_commit_ctl(struct pvr2_hdw *hdw)
3309
LOCK_TAKE(hdw->big_lock);
3310
fl = pvr2_hdw_commit_setup(hdw);
3311
LOCK_GIVE(hdw->big_lock);
3313
return pvr2_hdw_wait(hdw,0);
3317
static void pvr2_hdw_worker_poll(struct work_struct *work)
3320
struct pvr2_hdw *hdw = container_of(work,struct pvr2_hdw,workpoll);
3321
LOCK_TAKE(hdw->big_lock); do {
3322
fl = pvr2_hdw_state_eval(hdw);
3323
} while (0); LOCK_GIVE(hdw->big_lock);
3324
if (fl && hdw->state_func) {
3325
hdw->state_func(hdw->state_data);
3330
static int pvr2_hdw_wait(struct pvr2_hdw *hdw,int state)
3332
return wait_event_interruptible(
3333
hdw->state_wait_data,
3334
(hdw->state_stale == 0) &&
3335
(!state || (hdw->master_state != state)));
3339
/* Return name for this driver instance */
3340
const char *pvr2_hdw_get_driver_name(struct pvr2_hdw *hdw)
3346
const char *pvr2_hdw_get_desc(struct pvr2_hdw *hdw)
3348
return hdw->hdw_desc->description;
3352
const char *pvr2_hdw_get_type(struct pvr2_hdw *hdw)
3354
return hdw->hdw_desc->shortname;
3358
int pvr2_hdw_is_hsm(struct pvr2_hdw *hdw)
3361
LOCK_TAKE(hdw->ctl_lock); do {
3362
hdw->cmd_buffer[0] = FX2CMD_GET_USB_SPEED;
3363
result = pvr2_send_request(hdw,
3366
if (result < 0) break;
3367
result = (hdw->cmd_buffer[0] != 0);
3368
} while(0); LOCK_GIVE(hdw->ctl_lock);
3373
/* Execute poll of tuner status */
3374
void pvr2_hdw_execute_tuner_poll(struct pvr2_hdw *hdw)
3376
LOCK_TAKE(hdw->big_lock); do {
3377
pvr2_hdw_status_poll(hdw);
3378
} while (0); LOCK_GIVE(hdw->big_lock);
3382
static int pvr2_hdw_check_cropcap(struct pvr2_hdw *hdw)
3384
if (!hdw->cropcap_stale) {
3387
pvr2_hdw_status_poll(hdw);
3388
if (hdw->cropcap_stale) {
3395
/* Return information about cropping capabilities */
3396
int pvr2_hdw_get_cropcap(struct pvr2_hdw *hdw, struct v4l2_cropcap *pp)
3399
LOCK_TAKE(hdw->big_lock);
3400
stat = pvr2_hdw_check_cropcap(hdw);
3402
memcpy(pp, &hdw->cropcap_info, sizeof(hdw->cropcap_info));
3404
LOCK_GIVE(hdw->big_lock);
3409
/* Return information about the tuner */
3410
int pvr2_hdw_get_tuner_status(struct pvr2_hdw *hdw,struct v4l2_tuner *vtp)
3412
LOCK_TAKE(hdw->big_lock); do {
3413
if (hdw->tuner_signal_stale) {
3414
pvr2_hdw_status_poll(hdw);
3416
memcpy(vtp,&hdw->tuner_signal_info,sizeof(struct v4l2_tuner));
3417
} while (0); LOCK_GIVE(hdw->big_lock);
3422
/* Get handle to video output stream */
3423
struct pvr2_stream *pvr2_hdw_get_video_stream(struct pvr2_hdw *hp)
3425
return hp->vid_stream;
3429
void pvr2_hdw_trigger_module_log(struct pvr2_hdw *hdw)
3431
int nr = pvr2_hdw_get_unit_number(hdw);
3432
LOCK_TAKE(hdw->big_lock); do {
3433
printk(KERN_INFO "pvrusb2: ================= START STATUS CARD #%d =================\n", nr);
3434
v4l2_device_call_all(&hdw->v4l2_dev, 0, core, log_status);
3435
pvr2_trace(PVR2_TRACE_INFO,"cx2341x config:");
3436
cx2341x_log_status(&hdw->enc_ctl_state, "pvrusb2");
3437
pvr2_hdw_state_log_state(hdw);
3438
printk(KERN_INFO "pvrusb2: ================== END STATUS CARD #%d ==================\n", nr);
3439
} while (0); LOCK_GIVE(hdw->big_lock);
3443
/* Grab EEPROM contents, needed for direct method. */
3444
#define EEPROM_SIZE 8192
3445
#define trace_eeprom(...) pvr2_trace(PVR2_TRACE_EEPROM,__VA_ARGS__)
3446
static u8 *pvr2_full_eeprom_fetch(struct pvr2_hdw *hdw)
3448
struct i2c_msg msg[2];
3457
eeprom = kmalloc(EEPROM_SIZE,GFP_KERNEL);
3459
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3460
"Failed to allocate memory"
3461
" required to read eeprom");
3465
trace_eeprom("Value for eeprom addr from controller was 0x%x",
3467
addr = hdw->eeprom_addr;
3468
/* Seems that if the high bit is set, then the *real* eeprom
3469
address is shifted right now bit position (noticed this in
3470
newer PVR USB2 hardware) */
3471
if (addr & 0x80) addr >>= 1;
3473
/* FX2 documentation states that a 16bit-addressed eeprom is
3474
expected if the I2C address is an odd number (yeah, this is
3475
strange but it's what they do) */
3476
mode16 = (addr & 1);
3477
eepromSize = (mode16 ? EEPROM_SIZE : 256);
3478
trace_eeprom("Examining %d byte eeprom at location 0x%x"
3479
" using %d bit addressing",eepromSize,addr,
3484
msg[0].len = mode16 ? 2 : 1;
3487
msg[1].flags = I2C_M_RD;
3489
/* We have to do the actual eeprom data fetch ourselves, because
3490
(1) we're only fetching part of the eeprom, and (2) if we were
3491
getting the whole thing our I2C driver can't grab it in one
3492
pass - which is what tveeprom is otherwise going to attempt */
3493
memset(eeprom,0,EEPROM_SIZE);
3494
for (tcnt = 0; tcnt < EEPROM_SIZE; tcnt += pcnt) {
3496
if (pcnt + tcnt > EEPROM_SIZE) pcnt = EEPROM_SIZE-tcnt;
3497
offs = tcnt + (eepromSize - EEPROM_SIZE);
3499
iadd[0] = offs >> 8;
3505
msg[1].buf = eeprom+tcnt;
3506
if ((ret = i2c_transfer(&hdw->i2c_adap,
3507
msg,ARRAY_SIZE(msg))) != 2) {
3508
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3509
"eeprom fetch set offs err=%d",ret);
3518
void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw *hdw,
3525
LOCK_TAKE(hdw->big_lock); do {
3526
if ((hdw->fw_buffer == NULL) == !enable_flag) break;
3529
pvr2_trace(PVR2_TRACE_FIRMWARE,
3530
"Cleaning up after CPU firmware fetch");
3531
kfree(hdw->fw_buffer);
3532
hdw->fw_buffer = NULL;
3534
if (hdw->fw_cpu_flag) {
3535
/* Now release the CPU. It will disconnect
3536
and reconnect later. */
3537
pvr2_hdw_cpureset_assert(hdw,0);
3542
hdw->fw_cpu_flag = (mode != 2);
3543
if (hdw->fw_cpu_flag) {
3544
hdw->fw_size = (mode == 1) ? 0x4000 : 0x2000;
3545
pvr2_trace(PVR2_TRACE_FIRMWARE,
3546
"Preparing to suck out CPU firmware"
3547
" (size=%u)", hdw->fw_size);
3548
hdw->fw_buffer = kzalloc(hdw->fw_size,GFP_KERNEL);
3549
if (!hdw->fw_buffer) {
3554
/* We have to hold the CPU during firmware upload. */
3555
pvr2_hdw_cpureset_assert(hdw,1);
3557
/* download the firmware from address 0000-1fff in 2048
3558
(=0x800) bytes chunk. */
3560
pvr2_trace(PVR2_TRACE_FIRMWARE,
3561
"Grabbing CPU firmware");
3562
pipe = usb_rcvctrlpipe(hdw->usb_dev, 0);
3563
for(address = 0; address < hdw->fw_size;
3565
ret = usb_control_msg(hdw->usb_dev,pipe,
3568
hdw->fw_buffer+address,
3573
pvr2_trace(PVR2_TRACE_FIRMWARE,
3574
"Done grabbing CPU firmware");
3576
pvr2_trace(PVR2_TRACE_FIRMWARE,
3577
"Sucking down EEPROM contents");
3578
hdw->fw_buffer = pvr2_full_eeprom_fetch(hdw);
3579
if (!hdw->fw_buffer) {
3580
pvr2_trace(PVR2_TRACE_FIRMWARE,
3581
"EEPROM content suck failed.");
3584
hdw->fw_size = EEPROM_SIZE;
3585
pvr2_trace(PVR2_TRACE_FIRMWARE,
3586
"Done sucking down EEPROM contents");
3589
} while (0); LOCK_GIVE(hdw->big_lock);
3593
/* Return true if we're in a mode for retrieval CPU firmware */
3594
int pvr2_hdw_cpufw_get_enabled(struct pvr2_hdw *hdw)
3596
return hdw->fw_buffer != NULL;
3600
int pvr2_hdw_cpufw_get(struct pvr2_hdw *hdw,unsigned int offs,
3601
char *buf,unsigned int cnt)
3604
LOCK_TAKE(hdw->big_lock); do {
3608
if (!hdw->fw_buffer) {
3613
if (offs >= hdw->fw_size) {
3614
pvr2_trace(PVR2_TRACE_FIRMWARE,
3615
"Read firmware data offs=%d EOF",
3621
if (offs + cnt > hdw->fw_size) cnt = hdw->fw_size - offs;
3623
memcpy(buf,hdw->fw_buffer+offs,cnt);
3625
pvr2_trace(PVR2_TRACE_FIRMWARE,
3626
"Read firmware data offs=%d cnt=%d",
3629
} while (0); LOCK_GIVE(hdw->big_lock);
3635
int pvr2_hdw_v4l_get_minor_number(struct pvr2_hdw *hdw,
3636
enum pvr2_v4l_type index)
3639
case pvr2_v4l_type_video: return hdw->v4l_minor_number_video;
3640
case pvr2_v4l_type_vbi: return hdw->v4l_minor_number_vbi;
3641
case pvr2_v4l_type_radio: return hdw->v4l_minor_number_radio;
3647
/* Store a v4l minor device number */
3648
void pvr2_hdw_v4l_store_minor_number(struct pvr2_hdw *hdw,
3649
enum pvr2_v4l_type index,int v)
3652
case pvr2_v4l_type_video: hdw->v4l_minor_number_video = v;
3653
case pvr2_v4l_type_vbi: hdw->v4l_minor_number_vbi = v;
3654
case pvr2_v4l_type_radio: hdw->v4l_minor_number_radio = v;
3660
static void pvr2_ctl_write_complete(struct urb *urb)
3662
struct pvr2_hdw *hdw = urb->context;
3663
hdw->ctl_write_pend_flag = 0;
3664
if (hdw->ctl_read_pend_flag) return;
3665
complete(&hdw->ctl_done);
3669
static void pvr2_ctl_read_complete(struct urb *urb)
3671
struct pvr2_hdw *hdw = urb->context;
3672
hdw->ctl_read_pend_flag = 0;
3673
if (hdw->ctl_write_pend_flag) return;
3674
complete(&hdw->ctl_done);
3678
static void pvr2_ctl_timeout(unsigned long data)
3680
struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
3681
if (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) {
3682
hdw->ctl_timeout_flag = !0;
3683
if (hdw->ctl_write_pend_flag)
3684
usb_unlink_urb(hdw->ctl_write_urb);
3685
if (hdw->ctl_read_pend_flag)
3686
usb_unlink_urb(hdw->ctl_read_urb);
3691
/* Issue a command and get a response from the device. This extended
3692
version includes a probe flag (which if set means that device errors
3693
should not be logged or treated as fatal) and a timeout in jiffies.
3694
This can be used to non-lethally probe the health of endpoint 1. */
3695
static int pvr2_send_request_ex(struct pvr2_hdw *hdw,
3696
unsigned int timeout,int probe_fl,
3697
void *write_data,unsigned int write_len,
3698
void *read_data,unsigned int read_len)
3702
struct timer_list timer;
3703
if (!hdw->ctl_lock_held) {
3704
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3705
"Attempted to execute control transfer"
3709
if (!hdw->flag_ok && !probe_fl) {
3710
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3711
"Attempted to execute control transfer"
3712
" when device not ok");
3715
if (!(hdw->ctl_read_urb && hdw->ctl_write_urb)) {
3717
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3718
"Attempted to execute control transfer"
3719
" when USB is disconnected");
3724
/* Ensure that we have sane parameters */
3725
if (!write_data) write_len = 0;
3726
if (!read_data) read_len = 0;
3727
if (write_len > PVR2_CTL_BUFFSIZE) {
3729
PVR2_TRACE_ERROR_LEGS,
3730
"Attempted to execute %d byte"
3731
" control-write transfer (limit=%d)",
3732
write_len,PVR2_CTL_BUFFSIZE);
3735
if (read_len > PVR2_CTL_BUFFSIZE) {
3737
PVR2_TRACE_ERROR_LEGS,
3738
"Attempted to execute %d byte"
3739
" control-read transfer (limit=%d)",
3740
write_len,PVR2_CTL_BUFFSIZE);
3743
if ((!write_len) && (!read_len)) {
3745
PVR2_TRACE_ERROR_LEGS,
3746
"Attempted to execute null control transfer?");
3751
hdw->cmd_debug_state = 1;
3753
hdw->cmd_debug_code = ((unsigned char *)write_data)[0];
3755
hdw->cmd_debug_code = 0;
3757
hdw->cmd_debug_write_len = write_len;
3758
hdw->cmd_debug_read_len = read_len;
3760
/* Initialize common stuff */
3761
init_completion(&hdw->ctl_done);
3762
hdw->ctl_timeout_flag = 0;
3763
hdw->ctl_write_pend_flag = 0;
3764
hdw->ctl_read_pend_flag = 0;
3766
timer.expires = jiffies + timeout;
3767
timer.data = (unsigned long)hdw;
3768
timer.function = pvr2_ctl_timeout;
3771
hdw->cmd_debug_state = 2;
3772
/* Transfer write data to internal buffer */
3773
for (idx = 0; idx < write_len; idx++) {
3774
hdw->ctl_write_buffer[idx] =
3775
((unsigned char *)write_data)[idx];
3777
/* Initiate a write request */
3778
usb_fill_bulk_urb(hdw->ctl_write_urb,
3780
usb_sndbulkpipe(hdw->usb_dev,
3781
PVR2_CTL_WRITE_ENDPOINT),
3782
hdw->ctl_write_buffer,
3784
pvr2_ctl_write_complete,
3786
hdw->ctl_write_urb->actual_length = 0;
3787
hdw->ctl_write_pend_flag = !0;
3788
status = usb_submit_urb(hdw->ctl_write_urb,GFP_KERNEL);
3790
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3791
"Failed to submit write-control"
3792
" URB status=%d",status);
3793
hdw->ctl_write_pend_flag = 0;
3799
hdw->cmd_debug_state = 3;
3800
memset(hdw->ctl_read_buffer,0x43,read_len);
3801
/* Initiate a read request */
3802
usb_fill_bulk_urb(hdw->ctl_read_urb,
3804
usb_rcvbulkpipe(hdw->usb_dev,
3805
PVR2_CTL_READ_ENDPOINT),
3806
hdw->ctl_read_buffer,
3808
pvr2_ctl_read_complete,
3810
hdw->ctl_read_urb->actual_length = 0;
3811
hdw->ctl_read_pend_flag = !0;
3812
status = usb_submit_urb(hdw->ctl_read_urb,GFP_KERNEL);
3814
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3815
"Failed to submit read-control"
3816
" URB status=%d",status);
3817
hdw->ctl_read_pend_flag = 0;
3825
/* Now wait for all I/O to complete */
3826
hdw->cmd_debug_state = 4;
3827
while (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) {
3828
wait_for_completion(&hdw->ctl_done);
3830
hdw->cmd_debug_state = 5;
3833
del_timer_sync(&timer);
3835
hdw->cmd_debug_state = 6;
3838
if (hdw->ctl_timeout_flag) {
3839
status = -ETIMEDOUT;
3841
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3842
"Timed out control-write");
3848
/* Validate results of write request */
3849
if ((hdw->ctl_write_urb->status != 0) &&
3850
(hdw->ctl_write_urb->status != -ENOENT) &&
3851
(hdw->ctl_write_urb->status != -ESHUTDOWN) &&
3852
(hdw->ctl_write_urb->status != -ECONNRESET)) {
3853
/* USB subsystem is reporting some kind of failure
3855
status = hdw->ctl_write_urb->status;
3857
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3858
"control-write URB failure,"
3864
if (hdw->ctl_write_urb->actual_length < write_len) {
3865
/* Failed to write enough data */
3868
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3869
"control-write URB short,"
3870
" expected=%d got=%d",
3872
hdw->ctl_write_urb->actual_length);
3878
/* Validate results of read request */
3879
if ((hdw->ctl_read_urb->status != 0) &&
3880
(hdw->ctl_read_urb->status != -ENOENT) &&
3881
(hdw->ctl_read_urb->status != -ESHUTDOWN) &&
3882
(hdw->ctl_read_urb->status != -ECONNRESET)) {
3883
/* USB subsystem is reporting some kind of failure
3885
status = hdw->ctl_read_urb->status;
3887
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3888
"control-read URB failure,"
3894
if (hdw->ctl_read_urb->actual_length < read_len) {
3895
/* Failed to read enough data */
3898
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3899
"control-read URB short,"
3900
" expected=%d got=%d",
3902
hdw->ctl_read_urb->actual_length);
3906
/* Transfer retrieved data out from internal buffer */
3907
for (idx = 0; idx < read_len; idx++) {
3908
((unsigned char *)read_data)[idx] =
3909
hdw->ctl_read_buffer[idx];
3915
hdw->cmd_debug_state = 0;
3916
if ((status < 0) && (!probe_fl)) {
3917
pvr2_hdw_render_useless(hdw);
3923
int pvr2_send_request(struct pvr2_hdw *hdw,
3924
void *write_data,unsigned int write_len,
3925
void *read_data,unsigned int read_len)
3927
return pvr2_send_request_ex(hdw,HZ*4,0,
3928
write_data,write_len,
3929
read_data,read_len);
3933
static int pvr2_issue_simple_cmd(struct pvr2_hdw *hdw,u32 cmdcode)
3936
unsigned int cnt = 1;
3937
unsigned int args = 0;
3938
LOCK_TAKE(hdw->ctl_lock);
3939
hdw->cmd_buffer[0] = cmdcode & 0xffu;
3940
args = (cmdcode >> 8) & 0xffu;
3941
args = (args > 2) ? 2 : args;
3944
hdw->cmd_buffer[1] = (cmdcode >> 16) & 0xffu;
3946
hdw->cmd_buffer[2] = (cmdcode >> 24) & 0xffu;
3949
if (pvrusb2_debug & PVR2_TRACE_INIT) {
3951
unsigned int ccnt,bcnt;
3955
ccnt = scnprintf(tbuf+bcnt,
3957
"Sending FX2 command 0x%x",cmdcode);
3959
for (idx = 0; idx < ARRAY_SIZE(pvr2_fx2cmd_desc); idx++) {
3960
if (pvr2_fx2cmd_desc[idx].id == cmdcode) {
3961
ccnt = scnprintf(tbuf+bcnt,
3964
pvr2_fx2cmd_desc[idx].desc);
3970
ccnt = scnprintf(tbuf+bcnt,
3972
" (%u",hdw->cmd_buffer[1]);
3975
ccnt = scnprintf(tbuf+bcnt,
3977
",%u",hdw->cmd_buffer[2]);
3980
ccnt = scnprintf(tbuf+bcnt,
3985
pvr2_trace(PVR2_TRACE_INIT,"%.*s",bcnt,tbuf);
3987
ret = pvr2_send_request(hdw,hdw->cmd_buffer,cnt,NULL,0);
3988
LOCK_GIVE(hdw->ctl_lock);
3993
int pvr2_write_register(struct pvr2_hdw *hdw, u16 reg, u32 data)
3997
LOCK_TAKE(hdw->ctl_lock);
3999
hdw->cmd_buffer[0] = FX2CMD_REG_WRITE; /* write register prefix */
4000
PVR2_DECOMPOSE_LE(hdw->cmd_buffer,1,data);
4001
hdw->cmd_buffer[5] = 0;
4002
hdw->cmd_buffer[6] = (reg >> 8) & 0xff;
4003
hdw->cmd_buffer[7] = reg & 0xff;
4006
ret = pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 0);
4008
LOCK_GIVE(hdw->ctl_lock);
4014
static int pvr2_read_register(struct pvr2_hdw *hdw, u16 reg, u32 *data)
4018
LOCK_TAKE(hdw->ctl_lock);
4020
hdw->cmd_buffer[0] = FX2CMD_REG_READ; /* read register prefix */
4021
hdw->cmd_buffer[1] = 0;
4022
hdw->cmd_buffer[2] = 0;
4023
hdw->cmd_buffer[3] = 0;
4024
hdw->cmd_buffer[4] = 0;
4025
hdw->cmd_buffer[5] = 0;
4026
hdw->cmd_buffer[6] = (reg >> 8) & 0xff;
4027
hdw->cmd_buffer[7] = reg & 0xff;
4029
ret |= pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 4);
4030
*data = PVR2_COMPOSE_LE(hdw->cmd_buffer,0);
4032
LOCK_GIVE(hdw->ctl_lock);
4038
void pvr2_hdw_render_useless(struct pvr2_hdw *hdw)
4040
if (!hdw->flag_ok) return;
4041
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
4042
"Device being rendered inoperable");
4043
if (hdw->vid_stream) {
4044
pvr2_stream_setup(hdw->vid_stream,NULL,0,0);
4047
trace_stbit("flag_ok",hdw->flag_ok);
4048
pvr2_hdw_state_sched(hdw);
4052
void pvr2_hdw_device_reset(struct pvr2_hdw *hdw)
4055
pvr2_trace(PVR2_TRACE_INIT,"Performing a device reset...");
4056
ret = usb_lock_device_for_reset(hdw->usb_dev,NULL);
4058
ret = usb_reset_device(hdw->usb_dev);
4059
usb_unlock_device(hdw->usb_dev);
4061
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
4062
"Failed to lock USB device ret=%d",ret);
4064
if (init_pause_msec) {
4065
pvr2_trace(PVR2_TRACE_INFO,
4066
"Waiting %u msec for hardware to settle",
4068
msleep(init_pause_msec);
4074
void pvr2_hdw_cpureset_assert(struct pvr2_hdw *hdw,int val)
4080
if (!hdw->usb_dev) return;
4082
pvr2_trace(PVR2_TRACE_INIT,"cpureset_assert(%d)",val);
4084
da[0] = val ? 0x01 : 0x00;
4086
/* Write the CPUCS register on the 8051. The lsb of the register
4087
is the reset bit; a 1 asserts reset while a 0 clears it. */
4088
pipe = usb_sndctrlpipe(hdw->usb_dev, 0);
4089
ret = usb_control_msg(hdw->usb_dev,pipe,0xa0,0x40,0xe600,0,da,1,HZ);
4091
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
4092
"cpureset_assert(%d) error=%d",val,ret);
4093
pvr2_hdw_render_useless(hdw);
4098
int pvr2_hdw_cmd_deep_reset(struct pvr2_hdw *hdw)
4100
return pvr2_issue_simple_cmd(hdw,FX2CMD_DEEP_RESET);
4104
int pvr2_hdw_cmd_powerup(struct pvr2_hdw *hdw)
4106
return pvr2_issue_simple_cmd(hdw,FX2CMD_POWER_ON);
4110
int pvr2_hdw_cmd_powerdown(struct pvr2_hdw *hdw)
4112
return pvr2_issue_simple_cmd(hdw,FX2CMD_POWER_OFF);
4116
int pvr2_hdw_cmd_decoder_reset(struct pvr2_hdw *hdw)
4118
pvr2_trace(PVR2_TRACE_INIT,
4119
"Requesting decoder reset");
4120
if (hdw->decoder_client_id) {
4121
v4l2_device_call_all(&hdw->v4l2_dev, hdw->decoder_client_id,
4123
pvr2_hdw_cx25840_vbi_hack(hdw);
4126
pvr2_trace(PVR2_TRACE_INIT,
4127
"Unable to reset decoder: nothing attached");
4132
static int pvr2_hdw_cmd_hcw_demod_reset(struct pvr2_hdw *hdw, int onoff)
4135
return pvr2_issue_simple_cmd(hdw,
4136
FX2CMD_HCW_DEMOD_RESETIN |
4138
((onoff ? 1 : 0) << 16));
4142
static int pvr2_hdw_cmd_onair_fe_power_ctrl(struct pvr2_hdw *hdw, int onoff)
4145
return pvr2_issue_simple_cmd(hdw,(onoff ?
4146
FX2CMD_ONAIR_DTV_POWER_ON :
4147
FX2CMD_ONAIR_DTV_POWER_OFF));
4151
static int pvr2_hdw_cmd_onair_digital_path_ctrl(struct pvr2_hdw *hdw,
4154
return pvr2_issue_simple_cmd(hdw,(onoff ?
4155
FX2CMD_ONAIR_DTV_STREAMING_ON :
4156
FX2CMD_ONAIR_DTV_STREAMING_OFF));
4160
static void pvr2_hdw_cmd_modeswitch(struct pvr2_hdw *hdw,int digitalFl)
4163
/* Compare digital/analog desired setting with current setting. If
4164
they don't match, fix it... */
4165
cmode = (digitalFl ? PVR2_PATHWAY_DIGITAL : PVR2_PATHWAY_ANALOG);
4166
if (cmode == hdw->pathway_state) {
4167
/* They match; nothing to do */
4171
switch (hdw->hdw_desc->digital_control_scheme) {
4172
case PVR2_DIGITAL_SCHEME_HAUPPAUGE:
4173
pvr2_hdw_cmd_hcw_demod_reset(hdw,digitalFl);
4174
if (cmode == PVR2_PATHWAY_ANALOG) {
4175
/* If moving to analog mode, also force the decoder
4176
to reset. If no decoder is attached, then it's
4177
ok to ignore this because if/when the decoder
4178
attaches, it will reset itself at that time. */
4179
pvr2_hdw_cmd_decoder_reset(hdw);
4182
case PVR2_DIGITAL_SCHEME_ONAIR:
4183
/* Supposedly we should always have the power on whether in
4184
digital or analog mode. But for now do what appears to
4186
pvr2_hdw_cmd_onair_fe_power_ctrl(hdw,digitalFl);
4191
pvr2_hdw_untrip_unlocked(hdw);
4192
hdw->pathway_state = cmode;
4196
static void pvr2_led_ctrl_hauppauge(struct pvr2_hdw *hdw, int onoff)
4198
/* change some GPIO data
4200
* note: bit d7 of dir appears to control the LED,
4201
* so we shut it off here.
4205
pvr2_hdw_gpio_chg_dir(hdw, 0xffffffff, 0x00000481);
4207
pvr2_hdw_gpio_chg_dir(hdw, 0xffffffff, 0x00000401);
4209
pvr2_hdw_gpio_chg_out(hdw, 0xffffffff, 0x00000000);
4213
typedef void (*led_method_func)(struct pvr2_hdw *,int);
4215
static led_method_func led_methods[] = {
4216
[PVR2_LED_SCHEME_HAUPPAUGE] = pvr2_led_ctrl_hauppauge,
4221
static void pvr2_led_ctrl(struct pvr2_hdw *hdw,int onoff)
4223
unsigned int scheme_id;
4226
if ((!onoff) == (!hdw->led_on)) return;
4228
hdw->led_on = onoff != 0;
4230
scheme_id = hdw->hdw_desc->led_scheme;
4231
if (scheme_id < ARRAY_SIZE(led_methods)) {
4232
fp = led_methods[scheme_id];
4237
if (fp) (*fp)(hdw,onoff);
4241
/* Stop / start video stream transport */
4242
static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl)
4246
/* If we're in analog mode, then just issue the usual analog
4248
if (hdw->pathway_state == PVR2_PATHWAY_ANALOG) {
4249
return pvr2_issue_simple_cmd(hdw,
4251
FX2CMD_STREAMING_ON :
4252
FX2CMD_STREAMING_OFF));
4253
/*Note: Not reached */
4256
if (hdw->pathway_state != PVR2_PATHWAY_DIGITAL) {
4257
/* Whoops, we don't know what mode we're in... */
4261
/* To get here we have to be in digital mode. The mechanism here
4262
is unfortunately different for different vendors. So we switch
4263
on the device's digital scheme attribute in order to figure out
4265
switch (hdw->hdw_desc->digital_control_scheme) {
4266
case PVR2_DIGITAL_SCHEME_HAUPPAUGE:
4267
return pvr2_issue_simple_cmd(hdw,
4269
FX2CMD_HCW_DTV_STREAMING_ON :
4270
FX2CMD_HCW_DTV_STREAMING_OFF));
4271
case PVR2_DIGITAL_SCHEME_ONAIR:
4272
ret = pvr2_issue_simple_cmd(hdw,
4274
FX2CMD_STREAMING_ON :
4275
FX2CMD_STREAMING_OFF));
4276
if (ret) return ret;
4277
return pvr2_hdw_cmd_onair_digital_path_ctrl(hdw,runFl);
4284
/* Evaluate whether or not state_pathway_ok can change */
4285
static int state_eval_pathway_ok(struct pvr2_hdw *hdw)
4287
if (hdw->state_pathway_ok) {
4288
/* Nothing to do if pathway is already ok */
4291
if (!hdw->state_pipeline_idle) {
4292
/* Not allowed to change anything if pipeline is not idle */
4295
pvr2_hdw_cmd_modeswitch(hdw,hdw->input_val == PVR2_CVAL_INPUT_DTV);
4296
hdw->state_pathway_ok = !0;
4297
trace_stbit("state_pathway_ok",hdw->state_pathway_ok);
4302
/* Evaluate whether or not state_encoder_ok can change */
4303
static int state_eval_encoder_ok(struct pvr2_hdw *hdw)
4305
if (hdw->state_encoder_ok) return 0;
4306
if (hdw->flag_tripped) return 0;
4307
if (hdw->state_encoder_run) return 0;
4308
if (hdw->state_encoder_config) return 0;
4309
if (hdw->state_decoder_run) return 0;
4310
if (hdw->state_usbstream_run) return 0;
4311
if (hdw->pathway_state == PVR2_PATHWAY_DIGITAL) {
4312
if (!hdw->hdw_desc->flag_digital_requires_cx23416) return 0;
4313
} else if (hdw->pathway_state != PVR2_PATHWAY_ANALOG) {
4317
if (pvr2_upload_firmware2(hdw) < 0) {
4318
hdw->flag_tripped = !0;
4319
trace_stbit("flag_tripped",hdw->flag_tripped);
4322
hdw->state_encoder_ok = !0;
4323
trace_stbit("state_encoder_ok",hdw->state_encoder_ok);
4328
/* Evaluate whether or not state_encoder_config can change */
4329
static int state_eval_encoder_config(struct pvr2_hdw *hdw)
4331
if (hdw->state_encoder_config) {
4332
if (hdw->state_encoder_ok) {
4333
if (hdw->state_pipeline_req &&
4334
!hdw->state_pipeline_pause) return 0;
4336
hdw->state_encoder_config = 0;
4337
hdw->state_encoder_waitok = 0;
4338
trace_stbit("state_encoder_waitok",hdw->state_encoder_waitok);
4339
/* paranoia - solve race if timer just completed */
4340
del_timer_sync(&hdw->encoder_wait_timer);
4342
if (!hdw->state_pathway_ok ||
4343
(hdw->pathway_state != PVR2_PATHWAY_ANALOG) ||
4344
!hdw->state_encoder_ok ||
4345
!hdw->state_pipeline_idle ||
4346
hdw->state_pipeline_pause ||
4347
!hdw->state_pipeline_req ||
4348
!hdw->state_pipeline_config) {
4349
/* We must reset the enforced wait interval if
4350
anything has happened that might have disturbed
4351
the encoder. This should be a rare case. */
4352
if (timer_pending(&hdw->encoder_wait_timer)) {
4353
del_timer_sync(&hdw->encoder_wait_timer);
4355
if (hdw->state_encoder_waitok) {
4356
/* Must clear the state - therefore we did
4357
something to a state bit and must also
4359
hdw->state_encoder_waitok = 0;
4360
trace_stbit("state_encoder_waitok",
4361
hdw->state_encoder_waitok);
4366
if (!hdw->state_encoder_waitok) {
4367
if (!timer_pending(&hdw->encoder_wait_timer)) {
4368
/* waitok flag wasn't set and timer isn't
4369
running. Check flag once more to avoid
4370
a race then start the timer. This is
4371
the point when we measure out a minimal
4372
quiet interval before doing something to
4374
if (!hdw->state_encoder_waitok) {
4375
hdw->encoder_wait_timer.expires =
4377
(HZ * TIME_MSEC_ENCODER_WAIT
4379
add_timer(&hdw->encoder_wait_timer);
4382
/* We can't continue until we know we have been
4383
quiet for the interval measured by this
4387
pvr2_encoder_configure(hdw);
4388
if (hdw->state_encoder_ok) hdw->state_encoder_config = !0;
4390
trace_stbit("state_encoder_config",hdw->state_encoder_config);
4395
/* Return true if the encoder should not be running. */
4396
static int state_check_disable_encoder_run(struct pvr2_hdw *hdw)
4398
if (!hdw->state_encoder_ok) {
4399
/* Encoder isn't healthy at the moment, so stop it. */
4402
if (!hdw->state_pathway_ok) {
4403
/* Mode is not understood at the moment (i.e. it wants to
4404
change), so encoder must be stopped. */
4408
switch (hdw->pathway_state) {
4409
case PVR2_PATHWAY_ANALOG:
4410
if (!hdw->state_decoder_run) {
4411
/* We're in analog mode and the decoder is not
4412
running; thus the encoder should be stopped as
4417
case PVR2_PATHWAY_DIGITAL:
4418
if (hdw->state_encoder_runok) {
4419
/* This is a funny case. We're in digital mode so
4420
really the encoder should be stopped. However
4421
if it really is running, only kill it after
4422
runok has been set. This gives a chance for the
4423
onair quirk to function (encoder must run
4424
briefly first, at least once, before onair
4425
digital streaming can work). */
4430
/* Unknown mode; so encoder should be stopped. */
4434
/* If we get here, we haven't found a reason to stop the
4440
/* Return true if the encoder should be running. */
4441
static int state_check_enable_encoder_run(struct pvr2_hdw *hdw)
4443
if (!hdw->state_encoder_ok) {
4444
/* Don't run the encoder if it isn't healthy... */
4447
if (!hdw->state_pathway_ok) {
4448
/* Don't run the encoder if we don't (yet) know what mode
4449
we need to be in... */
4453
switch (hdw->pathway_state) {
4454
case PVR2_PATHWAY_ANALOG:
4455
if (hdw->state_decoder_run) {
4456
/* In analog mode, if the decoder is running, then
4461
case PVR2_PATHWAY_DIGITAL:
4462
if ((hdw->hdw_desc->digital_control_scheme ==
4463
PVR2_DIGITAL_SCHEME_ONAIR) &&
4464
!hdw->state_encoder_runok) {
4465
/* This is a quirk. OnAir hardware won't stream
4466
digital until the encoder has been run at least
4467
once, for a minimal period of time (empiricially
4468
measured to be 1/4 second). So if we're on
4469
OnAir hardware and the encoder has never been
4470
run at all, then start the encoder. Normal
4471
state machine logic in the driver will
4472
automatically handle the remaining bits. */
4477
/* For completeness (unknown mode; encoder won't run ever) */
4480
/* If we get here, then we haven't found any reason to run the
4481
encoder, so don't run it. */
4486
/* Evaluate whether or not state_encoder_run can change */
4487
static int state_eval_encoder_run(struct pvr2_hdw *hdw)
4489
if (hdw->state_encoder_run) {
4490
if (!state_check_disable_encoder_run(hdw)) return 0;
4491
if (hdw->state_encoder_ok) {
4492
del_timer_sync(&hdw->encoder_run_timer);
4493
if (pvr2_encoder_stop(hdw) < 0) return !0;
4495
hdw->state_encoder_run = 0;
4497
if (!state_check_enable_encoder_run(hdw)) return 0;
4498
if (pvr2_encoder_start(hdw) < 0) return !0;
4499
hdw->state_encoder_run = !0;
4500
if (!hdw->state_encoder_runok) {
4501
hdw->encoder_run_timer.expires =
4502
jiffies + (HZ * TIME_MSEC_ENCODER_OK / 1000);
4503
add_timer(&hdw->encoder_run_timer);
4506
trace_stbit("state_encoder_run",hdw->state_encoder_run);
4511
/* Timeout function for quiescent timer. */
4512
static void pvr2_hdw_quiescent_timeout(unsigned long data)
4514
struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
4515
hdw->state_decoder_quiescent = !0;
4516
trace_stbit("state_decoder_quiescent",hdw->state_decoder_quiescent);
4517
hdw->state_stale = !0;
4518
queue_work(hdw->workqueue,&hdw->workpoll);
4522
/* Timeout function for encoder wait timer. */
4523
static void pvr2_hdw_encoder_wait_timeout(unsigned long data)
4525
struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
4526
hdw->state_encoder_waitok = !0;
4527
trace_stbit("state_encoder_waitok",hdw->state_encoder_waitok);
4528
hdw->state_stale = !0;
4529
queue_work(hdw->workqueue,&hdw->workpoll);
4533
/* Timeout function for encoder run timer. */
4534
static void pvr2_hdw_encoder_run_timeout(unsigned long data)
4536
struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
4537
if (!hdw->state_encoder_runok) {
4538
hdw->state_encoder_runok = !0;
4539
trace_stbit("state_encoder_runok",hdw->state_encoder_runok);
4540
hdw->state_stale = !0;
4541
queue_work(hdw->workqueue,&hdw->workpoll);
4546
/* Evaluate whether or not state_decoder_run can change */
4547
static int state_eval_decoder_run(struct pvr2_hdw *hdw)
4549
if (hdw->state_decoder_run) {
4550
if (hdw->state_encoder_ok) {
4551
if (hdw->state_pipeline_req &&
4552
!hdw->state_pipeline_pause &&
4553
hdw->state_pathway_ok) return 0;
4555
if (!hdw->flag_decoder_missed) {
4556
pvr2_decoder_enable(hdw,0);
4558
hdw->state_decoder_quiescent = 0;
4559
hdw->state_decoder_run = 0;
4560
/* paranoia - solve race if timer just completed */
4561
del_timer_sync(&hdw->quiescent_timer);
4563
if (!hdw->state_decoder_quiescent) {
4564
if (!timer_pending(&hdw->quiescent_timer)) {
4565
/* We don't do something about the
4566
quiescent timer until right here because
4567
we also want to catch cases where the
4568
decoder was already not running (like
4569
after initialization) as opposed to
4570
knowing that we had just stopped it.
4571
The second flag check is here to cover a
4572
race - the timer could have run and set
4573
this flag just after the previous check
4574
but before we did the pending check. */
4575
if (!hdw->state_decoder_quiescent) {
4576
hdw->quiescent_timer.expires =
4578
(HZ * TIME_MSEC_DECODER_WAIT
4580
add_timer(&hdw->quiescent_timer);
4583
/* Don't allow decoder to start again until it has
4584
been quiesced first. This little detail should
4585
hopefully further stabilize the encoder. */
4588
if (!hdw->state_pathway_ok ||
4589
(hdw->pathway_state != PVR2_PATHWAY_ANALOG) ||
4590
!hdw->state_pipeline_req ||
4591
hdw->state_pipeline_pause ||
4592
!hdw->state_pipeline_config ||
4593
!hdw->state_encoder_config ||
4594
!hdw->state_encoder_ok) return 0;
4595
del_timer_sync(&hdw->quiescent_timer);
4596
if (hdw->flag_decoder_missed) return 0;
4597
if (pvr2_decoder_enable(hdw,!0) < 0) return 0;
4598
hdw->state_decoder_quiescent = 0;
4599
hdw->state_decoder_run = !0;
4601
trace_stbit("state_decoder_quiescent",hdw->state_decoder_quiescent);
4602
trace_stbit("state_decoder_run",hdw->state_decoder_run);
4607
/* Evaluate whether or not state_usbstream_run can change */
4608
static int state_eval_usbstream_run(struct pvr2_hdw *hdw)
4610
if (hdw->state_usbstream_run) {
4612
if (hdw->pathway_state == PVR2_PATHWAY_ANALOG) {
4613
fl = (hdw->state_encoder_ok &&
4614
hdw->state_encoder_run);
4615
} else if ((hdw->pathway_state == PVR2_PATHWAY_DIGITAL) &&
4616
(hdw->hdw_desc->flag_digital_requires_cx23416)) {
4617
fl = hdw->state_encoder_ok;
4620
hdw->state_pipeline_req &&
4621
!hdw->state_pipeline_pause &&
4622
hdw->state_pathway_ok) {
4625
pvr2_hdw_cmd_usbstream(hdw,0);
4626
hdw->state_usbstream_run = 0;
4628
if (!hdw->state_pipeline_req ||
4629
hdw->state_pipeline_pause ||
4630
!hdw->state_pathway_ok) return 0;
4631
if (hdw->pathway_state == PVR2_PATHWAY_ANALOG) {
4632
if (!hdw->state_encoder_ok ||
4633
!hdw->state_encoder_run) return 0;
4634
} else if ((hdw->pathway_state == PVR2_PATHWAY_DIGITAL) &&
4635
(hdw->hdw_desc->flag_digital_requires_cx23416)) {
4636
if (!hdw->state_encoder_ok) return 0;
4637
if (hdw->state_encoder_run) return 0;
4638
if (hdw->hdw_desc->digital_control_scheme ==
4639
PVR2_DIGITAL_SCHEME_ONAIR) {
4640
/* OnAir digital receivers won't stream
4641
unless the analog encoder has run first.
4642
Why? I have no idea. But don't even
4643
try until we know the analog side is
4644
known to have run. */
4645
if (!hdw->state_encoder_runok) return 0;
4648
if (pvr2_hdw_cmd_usbstream(hdw,!0) < 0) return 0;
4649
hdw->state_usbstream_run = !0;
4651
trace_stbit("state_usbstream_run",hdw->state_usbstream_run);
4656
/* Attempt to configure pipeline, if needed */
4657
static int state_eval_pipeline_config(struct pvr2_hdw *hdw)
4659
if (hdw->state_pipeline_config ||
4660
hdw->state_pipeline_pause) return 0;
4661
pvr2_hdw_commit_execute(hdw);
4666
/* Update pipeline idle and pipeline pause tracking states based on other
4667
inputs. This must be called whenever the other relevant inputs have
4669
static int state_update_pipeline_state(struct pvr2_hdw *hdw)
4673
/* Update pipeline state */
4674
st = !(hdw->state_encoder_run ||
4675
hdw->state_decoder_run ||
4676
hdw->state_usbstream_run ||
4677
(!hdw->state_decoder_quiescent));
4678
if (!st != !hdw->state_pipeline_idle) {
4679
hdw->state_pipeline_idle = st;
4682
if (hdw->state_pipeline_idle && hdw->state_pipeline_pause) {
4683
hdw->state_pipeline_pause = 0;
4690
typedef int (*state_eval_func)(struct pvr2_hdw *);
4692
/* Set of functions to be run to evaluate various states in the driver. */
4693
static const state_eval_func eval_funcs[] = {
4694
state_eval_pathway_ok,
4695
state_eval_pipeline_config,
4696
state_eval_encoder_ok,
4697
state_eval_encoder_config,
4698
state_eval_decoder_run,
4699
state_eval_encoder_run,
4700
state_eval_usbstream_run,
4704
/* Process various states and return true if we did anything interesting. */
4705
static int pvr2_hdw_state_update(struct pvr2_hdw *hdw)
4708
int state_updated = 0;
4711
if (!hdw->state_stale) return 0;
4712
if ((hdw->fw1_state != FW1_STATE_OK) ||
4714
hdw->state_stale = 0;
4717
/* This loop is the heart of the entire driver. It keeps trying to
4718
evaluate various bits of driver state until nothing changes for
4719
one full iteration. Each "bit of state" tracks some global
4720
aspect of the driver, e.g. whether decoder should run, if
4721
pipeline is configured, usb streaming is on, etc. We separately
4722
evaluate each of those questions based on other driver state to
4723
arrive at the correct running configuration. */
4726
state_update_pipeline_state(hdw);
4727
/* Iterate over each bit of state */
4728
for (i = 0; (i<ARRAY_SIZE(eval_funcs)) && hdw->flag_ok; i++) {
4729
if ((*eval_funcs[i])(hdw)) {
4732
state_update_pipeline_state(hdw);
4735
} while (check_flag && hdw->flag_ok);
4736
hdw->state_stale = 0;
4737
trace_stbit("state_stale",hdw->state_stale);
4738
return state_updated;
4742
static unsigned int print_input_mask(unsigned int msk,
4743
char *buf,unsigned int acnt)
4745
unsigned int idx,ccnt;
4746
unsigned int tcnt = 0;
4747
for (idx = 0; idx < ARRAY_SIZE(control_values_input); idx++) {
4748
if (!((1 << idx) & msk)) continue;
4749
ccnt = scnprintf(buf+tcnt,
4753
control_values_input[idx]);
4760
static const char *pvr2_pathway_state_name(int id)
4763
case PVR2_PATHWAY_ANALOG: return "analog";
4764
case PVR2_PATHWAY_DIGITAL: return "digital";
4765
default: return "unknown";
4770
static unsigned int pvr2_hdw_report_unlocked(struct pvr2_hdw *hdw,int which,
4771
char *buf,unsigned int acnt)
4777
"driver:%s%s%s%s%s <mode=%s>",
4778
(hdw->flag_ok ? " <ok>" : " <fail>"),
4779
(hdw->flag_init_ok ? " <init>" : " <uninitialized>"),
4780
(hdw->flag_disconnected ? " <disconnected>" :
4782
(hdw->flag_tripped ? " <tripped>" : ""),
4783
(hdw->flag_decoder_missed ? " <no decoder>" : ""),
4784
pvr2_pathway_state_name(hdw->pathway_state));
4789
"pipeline:%s%s%s%s",
4790
(hdw->state_pipeline_idle ? " <idle>" : ""),
4791
(hdw->state_pipeline_config ?
4792
" <configok>" : " <stale>"),
4793
(hdw->state_pipeline_req ? " <req>" : ""),
4794
(hdw->state_pipeline_pause ? " <pause>" : ""));
4798
"worker:%s%s%s%s%s%s%s",
4799
(hdw->state_decoder_run ?
4801
(hdw->state_decoder_quiescent ?
4802
"" : " <decode:stop>")),
4803
(hdw->state_decoder_quiescent ?
4804
" <decode:quiescent>" : ""),
4805
(hdw->state_encoder_ok ?
4806
"" : " <encode:init>"),
4807
(hdw->state_encoder_run ?
4808
(hdw->state_encoder_runok ?
4810
" <encode:firstrun>") :
4811
(hdw->state_encoder_runok ?
4813
" <encode:virgin>")),
4814
(hdw->state_encoder_config ?
4815
" <encode:configok>" :
4816
(hdw->state_encoder_waitok ?
4817
"" : " <encode:waitok>")),
4818
(hdw->state_usbstream_run ?
4819
" <usb:run>" : " <usb:stop>"),
4820
(hdw->state_pathway_ok ?
4821
" <pathway:ok>" : ""));
4826
pvr2_get_state_name(hdw->master_state));
4828
unsigned int tcnt = 0;
4831
ccnt = scnprintf(buf,
4833
"Hardware supported inputs: ");
4835
tcnt += print_input_mask(hdw->input_avail_mask,
4838
if (hdw->input_avail_mask != hdw->input_allowed_mask) {
4839
ccnt = scnprintf(buf+tcnt,
4841
"; allowed inputs: ");
4843
tcnt += print_input_mask(hdw->input_allowed_mask,
4850
struct pvr2_stream_stats stats;
4851
if (!hdw->vid_stream) break;
4852
pvr2_stream_get_stats(hdw->vid_stream,
4858
" URBs: queued=%u idle=%u ready=%u"
4859
" processed=%u failed=%u",
4860
stats.bytes_processed,
4861
stats.buffers_in_queue,
4862
stats.buffers_in_idle,
4863
stats.buffers_in_ready,
4864
stats.buffers_processed,
4865
stats.buffers_failed);
4868
unsigned int id = hdw->ir_scheme_active;
4869
return scnprintf(buf, acnt, "ir scheme: id=%d %s", id,
4870
(id >= ARRAY_SIZE(ir_scheme_names) ?
4871
"?" : ir_scheme_names[id]));
4879
/* Generate report containing info about attached sub-devices and attached
4880
i2c clients, including an indication of which attached i2c clients are
4881
actually sub-devices. */
4882
static unsigned int pvr2_hdw_report_clients(struct pvr2_hdw *hdw,
4883
char *buf, unsigned int acnt)
4885
struct v4l2_subdev *sd;
4886
unsigned int tcnt = 0;
4888
struct i2c_client *client;
4892
ccnt = scnprintf(buf, acnt, "Associated v4l2-subdev drivers and I2C clients:\n");
4894
v4l2_device_for_each_subdev(sd, &hdw->v4l2_dev) {
4897
if (id < ARRAY_SIZE(module_names)) p = module_names[id];
4899
ccnt = scnprintf(buf + tcnt, acnt - tcnt, " %s:", p);
4902
ccnt = scnprintf(buf + tcnt, acnt - tcnt,
4903
" (unknown id=%u):", id);
4906
client = v4l2_get_subdevdata(sd);
4908
ccnt = scnprintf(buf + tcnt, acnt - tcnt,
4909
" %s @ %02x\n", client->name,
4913
ccnt = scnprintf(buf + tcnt, acnt - tcnt,
4914
" no i2c client\n");
4922
unsigned int pvr2_hdw_state_report(struct pvr2_hdw *hdw,
4923
char *buf,unsigned int acnt)
4925
unsigned int bcnt,ccnt,idx;
4927
LOCK_TAKE(hdw->big_lock);
4928
for (idx = 0; ; idx++) {
4929
ccnt = pvr2_hdw_report_unlocked(hdw,idx,buf,acnt);
4931
bcnt += ccnt; acnt -= ccnt; buf += ccnt;
4933
buf[0] = '\n'; ccnt = 1;
4934
bcnt += ccnt; acnt -= ccnt; buf += ccnt;
4936
ccnt = pvr2_hdw_report_clients(hdw, buf, acnt);
4937
bcnt += ccnt; acnt -= ccnt; buf += ccnt;
4938
LOCK_GIVE(hdw->big_lock);
4943
static void pvr2_hdw_state_log_state(struct pvr2_hdw *hdw)
4946
unsigned int idx, ccnt;
4947
unsigned int lcnt, ucnt;
4949
for (idx = 0; ; idx++) {
4950
ccnt = pvr2_hdw_report_unlocked(hdw,idx,buf,sizeof(buf));
4952
printk(KERN_INFO "%s %.*s\n",hdw->name,ccnt,buf);
4954
ccnt = pvr2_hdw_report_clients(hdw, buf, sizeof(buf));
4956
while (ucnt < ccnt) {
4958
while ((lcnt + ucnt < ccnt) && (buf[lcnt + ucnt] != '\n')) {
4961
printk(KERN_INFO "%s %.*s\n", hdw->name, lcnt, buf + ucnt);
4967
/* Evaluate and update the driver's current state, taking various actions
4968
as appropriate for the update. */
4969
static int pvr2_hdw_state_eval(struct pvr2_hdw *hdw)
4972
int state_updated = 0;
4973
int callback_flag = 0;
4976
pvr2_trace(PVR2_TRACE_STBITS,
4977
"Drive state check START");
4978
if (pvrusb2_debug & PVR2_TRACE_STBITS) {
4979
pvr2_hdw_state_log_state(hdw);
4982
/* Process all state and get back over disposition */
4983
state_updated = pvr2_hdw_state_update(hdw);
4985
analog_mode = (hdw->pathway_state != PVR2_PATHWAY_DIGITAL);
4987
/* Update master state based upon all other states. */
4988
if (!hdw->flag_ok) {
4989
st = PVR2_STATE_DEAD;
4990
} else if (hdw->fw1_state != FW1_STATE_OK) {
4991
st = PVR2_STATE_COLD;
4992
} else if ((analog_mode ||
4993
hdw->hdw_desc->flag_digital_requires_cx23416) &&
4994
!hdw->state_encoder_ok) {
4995
st = PVR2_STATE_WARM;
4996
} else if (hdw->flag_tripped ||
4997
(analog_mode && hdw->flag_decoder_missed)) {
4998
st = PVR2_STATE_ERROR;
4999
} else if (hdw->state_usbstream_run &&
5001
(hdw->state_encoder_run && hdw->state_decoder_run))) {
5002
st = PVR2_STATE_RUN;
5004
st = PVR2_STATE_READY;
5006
if (hdw->master_state != st) {
5007
pvr2_trace(PVR2_TRACE_STATE,
5008
"Device state change from %s to %s",
5009
pvr2_get_state_name(hdw->master_state),
5010
pvr2_get_state_name(st));
5011
pvr2_led_ctrl(hdw,st == PVR2_STATE_RUN);
5012
hdw->master_state = st;
5016
if (state_updated) {
5017
/* Trigger anyone waiting on any state changes here. */
5018
wake_up(&hdw->state_wait_data);
5021
if (pvrusb2_debug & PVR2_TRACE_STBITS) {
5022
pvr2_hdw_state_log_state(hdw);
5024
pvr2_trace(PVR2_TRACE_STBITS,
5025
"Drive state check DONE callback=%d",callback_flag);
5027
return callback_flag;
5031
/* Cause kernel thread to check / update driver state */
5032
static void pvr2_hdw_state_sched(struct pvr2_hdw *hdw)
5034
if (hdw->state_stale) return;
5035
hdw->state_stale = !0;
5036
trace_stbit("state_stale",hdw->state_stale);
5037
queue_work(hdw->workqueue,&hdw->workpoll);
5041
int pvr2_hdw_gpio_get_dir(struct pvr2_hdw *hdw,u32 *dp)
5043
return pvr2_read_register(hdw,PVR2_GPIO_DIR,dp);
5047
int pvr2_hdw_gpio_get_out(struct pvr2_hdw *hdw,u32 *dp)
5049
return pvr2_read_register(hdw,PVR2_GPIO_OUT,dp);
5053
int pvr2_hdw_gpio_get_in(struct pvr2_hdw *hdw,u32 *dp)
5055
return pvr2_read_register(hdw,PVR2_GPIO_IN,dp);
5059
int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw *hdw,u32 msk,u32 val)
5064
ret = pvr2_read_register(hdw,PVR2_GPIO_DIR,&cval);
5065
if (ret) return ret;
5066
nval = (cval & ~msk) | (val & msk);
5067
pvr2_trace(PVR2_TRACE_GPIO,
5068
"GPIO direction changing 0x%x:0x%x"
5069
" from 0x%x to 0x%x",
5073
pvr2_trace(PVR2_TRACE_GPIO,
5074
"GPIO direction changing to 0x%x",nval);
5076
return pvr2_write_register(hdw,PVR2_GPIO_DIR,nval);
5080
int pvr2_hdw_gpio_chg_out(struct pvr2_hdw *hdw,u32 msk,u32 val)
5085
ret = pvr2_read_register(hdw,PVR2_GPIO_OUT,&cval);
5086
if (ret) return ret;
5087
nval = (cval & ~msk) | (val & msk);
5088
pvr2_trace(PVR2_TRACE_GPIO,
5089
"GPIO output changing 0x%x:0x%x from 0x%x to 0x%x",
5093
pvr2_trace(PVR2_TRACE_GPIO,
5094
"GPIO output changing to 0x%x",nval);
5096
return pvr2_write_register(hdw,PVR2_GPIO_OUT,nval);
5100
void pvr2_hdw_status_poll(struct pvr2_hdw *hdw)
5102
struct v4l2_tuner *vtp = &hdw->tuner_signal_info;
5103
memset(vtp, 0, sizeof(*vtp));
5104
hdw->tuner_signal_stale = 0;
5105
/* Note: There apparently is no replacement for VIDIOC_CROPCAP
5106
using v4l2-subdev - therefore we can't support that AT ALL right
5107
now. (Of course, no sub-drivers seem to implement it either.
5108
But now it's a a chicken and egg problem...) */
5109
v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner, g_tuner,
5110
&hdw->tuner_signal_info);
5111
pvr2_trace(PVR2_TRACE_CHIPS, "subdev status poll"
5112
" type=%u strength=%u audio=0x%x cap=0x%x"
5115
vtp->signal, vtp->rxsubchans, vtp->capability,
5116
vtp->rangelow, vtp->rangehigh);
5118
/* We have to do this to avoid getting into constant polling if
5119
there's nobody to answer a poll of cropcap info. */
5120
hdw->cropcap_stale = 0;
5124
unsigned int pvr2_hdw_get_input_available(struct pvr2_hdw *hdw)
5126
return hdw->input_avail_mask;
5130
unsigned int pvr2_hdw_get_input_allowed(struct pvr2_hdw *hdw)
5132
return hdw->input_allowed_mask;
5136
static int pvr2_hdw_set_input(struct pvr2_hdw *hdw,int v)
5138
if (hdw->input_val != v) {
5140
hdw->input_dirty = !0;
5143
/* Handle side effects - if we switch to a mode that needs the RF
5144
tuner, then select the right frequency choice as well and mark
5146
if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
5147
hdw->freqSelector = 0;
5148
hdw->freqDirty = !0;
5149
} else if ((hdw->input_val == PVR2_CVAL_INPUT_TV) ||
5150
(hdw->input_val == PVR2_CVAL_INPUT_DTV)) {
5151
hdw->freqSelector = 1;
5152
hdw->freqDirty = !0;
5158
int pvr2_hdw_set_input_allowed(struct pvr2_hdw *hdw,
5159
unsigned int change_mask,
5160
unsigned int change_val)
5163
unsigned int nv,m,idx;
5164
LOCK_TAKE(hdw->big_lock);
5166
nv = hdw->input_allowed_mask & ~change_mask;
5167
nv |= (change_val & change_mask);
5168
nv &= hdw->input_avail_mask;
5170
/* No legal modes left; return error instead. */
5174
hdw->input_allowed_mask = nv;
5175
if ((1 << hdw->input_val) & hdw->input_allowed_mask) {
5176
/* Current mode is still in the allowed mask, so
5180
/* Select and switch to a mode that is still in the allowed
5182
if (!hdw->input_allowed_mask) {
5183
/* Nothing legal; give up */
5186
m = hdw->input_allowed_mask;
5187
for (idx = 0; idx < (sizeof(m) << 3); idx++) {
5188
if (!((1 << idx) & m)) continue;
5189
pvr2_hdw_set_input(hdw,idx);
5193
LOCK_GIVE(hdw->big_lock);
5198
/* Find I2C address of eeprom */
5199
static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw)
5202
LOCK_TAKE(hdw->ctl_lock); do {
5203
hdw->cmd_buffer[0] = FX2CMD_GET_EEPROM_ADDR;
5204
result = pvr2_send_request(hdw,
5207
if (result < 0) break;
5208
result = hdw->cmd_buffer[0];
5209
} while(0); LOCK_GIVE(hdw->ctl_lock);
5214
int pvr2_hdw_register_access(struct pvr2_hdw *hdw,
5215
struct v4l2_dbg_match *match, u64 reg_id,
5216
int setFl, u64 *val_ptr)
5218
#ifdef CONFIG_VIDEO_ADV_DEBUG
5219
struct v4l2_dbg_register req;
5223
if (!capable(CAP_SYS_ADMIN)) return -EPERM;
5227
if (setFl) req.val = *val_ptr;
5228
/* It would be nice to know if a sub-device answered the request */
5229
v4l2_device_call_all(&hdw->v4l2_dev, 0, core, g_register, &req);
5230
if (!setFl) *val_ptr = req.val;
5242
Stuff for Emacs to see, in order to encourage consistent editing style:
5243
*** Local Variables: ***
5245
*** fill-column: 75 ***
5246
*** tab-width: 8 ***
5247
*** c-basic-offset: 8 ***
added
removed
drivers/media/video/pvrusb2/pvrusb2-hdw.c
