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* Copyright (C) 2005 - 2009 ServerEngines
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation. The full GNU General
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* Public License is included in this distribution in the file called COPYING.
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* Contact Information:
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* linux-drivers@serverengines.com
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* 209 N. Fair Oaks Ave
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#ifndef BEISCSI_CMDS_H
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#define BEISCSI_CMDS_H
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* The driver sends configuration and managements command requests to the
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* firmware in the BE. These requests are communicated to the processor
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* using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
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* WRB inside a MAILBOX.
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* The commands are serviced by the ARM processor in the BladeEngine's MPU.
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#define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */
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#define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */
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u32 embedded; /* dword 0 */
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u32 payload_length; /* dword 1 */
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u32 tag0; /* dword 2 */
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u32 tag1; /* dword 3 */
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u32 rsvd; /* dword 4 */
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u8 embedded_payload[236]; /* used by embedded cmds */
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struct be_sge sgl[19]; /* used by non-embedded cmds */
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#define CQE_FLAGS_VALID_MASK (1 << 31)
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#define CQE_FLAGS_ASYNC_MASK (1 << 30)
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#define CQE_FLAGS_COMPLETED_MASK (1 << 28)
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#define CQE_FLAGS_CONSUMED_MASK (1 << 27)
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/* Completion Status */
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#define MCC_STATUS_SUCCESS 0x0
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#define CQE_STATUS_COMPL_MASK 0xFFFF
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#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */
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#define CQE_STATUS_EXTD_MASK 0xFFFF
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#define CQE_STATUS_EXTD_SHIFT 0 /* bits 0 - 15 */
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u32 status; /* dword 0 */
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u32 tag0; /* dword 1 */
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u32 tag1; /* dword 2 */
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u32 flags; /* dword 3 */
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/********* Mailbox door bell *************/
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* Used for driver communication with the FW.
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* The software must write this register twice to post any command. First,
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* it writes the register with hi=1 and the upper bits of the physical address
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* for the MAILBOX structure. Software must poll the ready bit until this
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* is acknowledged. Then, sotware writes the register with hi=0 with the lower
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* bits in the address. It must poll the ready bit until the command is
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* complete. Upon completion, the MAILBOX will contain a valid completion
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#define MPU_MAILBOX_DB_OFFSET 0x160
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#define MPU_MAILBOX_DB_RDY_MASK 0x1 /* bit 0 */
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#define MPU_MAILBOX_DB_HI_MASK 0x2 /* bit 1 */
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/********** MPU semphore ******************/
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#define MPU_EP_SEMAPHORE_OFFSET 0xac
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#define EP_SEMAPHORE_POST_STAGE_MASK 0x0000FFFF
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#define EP_SEMAPHORE_POST_ERR_MASK 0x1
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#define EP_SEMAPHORE_POST_ERR_SHIFT 31
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/********** MCC door bell ************/
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#define DB_MCCQ_OFFSET 0x140
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#define DB_MCCQ_RING_ID_MASK 0x7FF /* bits 0 - 10 */
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/* Number of entries posted */
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#define DB_MCCQ_NUM_POSTED_SHIFT 16 /* bits 16 - 29 */
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/* MPU semphore POST stage values */
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#define POST_STAGE_ARMFW_RDY 0xc000 /* FW is done with POST */
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* When the async bit of mcc_compl is set, the last 4 bytes of
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* mcc_compl is interpreted as follows:
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#define ASYNC_TRAILER_EVENT_CODE_SHIFT 8 /* bits 8 - 15 */
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#define ASYNC_TRAILER_EVENT_CODE_MASK 0xFF
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#define ASYNC_EVENT_CODE_LINK_STATE 0x1
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struct be_async_event_trailer {
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ASYNC_EVENT_LINK_DOWN = 0x0,
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ASYNC_EVENT_LINK_UP = 0x1
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* When the event code of an async trailer is link-state, the mcc_compl
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* must be interpreted as follows
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struct be_async_event_link_state {
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struct be_async_event_trailer trailer;
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struct be_mcc_mailbox {
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struct be_mcc_wrb wrb;
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struct be_mcc_compl compl;
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/* Type of subsystems supported by FW */
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#define CMD_SUBSYSTEM_COMMON 0x1
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#define CMD_SUBSYSTEM_ISCSI 0x2
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#define CMD_SUBSYSTEM_ETH 0x3
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#define CMD_SUBSYSTEM_ISCSI_INI 0x6
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#define CMD_COMMON_TCP_UPLOAD 0x1
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* List of common opcodes subsystem CMD_SUBSYSTEM_COMMON
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* These opcodes are unique for each subsystem defined above
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#define OPCODE_COMMON_CQ_CREATE 12
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#define OPCODE_COMMON_EQ_CREATE 13
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#define OPCODE_COMMON_MCC_CREATE 21
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#define OPCODE_COMMON_GET_CNTL_ATTRIBUTES 32
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#define OPCODE_COMMON_GET_FW_VERSION 35
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#define OPCODE_COMMON_MODIFY_EQ_DELAY 41
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#define OPCODE_COMMON_FIRMWARE_CONFIG 42
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#define OPCODE_COMMON_MCC_DESTROY 53
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#define OPCODE_COMMON_CQ_DESTROY 54
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#define OPCODE_COMMON_EQ_DESTROY 55
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#define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58
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#define OPCODE_COMMON_FUNCTION_RESET 61
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* LIST of opcodes that are common between Initiator and Target
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* used by CMD_SUBSYSTEM_ISCSI
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* These opcodes are unique for each subsystem defined above
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#define OPCODE_COMMON_ISCSI_CFG_POST_SGL_PAGES 2
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#define OPCODE_COMMON_ISCSI_CFG_REMOVE_SGL_PAGES 3
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#define OPCODE_COMMON_ISCSI_NTWK_GET_NIC_CONFIG 7
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#define OPCODE_COMMON_ISCSI_SET_FRAGNUM_BITS_FOR_SGL_CRA 61
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#define OPCODE_COMMON_ISCSI_DEFQ_CREATE 64
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#define OPCODE_COMMON_ISCSI_DEFQ_DESTROY 65
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#define OPCODE_COMMON_ISCSI_WRBQ_CREATE 66
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#define OPCODE_COMMON_ISCSI_WRBQ_DESTROY 67
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struct be_cmd_req_hdr {
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u8 opcode; /* dword 0 */
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u8 subsystem; /* dword 0 */
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u8 port_number; /* dword 0 */
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u8 domain; /* dword 0 */
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u32 timeout; /* dword 1 */
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u32 request_length; /* dword 2 */
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u32 rsvd0; /* dword 3 */
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struct be_cmd_resp_hdr {
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u32 info; /* dword 0 */
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u32 status; /* dword 1 */
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u32 response_length; /* dword 2 */
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u32 actual_resp_len; /* dword 3 */
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/**************************
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* BE Command definitions *
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**************************/
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* Pseudo amap definition in which each bit of the actual structure is defined
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* as a byte - used to calculate offset/shift/mask of each field
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struct amap_eq_context {
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u8 cidx[13]; /* dword 0 */
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u8 rsvd0[3]; /* dword 0 */
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u8 epidx[13]; /* dword 0 */
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u8 valid; /* dword 0 */
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u8 rsvd1; /* dword 0 */
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u8 size; /* dword 0 */
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u8 pidx[13]; /* dword 1 */
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u8 rsvd2[3]; /* dword 1 */
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u8 pd[10]; /* dword 1 */
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u8 count[3]; /* dword 1 */
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u8 solevent; /* dword 1 */
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u8 stalled; /* dword 1 */
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u8 armed; /* dword 1 */
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u8 rsvd3[4]; /* dword 2 */
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u8 func[8]; /* dword 2 */
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u8 rsvd4; /* dword 2 */
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u8 delaymult[10]; /* dword 2 */
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u8 rsvd5[2]; /* dword 2 */
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u8 phase[2]; /* dword 2 */
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u8 nodelay; /* dword 2 */
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u8 rsvd6[4]; /* dword 2 */
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u8 rsvd7[32]; /* dword 3 */
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struct be_cmd_req_eq_create {
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struct be_cmd_req_hdr hdr; /* dw[4] */
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u16 num_pages; /* sword */
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u16 rsvd0; /* sword */
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u8 context[sizeof(struct amap_eq_context) / 8]; /* dw[4] */
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struct phys_addr pages[8];
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struct be_cmd_resp_eq_create {
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struct be_cmd_resp_hdr resp_hdr;
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u16 eq_id; /* sword */
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u16 rsvd0; /* sword */
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struct be_cmd_req_mac_query {
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struct be_cmd_req_hdr hdr;
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struct be_cmd_resp_mac_query {
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struct be_cmd_resp_hdr hdr;
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/******************** Create CQ ***************************/
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* Pseudo amap definition in which each bit of the actual structure is defined
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* as a byte - used to calculate offset/shift/mask of each field
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struct amap_cq_context {
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u8 cidx[11]; /* dword 0 */
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u8 rsvd0; /* dword 0 */
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u8 coalescwm[2]; /* dword 0 */
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u8 nodelay; /* dword 0 */
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u8 epidx[11]; /* dword 0 */
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u8 rsvd1; /* dword 0 */
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u8 count[2]; /* dword 0 */
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u8 valid; /* dword 0 */
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u8 solevent; /* dword 0 */
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u8 eventable; /* dword 0 */
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u8 pidx[11]; /* dword 1 */
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u8 rsvd2; /* dword 1 */
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u8 pd[10]; /* dword 1 */
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u8 eqid[8]; /* dword 1 */
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u8 stalled; /* dword 1 */
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u8 armed; /* dword 1 */
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u8 rsvd3[4]; /* dword 2 */
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u8 func[8]; /* dword 2 */
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u8 rsvd4[20]; /* dword 2 */
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u8 rsvd5[32]; /* dword 3 */
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struct be_cmd_req_cq_create {
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struct be_cmd_req_hdr hdr;
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u8 context[sizeof(struct amap_cq_context) / 8];
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struct phys_addr pages[4];
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struct be_cmd_resp_cq_create {
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struct be_cmd_resp_hdr hdr;
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/******************** Create MCCQ ***************************/
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* Pseudo amap definition in which each bit of the actual structure is defined
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* as a byte - used to calculate offset/shift/mask of each field
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struct amap_mcc_context {
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struct be_cmd_req_mcc_create {
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struct be_cmd_req_hdr hdr;
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u8 context[sizeof(struct amap_mcc_context) / 8];
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struct phys_addr pages[8];
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struct be_cmd_resp_mcc_create {
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struct be_cmd_resp_hdr hdr;
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/******************** Q Destroy ***************************/
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/* Type of Queue to be destroyed */
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struct be_cmd_req_q_destroy {
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struct be_cmd_req_hdr hdr;
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u16 bypass_flush; /* valid only for rx q destroy */
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struct be_cmd_req_mcast_mac_config {
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struct be_cmd_req_hdr hdr;
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struct macaddr mac[32];
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static inline void *embedded_payload(struct be_mcc_wrb *wrb)
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return wrb->payload.embedded_payload;
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static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb)
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return &wrb->payload.sgl[0];
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/******************** Modify EQ Delay *******************/
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struct be_cmd_req_modify_eq_delay {
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struct be_cmd_req_hdr hdr;
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u32 delay_multiplier;
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/******************** Get MAC ADDR *******************/
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struct be_cmd_req_get_mac_addr {
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struct be_cmd_req_hdr hdr;
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u16 size_of_structure;
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u8 mac_address[ETH_ALEN];
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struct be_cmd_resp_get_mac_addr {
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struct be_cmd_resp_hdr hdr;
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u16 size_of_structure;
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int beiscsi_cmd_eq_create(struct be_ctrl_info *ctrl,
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struct be_queue_info *eq, int eq_delay);
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int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl,
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struct be_queue_info *cq, struct be_queue_info *eq,
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bool sol_evts, bool no_delay,
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int num_cqe_dma_coalesce);
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int beiscsi_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q,
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int beiscsi_cmd_mccq_create(struct beiscsi_hba *phba,
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struct be_queue_info *mccq,
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struct be_queue_info *cq);
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int be_poll_mcc(struct be_ctrl_info *ctrl);
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unsigned char mgmt_check_supported_fw(struct be_ctrl_info *ctrl,
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struct beiscsi_hba *phba);
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int be_cmd_get_mac_addr(struct beiscsi_hba *phba, u8 *mac_addr);
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/*ISCSI Functuions */
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int be_cmd_fw_initialize(struct be_ctrl_info *ctrl);
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struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem);
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struct be_mcc_wrb *wrb_from_mccq(struct beiscsi_hba *phba);
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int be_mcc_notify_wait(struct beiscsi_hba *phba);
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int be_mbox_notify(struct be_ctrl_info *ctrl);
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int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl,
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struct be_queue_info *cq,
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struct be_queue_info *dq, int length,
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int be_cmd_iscsi_post_sgl_pages(struct be_ctrl_info *ctrl,
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struct be_dma_mem *q_mem, u32 page_offset,
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int be_cmd_wrbq_create(struct be_ctrl_info *ctrl, struct be_dma_mem *q_mem,
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struct be_queue_info *wrbq);
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struct be_default_pdu_context {
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struct amap_be_default_pdu_context {
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u8 dbuf_cindex[13]; /* dword 0 */
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u8 rsvd0[3]; /* dword 0 */
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u8 ring_size[4]; /* dword 0 */
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u8 ring_state[4]; /* dword 0 */
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u8 rsvd1[8]; /* dword 0 */
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u8 dbuf_pindex[13]; /* dword 1 */
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u8 rsvd2; /* dword 1 */
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u8 pci_func_id[8]; /* dword 1 */
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u8 rx_pdid[9]; /* dword 1 */
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u8 rx_pdid_valid; /* dword 1 */
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u8 default_buffer_size[16]; /* dword 2 */
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u8 cq_id_recv[10]; /* dword 2 */
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u8 rx_pdid_not_valid; /* dword 2 */
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u8 rsvd3[5]; /* dword 2 */
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u8 rsvd4[32]; /* dword 3 */
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struct be_defq_create_req {
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struct be_cmd_req_hdr hdr;
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struct be_default_pdu_context context;
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struct phys_addr pages[8];
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struct be_defq_create_resp {
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struct be_cmd_req_hdr hdr;
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struct be_post_sgl_pages_req {
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struct be_cmd_req_hdr hdr;
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struct phys_addr pages[26];
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struct be_wrbq_create_req {
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struct be_cmd_req_hdr hdr;
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struct phys_addr pages[8];
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struct be_wrbq_create_resp {
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struct be_cmd_resp_hdr resp_hdr;
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#define SOL_CID_MASK 0x0000FFC0
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#define SOL_CODE_MASK 0x0000003F
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#define SOL_WRB_INDEX_MASK 0x00FF0000
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#define SOL_CMD_WND_MASK 0xFF000000
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#define SOL_RES_CNT_MASK 0x7FFFFFFF
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#define SOL_EXP_CMD_SN_MASK 0xFFFFFFFF
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#define SOL_HW_STS_MASK 0x000000FF
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#define SOL_STS_MASK 0x0000FF00
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#define SOL_RESP_MASK 0x00FF0000
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#define SOL_FLAGS_MASK 0x7F000000
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#define SOL_S_MASK 0x80000000
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struct amap_sol_cqe {
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u8 hw_sts[8]; /* dword 0 */
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u8 i_sts[8]; /* dword 0 */
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u8 i_resp[8]; /* dword 0 */
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u8 i_flags[7]; /* dword 0 */
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u8 i_exp_cmd_sn[32]; /* dword 1 */
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u8 code[6]; /* dword 2 */
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u8 cid[10]; /* dword 2 */
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u8 wrb_index[8]; /* dword 2 */
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u8 i_cmd_wnd[8]; /* dword 2 */
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u8 i_res_cnt[31]; /* dword 3 */
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u8 valid; /* dword 3 */
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#define SOL_ICD_INDEX_MASK 0x0003FFC0
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struct amap_sol_cqe_ring {
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u8 hw_sts[8]; /* dword 0 */
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u8 i_sts[8]; /* dword 0 */
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u8 i_resp[8]; /* dword 0 */
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u8 i_flags[7]; /* dword 0 */
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u8 i_exp_cmd_sn[32]; /* dword 1 */
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u8 code[6]; /* dword 2 */
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u8 icd_index[12]; /* dword 2 */
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u8 rsvd[6]; /* dword 2 */
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u8 i_cmd_wnd[8]; /* dword 2 */
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u8 i_res_cnt[31]; /* dword 3 */
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u8 valid; /* dword 3 */
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* Post WRB Queue Doorbell Register used by the host Storage
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* stack to notify the
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* controller of a posted Work Request Block
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#define DB_WRB_POST_CID_MASK 0x3FF /* bits 0 - 9 */
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#define DB_DEF_PDU_WRB_INDEX_MASK 0xFF /* bits 0 - 9 */
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#define DB_DEF_PDU_WRB_INDEX_SHIFT 16
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#define DB_DEF_PDU_NUM_POSTED_SHIFT 24
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struct fragnum_bits_for_sgl_cra_in {
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struct be_cmd_req_hdr hdr;
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struct iscsi_cleanup_req {
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struct be_cmd_req_hdr hdr;
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u32 delay_multiplier;
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struct be_eq_delay_params_in {
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struct be_cmd_req_hdr hdr;
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struct eq_delay delay[8];
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struct ip_address_format {
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u16 size_of_structure;
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struct tcp_connect_and_offload_in {
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struct be_cmd_req_hdr hdr;
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struct ip_address_format ip_address;
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struct phys_addr dataout_template_pa;
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struct tcp_connect_and_offload_out {
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struct be_cmd_resp_hdr hdr;
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u32 connection_handle;
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struct be_mcc_wrb_context {
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int *users_final_status;
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#define DB_DEF_PDU_RING_ID_MASK 0x3FF /* bits 0 - 9 */
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#define DB_DEF_PDU_CQPROC_MASK 0x3FFF /* bits 0 - 9 */
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#define DB_DEF_PDU_REARM_SHIFT 14
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#define DB_DEF_PDU_EVENT_SHIFT 15
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#define DB_DEF_PDU_CQPROC_SHIFT 16
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struct tcp_upload_params_in {
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struct be_cmd_req_hdr hdr;
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struct tcp_upload_params_out {
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union tcp_upload_params {
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struct tcp_upload_params_in request;
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struct tcp_upload_params_out response;
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struct be_ulp_fw_cfg {
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struct be_cmd_req_hdr hdr;
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u32 be_config_number;
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struct be_ulp_fw_cfg ulp[2];
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#define CMD_ISCSI_COMMAND_INVALIDATE 1
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#define ISCSI_OPCODE_SCSI_DATA_OUT 5
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#define OPCODE_COMMON_ISCSI_TCP_CONNECT_AND_OFFLOAD 70
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#define OPCODE_ISCSI_INI_DRIVER_OFFLOAD_SESSION 41
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#define OPCODE_COMMON_MODIFY_EQ_DELAY 41
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#define OPCODE_COMMON_ISCSI_CLEANUP 59
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#define OPCODE_COMMON_TCP_UPLOAD 56
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#define OPCODE_COMMON_ISCSI_ERROR_RECOVERY_INVALIDATE_COMMANDS 1
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/* --- CMD_ISCSI_INVALIDATE_CONNECTION_TYPE --- */
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#define CMD_ISCSI_CONNECTION_INVALIDATE 0x8001
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#define CMD_ISCSI_CONNECTION_ISSUE_TCP_RST 0x8002
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#define OPCODE_ISCSI_INI_DRIVER_INVALIDATE_CONNECTION 42
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#define INI_WR_CMD 1 /* Initiator write command */
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#define INI_TMF_CMD 2 /* Initiator TMF command */
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#define INI_NOPOUT_CMD 3 /* Initiator; Send a NOP-OUT */
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#define INI_RD_CMD 5 /* Initiator requesting to send
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#define TGT_CTX_UPDT_CMD 7 /* Target context update */
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#define TGT_STS_CMD 8 /* Target R2T and other BHS
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* where only the status number
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#define TGT_DATAIN_CMD 9 /* Target Data-Ins in response
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#define TGT_SOS_PDU 10 /* Target:standalone status
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#define TGT_DM_CMD 11 /* Indicates that the bhs
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* driver should not be touched
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/* --- CMD_CHUTE_TYPE --- */
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#define CMD_CONNECTION_CHUTE_0 1
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#define CMD_CONNECTION_CHUTE_1 2
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#define CMD_CONNECTION_CHUTE_2 3
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#define EQ_MAJOR_CODE_COMPLETION 0
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#define CMD_ISCSI_SESSION_DEL_CFG_FROM_FLASH 0
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#define CMD_ISCSI_SESSION_SAVE_CFG_ON_FLASH 1
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/* --- CONNECTION_UPLOAD_PARAMS --- */
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/* These parameters are used to define the type of upload desired. */
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#define CONNECTION_UPLOAD_GRACEFUL 1 /* Graceful upload */
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#define CONNECTION_UPLOAD_ABORT_RESET 2 /* Abortive upload with
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#define CONNECTION_UPLOAD_ABORT 3 /* Abortive upload without
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#define CONNECTION_UPLOAD_ABORT_WITH_SEQ 4 /* Abortive upload with reset,
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* sequence number by driver */
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/* Returns byte size of given field with a structure. */
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/* Returns the number of items in the field array. */
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#define BE_NUMBER_OF_FIELD(_type_, _field_) \
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(FIELD_SIZEOF(_type_, _field_)/sizeof((((_type_ *)0)->_field_[0])))\
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* Different types of iSCSI completions to host driver for both initiator
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#define SOL_CMD_COMPLETE 1 /* Solicited command completed
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#define SOL_CMD_KILLED_DATA_DIGEST_ERR 2 /* Solicited command got
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* invalidated internally due
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* to Data Digest error
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#define CXN_KILLED_PDU_SIZE_EXCEEDS_DSL 3 /* Connection got invalidated
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* due to a recieved PDU
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#define CXN_KILLED_BURST_LEN_MISMATCH 4 /* Connection got invalidated
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* internally due ti received
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* PDU sequence size >
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#define CXN_KILLED_AHS_RCVD 5 /* Connection got invalidated
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* internally due to a recieved
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#define CXN_KILLED_HDR_DIGEST_ERR 6 /* Connection got invalidated
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* internally due to Hdr Digest
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#define CXN_KILLED_UNKNOWN_HDR 7 /* Connection got invalidated
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* due to a bad opcode in the
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#define CXN_KILLED_STALE_ITT_TTT_RCVD 8 /* Connection got invalidated
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* internally due to a recieved
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* ITT/TTT that does not belong
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#define CXN_KILLED_INVALID_ITT_TTT_RCVD 9 /* Connection got invalidated
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* internally due to recieved
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* ITT/TTT value > Max
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* Supported ITTs/TTTs
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#define CXN_KILLED_RST_RCVD 10 /* Connection got invalidated
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* internally due to an
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#define CXN_KILLED_TIMED_OUT 11 /* Connection got invalidated
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* internally due to timeout on
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* tcp segment 12 retransmit
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#define CXN_KILLED_RST_SENT 12 /* Connection got invalidated
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* internally due to TCP RST
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* sent by the Tx side
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#define CXN_KILLED_FIN_RCVD 13 /* Connection got invalidated
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* internally due to an
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#define CXN_KILLED_BAD_UNSOL_PDU_RCVD 14 /* Connection got invalidated
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* internally due to bad
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* unsolicited PDU Unsolicited
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#define CXN_KILLED_BAD_WRB_INDEX_ERROR 15 /* Connection got invalidated
814
* internally due to bad WRB
817
#define CXN_KILLED_OVER_RUN_RESIDUAL 16 /* Command got invalidated
818
* internally due to recived
819
* command has residual
822
#define CXN_KILLED_UNDER_RUN_RESIDUAL 17 /* Command got invalidated
823
* internally due to recived
824
* command has residual under
827
#define CMD_KILLED_INVALID_STATSN_RCVD 18 /* Command got invalidated
828
* internally due to a recieved
829
* PDU has an invalid StatusSN
831
#define CMD_KILLED_INVALID_R2T_RCVD 19 /* Command got invalidated
832
* internally due to a recieved
833
* an R2T with some invalid
836
#define CMD_CXN_KILLED_LUN_INVALID 20 /* Command got invalidated
837
* internally due to received
838
* PDU has an invalid LUN.
840
#define CMD_CXN_KILLED_ICD_INVALID 21 /* Command got invalidated
841
* internally due to the
842
* corresponding ICD not in a
845
#define CMD_CXN_KILLED_ITT_INVALID 22 /* Command got invalidated due
846
* to received PDU has an
849
#define CMD_CXN_KILLED_SEQ_OUTOFORDER 23 /* Command got invalidated due
850
* to received sequence buffer
851
* offset is out of order.
853
#define CMD_CXN_KILLED_INVALID_DATASN_RCVD 24 /* Command got invalidated
854
* internally due to a
855
* recieved PDU has an invalid
858
#define CXN_INVALIDATE_NOTIFY 25 /* Connection invalidation
861
#define CXN_INVALIDATE_INDEX_NOTIFY 26 /* Connection invalidation
863
* with data PDU index.
865
#define CMD_INVALIDATED_NOTIFY 27 /* Command invalidation
866
* completionnotifify.
868
#define UNSOL_HDR_NOTIFY 28 /* Unsolicited header notify.*/
869
#define UNSOL_DATA_NOTIFY 29 /* Unsolicited data notify.*/
870
#define UNSOL_DATA_DIGEST_ERROR_NOTIFY 30 /* Unsolicited data digest
873
#define DRIVERMSG_NOTIFY 31 /* TCP acknowledge based
876
#define CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN 32 /* Connection got invalidated
877
* internally due to command
878
* and data are not on same
881
#define SOL_CMD_KILLED_DIF_ERR 33 /* Solicited command got
882
* invalidated internally due
885
#define CXN_KILLED_SYN_RCVD 34 /* Connection got invalidated
886
* internally due to incoming
889
#define CXN_KILLED_IMM_DATA_RCVD 35 /* Connection got invalidated
890
* internally due to an
891
* incoming Unsolicited PDU
892
* that has immediate data on
896
void be_wrb_hdr_prepare(struct be_mcc_wrb *wrb, int payload_len,
897
bool embedded, u8 sge_cnt);
899
void be_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
900
u8 subsystem, u8 opcode, int cmd_len);
902
#endif /* !BEISCSI_CMDS_H */