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* Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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* Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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#ifndef __ASM_ARCH_MXC_HARDWARE_H__
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#define CHIP_REV_3_1 0x31
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#define CHIP_REV_3_2 0x32
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#define BOARD_REV_1 0x000
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#define BOARD_REV_2 0x100
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extern unsigned int system_rev;
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#define mxc_set_system_rev(part, rev) { \
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system_rev = (part << 12) | rev; \
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#define mxc_cpu() (system_rev >> 12)
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#define mxc_is_cpu(part) ((mxc_cpu() == part) ? 1 : 0)
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#define mxc_cpu_rev() (system_rev & 0xFF)
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#define mxc_cpu_rev_major() ((system_rev >> 4) & 0xF)
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#define mxc_cpu_rev_minor() (system_rev & 0xF)
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#define mxc_cpu_is_rev(rev) \
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((mxc_cpu_rev() == rev) ? 1 : ((mxc_cpu_rev() < rev) ? -1 : 2))
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#define MXC_REV(type) \
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static inline int type## _rev (int rev) \
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return (type() ? mxc_cpu_is_rev(rev) : 0); \
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#ifdef CONFIG_ARCH_MX3
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# include <mach/mx31.h>
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# define cpu_is_mx31() (mxc_is_cpu(0x31)) /*system_rev got from Redboot */
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# define cpu_is_mx32() (mxc_is_cpu(0x32)) /*system_rev got from Redboot */
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# define cpu_is_mx31() (0)
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# define cpu_is_mx32() (0)
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#endif /* CONFIG_ARCH_MX3 */
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#include <mach/mx3x.h>
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#include <mach/mx31.h>
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#ifdef CONFIG_ARCH_MX35
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# include <mach/mx35.h>
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# define cpu_is_mx35() (1)
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# define board_is_mx35(rev) ((system_rev & rev) ? 1 : 0)
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# define cpu_is_mx35() (0)
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# define board_is_mx35(rev) (0)
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#endif /* CONFIG_ARCH_MX35 */
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#include <mach/mx3x.h>
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#include <mach/mx35.h>
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#ifdef CONFIG_ARCH_MX2
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# include <mach/mx2x.h>
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# ifdef CONFIG_MACH_MX21
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# include <mach/mx21.h>
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# ifdef CONFIG_MACH_MX27
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# include <mach/mx27.h>
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#ifdef CONFIG_ARCH_MX1
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# include <mach/mx1.h>
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#ifdef CONFIG_ARCH_MX37
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#include <mach/mx37.h>
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#define cpu_is_mx37() (1)
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#define board_is_mx37(rev) ((system_rev & rev) ? 1 : 0)
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#define cpu_is_mx37() (0)
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#define board_is_mx37(rev) (0)
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#ifdef CONFIG_ARCH_MX51
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# include <mach/mx51.h>
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# define cpu_is_mx51() (1)
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#define board_is_mx51(rev) ((system_rev & rev) ? 1 : 0)
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/* BB25:Bit8 is set to 1, BB20: Bit8 is set to 0 */
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#define board_is_babbage_2_5() ((system_rev & 0x1FF) >> 8)
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# define cpu_is_mx51() (0)
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#define board_is_mx51(rev) (0)
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#define board_is_babbage_2_5() (0)
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#endif /* CONFIG_ARCH_MX51 */
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#ifdef CONFIG_ARCH_MX21
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#include <mach/mx21.h>
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#define cpu_is_mx21() (1)
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#define cpu_is_mx21() (0)
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#include <mach/mx51.h>
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#ifdef CONFIG_ARCH_MX25
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#include <mach/mx25.h>
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#define cpu_is_mx25() (1)
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#define cpu_is_mx25() (0)
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#ifdef CONFIG_ARCH_MX27
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#include <mach/mx27.h>
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#define cpu_is_mx27() (1)
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#define cpu_is_mx27() (0)
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#ifndef __ASSEMBLY__
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* Create inline functions to test for cpu revision
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* Function name is cpu_is_<cpu name>_rev(rev)
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* 0 - not the cpu queried
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* 1 - cpu and revision match
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* 2 - cpu matches, but cpu revision is greater than queried rev
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* -1 - cpu matches, but cpu revision is less than queried rev
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MXC_REV(cpu_is_mx21);
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MXC_REV(cpu_is_mx25);
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MXC_REV(cpu_is_mx27);
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MXC_REV(cpu_is_mx31);
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MXC_REV(cpu_is_mx32);
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MXC_REV(cpu_is_mx35);
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MXC_REV(cpu_is_mx37);
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MXC_REV(cpu_is_mx51);
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extern unsigned int system_rev;
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#define board_is_rev(rev) (((system_rev & 0x0F00) == rev) ? 1 : 0)
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#include <mach/mxc.h>
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#define MXC_MAX_GPIO_LINES (GPIO_NUM_PIN * GPIO_PORT_NUM)
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#define MXC_EXP_IO_BASE (MXC_MAX_INT_LINES + MXC_MAX_GPIO_LINES)
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#define MXC_MAX_EXP_IO_LINES 16
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#ifdef CONFIG_MXC_PSEUDO_IRQS
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#define MXC_PSEUDO_IO_BASE (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES)
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#define MXC_MAX_PSEUDO_IO_LINES 16
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#define MXC_MAX_PSEUDO_IO_LINES 0
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* Register an interrupt handler for the SMN as well as the SCC. In some
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* implementations, the SMN is not connected at all, and in others, it is
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* on the same interrupt line as the SCM. Comment this line out accordingly
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#define USE_SMN_INTERRUPT
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* This option is used to set or clear the RXDMUXSEL bit in control reg 3.
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* Certain platforms need this bit to be set in order to receive Irda data.
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#define MXC_UART_IR_RXDMUX 0x0004
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* This option is used to set or clear the RXDMUXSEL bit in control reg 3.
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* Certain platforms need this bit to be set in order to receive UART data.
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#define MXC_UART_RXDMUX 0x0004
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#ifndef MXC_INT_FORCE
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#define MXC_INT_FORCE -1
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#define MXC_MAX_INTS (MXC_MAX_INT_LINES + \
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MXC_MAX_GPIO_LINES + \
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MXC_MAX_EXP_IO_LINES + \
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MXC_MAX_PSEUDO_IO_LINES)
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#endif /* __ASM_ARCH_MXC_HARDWARE_H__ */