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* Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved.
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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* Encoder device driver (kernel module)
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* Copyright (C) 2005 Hantro Products Oy.
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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#include <linux/kernel.h>
35
#include <linux/module.h>
36
#include <linux/init.h> /* __init,__exit directives */
37
#include <linux/mm.h> /* remap_page_range / remap_pfn_range */
38
#include <linux/fs.h> /* for struct file_operations */
39
#include <linux/errno.h> /* standard error codes */
40
#include <linux/platform_device.h> /* for device registeration for PM */
41
#include <linux/delay.h> /* for msleep_interruptible */
42
#include <linux/interrupt.h>
43
#include <linux/dma-mapping.h> /* for dma_alloc_consistent */
44
#include <linux/clk.h>
45
#include <asm/uaccess.h> /* for ioctl __get_user, __put_user */
46
#include <mach/hardware.h>
47
#include "mxc_hmp4e.h" /* MPEG4 encoder specific */
49
/* here's all the must remember stuff */
60
u16 type; /* Encoder type, CIF = 0, VGA = 1 */
63
struct fasync_struct *async_queue;
66
wait_queue_head_t power_queue;
70
/* and this is our MAJOR; use 0 for dynamic allocation (recommended)*/
71
static s32 hmp4e_major;
73
static u32 hmp4e_phys;
74
static struct class *hmp4e_class;
75
static hmp4e_t hmp4e_data;
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/*! MPEG4 enc clock handle. */
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static struct clk *hmp4e_clk;
81
* avoid "enable_irq(x) unbalanced from ..."
82
* error messages from the kernel, since {ena,dis}able_irq()
83
* calls are stacked in kernel.
85
static bool irq_enable = false;
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ulong base_port = MPEG4_ENC_BASE_ADDR;
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u32 irq = MXC_INT_MPEG4_ENCODER;
90
module_param(base_port, long, 000);
91
module_param(irq, int, 000);
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* These variables store the register values when HMP4E is in suspend mode.
100
static s32 hmp4e_map_buffer(struct file *filp, struct vm_area_struct *vma);
101
static s32 hmp4e_map_hwregs(struct file *filp, struct vm_area_struct *vma);
102
static void hmp4e_reset(hmp4e_t * dev);
103
irqreturn_t hmp4e_isr(s32 irq, void *dev_id);
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* This funtion is called to write h/w register.
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* @param val value to be written into the register
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* @param offset register offset
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static inline void hmp4e_write(u32 val, u32 offset)
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hmp4e_t *dev = &hmp4e_data;
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__raw_writel(val, (dev->hwregs + offset));
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* This funtion is called to read h/w register.
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* @param offset register offset
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* @return This function returns the value read from the register.
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static inline u32 hmp4e_read(u32 offset)
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hmp4e_t *dev = &hmp4e_data;
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val = __raw_readl(dev->hwregs + offset);
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* The device's mmap method. The VFS has kindly prepared the process's
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* vm_area_struct for us, so we examine this to see what was requested.
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* @param filp pointer to struct file
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* @param vma pointer to struct vma_area_struct
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* @return This function returns 0 if successful or -ve value on error.
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static s32 hmp4e_mmap(struct file *filp, struct vm_area_struct *vma)
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ulong offset = vma->vm_pgoff << PAGE_SHIFT;
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pr_debug("hmp4e_mmap: size = %lu off = 0x%08lx\n",
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(unsigned long)(vma->vm_end - vma->vm_start), offset);
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result = hmp4e_map_buffer(filp, vma);
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} else if (offset == hmp4e_data.iobaseaddr) {
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result = hmp4e_map_hwregs(filp, vma);
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pr_debug("hmp4e: mmap invalid value\n");
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* This funtion is called to handle ioctls.
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* @param inode pointer to struct inode
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* @param filp pointer to struct file
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* @param cmd ioctl command
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* @param arg user data
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* @return This function returns 0 if successful or -ve value on error.
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static s32 hmp4e_ioctl(struct inode *inode, struct file *filp,
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s32 err = 0, retval = 0;
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hmp4e_t *dev = &hmp4e_data;
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wait_event_interruptible(hmp4e_data.power_queue,
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hmp4e_data.suspend_state == 0);
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* extract the type and number bitfields, and don't decode
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* wrong cmds: return ENOTTY (inappropriate ioctl) before access_ok()
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if (_IOC_TYPE(cmd) != HMP4E_IOC_MAGIC) {
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pr_debug("hmp4e: ioctl invalid magic\n");
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if (_IOC_NR(cmd) > HMP4E_IOC_MAXNR) {
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pr_debug("hmp4e: ioctl exceeds max ioctl\n");
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* the direction is a bitmask, and VERIFY_WRITE catches R/W
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* transfers. `Type' is user-oriented, while
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* access_ok is kernel-oriented, so the concept of "read" and
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* "write" is reversed
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if (_IOC_DIR(cmd) & _IOC_READ) {
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err = !access_ok(VERIFY_WRITE, (void *)arg, _IOC_SIZE(cmd));
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} else if (_IOC_DIR(cmd) & _IOC_WRITE) {
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err = !access_ok(VERIFY_READ, (void *)arg, _IOC_SIZE(cmd));
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pr_debug("hmp4e: ioctl invalid direction\n");
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case HMP4E_IOCHARDRESET:
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case HMP4E_IOCGBUFBUSADDRESS:
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retval = __put_user((ulong) hmp4e_phys, (u32 *) arg);
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case HMP4E_IOCGBUFSIZE:
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retval = __put_user(hmp4e_data.buffsize, (u32 *) arg);
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case HMP4E_IOCSREGWRITE:
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if (dev->type != 1) { /* This ioctl only for VGA */
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pr_debug("hmp4e: HMP4E_IOCSREGWRITE invalid\n");
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retval = __copy_from_user(&bwrite, (u32 *) arg,
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if (bwrite.offset <= hmp4e_data.iosize - 4) {
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hmp4e_write(bwrite.data, (bwrite.offset / 4));
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pr_debug("hmp4e: HMP4E_IOCSREGWRITE failed\n");
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case HMP4E_IOCXREGREAD:
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if (dev->type != 1) { /* This ioctl only for VGA */
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pr_debug("hmp4e: HMP4E_IOCSREGWRITE invalid\n");
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retval = __get_user(offset, (ulong *) arg);
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if (offset <= hmp4e_data.iosize - 4) {
260
__put_user(hmp4e_read((offset / 4)), (ulong *) arg);
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pr_debug("hmp4e: HMP4E_IOCXREGREAD failed\n");
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case HMP4E_IOCGHWOFFSET:
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__put_user(hmp4e_data.iobaseaddr, (ulong *) arg);
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case HMP4E_IOCGHWIOSIZE:
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__put_user(hmp4e_data.iosize, (u32 *) arg);
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if (irq_enable == true) {
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disable_irq(hmp4e_data.irq);
283
if (irq_enable == false) {
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enable_irq(hmp4e_data.irq);
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pr_debug("unknown case %x\n", cmd);
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* This funtion is called when the device is opened.
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* @param inode pointer to struct inode
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* @param filp pointer to struct file
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* @return This function returns 0 if successful or -ve value on error.
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static s32 hmp4e_open(struct inode *inode, struct file *filp)
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hmp4e_t *dev = &hmp4e_data;
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filp->private_data = (void *)dev;
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if (request_irq(dev->irq, hmp4e_isr, 0, "mxc_hmp4e", dev) != 0) {
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pr_debug("hmp4e: request irq failed\n");
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if (irq_enable == false) {
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clk_enable(hmp4e_clk);
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static s32 hmp4e_fasync(s32 fd, struct file *filp, s32 mode)
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hmp4e_t *dev = (hmp4e_t *) filp->private_data;
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return fasync_helper(fd, filp, mode, &dev->async_queue);
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* This funtion is called when the device is closed.
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* @param inode pointer to struct inode
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* @param filp pointer to struct file
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* @return This function returns 0.
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static s32 hmp4e_release(struct inode *inode, struct file *filp)
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hmp4e_t *dev = (hmp4e_t *) filp->private_data;
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/* this is necessary if user process exited asynchronously */
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if (irq_enable == true) {
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disable_irq(dev->irq);
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hmp4e_reset(&hmp4e_data);
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/* free the encoder IRQ */
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free_irq(dev->irq, (void *)dev);
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/* remove this filp from the asynchronusly notified filp's */
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hmp4e_fasync(-1, filp, 0);
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clk_disable(hmp4e_clk);
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static struct file_operations hmp4e_fops = {
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.owner = THIS_MODULE,
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.release = hmp4e_release,
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.ioctl = hmp4e_ioctl,
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.fasync = hmp4e_fasync,
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* This funtion allocates physical contigous memory.
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* @param size size of memory to be allocated
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* @return This function returns 0 if successful or -ve value on error.
378
static s32 hmp4e_alloc(u32 size)
380
hmp4e_data.buffsize = PAGE_ALIGN(size);
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hmp4e_data.buffaddr =
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(ulong) dma_alloc_coherent(NULL, hmp4e_data.buffsize,
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(dma_addr_t *) & hmp4e_phys,
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GFP_DMA | GFP_KERNEL);
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if (hmp4e_data.buffaddr == 0) {
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printk(KERN_ERR "hmp4e: couldn't allocate data buffer\n");
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memset((s8 *) hmp4e_data.buffaddr, 0, hmp4e_data.buffsize);
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* This funtion frees the DMAed memory.
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static void hmp4e_free(void)
400
if (hmp4e_data.buffaddr != 0) {
401
dma_free_coherent(NULL, hmp4e_data.buffsize,
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(void *)hmp4e_data.buffaddr, hmp4e_phys);
403
hmp4e_data.buffaddr = 0;
408
* This funtion maps the shared buffer in memory.
410
* @param filp pointer to struct file
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* @param vma pointer to struct vm_area_struct
413
* @return This function returns 0 if successful or -ve value on error.
416
static s32 hmp4e_map_buffer(struct file *filp, struct vm_area_struct *vma)
419
ulong start = (u32) vma->vm_start;
420
ulong size = (u32) (vma->vm_end - vma->vm_start);
422
/* if userspace tries to mmap beyond end of our buffer, fail */
423
if (size > hmp4e_data.buffsize) {
424
pr_debug("hmp4e: hmp4e_map_buffer, invalid size\n");
428
vma->vm_flags |= VM_RESERVED | VM_IO;
429
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
433
if (remap_pfn_range(vma, start, phys >> PAGE_SHIFT, size,
434
vma->vm_page_prot)) {
435
pr_debug("hmp4e: failed mmapping shared buffer\n");
443
* This funtion maps the h/w register space in memory.
445
* @param filp pointer to struct file
446
* @param vma pointer to struct vm_area_struct
448
* @return This function returns 0 if successful or -ve value on error.
451
static s32 hmp4e_map_hwregs(struct file *filp, struct vm_area_struct *vma)
454
ulong start = (unsigned long)vma->vm_start;
455
ulong size = (unsigned long)(vma->vm_end - vma->vm_start);
457
/* if userspace tries to mmap beyond end of our buffer, fail */
458
if (size > PAGE_SIZE) {
459
pr_debug("hmp4e: hmp4e_map_hwregs, invalid size\n");
463
vma->vm_flags |= VM_RESERVED | VM_IO;
464
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
466
/* Remember this won't work for vmalloc()d memory ! */
467
phys = hmp4e_data.iobaseaddr;
469
if (remap_pfn_range(vma, start, phys >> PAGE_SHIFT, hmp4e_data.iosize,
470
vma->vm_page_prot)) {
471
pr_debug("hmp4e: failed mmapping HW registers\n");
479
* This function is the interrupt service routine.
481
* @param irq the irq number
482
* @param dev_id driver data when ISR was regiatered
484
* @return The return value is IRQ_HANDLED.
487
irqreturn_t hmp4e_isr(s32 irq, void *dev_id)
489
hmp4e_t *dev = (hmp4e_t *) dev_id;
490
u32 offset = dev->intr_offset;
492
u32 irq_status = hmp4e_read(offset);
495
hmp4e_write(irq_status & (~0x01), offset);
497
if (dev->async_queue)
498
kill_fasync(&dev->async_queue, SIGIO, POLL_IN);
504
* This function is called to reset the encoder.
506
* @param dev pointer to struct hmp4e_data
509
static void hmp4e_reset(hmp4e_t * dev)
513
/* enable HCLK for register reset */
514
hmp4e_write(dev->clk_gate, 0);
516
/* Reset registers, except ECR0 (0x00) and ID (read-only) */
517
for (i = 1; i < (dev->iosize / 4); i += 1) {
518
if (i == dev->hwid_offset) /* ID is read only */
521
/* Only for CIF, not used */
522
if ((dev->type == 0) && (i == 14))
534
* This function is called during the driver binding process. This function
535
* does the hardware initialization.
537
* @param dev the device structure used to store device specific
538
* information that is used by the suspend, resume and remove
541
* @return The function returns 0 if successful.
543
static s32 hmp4e_probe(struct platform_device *pdev)
547
struct device *temp_class;
549
hmp4e_data.iobaseaddr = base_port;
550
hmp4e_data.irq = irq;
551
hmp4e_data.buffaddr = 0;
553
/* map hw i/o registers into kernel space */
554
hmp4e_data.hwregs = (volatile void *)IO_ADDRESS(hmp4e_data.iobaseaddr);
556
hmp4e_clk = clk_get(&pdev->dev, "mpeg4_clk");
557
if (IS_ERR(hmp4e_clk)) {
558
printk(KERN_INFO "hmp4e: Unable to get clock\n");
562
clk_enable(hmp4e_clk);
564
/* check hw id for encoder signature */
565
hwid = hmp4e_read(7);
566
if ((hwid & 0xffff) == 0x1882) { /* CIF first */
568
hmp4e_data.iosize = (16 * 4);
569
hmp4e_data.hwid_offset = 7;
570
hmp4e_data.intr_offset = 5;
571
hmp4e_data.clk_gate = (1 << 1);
572
hmp4e_data.buffsize = 512000;
573
hmp4e_data.busy_offset = 0;
574
hmp4e_data.busy_val = 1;
576
hwid = hmp4e_read((0x88 / 4));
577
if ((hwid & 0xffff0000) == 0x52510000) { /* VGA */
579
hmp4e_data.iosize = (35 * 4);
580
hmp4e_data.hwid_offset = (0x88 / 4);
581
hmp4e_data.intr_offset = (0x10 / 4);
582
hmp4e_data.clk_gate = (1 << 12);
583
hmp4e_data.buffsize = 1048576;
584
hmp4e_data.busy_offset = (0x10 / 4);
585
hmp4e_data.busy_val = (1 << 1);
587
printk(KERN_INFO "hmp4e: HW ID not found\n");
593
hmp4e_reset(&hmp4e_data);
595
/* allocate memory shared with ewl */
596
result = hmp4e_alloc(hmp4e_data.buffsize);
600
result = register_chrdev(hmp4e_major, "hmp4e", &hmp4e_fops);
602
pr_debug("hmp4e: unable to get major %d\n", hmp4e_major);
606
hmp4e_major = result;
608
hmp4e_class = class_create(THIS_MODULE, "hmp4e");
609
if (IS_ERR(hmp4e_class)) {
610
pr_debug("Error creating hmp4e class.\n");
614
temp_class = device_create(hmp4e_class, NULL, MKDEV(hmp4e_major, 0), NULL,
616
if (IS_ERR(temp_class)) {
617
pr_debug("Error creating hmp4e class device.\n");
621
platform_set_drvdata(pdev, &hmp4e_data);
624
hmp4e_data.async_queue = NULL;
625
hmp4e_data.suspend_state = 0;
626
init_waitqueue_head(&hmp4e_data.power_queue);
629
printk(KERN_INFO "hmp4e: %s encoder initialized\n",
630
hmp4e_data.type ? "VGA" : "CIF");
631
clk_disable(hmp4e_clk);
635
class_destroy(hmp4e_class);
637
unregister_chrdev(hmp4e_major, "hmp4e");
641
clk_disable(hmp4e_clk);
643
printk(KERN_INFO "hmp4e: module not inserted\n");
648
* Dissociates the driver.
650
* @param dev the device structure
652
* @return The function always returns 0.
654
static s32 hmp4e_remove(struct platform_device *pdev)
656
device_destroy(hmp4e_class, MKDEV(hmp4e_major, 0));
657
class_destroy(hmp4e_class);
658
unregister_chrdev(hmp4e_major, "hmp4e");
660
clk_disable(hmp4e_clk);
662
platform_set_drvdata(pdev, NULL);
668
* This is the suspend of power management for the Hantro MPEG4 module
670
* @param dev the device
671
* @param state the state
673
* @return This function always returns 0.
675
static s32 hmp4e_suspend(struct platform_device *pdev, pm_message_t state)
678
hmp4e_t *pdata = &hmp4e_data;
681
* how many times msleep_interruptible will be called before
686
pr_debug("hmp4e: Suspend\n");
687
hmp4e_data.suspend_state = 1;
689
/* check if encoder is currently running */
690
while ((hmp4e_read(pdata->busy_offset) & (pdata->busy_val)) &&
692
pr_debug("hmp4e: encoder is running, going to sleep\n");
693
msleep_interruptible((unsigned int)30);
697
pr_debug("hmp4e: timeout suspending, resetting encoder\n");
698
hmp4e_write(hmp4e_read(pdata->busy_offset) &
699
(~pdata->busy_val), pdata->busy_offset);
702
/* first read register 0 */
703
io_regs[0] = hmp4e_read(0);
705
/* then override HCLK to make sure other registers can be read */
706
hmp4e_write(pdata->clk_gate, 0);
708
/* read other registers */
709
for (i = 1; i < (pdata->iosize / 4); i += 1) {
711
/* Only for CIF, not used */
712
if ((pdata->type == 0) && (i == 14))
715
io_regs[i] = hmp4e_read(i);
718
/* restore value of register 0 */
719
hmp4e_write(io_regs[0], 0);
723
clk_disable(hmp4e_clk);
728
* This is the resume of power management for the Hantro MPEG4 module
729
* It suports RESTORE state.
731
* @param pdev the platform device
733
* @return This function always returns 0
735
static s32 hmp4e_resume(struct platform_device *pdev)
739
hmp4e_t *pdata = &hmp4e_data;
741
pr_debug("hmp4e: Resume\n");
742
clk_enable(hmp4e_clk);
744
/* override HCLK to make sure registers can be written */
745
hmp4e_write(pdata->clk_gate, 0x00);
747
for (i = 1; i < (pdata->iosize / 4); i += 1) {
748
if (i == pdata->hwid_offset) /* Read only */
751
/* Only for CIF, not used */
752
if ((pdata->type == 0) && (i == 14))
755
hmp4e_write(io_regs[i], i);
758
/* write register 0 last */
759
hmp4e_write(io_regs[0], 0x00);
761
/* Clear the suspend flag */
762
hmp4e_data.suspend_state = 0;
764
/* Unblock the wait queue */
765
wake_up_interruptible(&hmp4e_data.power_queue);
767
/* Continue operations */
768
status = hmp4e_read(pdata->intr_offset);
770
hmp4e_write(status & (~0x01), pdata->intr_offset);
771
if (hmp4e_data.async_queue)
772
kill_fasync(&hmp4e_data.async_queue, SIGIO, POLL_IN);
780
static struct platform_driver hmp4e_driver = {
784
.probe = hmp4e_probe,
785
.remove = hmp4e_remove,
787
.suspend = hmp4e_suspend,
788
.resume = hmp4e_resume,
792
static s32 __init hmp4e_init(void)
794
printk(KERN_INFO "hmp4e: init\n");
795
platform_driver_register(&hmp4e_driver);
799
static void __exit hmp4e_cleanup(void)
801
platform_driver_unregister(&hmp4e_driver);
802
printk(KERN_INFO "hmp4e: module removed\n");
805
module_init(hmp4e_init);
806
module_exit(hmp4e_cleanup);
808
/* module description */
809
MODULE_AUTHOR("Hantro Products Oy");
810
MODULE_DESCRIPTION("Device driver for Hantro's hardware based MPEG4 encoder");
811
MODULE_SUPPORTED_DEVICE("5251/4251 MPEG4 Encoder");
812
MODULE_LICENSE("GPL");
added
removed
drivers/mxc/hmp4e/mxc_hmp4e.c
