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Viewing changes to arch/arm/mach-omap2/devices.c

  • Committer: Bazaar Package Importer
  • Author(s): John Rigby, Upstream Fixes, Andy Green, John Rigby
  • Date: 2011-04-14 12:16:06 UTC
  • Revision ID: james.westby@ubuntu.com-20110414121606-b77podkyqgr2oix7
Tags: 2.6.38-1002.3
https://launchpad.net/bugs/745737
https://launchpad.net/bugs/747639
https://launchpad.net/bugs/752900
https://launchpad.net/bugs/745737
https://launchpad.net/bugs/732842
https://launchpad.net/bugs/732912
[ Upstream Fixes ]

* MUSB: shutdown: Make sure block is awake before doing shutdown
  - LP: #745737
* Fixed gpio polarity of gpio USB-phy reset.
  - LP: #747639

[ Andy Green ]

* LINARO: SAUCE: disable CONFIG_OMAP_RESET_CLOCKS
  - LP: #752900

[ John Rigby ]

* Rebase to new upstreams:
  Linux v2.6.38.1
  linaro-linux-2.6.38-upstream-29Mar2011
  Ubuntu-2.6.38-7.35
* SAUCE: OMAP4: clock: wait for module to become accessible on
  a clk enable
  - LP: #745737
* Rebase to new upstreams:
  Linux v2.6.38.2
  linaro-linux-2.6.38-upstream-5Apr2011
  Ubuntu-2.6.38-8.41
  - LP: #732842
* Update configs for device tree, dvfs and lttng
* LINARO: add building of dtb's
* LINARO: SAUCE: Disable lowest operating freqs on omap34xx
  - LP: #732912

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Lines of Context:
arch/arm/mach-omap2/devices.c
15
15
#include <linux/io.h>
16
16
#include <linux/clk.h>
17
17
#include <linux/err.h>
 
18
#include <linux/slab.h>
18
19
 
19
20
#include <mach/hardware.h>
20
21
#include <mach/irqs.h>
30
31
#include <plat/dma.h>
31
32
#include <plat/omap_hwmod.h>
32
33
#include <plat/omap_device.h>
 
34
#include <plat/omap4-keypad.h>
33
35
 
34
36
#include "mux.h"
35
37
#include "control.h"
36
38
 
 
39
#define L3_MODULES_MAX_LEN 12
 
40
#define L3_MODULES 3
 
41
 
 
42
static int __init omap3_l3_init(void)
 
43
{
 
44
        int l;
 
45
        struct omap_hwmod *oh;
 
46
        struct omap_device *od;
 
47
        char oh_name[L3_MODULES_MAX_LEN];
 
48
 
 
49
        /*
 
50
         * To avoid code running on other OMAPs in
 
51
         * multi-omap builds
 
52
         */
 
53
        if (!(cpu_is_omap34xx()))
 
54
                return -ENODEV;
 
55
 
 
56
        l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
 
57
 
 
58
        oh = omap_hwmod_lookup(oh_name);
 
59
 
 
60
        if (!oh)
 
61
                pr_err("could not look up %s\n", oh_name);
 
62
 
 
63
        od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
 
64
                                                           NULL, 0, 0);
 
65
 
 
66
        WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
 
67
 
 
68
        return IS_ERR(od) ? PTR_ERR(od) : 0;
 
69
}
 
70
postcore_initcall(omap3_l3_init);
 
71
 
 
72
static int __init omap4_l3_init(void)
 
73
{
 
74
        int l, i;
 
75
        struct omap_hwmod *oh[3];
 
76
        struct omap_device *od;
 
77
        char oh_name[L3_MODULES_MAX_LEN];
 
78
 
 
79
        /*
 
80
         * To avoid code running on other OMAPs in
 
81
         * multi-omap builds
 
82
         */
 
83
        if (!(cpu_is_omap44xx()))
 
84
                return -ENODEV;
 
85
 
 
86
        for (i = 0; i < L3_MODULES; i++) {
 
87
                l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
 
88
 
 
89
                oh[i] = omap_hwmod_lookup(oh_name);
 
90
                if (!(oh[i]))
 
91
                        pr_err("could not look up %s\n", oh_name);
 
92
        }
 
93
 
 
94
        od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
 
95
                                                     0, NULL, 0, 0);
 
96
 
 
97
        WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
 
98
 
 
99
        return PTR_ERR(od);
 
100
}
 
101
postcore_initcall(omap4_l3_init);
 
102
 
37
103
#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
38
104
 
39
105
static struct resource cam_resources[] = {
141
207
}
142
208
#endif
143
209
 
 
210
struct omap_device_pm_latency omap_keyboard_latency[] = {
 
211
        {
 
212
                .deactivate_func = omap_device_idle_hwmods,
 
213
                .activate_func   = omap_device_enable_hwmods,
 
214
                .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
 
215
        },
 
216
};
 
217
 
 
218
int __init omap4_keyboard_init(struct omap4_keypad_platform_data
 
219
                                                *sdp4430_keypad_data)
 
220
{
 
221
        struct omap_device *od;
 
222
        struct omap_hwmod *oh;
 
223
        struct omap4_keypad_platform_data *keypad_data;
 
224
        unsigned int id = -1;
 
225
        char *oh_name = "kbd";
 
226
        char *name = "omap4-keypad";
 
227
 
 
228
        oh = omap_hwmod_lookup(oh_name);
 
229
        if (!oh) {
 
230
                pr_err("Could not look up %s\n", oh_name);
 
231
                return -ENODEV;
 
232
        }
 
233
 
 
234
        keypad_data = sdp4430_keypad_data;
 
235
 
 
236
        od = omap_device_build(name, id, oh, keypad_data,
 
237
                        sizeof(struct omap4_keypad_platform_data),
 
238
                        omap_keyboard_latency,
 
239
                        ARRAY_SIZE(omap_keyboard_latency), 0);
 
240
 
 
241
        if (IS_ERR(od)) {
 
242
                WARN(1, "Cant build omap_device for %s:%s.\n",
 
243
                                                name, oh->name);
 
244
                return PTR_ERR(od);
 
245
        }
 
246
 
 
247
        return 0;
 
248
}
 
249
 
144
250
#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
145
 
 
146
 
#define MBOX_REG_SIZE   0x120
147
 
 
148
 
#ifdef CONFIG_ARCH_OMAP2
149
 
static struct resource omap2_mbox_resources[] = {
150
 
        {
151
 
                .start          = OMAP24XX_MAILBOX_BASE,
152
 
                .end            = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
153
 
                .flags          = IORESOURCE_MEM,
154
 
        },
155
 
        {
156
 
                .start          = INT_24XX_MAIL_U0_MPU,
157
 
                .flags          = IORESOURCE_IRQ,
158
 
                .name           = "dsp",
159
 
        },
160
 
        {
161
 
                .start          = INT_24XX_MAIL_U3_MPU,
162
 
                .flags          = IORESOURCE_IRQ,
163
 
                .name           = "iva",
164
 
        },
165
 
};
166
 
static int omap2_mbox_resources_sz = ARRAY_SIZE(omap2_mbox_resources);
167
 
#else
168
 
#define omap2_mbox_resources            NULL
169
 
#define omap2_mbox_resources_sz         0
170
 
#endif
171
 
 
172
 
#ifdef CONFIG_ARCH_OMAP3
173
 
static struct resource omap3_mbox_resources[] = {
174
 
        {
175
 
                .start          = OMAP34XX_MAILBOX_BASE,
176
 
                .end            = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
177
 
                .flags          = IORESOURCE_MEM,
178
 
        },
179
 
        {
180
 
                .start          = INT_24XX_MAIL_U0_MPU,
181
 
                .flags          = IORESOURCE_IRQ,
182
 
                .name           = "dsp",
183
 
        },
184
 
};
185
 
static int omap3_mbox_resources_sz = ARRAY_SIZE(omap3_mbox_resources);
186
 
#else
187
 
#define omap3_mbox_resources            NULL
188
 
#define omap3_mbox_resources_sz         0
189
 
#endif
190
 
 
191
 
#ifdef CONFIG_ARCH_OMAP4
192
 
 
193
 
#define OMAP4_MBOX_REG_SIZE     0x130
194
 
static struct resource omap4_mbox_resources[] = {
195
 
        {
196
 
                .start          = OMAP44XX_MAILBOX_BASE,
197
 
                .end            = OMAP44XX_MAILBOX_BASE +
198
 
                                        OMAP4_MBOX_REG_SIZE - 1,
199
 
                .flags          = IORESOURCE_MEM,
200
 
        },
201
 
        {
202
 
                .start          = OMAP44XX_IRQ_MAIL_U0,
203
 
                .flags          = IORESOURCE_IRQ,
204
 
                .name           = "mbox",
205
 
        },
206
 
};
207
 
static int omap4_mbox_resources_sz = ARRAY_SIZE(omap4_mbox_resources);
208
 
#else
209
 
#define omap4_mbox_resources            NULL
210
 
#define omap4_mbox_resources_sz         0
211
 
#endif
212
 
 
213
 
static struct platform_device mbox_device = {
214
 
        .name           = "omap-mailbox",
215
 
        .id             = -1,
 
251
static struct omap_device_pm_latency mbox_latencies[] = {
 
252
        [0] = {
 
253
                .activate_func = omap_device_enable_hwmods,
 
254
                .deactivate_func = omap_device_idle_hwmods,
 
255
                .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
 
256
        },
216
257
};
217
258
 
218
259
static inline void omap_init_mbox(void)
219
260
{
220
 
        if (cpu_is_omap24xx()) {
221
 
                mbox_device.resource = omap2_mbox_resources;
222
 
                mbox_device.num_resources = omap2_mbox_resources_sz;
223
 
        } else if (cpu_is_omap34xx()) {
224
 
                mbox_device.resource = omap3_mbox_resources;
225
 
                mbox_device.num_resources = omap3_mbox_resources_sz;
226
 
        } else if (cpu_is_omap44xx()) {
227
 
                mbox_device.resource = omap4_mbox_resources;
228
 
                mbox_device.num_resources = omap4_mbox_resources_sz;
229
 
        } else {
230
 
                pr_err("%s: platform not supported\n", __func__);
 
261
        struct omap_hwmod *oh;
 
262
        struct omap_device *od;
 
263
 
 
264
        oh = omap_hwmod_lookup("mailbox");
 
265
        if (!oh) {
 
266
                pr_err("%s: unable to find hwmod\n", __func__);
231
267
                return;
232
268
        }
233
 
        platform_device_register(&mbox_device);
 
269
 
 
270
        od = omap_device_build("omap-mailbox", -1, oh, NULL, 0,
 
271
                                mbox_latencies, ARRAY_SIZE(mbox_latencies), 0);
 
272
        WARN(IS_ERR(od), "%s: could not build device, err %ld\n",
 
273
                                                __func__, PTR_ERR(od));
234
274
}
235
275
#else
236
276
static inline void omap_init_mbox(void) { }
279
319
 
280
320
#include <plat/mcspi.h>
281
321
 
282
 
#define OMAP2_MCSPI1_BASE               0x48098000
283
 
#define OMAP2_MCSPI2_BASE               0x4809a000
284
 
#define OMAP2_MCSPI3_BASE               0x480b8000
285
 
#define OMAP2_MCSPI4_BASE               0x480ba000
286
 
 
287
 
#define OMAP4_MCSPI1_BASE               0x48098100
288
 
#define OMAP4_MCSPI2_BASE               0x4809a100
289
 
#define OMAP4_MCSPI3_BASE               0x480b8100
290
 
#define OMAP4_MCSPI4_BASE               0x480ba100
291
 
 
292
 
static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
293
 
        .num_cs         = 4,
294
 
};
295
 
 
296
 
static struct resource omap2_mcspi1_resources[] = {
297
 
        {
298
 
                .start          = OMAP2_MCSPI1_BASE,
299
 
                .end            = OMAP2_MCSPI1_BASE + 0xff,
300
 
                .flags          = IORESOURCE_MEM,
301
 
        },
302
 
};
303
 
 
304
 
static struct platform_device omap2_mcspi1 = {
305
 
        .name           = "omap2_mcspi",
306
 
        .id             = 1,
307
 
        .num_resources  = ARRAY_SIZE(omap2_mcspi1_resources),
308
 
        .resource       = omap2_mcspi1_resources,
309
 
        .dev            = {
310
 
                .platform_data = &omap2_mcspi1_config,
311
 
        },
312
 
};
313
 
 
314
 
static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
315
 
        .num_cs         = 2,
316
 
};
317
 
 
318
 
static struct resource omap2_mcspi2_resources[] = {
319
 
        {
320
 
                .start          = OMAP2_MCSPI2_BASE,
321
 
                .end            = OMAP2_MCSPI2_BASE + 0xff,
322
 
                .flags          = IORESOURCE_MEM,
323
 
        },
324
 
};
325
 
 
326
 
static struct platform_device omap2_mcspi2 = {
327
 
        .name           = "omap2_mcspi",
328
 
        .id             = 2,
329
 
        .num_resources  = ARRAY_SIZE(omap2_mcspi2_resources),
330
 
        .resource       = omap2_mcspi2_resources,
331
 
        .dev            = {
332
 
                .platform_data = &omap2_mcspi2_config,
333
 
        },
334
 
};
335
 
 
336
 
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
337
 
        defined(CONFIG_ARCH_OMAP4)
338
 
static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
339
 
        .num_cs         = 2,
340
 
};
341
 
 
342
 
static struct resource omap2_mcspi3_resources[] = {
343
 
        {
344
 
        .start          = OMAP2_MCSPI3_BASE,
345
 
        .end            = OMAP2_MCSPI3_BASE + 0xff,
346
 
        .flags          = IORESOURCE_MEM,
347
 
        },
348
 
};
349
 
 
350
 
static struct platform_device omap2_mcspi3 = {
351
 
        .name           = "omap2_mcspi",
352
 
        .id             = 3,
353
 
        .num_resources  = ARRAY_SIZE(omap2_mcspi3_resources),
354
 
        .resource       = omap2_mcspi3_resources,
355
 
        .dev            = {
356
 
                .platform_data = &omap2_mcspi3_config,
357
 
        },
358
 
};
359
 
#endif
360
 
 
361
 
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
362
 
static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
363
 
        .num_cs         = 1,
364
 
};
365
 
 
366
 
static struct resource omap2_mcspi4_resources[] = {
367
 
        {
368
 
                .start          = OMAP2_MCSPI4_BASE,
369
 
                .end            = OMAP2_MCSPI4_BASE + 0xff,
370
 
                .flags          = IORESOURCE_MEM,
371
 
        },
372
 
};
373
 
 
374
 
static struct platform_device omap2_mcspi4 = {
375
 
        .name           = "omap2_mcspi",
376
 
        .id             = 4,
377
 
        .num_resources  = ARRAY_SIZE(omap2_mcspi4_resources),
378
 
        .resource       = omap2_mcspi4_resources,
379
 
        .dev            = {
380
 
                .platform_data = &omap2_mcspi4_config,
381
 
        },
382
 
};
383
 
#endif
384
 
 
385
 
#ifdef CONFIG_ARCH_OMAP4
386
 
static inline void omap4_mcspi_fixup(void)
387
 
{
388
 
        omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE;
389
 
        omap2_mcspi1_resources[0].end   = OMAP4_MCSPI1_BASE + 0xff;
390
 
        omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE;
391
 
        omap2_mcspi2_resources[0].end   = OMAP4_MCSPI2_BASE + 0xff;
392
 
        omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE;
393
 
        omap2_mcspi3_resources[0].end   = OMAP4_MCSPI3_BASE + 0xff;
394
 
        omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE;
395
 
        omap2_mcspi4_resources[0].end   = OMAP4_MCSPI4_BASE + 0xff;
396
 
}
397
 
#else
398
 
static inline void omap4_mcspi_fixup(void)
399
 
{
400
 
}
401
 
#endif
402
 
 
403
 
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
404
 
        defined(CONFIG_ARCH_OMAP4)
405
 
static inline void omap2_mcspi3_init(void)
406
 
{
407
 
        platform_device_register(&omap2_mcspi3);
408
 
}
409
 
#else
410
 
static inline void omap2_mcspi3_init(void)
411
 
{
412
 
}
413
 
#endif
414
 
 
415
 
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
416
 
static inline void omap2_mcspi4_init(void)
417
 
{
418
 
        platform_device_register(&omap2_mcspi4);
419
 
}
420
 
#else
421
 
static inline void omap2_mcspi4_init(void)
422
 
{
423
 
}
424
 
#endif
 
322
struct omap_device_pm_latency omap_mcspi_latency[] = {
 
323
        [0] = {
 
324
                .deactivate_func = omap_device_idle_hwmods,
 
325
                .activate_func   = omap_device_enable_hwmods,
 
326
                .flags           = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
 
327
        },
 
328
};
 
329
 
 
330
static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
 
331
{
 
332
        struct omap_device *od;
 
333
        char *name = "omap2_mcspi";
 
334
        struct omap2_mcspi_platform_config *pdata;
 
335
        static int spi_num;
 
336
        struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
 
337
 
 
338
        pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
 
339
        if (!pdata) {
 
340
                pr_err("Memory allocation for McSPI device failed\n");
 
341
                return -ENOMEM;
 
342
        }
 
343
 
 
344
        pdata->num_cs = mcspi_attrib->num_chipselect;
 
345
        switch (oh->class->rev) {
 
346
        case OMAP2_MCSPI_REV:
 
347
        case OMAP3_MCSPI_REV:
 
348
                        pdata->regs_offset = 0;
 
349
                        break;
 
350
        case OMAP4_MCSPI_REV:
 
351
                        pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
 
352
                        break;
 
353
        default:
 
354
                        pr_err("Invalid McSPI Revision value\n");
 
355
                        return -EINVAL;
 
356
        }
 
357
 
 
358
        spi_num++;
 
359
        od = omap_device_build(name, spi_num, oh, pdata,
 
360
                                sizeof(*pdata), omap_mcspi_latency,
 
361
                                ARRAY_SIZE(omap_mcspi_latency), 0);
 
362
        WARN(IS_ERR(od), "Cant build omap_device for %s:%s\n",
 
363
                                name, oh->name);
 
364
        kfree(pdata);
 
365
        return 0;
 
366
}
425
367
 
426
368
static void omap_init_mcspi(void)
427
369
{
428
 
        if (cpu_is_omap44xx())
429
 
                omap4_mcspi_fixup();
430
 
 
431
 
        platform_device_register(&omap2_mcspi1);
432
 
        platform_device_register(&omap2_mcspi2);
433
 
 
434
 
        if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx())
435
 
                omap2_mcspi3_init();
436
 
 
437
 
        if (cpu_is_omap343x() || cpu_is_omap44xx())
438
 
                omap2_mcspi4_init();
 
370
        omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
439
371
}
440
372
 
441
373
#else
610
542
 
611
543
/*-------------------------------------------------------------------------*/
612
544
 
613
 
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
614
 
 
615
 
#define MMCHS_SYSCONFIG                 0x0010
616
 
#define MMCHS_SYSCONFIG_SWRESET         (1 << 1)
617
 
#define MMCHS_SYSSTATUS                 0x0014
618
 
#define MMCHS_SYSSTATUS_RESETDONE       (1 << 0)
619
 
 
620
 
static struct platform_device dummy_pdev = {
621
 
        .dev = {
622
 
                .bus = &platform_bus_type,
623
 
        },
624
 
};
625
 
 
626
 
/**
627
 
 * omap_hsmmc_reset() - Full reset of each HS-MMC controller
628
 
 *
629
 
 * Ensure that each MMC controller is fully reset.  Controllers
630
 
 * left in an unknown state (by bootloader) may prevent retention
631
 
 * or OFF-mode.  This is especially important in cases where the
632
 
 * MMC driver is not enabled, _or_ built as a module.
633
 
 *
634
 
 * In order for reset to work, interface, functional and debounce
635
 
 * clocks must be enabled.  The debounce clock comes from func_32k_clk
636
 
 * and is not under SW control, so we only enable i- and f-clocks.
637
 
 **/
638
 
static void __init omap_hsmmc_reset(void)
639
 
{
640
 
        u32 i, nr_controllers;
641
 
        struct clk *iclk, *fclk;
642
 
 
643
 
        if (cpu_is_omap242x())
644
 
                return;
645
 
 
646
 
        nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC :
647
 
                (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC);
648
 
 
649
 
        for (i = 0; i < nr_controllers; i++) {
650
 
                u32 v, base = 0;
651
 
                struct device *dev = &dummy_pdev.dev;
652
 
 
653
 
                switch (i) {
654
 
                case 0:
655
 
                        base = OMAP2_MMC1_BASE;
656
 
                        break;
657
 
                case 1:
658
 
                        base = OMAP2_MMC2_BASE;
659
 
                        break;
660
 
                case 2:
661
 
                        base = OMAP3_MMC3_BASE;
662
 
                        break;
663
 
                case 3:
664
 
                        if (!cpu_is_omap44xx())
665
 
                                return;
666
 
                        base = OMAP4_MMC4_BASE;
667
 
                        break;
668
 
                case 4:
669
 
                        if (!cpu_is_omap44xx())
670
 
                                return;
671
 
                        base = OMAP4_MMC5_BASE;
672
 
                        break;
673
 
                }
674
 
 
675
 
                if (cpu_is_omap44xx())
676
 
                        base += OMAP4_MMC_REG_OFFSET;
677
 
 
678
 
                dummy_pdev.id = i;
679
 
                dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
680
 
                iclk = clk_get(dev, "ick");
681
 
                if (IS_ERR(iclk))
682
 
                        goto err1;
683
 
                if (clk_enable(iclk))
684
 
                        goto err2;
685
 
 
686
 
                fclk = clk_get(dev, "fck");
687
 
                if (IS_ERR(fclk))
688
 
                        goto err3;
689
 
                if (clk_enable(fclk))
690
 
                        goto err4;
691
 
 
692
 
                omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
693
 
                v = omap_readl(base + MMCHS_SYSSTATUS);
694
 
                while (!(omap_readl(base + MMCHS_SYSSTATUS) &
695
 
                         MMCHS_SYSSTATUS_RESETDONE))
696
 
                        cpu_relax();
697
 
 
698
 
                clk_disable(fclk);
699
 
                clk_put(fclk);
700
 
                clk_disable(iclk);
701
 
                clk_put(iclk);
702
 
        }
703
 
        return;
704
 
 
705
 
err4:
706
 
        clk_put(fclk);
707
 
err3:
708
 
        clk_disable(iclk);
709
 
err2:
710
 
        clk_put(iclk);
711
 
err1:
712
 
        printk(KERN_WARNING "%s: Unable to enable clocks for MMC%d, "
713
 
                            "cannot reset.\n",  __func__, i);
714
 
}
715
 
#else
716
 
static inline void omap_hsmmc_reset(void) {}
717
 
#endif
718
 
 
719
 
#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
720
 
        defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
721
 
 
722
 
static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
723
 
                        int controller_nr)
 
545
#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
 
546
 
 
547
static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
 
548
                                                        *mmc_controller)
724
549
{
725
550
        if ((mmc_controller->slots[0].switch_pin > 0) && \
726
551
                (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
731
556
                omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
732
557
                                        OMAP_PIN_INPUT_PULLUP);
733
558
 
734
 
        if (cpu_is_omap2420() && controller_nr == 0) {
735
 
                omap_mux_init_signal("sdmmc_cmd", 0);
736
 
                omap_mux_init_signal("sdmmc_clki", 0);
737
 
                omap_mux_init_signal("sdmmc_clko", 0);
738
 
                omap_mux_init_signal("sdmmc_dat0", 0);
739
 
                omap_mux_init_signal("sdmmc_dat_dir0", 0);
740
 
                omap_mux_init_signal("sdmmc_cmd_dir", 0);
741
 
                if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
742
 
                        omap_mux_init_signal("sdmmc_dat1", 0);
743
 
                        omap_mux_init_signal("sdmmc_dat2", 0);
744
 
                        omap_mux_init_signal("sdmmc_dat3", 0);
745
 
                        omap_mux_init_signal("sdmmc_dat_dir1", 0);
746
 
                        omap_mux_init_signal("sdmmc_dat_dir2", 0);
747
 
                        omap_mux_init_signal("sdmmc_dat_dir3", 0);
748
 
                }
749
 
 
750
 
                /*
751
 
                 * Use internal loop-back in MMC/SDIO Module Input Clock
752
 
                 * selection
753
 
                 */
754
 
                if (mmc_controller->slots[0].internal_clock) {
755
 
                        u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
756
 
                        v |= (1 << 24);
757
 
                        omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
758
 
                }
 
559
        omap_mux_init_signal("sdmmc_cmd", 0);
 
560
        omap_mux_init_signal("sdmmc_clki", 0);
 
561
        omap_mux_init_signal("sdmmc_clko", 0);
 
562
        omap_mux_init_signal("sdmmc_dat0", 0);
 
563
        omap_mux_init_signal("sdmmc_dat_dir0", 0);
 
564
        omap_mux_init_signal("sdmmc_cmd_dir", 0);
 
565
        if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
 
566
                omap_mux_init_signal("sdmmc_dat1", 0);
 
567
                omap_mux_init_signal("sdmmc_dat2", 0);
 
568
                omap_mux_init_signal("sdmmc_dat3", 0);
 
569
                omap_mux_init_signal("sdmmc_dat_dir1", 0);
 
570
                omap_mux_init_signal("sdmmc_dat_dir2", 0);
 
571
                omap_mux_init_signal("sdmmc_dat_dir3", 0);
759
572
        }
760
573
 
761
 
        if (cpu_is_omap34xx()) {
762
 
                if (controller_nr == 0) {
763
 
                        omap_mux_init_signal("sdmmc1_clk",
764
 
                                OMAP_PIN_INPUT_PULLUP);
765
 
                        omap_mux_init_signal("sdmmc1_cmd",
766
 
                                OMAP_PIN_INPUT_PULLUP);
767
 
                        omap_mux_init_signal("sdmmc1_dat0",
768
 
                                OMAP_PIN_INPUT_PULLUP);
769
 
                        if (mmc_controller->slots[0].caps &
770
 
                                (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) {
771
 
                                omap_mux_init_signal("sdmmc1_dat1",
772
 
                                        OMAP_PIN_INPUT_PULLUP);
773
 
                                omap_mux_init_signal("sdmmc1_dat2",
774
 
                                        OMAP_PIN_INPUT_PULLUP);
775
 
                                omap_mux_init_signal("sdmmc1_dat3",
776
 
                                        OMAP_PIN_INPUT_PULLUP);
777
 
                        }
778
 
                        if (mmc_controller->slots[0].caps &
779
 
                                                MMC_CAP_8_BIT_DATA) {
780
 
                                omap_mux_init_signal("sdmmc1_dat4",
781
 
                                        OMAP_PIN_INPUT_PULLUP);
782
 
                                omap_mux_init_signal("sdmmc1_dat5",
783
 
                                        OMAP_PIN_INPUT_PULLUP);
784
 
                                omap_mux_init_signal("sdmmc1_dat6",
785
 
                                        OMAP_PIN_INPUT_PULLUP);
786
 
                                omap_mux_init_signal("sdmmc1_dat7",
787
 
                                        OMAP_PIN_INPUT_PULLUP);
788
 
                        }
789
 
                }
790
 
                if (controller_nr == 1) {
791
 
                        /* MMC2 */
792
 
                        omap_mux_init_signal("sdmmc2_clk",
793
 
                                OMAP_PIN_INPUT_PULLUP);
794
 
                        omap_mux_init_signal("sdmmc2_cmd",
795
 
                                OMAP_PIN_INPUT_PULLUP);
796
 
                        omap_mux_init_signal("sdmmc2_dat0",
797
 
                                OMAP_PIN_INPUT_PULLUP);
798
 
 
799
 
                        /*
800
 
                         * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
801
 
                         * in the board-*.c files
802
 
                         */
803
 
                        if (mmc_controller->slots[0].caps &
804
 
                                (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) {
805
 
                                omap_mux_init_signal("sdmmc2_dat1",
806
 
                                        OMAP_PIN_INPUT_PULLUP);
807
 
                                omap_mux_init_signal("sdmmc2_dat2",
808
 
                                        OMAP_PIN_INPUT_PULLUP);
809
 
                                omap_mux_init_signal("sdmmc2_dat3",
810
 
                                        OMAP_PIN_INPUT_PULLUP);
811
 
                        }
812
 
                        if (mmc_controller->slots[0].caps &
813
 
                                                        MMC_CAP_8_BIT_DATA) {
814
 
                                omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4",
815
 
                                        OMAP_PIN_INPUT_PULLUP);
816
 
                                omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5",
817
 
                                        OMAP_PIN_INPUT_PULLUP);
818
 
                                omap_mux_init_signal("sdmmc2_dat6.sdmmc2_dat6",
819
 
                                        OMAP_PIN_INPUT_PULLUP);
820
 
                                omap_mux_init_signal("sdmmc2_dat7.sdmmc2_dat7",
821
 
                                        OMAP_PIN_INPUT_PULLUP);
822
 
                        }
823
 
                }
824
 
 
825
 
                /*
826
 
                 * For MMC3 the pins need to be muxed in the board-*.c files
827
 
                 */
 
574
        /*
 
575
         * Use internal loop-back in MMC/SDIO Module Input Clock
 
576
         * selection
 
577
         */
 
578
        if (mmc_controller->slots[0].internal_clock) {
 
579
                u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 
580
                v |= (1 << 24);
 
581
                omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
828
582
        }
829
583
}
830
584
 
831
 
void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
832
 
                        int nr_controllers)
 
585
void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
833
586
{
834
 
        int i;
835
 
        char *name;
836
 
 
837
 
        for (i = 0; i < nr_controllers; i++) {
838
 
                unsigned long base, size;
839
 
                unsigned int irq = 0;
840
 
 
841
 
                if (!mmc_data[i])
842
 
                        continue;
843
 
 
844
 
                omap2_mmc_mux(mmc_data[i], i);
845
 
 
846
 
                switch (i) {
847
 
                case 0:
848
 
                        base = OMAP2_MMC1_BASE;
849
 
                        irq = INT_24XX_MMC_IRQ;
850
 
                        break;
851
 
                case 1:
852
 
                        base = OMAP2_MMC2_BASE;
853
 
                        irq = INT_24XX_MMC2_IRQ;
854
 
                        break;
855
 
                case 2:
856
 
                        if (!cpu_is_omap44xx() && !cpu_is_omap34xx())
857
 
                                return;
858
 
                        base = OMAP3_MMC3_BASE;
859
 
                        irq = INT_34XX_MMC3_IRQ;
860
 
                        break;
861
 
                case 3:
862
 
                        if (!cpu_is_omap44xx())
863
 
                                return;
864
 
                        base = OMAP4_MMC4_BASE;
865
 
                        irq = OMAP44XX_IRQ_MMC4;
866
 
                        break;
867
 
                case 4:
868
 
                        if (!cpu_is_omap44xx())
869
 
                                return;
870
 
                        base = OMAP4_MMC5_BASE;
871
 
                        irq = OMAP44XX_IRQ_MMC5;
872
 
                        break;
873
 
                default:
874
 
                        continue;
875
 
                }
876
 
 
877
 
                if (cpu_is_omap2420()) {
878
 
                        size = OMAP2420_MMC_SIZE;
879
 
                        name = "mmci-omap";
880
 
                } else if (cpu_is_omap44xx()) {
881
 
                        if (i < 3)
882
 
                                irq += OMAP44XX_IRQ_GIC_START;
883
 
                        size = OMAP4_HSMMC_SIZE;
884
 
                        name = "mmci-omap-hs";
885
 
                } else {
886
 
                        size = OMAP3_HSMMC_SIZE;
887
 
                        name = "mmci-omap-hs";
888
 
                }
889
 
                omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
890
 
        };
 
587
        char *name = "mmci-omap";
 
588
 
 
589
        if (!mmc_data[0]) {
 
590
                pr_err("%s fails: Incomplete platform data\n", __func__);
 
591
                return;
 
592
        }
 
593
 
 
594
        omap242x_mmc_mux(mmc_data[0]);
 
595
        omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
 
596
                                        INT_24XX_MMC_IRQ, mmc_data[0]);
891
597
}
892
598
 
893
599
#endif
895
601
/*-------------------------------------------------------------------------*/
896
602
 
897
603
#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
898
 
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
 
604
#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
899
605
#define OMAP_HDQ_BASE   0x480B2000
900
606
#endif
901
607
static struct resource omap_hdq_resources[] = {
961
667
         * please keep these calls, and their implementations above,
962
668
         * in alphabetical order so they're easier to sort through.
963
669
         */
964
 
        omap_hsmmc_reset();
965
670
        omap_init_audio();
966
671
        omap_init_camera();
967
672
        omap_init_mbox();