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  • Committer: Bazaar Package Importer
  • Author(s): John Rigby, Upstream Fixes, Andy Green, John Rigby
  • Date: 2011-04-14 12:16:06 UTC
  • Revision ID: james.westby@ubuntu.com-20110414121606-b77podkyqgr2oix7
Tags: 2.6.38-1002.3
[ Upstream Fixes ]

* MUSB: shutdown: Make sure block is awake before doing shutdown
  - LP: #745737
* Fixed gpio polarity of gpio USB-phy reset.
  - LP: #747639

[ Andy Green ]

* LINARO: SAUCE: disable CONFIG_OMAP_RESET_CLOCKS
  - LP: #752900

[ John Rigby ]

* Rebase to new upstreams:
  Linux v2.6.38.1
  linaro-linux-2.6.38-upstream-29Mar2011
  Ubuntu-2.6.38-7.35
* SAUCE: OMAP4: clock: wait for module to become accessible on
  a clk enable
  - LP: #745737
* Rebase to new upstreams:
  Linux v2.6.38.2
  linaro-linux-2.6.38-upstream-5Apr2011
  Ubuntu-2.6.38-8.41
  - LP: #732842
* Update configs for device tree, dvfs and lttng
* LINARO: add building of dtb's
* LINARO: SAUCE: Disable lowest operating freqs on omap34xx
  - LP: #732912

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#ifndef __MACH_SPEAR6XX_H
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#define __MACH_SPEAR6XX_H
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#include <mach/hardware.h>
 
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#include <asm/memory.h>
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#include <mach/spear600.h>
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#define SPEAR6XX_ML_SDRAM_BASE          0x00000000
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#define SPEAR6XX_ML_SDRAM_SIZE          0x40000000
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#define SPEAR6XX_ML_SDRAM_BASE          UL(0x00000000)
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/* ICM1 - Low speed connection */
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#define SPEAR6XX_ICM1_BASE              0xD0000000
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#define SPEAR6XX_ICM1_SIZE              0x08000000
 
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#define SPEAR6XX_ICM1_BASE              UL(0xD0000000)
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#define SPEAR6XX_ICM1_UART0_BASE        0xD0000000
 
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#define SPEAR6XX_ICM1_UART0_BASE        UL(0xD0000000)
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#define VA_SPEAR6XX_ICM1_UART0_BASE     IO_ADDRESS(SPEAR6XX_ICM1_UART0_BASE)
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#define SPEAR6XX_ICM1_UART0_SIZE        0x00080000
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#define SPEAR6XX_ICM1_UART1_BASE        0xD0080000
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#define SPEAR6XX_ICM1_UART1_SIZE        0x00080000
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#define SPEAR6XX_ICM1_SSP0_BASE         0xD0100000
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#define SPEAR6XX_ICM1_SSP0_SIZE         0x00080000
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#define SPEAR6XX_ICM1_SSP1_BASE         0xD0180000
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#define SPEAR6XX_ICM1_SSP1_SIZE         0x00080000
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#define SPEAR6XX_ICM1_I2C_BASE          0xD0200000
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#define SPEAR6XX_ICM1_I2C_SIZE          0x00080000
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#define SPEAR6XX_ICM1_JPEG_BASE         0xD0800000
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#define SPEAR6XX_ICM1_JPEG_SIZE         0x00800000
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#define SPEAR6XX_ICM1_IRDA_BASE         0xD1000000
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#define SPEAR6XX_ICM1_IRDA_SIZE         0x00800000
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#define SPEAR6XX_ICM1_FSMC_BASE         0xD1800000
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#define SPEAR6XX_ICM1_FSMC_SIZE         0x00800000
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#define SPEAR6XX_ICM1_NAND_BASE         0xD2000000
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#define SPEAR6XX_ICM1_NAND_SIZE         0x00800000
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#define SPEAR6XX_ICM1_SRAM_BASE         0xD2800000
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#define SPEAR6XX_ICM1_SRAM_SIZE         0x00800000
 
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#define SPEAR6XX_ICM1_UART1_BASE        UL(0xD0080000)
 
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#define SPEAR6XX_ICM1_SSP0_BASE         UL(0xD0100000)
 
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#define SPEAR6XX_ICM1_SSP1_BASE         UL(0xD0180000)
 
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#define SPEAR6XX_ICM1_I2C_BASE          UL(0xD0200000)
 
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#define SPEAR6XX_ICM1_JPEG_BASE         UL(0xD0800000)
 
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#define SPEAR6XX_ICM1_IRDA_BASE         UL(0xD1000000)
 
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#define SPEAR6XX_ICM1_FSMC_BASE         UL(0xD1800000)
 
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#define SPEAR6XX_ICM1_NAND_BASE         UL(0xD2000000)
 
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#define SPEAR6XX_ICM1_SRAM_BASE         UL(0xD2800000)
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/* ICM2 - Application Subsystem */
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#define SPEAR6XX_ICM2_BASE              0xD8000000
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#define SPEAR6XX_ICM2_SIZE              0x08000000
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#define SPEAR6XX_ICM2_TMR0_BASE         0xD8000000
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#define SPEAR6XX_ICM2_TMR0_SIZE         0x00080000
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#define SPEAR6XX_ICM2_TMR1_BASE         0xD8080000
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#define SPEAR6XX_ICM2_TMR1_SIZE         0x00080000
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#define SPEAR6XX_ICM2_GPIO_BASE         0xD8100000
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#define SPEAR6XX_ICM2_GPIO_SIZE         0x00080000
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#define SPEAR6XX_ICM2_SPI2_BASE         0xD8180000
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#define SPEAR6XX_ICM2_SPI2_SIZE         0x00080000
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#define SPEAR6XX_ICM2_ADC_BASE          0xD8200000
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#define SPEAR6XX_ICM2_ADC_SIZE          0x00080000
 
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#define SPEAR6XX_ICM2_BASE              UL(0xD8000000)
 
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#define SPEAR6XX_ICM2_TMR0_BASE         UL(0xD8000000)
 
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#define SPEAR6XX_ICM2_TMR1_BASE         UL(0xD8080000)
 
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#define SPEAR6XX_ICM2_GPIO_BASE         UL(0xD8100000)
 
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#define SPEAR6XX_ICM2_SSP2_BASE         UL(0xD8180000)
 
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#define SPEAR6XX_ICM2_ADC_BASE          UL(0xD8200000)
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/* ML-1, 2 - Multi Layer CPU Subsystem */
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#define SPEAR6XX_ML_CPU_BASE            0xF0000000
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#define SPEAR6XX_ML_CPU_SIZE            0x08000000
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#define SPEAR6XX_CPU_TMR_BASE           0xF0000000
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#define SPEAR6XX_CPU_TMR_SIZE           0x00100000
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#define SPEAR6XX_CPU_GPIO_BASE          0xF0100000
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#define SPEAR6XX_CPU_GPIO_SIZE          0x00100000
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#define SPEAR6XX_CPU_VIC_SEC_BASE       0xF1000000
 
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#define SPEAR6XX_ML_CPU_BASE            UL(0xF0000000)
 
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#define SPEAR6XX_CPU_TMR_BASE           UL(0xF0000000)
 
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#define SPEAR6XX_CPU_GPIO_BASE          UL(0xF0100000)
 
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#define SPEAR6XX_CPU_VIC_SEC_BASE       UL(0xF1000000)
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#define VA_SPEAR6XX_CPU_VIC_SEC_BASE    IO_ADDRESS(SPEAR6XX_CPU_VIC_SEC_BASE)
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#define SPEAR6XX_CPU_VIC_SEC_SIZE       0x00100000
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#define SPEAR6XX_CPU_VIC_PRI_BASE       0xF1100000
 
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#define SPEAR6XX_CPU_VIC_PRI_BASE       UL(0xF1100000)
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#define VA_SPEAR6XX_CPU_VIC_PRI_BASE    IO_ADDRESS(SPEAR6XX_CPU_VIC_PRI_BASE)
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#define SPEAR6XX_CPU_VIC_PRI_SIZE       0x00100000
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/* ICM3 - Basic Subsystem */
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#define SPEAR6XX_ICM3_BASE              0xF8000000
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#define SPEAR6XX_ICM3_SIZE              0x08000000
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#define SPEAR6XX_ICM3_SMEM_BASE         0xF8000000
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#define SPEAR6XX_ICM3_SMEM_SIZE         0x04000000
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#define SPEAR6XX_ICM3_SMI_CTRL_BASE     0xFC000000
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#define SPEAR6XX_ICM3_SMI_CTRL_SIZE     0x00200000
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#define SPEAR6XX_ICM3_CLCD_BASE         0xFC200000
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#define SPEAR6XX_ICM3_CLCD_SIZE         0x00200000
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#define SPEAR6XX_ICM3_DMA_BASE          0xFC400000
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#define SPEAR6XX_ICM3_DMA_SIZE          0x00200000
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#define SPEAR6XX_ICM3_SDRAM_CTRL_BASE   0xFC600000
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#define SPEAR6XX_ICM3_SDRAM_CTRL_SIZE   0x00200000
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#define SPEAR6XX_ICM3_TMR_BASE          0xFC800000
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#define SPEAR6XX_ICM3_TMR_SIZE          0x00080000
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#define SPEAR6XX_ICM3_WDT_BASE          0xFC880000
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#define SPEAR6XX_ICM3_WDT_SIZE          0x00080000
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#define SPEAR6XX_ICM3_RTC_BASE          0xFC900000
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#define SPEAR6XX_ICM3_RTC_SIZE          0x00080000
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#define SPEAR6XX_ICM3_GPIO_BASE         0xFC980000
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#define SPEAR6XX_ICM3_GPIO_SIZE         0x00080000
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#define SPEAR6XX_ICM3_SYS_CTRL_BASE     0xFCA00000
 
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#define SPEAR6XX_ICM3_BASE              UL(0xF8000000)
 
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#define SPEAR6XX_ICM3_SMEM_BASE         UL(0xF8000000)
 
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#define SPEAR6XX_ICM3_SMI_CTRL_BASE     UL(0xFC000000)
 
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#define SPEAR6XX_ICM3_CLCD_BASE         UL(0xFC200000)
 
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#define SPEAR6XX_ICM3_DMA_BASE          UL(0xFC400000)
 
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#define SPEAR6XX_ICM3_SDRAM_CTRL_BASE   UL(0xFC600000)
 
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#define SPEAR6XX_ICM3_TMR_BASE          UL(0xFC800000)
 
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#define SPEAR6XX_ICM3_WDT_BASE          UL(0xFC880000)
 
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#define SPEAR6XX_ICM3_RTC_BASE          UL(0xFC900000)
 
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#define SPEAR6XX_ICM3_GPIO_BASE         UL(0xFC980000)
 
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#define SPEAR6XX_ICM3_SYS_CTRL_BASE     UL(0xFCA00000)
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#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE  IO_ADDRESS(SPEAR6XX_ICM3_SYS_CTRL_BASE)
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#define SPEAR6XX_ICM3_SYS_CTRL_SIZE     0x00080000
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#define SPEAR6XX_ICM3_MISC_REG_BASE     0xFCA80000
 
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#define SPEAR6XX_ICM3_MISC_REG_BASE     UL(0xFCA80000)
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#define VA_SPEAR6XX_ICM3_MISC_REG_BASE  IO_ADDRESS(SPEAR6XX_ICM3_MISC_REG_BASE)
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#define SPEAR6XX_ICM3_MISC_REG_SIZE     0x00080000
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/* ICM4 - High Speed Connection */
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#define SPEAR6XX_ICM4_BASE              0xE0000000
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#define SPEAR6XX_ICM4_SIZE              0x08000000
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#define SPEAR6XX_ICM4_GMAC_BASE         0xE0800000
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#define SPEAR6XX_ICM4_GMAC_SIZE         0x00800000
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#define SPEAR6XX_ICM4_USBD_FIFO_BASE    0xE1000000
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#define SPEAR6XX_ICM4_USBD_FIFO_SIZE    0x00100000
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#define SPEAR6XX_ICM4_USBD_CSR_BASE     0xE1100000
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#define SPEAR6XX_ICM4_USBD_CSR_SIZE     0x00100000
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#define SPEAR6XX_ICM4_USBD_PLDT_BASE    0xE1200000
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#define SPEAR6XX_ICM4_USBD_PLDT_SIZE    0x00100000
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#define SPEAR6XX_ICM4_USB_EHCI0_BASE    0xE1800000
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#define SPEAR6XX_ICM4_USB_EHCI0_SIZE    0x00100000
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#define SPEAR6XX_ICM4_USB_OHCI0_BASE    0xE1900000
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#define SPEAR6XX_ICM4_USB_OHCI0_SIZE    0x00100000
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#define SPEAR6XX_ICM4_USB_EHCI1_BASE    0xE2000000
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#define SPEAR6XX_ICM4_USB_EHCI1_SIZE    0x00100000
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#define SPEAR6XX_ICM4_USB_OHCI1_BASE    0xE2100000
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#define SPEAR6XX_ICM4_USB_OHCI1_SIZE    0x00100000
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#define SPEAR6XX_ICM4_USB_ARB_BASE      0xE2800000
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#define SPEAR6XX_ICM4_USB_ARB_SIZE      0x00010000
 
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#define SPEAR6XX_ICM4_BASE              UL(0xE0000000)
 
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#define SPEAR6XX_ICM4_GMAC_BASE         UL(0xE0800000)
 
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#define SPEAR6XX_ICM4_USBD_FIFO_BASE    UL(0xE1000000)
 
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#define SPEAR6XX_ICM4_USBD_CSR_BASE     UL(0xE1100000)
 
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#define SPEAR6XX_ICM4_USBD_PLDT_BASE    UL(0xE1200000)
 
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#define SPEAR6XX_ICM4_USB_EHCI0_BASE    UL(0xE1800000)
 
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#define SPEAR6XX_ICM4_USB_OHCI0_BASE    UL(0xE1900000)
 
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#define SPEAR6XX_ICM4_USB_EHCI1_BASE    UL(0xE2000000)
 
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#define SPEAR6XX_ICM4_USB_OHCI1_BASE    UL(0xE2100000)
 
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#define SPEAR6XX_ICM4_USB_ARB_BASE      UL(0xE2800000)
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/* Debug uart for linux, will be used for debug and uncompress messages */
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#define SPEAR_DBG_UART_BASE             SPEAR6XX_ICM1_UART0_BASE