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Viewing changes to arch/arm/mach-omap2/usb-musb.c

  • Committer: Bazaar Package Importer
  • Author(s): John Rigby, Upstream Fixes, Andy Green, John Rigby
  • Date: 2011-04-14 12:16:06 UTC
  • Revision ID: james.westby@ubuntu.com-20110414121606-b77podkyqgr2oix7
Tags: 2.6.38-1002.3
https://launchpad.net/bugs/745737
https://launchpad.net/bugs/747639
https://launchpad.net/bugs/752900
https://launchpad.net/bugs/745737
https://launchpad.net/bugs/732842
https://launchpad.net/bugs/732912
[ Upstream Fixes ]

* MUSB: shutdown: Make sure block is awake before doing shutdown
  - LP: #745737
* Fixed gpio polarity of gpio USB-phy reset.
  - LP: #747639

[ Andy Green ]

* LINARO: SAUCE: disable CONFIG_OMAP_RESET_CLOCKS
  - LP: #752900

[ John Rigby ]

* Rebase to new upstreams:
  Linux v2.6.38.1
  linaro-linux-2.6.38-upstream-29Mar2011
  Ubuntu-2.6.38-7.35
* SAUCE: OMAP4: clock: wait for module to become accessible on
  a clk enable
  - LP: #745737
* Rebase to new upstreams:
  Linux v2.6.38.2
  linaro-linux-2.6.38-upstream-5Apr2011
  Ubuntu-2.6.38-8.41
  - LP: #732842
* Update configs for device tree, dvfs and lttng
* LINARO: add building of dtb's
* LINARO: SAUCE: Disable lowest operating freqs on omap34xx
  - LP: #732912

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Lines of Context:
arch/arm/mach-omap2/usb-musb.c
30
30
#include <mach/irqs.h>
31
31
#include <mach/am35xx.h>
32
32
#include <plat/usb.h>
33
 
#include "control.h"
 
33
#include <plat/omap_device.h>
 
34
#include "mux.h"
34
35
 
35
36
#if defined(CONFIG_USB_MUSB_OMAP2PLUS) || defined (CONFIG_USB_MUSB_AM35X)
36
37
 
37
 
static void am35x_musb_reset(void)
38
 
{
39
 
        u32     regval;
40
 
 
41
 
        /* Reset the musb interface */
42
 
        regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
43
 
 
44
 
        regval |= AM35XX_USBOTGSS_SW_RST;
45
 
        omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
46
 
 
47
 
        regval &= ~AM35XX_USBOTGSS_SW_RST;
48
 
        omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
49
 
 
50
 
        regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
51
 
}
52
 
 
53
 
static void am35x_musb_phy_power(u8 on)
54
 
{
55
 
        unsigned long timeout = jiffies + msecs_to_jiffies(100);
56
 
        u32 devconf2;
57
 
 
58
 
        if (on) {
59
 
                /*
60
 
                 * Start the on-chip PHY and its PLL.
61
 
                 */
62
 
                devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
63
 
 
64
 
                devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN);
65
 
                devconf2 |= CONF2_PHY_PLLON;
66
 
 
67
 
                omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
68
 
 
69
 
                pr_info(KERN_INFO "Waiting for PHY clock good...\n");
70
 
                while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2)
71
 
                                & CONF2_PHYCLKGD)) {
72
 
                        cpu_relax();
73
 
 
74
 
                        if (time_after(jiffies, timeout)) {
75
 
                                pr_err(KERN_ERR "musb PHY clock good timed out\n");
76
 
                                break;
77
 
                        }
78
 
                }
79
 
        } else {
80
 
                /*
81
 
                 * Power down the on-chip PHY.
82
 
                 */
83
 
                devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
84
 
 
85
 
                devconf2 &= ~CONF2_PHY_PLLON;
86
 
                devconf2 |=  CONF2_PHYPWRDN | CONF2_OTGPWRDN;
87
 
                omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
88
 
        }
89
 
}
90
 
 
91
 
static void am35x_musb_clear_irq(void)
92
 
{
93
 
        u32 regval;
94
 
 
95
 
        regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
96
 
        regval |= AM35XX_USBOTGSS_INT_CLR;
97
 
        omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
98
 
        regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
99
 
}
100
 
 
101
 
static void am35x_musb_set_mode(u8 musb_mode)
102
 
{
103
 
        u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
104
 
 
105
 
        devconf2 &= ~CONF2_OTGMODE;
106
 
        switch (musb_mode) {
107
 
#ifdef  CONFIG_USB_MUSB_HDRC_HCD
108
 
        case MUSB_HOST:         /* Force VBUS valid, ID = 0 */
109
 
                devconf2 |= CONF2_FORCE_HOST;
110
 
                break;
111
 
#endif
112
 
#ifdef  CONFIG_USB_GADGET_MUSB_HDRC
113
 
        case MUSB_PERIPHERAL:   /* Force VBUS valid, ID = 1 */
114
 
                devconf2 |= CONF2_FORCE_DEVICE;
115
 
                break;
116
 
#endif
117
 
#ifdef  CONFIG_USB_MUSB_OTG
118
 
        case MUSB_OTG:          /* Don't override the VBUS/ID comparators */
119
 
                devconf2 |= CONF2_NO_OVERRIDE;
120
 
                break;
121
 
#endif
122
 
        default:
123
 
                pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode);
124
 
        }
125
 
 
126
 
        omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
127
 
}
128
 
 
129
 
static struct resource musb_resources[] = {
130
 
        [0] = { /* start and end set dynamically */
131
 
                .flags  = IORESOURCE_MEM,
132
 
        },
133
 
        [1] = { /* general IRQ */
134
 
                .start  = INT_243X_HS_USB_MC,
135
 
                .flags  = IORESOURCE_IRQ,
136
 
                .name   = "mc",
137
 
        },
138
 
        [2] = { /* DMA IRQ */
139
 
                .start  = INT_243X_HS_USB_DMA,
140
 
                .flags  = IORESOURCE_IRQ,
141
 
                .name   = "dma",
142
 
        },
143
 
};
144
 
 
145
38
static struct musb_hdrc_config musb_config = {
146
39
        .multipoint     = 1,
147
40
        .dyn_fifo       = 1,
169
62
 
170
63
static u64 musb_dmamask = DMA_BIT_MASK(32);
171
64
 
172
 
static struct platform_device musb_device = {
173
 
        .name           = "musb-omap2430",
174
 
        .id             = -1,
175
 
        .dev = {
176
 
                .dma_mask               = &musb_dmamask,
177
 
                .coherent_dma_mask      = DMA_BIT_MASK(32),
178
 
                .platform_data          = &musb_plat,
 
65
static struct omap_device_pm_latency omap_musb_latency[] = {
 
66
        {
 
67
                .deactivate_func        = omap_device_idle_hwmods,
 
68
                .activate_func          = omap_device_enable_hwmods,
 
69
                .flags                  = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
179
70
        },
180
 
        .num_resources  = ARRAY_SIZE(musb_resources),
181
 
        .resource       = musb_resources,
182
71
};
183
72
 
 
73
static void usb_musb_mux_init(struct omap_musb_board_data *board_data)
 
74
{
 
75
        switch (board_data->interface_type) {
 
76
        case MUSB_INTERFACE_UTMI:
 
77
                omap_mux_init_signal("usba0_otg_dp", OMAP_PIN_INPUT);
 
78
                omap_mux_init_signal("usba0_otg_dm", OMAP_PIN_INPUT);
 
79
                break;
 
80
        case MUSB_INTERFACE_ULPI:
 
81
                omap_mux_init_signal("usba0_ulpiphy_clk",
 
82
                                                OMAP_PIN_INPUT_PULLDOWN);
 
83
                omap_mux_init_signal("usba0_ulpiphy_stp",
 
84
                                                OMAP_PIN_INPUT_PULLDOWN);
 
85
                omap_mux_init_signal("usba0_ulpiphy_dir",
 
86
                                                OMAP_PIN_INPUT_PULLDOWN);
 
87
                omap_mux_init_signal("usba0_ulpiphy_nxt",
 
88
                                                OMAP_PIN_INPUT_PULLDOWN);
 
89
                omap_mux_init_signal("usba0_ulpiphy_dat0",
 
90
                                                OMAP_PIN_INPUT_PULLDOWN);
 
91
                omap_mux_init_signal("usba0_ulpiphy_dat1",
 
92
                                                OMAP_PIN_INPUT_PULLDOWN);
 
93
                omap_mux_init_signal("usba0_ulpiphy_dat2",
 
94
                                                OMAP_PIN_INPUT_PULLDOWN);
 
95
                omap_mux_init_signal("usba0_ulpiphy_dat3",
 
96
                                                OMAP_PIN_INPUT_PULLDOWN);
 
97
                omap_mux_init_signal("usba0_ulpiphy_dat4",
 
98
                                                OMAP_PIN_INPUT_PULLDOWN);
 
99
                omap_mux_init_signal("usba0_ulpiphy_dat5",
 
100
                                                OMAP_PIN_INPUT_PULLDOWN);
 
101
                omap_mux_init_signal("usba0_ulpiphy_dat6",
 
102
                                                OMAP_PIN_INPUT_PULLDOWN);
 
103
                omap_mux_init_signal("usba0_ulpiphy_dat7",
 
104
                                                OMAP_PIN_INPUT_PULLDOWN);
 
105
                break;
 
106
        default:
 
107
                break;
 
108
        }
 
109
}
 
110
 
184
111
void __init usb_musb_init(struct omap_musb_board_data *board_data)
185
112
{
186
 
        if (cpu_is_omap243x()) {
187
 
                musb_resources[0].start = OMAP243X_HS_BASE;
188
 
        } else if (cpu_is_omap3517() || cpu_is_omap3505()) {
189
 
                musb_device.name = "musb-am35x";
190
 
                musb_resources[0].start = AM35XX_IPSS_USBOTGSS_BASE;
191
 
                musb_resources[1].start = INT_35XX_USBOTG_IRQ;
192
 
                board_data->set_phy_power = am35x_musb_phy_power;
193
 
                board_data->clear_irq = am35x_musb_clear_irq;
194
 
                board_data->set_mode = am35x_musb_set_mode;
195
 
                board_data->reset = am35x_musb_reset;
196
 
        } else if (cpu_is_omap34xx()) {
197
 
                musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE;
 
113
        struct omap_hwmod               *oh;
 
114
        struct omap_device              *od;
 
115
        struct platform_device          *pdev;
 
116
        struct device                   *dev;
 
117
        int                             bus_id = -1;
 
118
        const char                      *oh_name, *name;
 
119
 
 
120
        if (cpu_is_omap3517() || cpu_is_omap3505()) {
198
121
        } else if (cpu_is_omap44xx()) {
199
 
                musb_resources[0].start = OMAP44XX_HSUSB_OTG_BASE;
200
 
                musb_resources[1].start = OMAP44XX_IRQ_HS_USB_MC_N;
201
 
                musb_resources[2].start = OMAP44XX_IRQ_HS_USB_DMA_N;
 
122
                usb_musb_mux_init(board_data);
202
123
        }
203
 
        musb_resources[0].end = musb_resources[0].start + SZ_4K - 1;
204
124
 
205
125
        /*
206
126
         * REVISIT: This line can be removed once all the platforms using
212
132
        musb_plat.mode = board_data->mode;
213
133
        musb_plat.extvbus = board_data->extvbus;
214
134
 
215
 
        if (platform_device_register(&musb_device) < 0)
216
 
                printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n");
 
135
        if (cpu_is_omap44xx())
 
136
                omap4430_phy_init(dev);
 
137
 
 
138
        if (cpu_is_omap3517() || cpu_is_omap3505()) {
 
139
                oh_name = "am35x_otg_hs";
 
140
                name = "musb-am35x";
 
141
        } else {
 
142
                oh_name = "usb_otg_hs";
 
143
                name = "musb-omap2430";
 
144
        }
 
145
 
 
146
        oh = omap_hwmod_lookup(oh_name);
 
147
        if (!oh) {
 
148
                pr_err("Could not look up %s\n", oh_name);
 
149
                return;
 
150
        }
 
151
 
 
152
        od = omap_device_build(name, bus_id, oh, &musb_plat,
 
153
                               sizeof(musb_plat), omap_musb_latency,
 
154
                               ARRAY_SIZE(omap_musb_latency), false);
 
155
        if (IS_ERR(od)) {
 
156
                pr_err("Could not build omap_device for %s %s\n",
 
157
                                                name, oh_name);
 
158
                return;
 
159
        }
 
160
 
 
161
        pdev = &od->pdev;
 
162
        dev = &pdev->dev;
 
163
        get_device(dev);
 
164
        dev->dma_mask = &musb_dmamask;
 
165
        dev->coherent_dma_mask = musb_dmamask;
 
166
        put_device(dev);
217
167
}
218
168
 
219
169
#else