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Viewing changes to arch/arm/mach-spear3xx/include/mach/spear310.h

  • Committer: Bazaar Package Importer
  • Author(s): John Rigby, Upstream Fixes, Andy Green, John Rigby
  • Date: 2011-04-14 12:16:06 UTC
  • Revision ID: james.westby@ubuntu.com-20110414121606-b77podkyqgr2oix7
Tags: 2.6.38-1002.3
https://launchpad.net/bugs/745737
https://launchpad.net/bugs/747639
https://launchpad.net/bugs/752900
https://launchpad.net/bugs/745737
https://launchpad.net/bugs/732842
https://launchpad.net/bugs/732912
[ Upstream Fixes ]

* MUSB: shutdown: Make sure block is awake before doing shutdown
  - LP: #745737
* Fixed gpio polarity of gpio USB-phy reset.
  - LP: #747639

[ Andy Green ]

* LINARO: SAUCE: disable CONFIG_OMAP_RESET_CLOCKS
  - LP: #752900

[ John Rigby ]

* Rebase to new upstreams:
  Linux v2.6.38.1
  linaro-linux-2.6.38-upstream-29Mar2011
  Ubuntu-2.6.38-7.35
* SAUCE: OMAP4: clock: wait for module to become accessible on
  a clk enable
  - LP: #745737
* Rebase to new upstreams:
  Linux v2.6.38.2
  linaro-linux-2.6.38-upstream-5Apr2011
  Ubuntu-2.6.38-8.41
  - LP: #732842
* Update configs for device tree, dvfs and lttng
* LINARO: add building of dtb's
* LINARO: SAUCE: Disable lowest operating freqs on omap34xx
  - LP: #732912

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Lines of Context:
arch/arm/mach-spear3xx/include/mach/spear310.h
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#ifndef __MACH_SPEAR310_H
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#define __MACH_SPEAR310_H
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#define SPEAR310_NAND_BASE              0x40000000
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#define SPEAR310_NAND_SIZE              0x04000000
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#define SPEAR310_FSMC_BASE              0x44000000
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#define SPEAR310_FSMC_SIZE              0x01000000
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#define SPEAR310_UART1_BASE             0xB2000000
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#define SPEAR310_UART2_BASE             0xB2080000
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#define SPEAR310_UART3_BASE             0xB2100000
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#define SPEAR310_UART4_BASE             0xB2180000
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#define SPEAR310_UART5_BASE             0xB2200000
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#define SPEAR310_UART_SIZE              0x00080000
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#define SPEAR310_HDLC_BASE              0xB2800000
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#define SPEAR310_HDLC_SIZE              0x00800000
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#define SPEAR310_RS485_0_BASE           0xB3000000
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#define SPEAR310_RS485_0_SIZE           0x00800000
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#define SPEAR310_RS485_1_BASE           0xB3800000
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#define SPEAR310_RS485_1_SIZE           0x00800000
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#define SPEAR310_SOC_CONFIG_BASE        0xB4000000
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#define SPEAR310_SOC_CONFIG_SIZE        0x00000070
 
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#define SPEAR310_NAND_BASE              UL(0x40000000)
 
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#define SPEAR310_FSMC_BASE              UL(0x44000000)
 
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#define SPEAR310_UART1_BASE             UL(0xB2000000)
 
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#define SPEAR310_UART2_BASE             UL(0xB2080000)
 
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#define SPEAR310_UART3_BASE             UL(0xB2100000)
 
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#define SPEAR310_UART4_BASE             UL(0xB2180000)
 
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#define SPEAR310_UART5_BASE             UL(0xB2200000)
 
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#define SPEAR310_HDLC_BASE              UL(0xB2800000)
 
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#define SPEAR310_RS485_0_BASE           UL(0xB3000000)
 
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#define SPEAR310_RS485_1_BASE           UL(0xB3800000)
 
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#define SPEAR310_SOC_CONFIG_BASE        UL(0xB4000000)
 
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/* Interrupt registers offsets and masks */
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#define INT_STS_MASK_REG                0x04
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#define SMII0_IRQ_MASK                  (1 << 0)