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Viewing changes to debian/patches/patches-arm-1.4.0/0015-hw-omap_synctimer.c-Add-OMAP3-synctimer.patch

  • Committer: Package Import Robot
  • Author(s): Serge Hallyn
  • Date: 2013-05-28 08:18:30 UTC
  • mfrom: (1.8.2) (10.1.37 sid)
  • Revision ID: package-import@ubuntu.com-20130528081830-87xl2z9fq516a814
Tags: 1.5.0+dfsg-2ubuntu1
http://bugs.debian.org/709241
* Merge 1.5.0+dfs-2 from debian unstable.  Remaining changes:
  - debian/control
    * update maintainer
    * remove libiscsi, usb-redir, vde, vnc-jpeg, and libssh2-1-dev
      from build-deps
    * enable rbd
    * add qemu-system and qemu-common B/R to qemu-keymaps
    * add D:udev, R:qemu, R:qemu-common and B:qemu-common to
      qemu-system-common
    * qemu-system-arm, qemu-system-ppc, qemu-system-sparc:
      - add qemu-kvm to Provides
      - add qemu-common, qemu-kvm, kvm to B/R
      - remove openbios-sparc from qemu-system-sparc D
    * qemu-system-x86:
      - add qemu-common to Breaks/Replaces.
      - add cpu-checker to Recommends.
    * qemu-user: add B/R:qemu-kvm
    * qemu-kvm:
      - add armhf armel powerpc sparc to Architecture
      - C/R/P: qemu-kvm-spice
    * add qemu-common package
    * drop qemu-slof which is not packaged in ubuntu
  - add qemu-system-common.links for tap ifup/down scripts and OVMF link.
  - qemu-system-x86.links:
    * remove pxe rom links which are in kvm-ipxe
    * add symlink for kvm.1 manpage
  - debian/rules
    * add kvm-spice symlink to qemu-kvm
    * call dh_installmodules for qemu-system-x86
    * update dh_installinit to install upstart script
    * run dh_installman (Closes: #709241) (cherrypicked from 1.5.0+dfsg-2)
  - Add qemu-utils.links for kvm-* symlinks.
  - Add qemu-system-x86.qemu-kvm.upstart and .default
  - Add qemu-system-x86.modprobe to set nesting=1
  - Add qemu-system-common.preinst to add kvm group
  - qemu-system-common.postinst: remove bad group acl if there, then have
    udev relabel /dev/kvm.
  - Dropped patches:
    * 0001-fix-wrong-output-with-info-chardev-for-tcp-socket.patch
  - Kept patches:
    * expose_vms_qemu64cpu.patch - updated
    * gridcentric patch - updated
    * linaro arm patches from qemu-linaro rebasing branch

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debian/patches/patches-arm-1.4.0/0015-hw-omap_synctimer.c-Add-OMAP3-synctimer.patch
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From ac1ab32e1e31c9e3d0ed353e2965df1493aa70a7 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Juha=20Riihim=C3=A4ki?= <juha.riihimaki@nokia.com>
3
 
Date: Mon, 18 Feb 2013 16:58:25 +0000
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Subject: [PATCH 15/77] hw/omap_synctimer.c: Add OMAP3 synctimer
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
8
 
 
9
 
Add the OMAP3 synctimer.
10
 
 
11
 
TODO: is the handling of halfword reads really correct??
12
 
 -- yes, this is allowing a 32 bit counter to be read as two
13
 
    16 bit reads without getting two out-of-sync parts
14
 
    (the trm talks about this albeit extremely vaguely)
15
 
TODO: can we avoid using the backcompat old_mmio ?
16
 
 
17
 
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
18
 
[Riku Voipio: Fixes and restructuring patchset]
19
 
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
20
 
[Peter Maydell: More fixes and cleanups for upstream submission]
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Signed-off-by:  Peter Maydell <peter.maydell@linaro.org>
22
 
---
23
 
 hw/omap_synctimer.c | 60 +++++++++++++++++++++++++++++++++++++++++++++++++++--
24
 
 1 file changed, 58 insertions(+), 2 deletions(-)
25
 
 
26
 
diff --git a/hw/omap_synctimer.c b/hw/omap_synctimer.c
27
 
index 945711e..122cb4f 100644
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--- a/hw/omap_synctimer.c
29
 
+++ b/hw/omap_synctimer.c
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@@ -24,6 +24,7 @@ struct omap_synctimer_s {
31
 
     MemoryRegion iomem;
32
 
     uint32_t val;
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     uint16_t readh;
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+    uint32_t sysconfig; /*OMAP3*/
35
 
 };
36
 
 
37
 
 /* 32-kHz Sync Timer of the OMAP2 */
38
 
@@ -52,6 +53,14 @@ static uint32_t omap_synctimer_readw(void *opaque, hwaddr addr)
39
 
     return 0;
40
 
 }
41
 
 
42
 
+static uint32_t omap3_synctimer_readw(void *opaque, hwaddr addr)
43
 
+{
44
 
+    struct omap_synctimer_s *s = (struct omap_synctimer_s *)opaque;
45
 
+    return (addr == 0x04)
46
 
+        ? s->sysconfig
47
 
+        : omap_synctimer_readw(opaque, addr);
48
 
+}
49
 
+
50
 
 static uint32_t omap_synctimer_readh(void *opaque, hwaddr addr)
51
 
 {
52
 
     struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
53
 
@@ -66,12 +75,38 @@ static uint32_t omap_synctimer_readh(void *opaque, hwaddr addr)
54
 
     }
55
 
 }
56
 
 
57
 
+static uint32_t omap3_synctimer_readh(void *opaque, hwaddr addr)
58
 
+{
59
 
+    struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
60
 
+    uint32_t ret;
61
 
+
62
 
+    if (addr & 2) {
63
 
+        return s->readh;
64
 
+    }
65
 
+
66
 
+    ret = omap3_synctimer_readw(opaque, addr);
67
 
+    s->readh = ret >> 16;
68
 
+    return ret & 0xffff;
69
 
+}
70
 
+
71
 
 static void omap_synctimer_write(void *opaque, hwaddr addr,
72
 
                 uint32_t value)
73
 
 {
74
 
     OMAP_BAD_REG(addr);
75
 
 }
76
 
 
77
 
+
78
 
+static void omap3_synctimer_write(void *opaque, hwaddr addr,
79
 
+                                  uint32_t value)
80
 
+{
81
 
+    struct omap_synctimer_s *s = (struct omap_synctimer_s *)opaque;
82
 
+    if (addr == 0x04) {
83
 
+        s->sysconfig = value & 0x0c;
84
 
+    } else {
85
 
+        OMAP_BAD_REG(addr);
86
 
+    }
87
 
+}
88
 
+
89
 
 static const MemoryRegionOps omap_synctimer_ops = {
90
 
     .old_mmio = {
91
 
         .read = {
92
 
@@ -88,14 +123,35 @@ static const MemoryRegionOps omap_synctimer_ops = {
93
 
     .endianness = DEVICE_NATIVE_ENDIAN,
94
 
 };
95
 
 
96
 
+static const MemoryRegionOps omap3_synctimer_ops = {
97
 
+    .old_mmio = {
98
 
+        .read = {
99
 
+            omap_badwidth_read32,
100
 
+            omap3_synctimer_readh,
101
 
+            omap3_synctimer_readw,
102
 
+        },
103
 
+        .write = {
104
 
+            omap_badwidth_write32,
105
 
+            omap3_synctimer_write,
106
 
+            omap3_synctimer_write,
107
 
+        },
108
 
+    },
109
 
+    .endianness = DEVICE_NATIVE_ENDIAN,
110
 
+};
111
 
+
112
 
 struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta,
113
 
                 struct omap_mpu_state_s *mpu, omap_clk fclk, omap_clk iclk)
114
 
 {
115
 
     struct omap_synctimer_s *s = g_malloc0(sizeof(*s));
116
 
 
117
 
     omap_synctimer_reset(s);
118
 
-    memory_region_init_io(&s->iomem, &omap_synctimer_ops, s, "omap.synctimer",
119
 
-                          omap_l4_region_size(ta, 0));
120
 
+    if (cpu_class_omap3(mpu)) {
121
 
+        memory_region_init_io(&s->iomem, &omap3_synctimer_ops, s,
122
 
+                              "omap.synctimer", omap_l4_region_size(ta, 0));
123
 
+    } else {
124
 
+        memory_region_init_io(&s->iomem, &omap_synctimer_ops, s,
125
 
+                              "omap.synctimer", omap_l4_region_size(ta, 0));
126
 
+    }
127
 
     omap_l4_attach(ta, 0, &s->iomem);
128
 
 
129
 
     return s;
130
 
1.8.1.2
131